1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 * Copyright (C) 2018-2025 Intel Corporation
6 */
7 #ifndef __IWL_CONFIG_H__
8 #define __IWL_CONFIG_H__
9
10 #include <linux/types.h>
11 #include <linux/netdevice.h>
12 #include <linux/ieee80211.h>
13 #include <linux/nl80211.h>
14 #include <linux/module.h>
15 #include <linux/mod_devicetable.h>
16 #include "iwl-csr.h"
17 #include "iwl-drv.h"
18
19 enum iwl_device_family {
20 IWL_DEVICE_FAMILY_UNDEFINED,
21 IWL_DEVICE_FAMILY_1000,
22 IWL_DEVICE_FAMILY_100,
23 IWL_DEVICE_FAMILY_2000,
24 IWL_DEVICE_FAMILY_2030,
25 IWL_DEVICE_FAMILY_105,
26 IWL_DEVICE_FAMILY_135,
27 IWL_DEVICE_FAMILY_5000,
28 IWL_DEVICE_FAMILY_5150,
29 IWL_DEVICE_FAMILY_6000,
30 IWL_DEVICE_FAMILY_6000i,
31 IWL_DEVICE_FAMILY_6005,
32 IWL_DEVICE_FAMILY_6030,
33 IWL_DEVICE_FAMILY_6050,
34 IWL_DEVICE_FAMILY_6150,
35 IWL_DEVICE_FAMILY_7000,
36 IWL_DEVICE_FAMILY_8000,
37 IWL_DEVICE_FAMILY_9000,
38 IWL_DEVICE_FAMILY_22000,
39 IWL_DEVICE_FAMILY_AX210,
40 IWL_DEVICE_FAMILY_BZ,
41 IWL_DEVICE_FAMILY_SC,
42 IWL_DEVICE_FAMILY_DR,
43 };
44
45 #if defined(__FreeBSD__)
46 static const char *iwl_device_family_str[] = {
47 [IWL_DEVICE_FAMILY_UNDEFINED] = "undefined",
48 [IWL_DEVICE_FAMILY_1000] = "1000",
49 [IWL_DEVICE_FAMILY_100] = "100",
50 [IWL_DEVICE_FAMILY_2000] = "2000",
51 [IWL_DEVICE_FAMILY_2030] = "2030",
52 [IWL_DEVICE_FAMILY_105] = "105",
53 [IWL_DEVICE_FAMILY_135] = "135",
54 [IWL_DEVICE_FAMILY_5000] = "5000",
55 [IWL_DEVICE_FAMILY_5150] = "5150",
56 [IWL_DEVICE_FAMILY_6000] = "6000",
57 [IWL_DEVICE_FAMILY_6000i] = "6000i",
58 [IWL_DEVICE_FAMILY_6005] = "6005",
59 [IWL_DEVICE_FAMILY_6030] = "6030",
60 [IWL_DEVICE_FAMILY_6050] = "6050",
61 [IWL_DEVICE_FAMILY_6150] = "6150",
62 [IWL_DEVICE_FAMILY_7000] = "7000",
63 [IWL_DEVICE_FAMILY_8000] = "8000",
64 [IWL_DEVICE_FAMILY_9000] = "9000",
65 [IWL_DEVICE_FAMILY_22000] = "22000",
66 [IWL_DEVICE_FAMILY_AX210] = "AX210",
67 [IWL_DEVICE_FAMILY_BZ] = "BZ",
68 [IWL_DEVICE_FAMILY_SC] = "SC",
69 };
70
71 static inline const char *
iwl_device_family_name(enum iwl_device_family devive_family)72 iwl_device_family_name(enum iwl_device_family devive_family)
73 {
74 if (devive_family < 0 ||
75 devive_family >= ARRAY_SIZE(iwl_device_family_str))
76 return "unknown";
77 return (iwl_device_family_str[devive_family]);
78 }
79 #endif
80
81 /*
82 * LED mode
83 * IWL_LED_DEFAULT: use device default
84 * IWL_LED_RF_STATE: turn LED on/off based on RF state
85 * LED ON = RF ON
86 * LED OFF = RF OFF
87 * IWL_LED_BLINK: adjust led blink rate based on blink table
88 * IWL_LED_DISABLE: led disabled
89 */
90 enum iwl_led_mode {
91 IWL_LED_DEFAULT,
92 IWL_LED_RF_STATE,
93 IWL_LED_BLINK,
94 IWL_LED_DISABLE,
95 };
96
97 /**
98 * enum iwl_nvm_type - nvm formats
99 * @IWL_NVM: the regular format
100 * @IWL_NVM_EXT: extended NVM format
101 * @IWL_NVM_SDP: NVM format used by 3168 series
102 */
103 enum iwl_nvm_type {
104 IWL_NVM,
105 IWL_NVM_EXT,
106 IWL_NVM_SDP,
107 };
108
109 /*
110 * This is the threshold value of plcp error rate per 100mSecs. It is
111 * used to set and check for the validity of plcp_delta.
112 */
113 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1
114 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50
115 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100
116 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
117 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255
118 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0
119
120 /* TX queue watchdog timeouts in mSecs */
121 #define IWL_WATCHDOG_DISABLED 0
122 #define IWL_DEF_WD_TIMEOUT 2500
123 #define IWL_LONG_WD_TIMEOUT 10000
124 #define IWL_MAX_WD_TIMEOUT 120000
125
126 #define IWL_DEFAULT_MAX_TX_POWER 22
127 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
128 NETIF_F_TSO | NETIF_F_TSO6)
129 #define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM)
130
131 /* Antenna presence definitions */
132 #define ANT_NONE 0x0
133 #define ANT_INVALID 0xff
134 #define ANT_A BIT(0)
135 #define ANT_B BIT(1)
136 #define ANT_C BIT(2)
137 #define ANT_AB (ANT_A | ANT_B)
138 #define ANT_AC (ANT_A | ANT_C)
139 #define ANT_BC (ANT_B | ANT_C)
140 #define ANT_ABC (ANT_A | ANT_B | ANT_C)
141
142
143 #define IWL_FW_AND_PNVM(pfx, api) \
144 MODULE_FIRMWARE(pfx "-" __stringify(api) ".ucode"); \
145 MODULE_FIRMWARE(pfx ".pnvm")
146
147 #define IWL_CORE_FW(pfx, core) \
148 MODULE_FIRMWARE(pfx "-c" __stringify(core) ".ucode")
149
num_of_ant(u8 mask)150 static inline u8 num_of_ant(u8 mask)
151 {
152 return !!((mask) & ANT_A) +
153 !!((mask) & ANT_B) +
154 !!((mask) & ANT_C);
155 }
156
157 /**
158 * struct iwl_fw_mon_reg - FW monitor register info
159 * @addr: register address
160 * @mask: register mask
161 */
162 struct iwl_fw_mon_reg {
163 u32 addr;
164 u32 mask;
165 };
166
167 /**
168 * struct iwl_fw_mon_regs - FW monitor registers
169 * @write_ptr: write pointer register
170 * @cycle_cnt: cycle count register
171 * @cur_frag: current fragment in use
172 */
173 struct iwl_fw_mon_regs {
174 struct iwl_fw_mon_reg write_ptr;
175 struct iwl_fw_mon_reg cycle_cnt;
176 struct iwl_fw_mon_reg cur_frag;
177 };
178
179 /**
180 * struct iwl_family_base_params - base parameters for an entire family
181 * @max_ll_items: max number of OTP blocks
182 * @shadow_ram_support: shadow support for OTP memory
183 * @led_compensation: compensate on the led on/off time per HW according
184 * to the deviation to achieve the desired led frequency.
185 * The detail algorithm is described in iwl-led.c
186 * @wd_timeout: TX queues watchdog timeout
187 * @max_event_log_size: size of event log buffer size for ucode event logging
188 * @shadow_reg_enable: HW shadow register support
189 * @apmg_not_supported: there's no APMG
190 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
191 * is in flight. This is due to a HW bug in 7260, 3160 and 7265.
192 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
193 * @max_tfd_queue_size: max number of entries in tfd queue.
194 * @eeprom_size: EEPROM size
195 * @num_of_queues: number of HW TX queues supported
196 * @pcie_l1_allowed: PCIe L1 state is allowed
197 * @pll_cfg: PLL configuration needed
198 * @nvm_hw_section_num: the ID of the HW NVM section
199 * @features: hw features, any combination of feature_passlist
200 * @smem_offset: offset from which the SMEM begins
201 * @smem_len: the length of SMEM
202 * @mac_addr_from_csr: read HW address from CSR registers at this offset
203 * @d3_debug_data_base_addr: base address where D3 debug data is stored
204 * @d3_debug_data_length: length of the D3 debug data
205 * @min_ba_txq_size: minimum number of slots required in a TX queue used
206 * for aggregation
207 * @min_txq_size: minimum number of slots required in a TX queue
208 * @gp2_reg_addr: GP2 (timer) register address
209 * @mon_dbgi_regs: monitor DBGI registers
210 * @mon_dram_regs: monitor DRAM registers
211 * @mon_smem_regs: monitor SMEM registers
212 * @ucode_api_max: Highest version of uCode API supported by driver.
213 * @ucode_api_min: Lowest version of uCode API supported by driver.
214 */
215 struct iwl_family_base_params {
216 unsigned int wd_timeout;
217
218 u16 eeprom_size;
219 u16 max_event_log_size;
220
221 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
222 shadow_ram_support:1,
223 shadow_reg_enable:1,
224 pcie_l1_allowed:1,
225 apmg_wake_up_wa:1,
226 apmg_not_supported:1,
227 scd_chain_ext_wa:1;
228
229 u16 num_of_queues; /* def: HW dependent */
230 u32 max_tfd_queue_size; /* def: HW dependent */
231
232 u8 max_ll_items;
233 u8 led_compensation;
234 u16 ucode_api_max;
235 u16 ucode_api_min;
236 u32 mac_addr_from_csr:10;
237 u8 nvm_hw_section_num;
238 netdev_features_t features;
239 u32 smem_offset;
240 u32 smem_len;
241 u32 d3_debug_data_base_addr;
242 u32 d3_debug_data_length;
243 u32 min_txq_size;
244 u32 gp2_reg_addr;
245 u32 min_ba_txq_size;
246 const struct iwl_fw_mon_regs mon_dram_regs;
247 const struct iwl_fw_mon_regs mon_smem_regs;
248 const struct iwl_fw_mon_regs mon_dbgi_regs;
249 };
250
251 /*
252 * FW is released as "core N release", and we used to have a
253 * gap of 3 between the API version and core number. Now the
254 * reported API version will be 1000 + core and we encode it
255 * in the filename as "c<core>".
256 */
257 #define API_IS_CORE_START 1000
258 #define API_TO_CORE_OFFS 3
259 #define ENCODE_CORE_AS_API(core) (API_IS_CORE_START + (core))
260
iwl_api_is_core_number(int api)261 static inline bool iwl_api_is_core_number(int api)
262 {
263 return api >= API_IS_CORE_START;
264 }
265
iwl_api_to_core(int api)266 static inline int iwl_api_to_core(int api)
267 {
268 if (iwl_api_is_core_number(api))
269 return api - API_IS_CORE_START;
270
271 return api - API_TO_CORE_OFFS;
272 }
273
274 #define FW_API_FMT "%s%d"
275 #define FW_API_ARG(n) \
276 iwl_api_is_core_number(n) ? "c" : "", \
277 iwl_api_is_core_number(n) ? (n) - API_IS_CORE_START : (n)
278
279 /*
280 * @stbc: support Tx STBC and 1*SS Rx STBC
281 * @ldpc: support Tx/Rx with LDPC
282 * @use_rts_for_aggregation: use rts/cts protection for HT traffic
283 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
284 */
285 struct iwl_ht_params {
286 u8 ht_greenfield_support:1,
287 stbc:1,
288 ldpc:1,
289 use_rts_for_aggregation:1;
290 u8 ht40_bands;
291 };
292
293 /*
294 * Tx-backoff threshold
295 * @temperature: The threshold in Celsius
296 * @backoff: The tx-backoff in uSec
297 */
298 struct iwl_tt_tx_backoff {
299 s32 temperature;
300 u32 backoff;
301 };
302
303 #define TT_TX_BACKOFF_SIZE 6
304
305 /**
306 * struct iwl_tt_params - thermal throttling parameters
307 * @ct_kill_entry: CT Kill entry threshold
308 * @ct_kill_exit: CT Kill exit threshold
309 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs
310 * to checks whether to exit CT Kill.
311 * @dynamic_smps_entry: Dynamic SMPS entry threshold
312 * @dynamic_smps_exit: Dynamic SMPS exit threshold
313 * @tx_protection_entry: TX protection entry threshold
314 * @tx_protection_exit: TX protection exit threshold
315 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
316 * @support_ct_kill: Support CT Kill?
317 * @support_dynamic_smps: Support dynamic SMPS?
318 * @support_tx_protection: Support tx protection?
319 * @support_tx_backoff: Support tx-backoff?
320 */
321 struct iwl_tt_params {
322 u32 ct_kill_entry;
323 u32 ct_kill_exit;
324 u32 ct_kill_duration;
325 u32 dynamic_smps_entry;
326 u32 dynamic_smps_exit;
327 u32 tx_protection_entry;
328 u32 tx_protection_exit;
329 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
330 u8 support_ct_kill:1,
331 support_dynamic_smps:1,
332 support_tx_protection:1,
333 support_tx_backoff:1;
334 };
335
336 /*
337 * information on how to parse the EEPROM
338 */
339 #define EEPROM_REG_BAND_1_CHANNELS 0x08
340 #define EEPROM_REG_BAND_2_CHANNELS 0x26
341 #define EEPROM_REG_BAND_3_CHANNELS 0x42
342 #define EEPROM_REG_BAND_4_CHANNELS 0x5C
343 #define EEPROM_REG_BAND_5_CHANNELS 0x74
344 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82
345 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92
346 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80
347 #define EEPROM_REGULATORY_BAND_NO_HT40 0
348
349 /* lower blocks contain EEPROM image and calibration data */
350 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */
351 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */
352 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */
353
354 struct iwl_eeprom_params {
355 const u8 regulatory_bands[7];
356 bool enhanced_txpower;
357 };
358
359 /* Tx-backoff power threshold
360 * @pwr: The power limit in mw
361 * @backoff: The tx-backoff in uSec
362 */
363 struct iwl_pwr_tx_backoff {
364 u32 pwr;
365 u32 backoff;
366 };
367
368 enum iwl_mac_cfg_ltr_delay {
369 IWL_CFG_TRANS_LTR_DELAY_NONE = 0,
370 IWL_CFG_TRANS_LTR_DELAY_200US = 1,
371 IWL_CFG_TRANS_LTR_DELAY_2500US = 2,
372 IWL_CFG_TRANS_LTR_DELAY_1820US = 3,
373 };
374
375 /**
376 * struct iwl_mac_cfg - information about the MAC-specific device part
377 *
378 * These values are specific to the device ID and do not change when
379 * multiple configs are used for a single device ID. They values are
380 * used, among other things, to boot the NIC so that the HW REV or
381 * RFID can be read before deciding the remaining parameters to use.
382 *
383 * @base: pointer to basic parameters
384 * @device_family: the device family
385 * @umac_prph_offset: offset to add to UMAC periphery address
386 * @xtal_latency: power up latency to get the xtal stabilized
387 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY
388 * @gen2: 22000 and on transport operation
389 * @mq_rx_supported: multi-queue rx support
390 * @integrated: discrete or integrated
391 * @low_latency_xtal: use the low latency xtal if supported
392 * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
393 * @ltr_delay: LTR delay parameter, &enum iwl_mac_cfg_ltr_delay.
394 * @imr_enabled: use the IMR if supported.
395 */
396 struct iwl_mac_cfg {
397 const struct iwl_family_base_params *base;
398 enum iwl_device_family device_family;
399 u32 umac_prph_offset;
400 u32 xtal_latency;
401 u32 extra_phy_cfg_flags;
402 u32 gen2:1,
403 mq_rx_supported:1,
404 integrated:1,
405 low_latency_xtal:1,
406 bisr_workaround:1,
407 ltr_delay:2,
408 imr_enabled:1;
409 };
410
411 /*
412 * These sizes were picked according to 8 MSDUs inside 64/256/612 A-MSDUs
413 * in an A-MPDU, with additional overhead to account for processing time.
414 * They will be doubled for MACs starting from So/Ty that don't support
415 * putting multiple frames into a single buffer.
416 */
417 #define IWL_NUM_RBDS_NON_HE (64 * 8)
418 #define IWL_NUM_RBDS_HE (256 * 8)
419 #define IWL_NUM_RBDS_EHT (512 * 8)
420
421 /**
422 * struct iwl_rf_cfg - RF/CRF configuration data
423 * @fw_name_pre: Firmware filename prefix. The api version and extension
424 * (.ucode) will be added to filename before loading from disk. The
425 * filename is constructed as <fw_name_pre>-<api>.ucode.
426 * name will be generated dynamically
427 * @ucode_api_max: Highest version of uCode API supported by driver.
428 * @ucode_api_min: Lowest version of uCode API supported by driver.
429 * @max_inst_size: The maximal length of the fw inst section (only DVM)
430 * @max_data_size: The maximal length of the fw data section (only DVM)
431 * @valid_tx_ant: valid transmit antenna
432 * @valid_rx_ant: valid receive antenna
433 * @non_shared_ant: the antenna that is for WiFi only
434 * @nvm_ver: NVM version
435 * @nvm_calib_ver: NVM calibration version
436 * @bw_limit: bandwidth limit for this device, if non-zero
437 * @ht_params: point to ht parameters
438 * @eeprom_params: EEPROM parameters (old devices)
439 * @thermal_params: Thermal throttling parameters
440 * @lp_xtal_workaround: low-power crystal workaround needed
441 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
442 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
443 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
444 * @internal_wimax_coex: internal wifi/wimax combo device
445 * @host_interrupt_operation_mode: device needs host interrupt operation
446 * mode set
447 * @pwr_tx_backoffs: translation table between power limits and backoffs
448 * @dccm_offset: offset from which DCCM begins
449 * @dccm_len: length of DCCM (including runtime stack CCM)
450 * @dccm2_offset: offset from which the second DCCM begins
451 * @dccm2_len: length of the second DCCM
452 * @vht_mu_mimo_supported: VHT MU-MIMO support
453 * @nvm_type: see &enum iwl_nvm_type
454 * @uhb_supported: ultra high band channels supported
455 * @eht_supported: EHT supported
456 * @num_rbds: number of receive buffer descriptors to use
457 * (only used for multi-queue capable devices)
458 *
459 * We enable the driver to be backward compatible wrt. hardware features.
460 * API differences in uCode shouldn't be handled here but through TLVs
461 * and/or the uCode API version instead.
462 */
463 struct iwl_rf_cfg {
464 /* params specific to an individual device within a device family */
465 const char *fw_name_pre;
466 /* params likely to change within a device family */
467 const struct iwl_ht_params ht_params;
468 const struct iwl_eeprom_params *eeprom_params;
469 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
470 const struct iwl_tt_params *thermal_params;
471 enum iwl_led_mode led_mode;
472 enum iwl_nvm_type nvm_type;
473 u32 max_data_size;
474 u32 max_inst_size;
475 u32 dccm_offset;
476 u32 dccm_len;
477 u32 dccm2_offset;
478 u32 dccm2_len;
479 u16 nvm_ver;
480 u16 nvm_calib_ver;
481 u16 bw_limit;
482 u32 rx_with_siso_diversity:1,
483 tx_with_siso_diversity:1,
484 internal_wimax_coex:1,
485 host_interrupt_operation_mode:1,
486 lp_xtal_workaround:1,
487 vht_mu_mimo_supported:1,
488 uhb_supported:1,
489 eht_supported:1;
490 u8 valid_tx_ant;
491 u8 valid_rx_ant;
492 u8 non_shared_ant;
493 u16 ucode_api_max;
494 u16 ucode_api_min;
495 u16 num_rbds;
496 };
497
498 #define IWL_CFG_ANY (~0)
499
500 #define IWL_CFG_MAC_TYPE_PU 0x31
501 #define IWL_CFG_MAC_TYPE_TH 0x32
502 #define IWL_CFG_MAC_TYPE_QU 0x33
503 #define IWL_CFG_MAC_TYPE_CC 0x34
504 #define IWL_CFG_MAC_TYPE_QUZ 0x35
505 #define IWL_CFG_MAC_TYPE_SO 0x37
506 #define IWL_CFG_MAC_TYPE_TY 0x42
507 #define IWL_CFG_MAC_TYPE_SOF 0x43
508 #define IWL_CFG_MAC_TYPE_MA 0x44
509 #define IWL_CFG_MAC_TYPE_BZ 0x46
510 #define IWL_CFG_MAC_TYPE_GL 0x47
511 #define IWL_CFG_MAC_TYPE_SC 0x48
512 #define IWL_CFG_MAC_TYPE_SC2 0x49
513 #define IWL_CFG_MAC_TYPE_SC2F 0x4A
514 #define IWL_CFG_MAC_TYPE_BZ_W 0x4B
515 #define IWL_CFG_MAC_TYPE_BR 0x4C
516 #define IWL_CFG_MAC_TYPE_DR 0x4D
517
518 #define IWL_CFG_RF_TYPE_JF2 0x105
519 #define IWL_CFG_RF_TYPE_JF1 0x108
520 #define IWL_CFG_RF_TYPE_HR2 0x10A
521 #define IWL_CFG_RF_TYPE_HR1 0x10C
522 #define IWL_CFG_RF_TYPE_GF 0x10D
523 #define IWL_CFG_RF_TYPE_FM 0x112
524 #define IWL_CFG_RF_TYPE_WH 0x113
525 #define IWL_CFG_RF_TYPE_PE 0x114
526
527 #define IWL_CFG_RF_ID_TH 0x1
528 #define IWL_CFG_RF_ID_TH1 0x1
529 #define IWL_CFG_RF_ID_JF 0x3
530 #define IWL_CFG_RF_ID_JF1 0x6
531 #define IWL_CFG_RF_ID_JF1_DIV 0xA
532 #define IWL_CFG_RF_ID_HR 0x7
533 #define IWL_CFG_RF_ID_HR1 0x4
534
535 #define IWL_CFG_CORES_BT 0x0
536 #define IWL_CFG_CORES_BT_GNSS 0x5
537
538 #define IWL_CFG_NO_CDB 0x0
539 #define IWL_CFG_CDB 0x1
540
541 #define IWL_CFG_NO_JACKET 0x0
542 #define IWL_CFG_IS_JACKET 0x1
543
544 #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)
545 #define IWL_SUBDEVICE_BW_LIM(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
546 #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)
547
548 struct iwl_dev_info {
549 const struct iwl_rf_cfg *cfg;
550 const char *name;
551 u16 device;
552 u16 subdevice;
553 u32 subdevice_m_l:4,
554 subdevice_m_h:4,
555 match_rf_type:1,
556 rf_type:9,
557 match_bw_limit:1,
558 bw_limit:1,
559 match_discrete:1,
560 discrete:1,
561 match_rf_id:1,
562 rf_id:4,
563 match_cdb:1,
564 cdb:1;
565 };
566
567 #if IS_ENABLED(CONFIG_IWLWIFI_KUNIT_TESTS)
568 extern const struct iwl_dev_info iwl_dev_info_table[];
569 extern const unsigned int iwl_dev_info_table_size;
570 extern const struct pci_device_id iwl_hw_card_ids[];
571 #endif
572
573 const struct iwl_dev_info *
574 iwl_pci_find_dev_info(u16 device, u16 subsystem_device, u16 rf_type, u8 cdb,
575 u8 rf_id, u8 bw_limit, bool discrete);
576
577 /*
578 * This list declares the config structures for all devices.
579 */
580 extern const struct iwl_mac_cfg iwl1000_mac_cfg;
581 extern const struct iwl_mac_cfg iwl5000_mac_cfg;
582 extern const struct iwl_mac_cfg iwl2000_mac_cfg;
583 extern const struct iwl_mac_cfg iwl2030_mac_cfg;
584 extern const struct iwl_mac_cfg iwl105_mac_cfg;
585 extern const struct iwl_mac_cfg iwl135_mac_cfg;
586 extern const struct iwl_mac_cfg iwl5150_mac_cfg;
587 extern const struct iwl_mac_cfg iwl6005_mac_cfg;
588 extern const struct iwl_mac_cfg iwl6030_mac_cfg;
589 extern const struct iwl_mac_cfg iwl6000i_mac_cfg;
590 extern const struct iwl_mac_cfg iwl6050_mac_cfg;
591 extern const struct iwl_mac_cfg iwl6150_mac_cfg;
592 extern const struct iwl_mac_cfg iwl6000_mac_cfg;
593 extern const struct iwl_mac_cfg iwl7000_mac_cfg;
594 extern const struct iwl_mac_cfg iwl8000_mac_cfg;
595 extern const struct iwl_mac_cfg iwl9000_mac_cfg;
596 extern const struct iwl_mac_cfg iwl9560_mac_cfg;
597 extern const struct iwl_mac_cfg iwl9560_long_latency_mac_cfg;
598 extern const struct iwl_mac_cfg iwl9560_shared_clk_mac_cfg;
599 extern const struct iwl_mac_cfg iwl_qu_mac_cfg;
600 extern const struct iwl_mac_cfg iwl_qu_medium_latency_mac_cfg;
601 extern const struct iwl_mac_cfg iwl_qu_long_latency_mac_cfg;
602 extern const struct iwl_mac_cfg iwl_ax200_mac_cfg;
603 extern const struct iwl_mac_cfg iwl_ty_mac_cfg;
604 extern const struct iwl_mac_cfg iwl_so_mac_cfg;
605 extern const struct iwl_mac_cfg iwl_so_long_latency_mac_cfg;
606 extern const struct iwl_mac_cfg iwl_so_long_latency_imr_mac_cfg;
607 extern const struct iwl_mac_cfg iwl_ma_mac_cfg;
608 extern const struct iwl_mac_cfg iwl_bz_mac_cfg;
609 extern const struct iwl_mac_cfg iwl_gl_mac_cfg;
610 extern const struct iwl_mac_cfg iwl_sc_mac_cfg;
611 extern const struct iwl_mac_cfg iwl_dr_mac_cfg;
612
613 extern const char iwl1000_bgn_name[];
614 extern const char iwl1000_bg_name[];
615 extern const char iwl100_bgn_name[];
616 extern const char iwl100_bg_name[];
617 extern const char iwl2000_2bgn_name[];
618 extern const char iwl2000_2bgn_d_name[];
619 extern const char iwl2030_2bgn_name[];
620 extern const char iwl105_bgn_name[];
621 extern const char iwl105_bgn_d_name[];
622 extern const char iwl135_bgn_name[];
623 extern const char iwl5300_agn_name[];
624 extern const char iwl5100_bgn_name[];
625 extern const char iwl5100_abg_name[];
626 extern const char iwl5100_agn_name[];
627 extern const char iwl5350_agn_name[];
628 extern const char iwl5150_agn_name[];
629 extern const char iwl5150_abg_name[];
630 extern const char iwl6005_2agn_name[];
631 extern const char iwl6005_2abg_name[];
632 extern const char iwl6005_2bg_name[];
633 extern const char iwl6005_2agn_sff_name[];
634 extern const char iwl6005_2agn_d_name[];
635 extern const char iwl6005_2agn_mow1_name[];
636 extern const char iwl6005_2agn_mow2_name[];
637 extern const char iwl6030_2agn_name[];
638 extern const char iwl6030_2abg_name[];
639 extern const char iwl6030_2bgn_name[];
640 extern const char iwl6030_2bg_name[];
641 extern const char iwl6035_2agn_name[];
642 extern const char iwl6035_2agn_sff_name[];
643 extern const char iwl1030_bgn_name[];
644 extern const char iwl1030_bg_name[];
645 extern const char iwl130_bgn_name[];
646 extern const char iwl130_bg_name[];
647 extern const char iwl6000i_2agn_name[];
648 extern const char iwl6000i_2abg_name[];
649 extern const char iwl6000i_2bg_name[];
650 extern const char iwl6050_2agn_name[];
651 extern const char iwl6050_2abg_name[];
652 extern const char iwl6150_bgn_name[];
653 extern const char iwl6150_bg_name[];
654 extern const char iwl6000_3agn_name[];
655 extern const char iwl7260_2ac_name[];
656 extern const char iwl7260_2n_name[];
657 extern const char iwl7260_n_name[];
658 extern const char iwl3160_2ac_name[];
659 extern const char iwl3160_2n_name[];
660 extern const char iwl3160_n_name[];
661 extern const char iwl3165_2ac_name[];
662 extern const char iwl3168_2ac_name[];
663 extern const char iwl7265_2ac_name[];
664 extern const char iwl7265_2n_name[];
665 extern const char iwl7265_n_name[];
666 extern const char iwl8260_2n_name[];
667 extern const char iwl8260_2ac_name[];
668 extern const char iwl8265_2ac_name[];
669 extern const char iwl8275_2ac_name[];
670 extern const char iwl4165_2ac_name[];
671 extern const char iwl_killer_1435i_name[];
672 extern const char iwl_killer_1434_kix_name[];
673 extern const char iwl9162_name[];
674 extern const char iwl9260_name[];
675 extern const char iwl9260_1_name[];
676 extern const char iwl9270_name[];
677 extern const char iwl9461_name[];
678 extern const char iwl9462_name[];
679 extern const char iwl9560_name[];
680 extern const char iwl9162_160_name[];
681 extern const char iwl9260_160_name[];
682 extern const char iwl9270_160_name[];
683 extern const char iwl9461_160_name[];
684 extern const char iwl9462_160_name[];
685 extern const char iwl9560_160_name[];
686 extern const char iwl9260_killer_1550_name[];
687 extern const char iwl9560_killer_1550i_name[];
688 extern const char iwl9560_killer_1550s_name[];
689 extern const char iwl_ax200_name[];
690 extern const char iwl_ax203_name[];
691 extern const char iwl_ax201_name[];
692 extern const char iwl_ax101_name[];
693 extern const char iwl_ax200_killer_1650w_name[];
694 extern const char iwl_ax200_killer_1650x_name[];
695 extern const char iwl_ax201_killer_1650s_name[];
696 extern const char iwl_ax201_killer_1650i_name[];
697 extern const char iwl_ax210_killer_1675w_name[];
698 extern const char iwl_ax210_killer_1675x_name[];
699 extern const char iwl9560_killer_1550i_160_name[];
700 extern const char iwl9560_killer_1550s_160_name[];
701 extern const char iwl_ax211_killer_1675s_name[];
702 extern const char iwl_ax211_killer_1675i_name[];
703 extern const char iwl_ax411_killer_1690s_name[];
704 extern const char iwl_ax411_killer_1690i_name[];
705 extern const char iwl_ax210_name[];
706 extern const char iwl_ax211_name[];
707 extern const char iwl_ax411_name[];
708 extern const char iwl_killer_be1750s_name[];
709 extern const char iwl_killer_be1750i_name[];
710 extern const char iwl_killer_be1750w_name[];
711 extern const char iwl_killer_be1750x_name[];
712 extern const char iwl_killer_be1790s_name[];
713 extern const char iwl_killer_be1790i_name[];
714 extern const char iwl_be201_name[];
715 extern const char iwl_be200_name[];
716 extern const char iwl_be202_name[];
717 extern const char iwl_be401_name[];
718 extern const char iwl_be213_name[];
719 extern const char iwl_killer_be1775s_name[];
720 extern const char iwl_killer_be1775i_name[];
721 extern const char iwl_be211_name[];
722 extern const char iwl_killer_bn1850w2_name[];
723 extern const char iwl_killer_bn1850i_name[];
724 extern const char iwl_bn201_name[];
725 extern const char iwl_bn203_name[];
726 extern const char iwl_be221_name[];
727 extern const char iwl_be223_name[];
728 extern const char iwl_ax221_name[];
729 #if IS_ENABLED(CONFIG_IWLDVM)
730 extern const struct iwl_rf_cfg iwl5300_agn_cfg;
731 extern const struct iwl_rf_cfg iwl5350_agn_cfg;
732 extern const struct iwl_rf_cfg iwl5100_n_cfg;
733 extern const struct iwl_rf_cfg iwl5100_abg_cfg;
734 extern const struct iwl_rf_cfg iwl5150_agn_cfg;
735 extern const struct iwl_rf_cfg iwl5150_abg_cfg;
736 extern const struct iwl_rf_cfg iwl6005_non_n_cfg;
737 extern const struct iwl_rf_cfg iwl6005_n_cfg;
738 extern const struct iwl_rf_cfg iwl6030_n_cfg;
739 extern const struct iwl_rf_cfg iwl6030_non_n_cfg;
740 extern const struct iwl_rf_cfg iwl6000i_2agn_cfg;
741 extern const struct iwl_rf_cfg iwl6000i_non_n_cfg;
742 extern const struct iwl_rf_cfg iwl6000i_non_n_cfg;
743 extern const struct iwl_rf_cfg iwl6000_3agn_cfg;
744 extern const struct iwl_rf_cfg iwl6050_2agn_cfg;
745 extern const struct iwl_rf_cfg iwl6050_2abg_cfg;
746 extern const struct iwl_rf_cfg iwl6150_bgn_cfg;
747 extern const struct iwl_rf_cfg iwl6150_bg_cfg;
748 extern const struct iwl_rf_cfg iwl1000_bgn_cfg;
749 extern const struct iwl_rf_cfg iwl1000_bg_cfg;
750 extern const struct iwl_rf_cfg iwl100_bgn_cfg;
751 extern const struct iwl_rf_cfg iwl100_bg_cfg;
752 extern const struct iwl_rf_cfg iwl130_bgn_cfg;
753 extern const struct iwl_rf_cfg iwl130_bg_cfg;
754 extern const struct iwl_rf_cfg iwl2000_2bgn_cfg;
755 extern const struct iwl_rf_cfg iwl2030_2bgn_cfg;
756 extern const struct iwl_rf_cfg iwl6035_2agn_cfg;
757 extern const struct iwl_rf_cfg iwl105_bgn_cfg;
758 extern const struct iwl_rf_cfg iwl135_bgn_cfg;
759 #endif /* CONFIG_IWLDVM */
760 #if IS_ENABLED(CONFIG_IWLMVM)
761 extern const struct iwl_rf_cfg iwl7260_cfg;
762 extern const struct iwl_rf_cfg iwl7260_high_temp_cfg;
763 extern const struct iwl_rf_cfg iwl3160_cfg;
764 extern const struct iwl_rf_cfg iwl3165_2ac_cfg;
765 extern const struct iwl_rf_cfg iwl3168_2ac_cfg;
766 extern const struct iwl_rf_cfg iwl7265_cfg;
767 extern const struct iwl_rf_cfg iwl7265d_cfg;
768 extern const struct iwl_rf_cfg iwl8260_cfg;
769 extern const struct iwl_rf_cfg iwl8265_cfg;
770 extern const struct iwl_rf_cfg iwl_rf_jf;
771 extern const struct iwl_rf_cfg iwl_rf_jf_80mhz;
772 extern const struct iwl_rf_cfg iwl_rf_hr1;
773 extern const struct iwl_rf_cfg iwl_rf_hr;
774 extern const struct iwl_rf_cfg iwl_rf_hr_80mhz;
775
776 extern const struct iwl_rf_cfg iwl_rf_gf;
777 #endif /* CONFIG_IWLMVM */
778
779 #if IS_ENABLED(CONFIG_IWLMLD)
780 extern const struct iwl_rf_cfg iwl_rf_fm;
781 extern const struct iwl_rf_cfg iwl_rf_fm_160mhz;
782 #define iwl_rf_wh iwl_rf_fm
783 #define iwl_rf_wh_160mhz iwl_rf_fm_160mhz
784 extern const struct iwl_rf_cfg iwl_rf_wh_non_eht;
785 #define iwl_rf_pe iwl_rf_fm
786 #endif /* CONFIG_IWLMLD */
787
788 #endif /* __IWL_CONFIG_H__ */
789