1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3
4 #ifndef _FBNIC_H_
5 #define _FBNIC_H_
6
7 #include <linux/interrupt.h>
8 #include <linux/io.h>
9 #include <linux/ptp_clock_kernel.h>
10 #include <linux/types.h>
11 #include <linux/workqueue.h>
12
13 #include "fbnic_csr.h"
14 #include "fbnic_fw.h"
15 #include "fbnic_fw_log.h"
16 #include "fbnic_hw_stats.h"
17 #include "fbnic_mac.h"
18 #include "fbnic_rpc.h"
19
20 struct fbnic_napi_vector;
21
22 #define FBNIC_MAX_NAPI_VECTORS 128u
23 #define FBNIC_MBX_CMPL_SLOTS 4
24
25 struct fbnic_dev {
26 struct device *dev;
27 struct net_device *netdev;
28 struct dentry *dbg_fbd;
29 struct device *hwmon;
30
31 u32 __iomem *uc_addr0;
32 u32 __iomem *uc_addr4;
33 const struct fbnic_mac *mac;
34 unsigned int fw_msix_vector;
35 unsigned int pcs_msix_vector;
36 unsigned short num_irqs;
37
38 struct {
39 u8 users;
40 char name[IFNAMSIZ + 9];
41 } napi_irq[FBNIC_MAX_NAPI_VECTORS];
42
43 struct delayed_work service_task;
44
45 struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES];
46 struct fbnic_fw_cap fw_cap;
47 struct fbnic_fw_completion *cmpl_data[FBNIC_MBX_CMPL_SLOTS];
48 /* Lock protecting Tx Mailbox queue to prevent possible races */
49 spinlock_t fw_tx_lock;
50
51 unsigned long last_heartbeat_request;
52 unsigned long last_heartbeat_response;
53 u8 fw_heartbeat_enabled;
54
55 u64 dsn;
56 u32 mps;
57 u32 readrq;
58
59 /* Local copy of the devices TCAM */
60 struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES];
61 struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES];
62 u8 mac_addr_boundary;
63 u8 tce_tcam_last;
64
65 /* IP TCAM */
66 struct fbnic_ip_addr ip_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
67 struct fbnic_ip_addr ip_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
68 struct fbnic_ip_addr ipo_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
69 struct fbnic_ip_addr ipo_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
70
71 /* Number of TCQs/RCQs available on hardware */
72 u16 max_num_queues;
73
74 /* Lock protecting writes to @time_high, @time_offset of fbnic_netdev,
75 * and the HW time CSR machinery.
76 */
77 spinlock_t time_lock;
78 /* Externally accessible PTP clock, may be NULL */
79 struct ptp_clock *ptp;
80 struct ptp_clock_info ptp_info;
81 /* Last @time_high refresh time in jiffies (to catch stalls) */
82 unsigned long last_read;
83
84 /* Local copy of hardware statistics */
85 struct fbnic_hw_stats hw_stats;
86
87 /* Lock protecting access to hw_stats */
88 spinlock_t hw_stats_lock;
89
90 struct fbnic_fw_log fw_log;
91 };
92
93 /* Reserve entry 0 in the MSI-X "others" array until we have filled all
94 * 32 of the possible interrupt slots. By doing this we can avoid any
95 * potential conflicts should we need to enable one of the debug interrupt
96 * causes later.
97 */
98 enum {
99 FBNIC_FW_MSIX_ENTRY,
100 FBNIC_PCS_MSIX_ENTRY,
101 FBNIC_NON_NAPI_VECTORS
102 };
103
fbnic_present(struct fbnic_dev * fbd)104 static inline bool fbnic_present(struct fbnic_dev *fbd)
105 {
106 return !!READ_ONCE(fbd->uc_addr0);
107 }
108
fbnic_wr32(struct fbnic_dev * fbd,u32 reg,u32 val)109 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val)
110 {
111 u32 __iomem *csr = READ_ONCE(fbd->uc_addr0);
112
113 if (csr)
114 writel(val, csr + reg);
115 }
116
117 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg);
118
fbnic_wrfl(struct fbnic_dev * fbd)119 static inline void fbnic_wrfl(struct fbnic_dev *fbd)
120 {
121 fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0);
122 }
123
124 static inline void
fbnic_rmw32(struct fbnic_dev * fbd,u32 reg,u32 mask,u32 val)125 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val)
126 {
127 u32 v;
128
129 v = fbnic_rd32(fbd, reg);
130 v &= ~mask;
131 v |= val;
132 fbnic_wr32(fbd, reg, v);
133 }
134
135 #define wr32(_f, _r, _v) fbnic_wr32(_f, _r, _v)
136 #define rd32(_f, _r) fbnic_rd32(_f, _r)
137 #define wrfl(_f) fbnic_wrfl(_f)
138
139 bool fbnic_fw_present(struct fbnic_dev *fbd);
140 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg);
141 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val);
142
143 #define fw_rd32(_f, _r) fbnic_fw_rd32(_f, _r)
144 #define fw_wr32(_f, _r, _v) fbnic_fw_wr32(_f, _r, _v)
145 #define fw_wrfl(_f) fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG)
146
fbnic_bmc_present(struct fbnic_dev * fbd)147 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd)
148 {
149 return fbd->fw_cap.bmc_present;
150 }
151
fbnic_init_failure(struct fbnic_dev * fbd)152 static inline bool fbnic_init_failure(struct fbnic_dev *fbd)
153 {
154 return !fbd->netdev;
155 }
156
157 extern char fbnic_driver_name[];
158
159 void fbnic_devlink_free(struct fbnic_dev *fbd);
160 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev);
161 void fbnic_devlink_register(struct fbnic_dev *fbd);
162 void fbnic_devlink_unregister(struct fbnic_dev *fbd);
163
164 int fbnic_fw_request_mbx(struct fbnic_dev *fbd);
165 void fbnic_fw_free_mbx(struct fbnic_dev *fbd);
166
167 void fbnic_hwmon_register(struct fbnic_dev *fbd);
168 void fbnic_hwmon_unregister(struct fbnic_dev *fbd);
169
170 int fbnic_pcs_request_irq(struct fbnic_dev *fbd);
171 void fbnic_pcs_free_irq(struct fbnic_dev *fbd);
172
173 void fbnic_napi_name_irqs(struct fbnic_dev *fbd);
174 int fbnic_napi_request_irq(struct fbnic_dev *fbd,
175 struct fbnic_napi_vector *nv);
176 void fbnic_napi_free_irq(struct fbnic_dev *fbd,
177 struct fbnic_napi_vector *nv);
178 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr);
179 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler,
180 unsigned long flags, const char *name, void *data);
181 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data);
182 void fbnic_free_irqs(struct fbnic_dev *fbd);
183 int fbnic_alloc_irqs(struct fbnic_dev *fbd);
184
185 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,
186 const size_t str_sz);
187
188 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd);
189 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd);
190 void fbnic_dbg_init(void);
191 void fbnic_dbg_exit(void);
192
193 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version);
194 int fbnic_csr_regs_len(struct fbnic_dev *fbd);
195
196 void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm);
197 void fbnic_config_rx_frames(struct fbnic_napi_vector *nv);
198
199 enum fbnic_boards {
200 fbnic_board_asic
201 };
202
203 struct fbnic_info {
204 unsigned int max_num_queues;
205 unsigned int bar_mask;
206 };
207
208 #endif /* _FBNIC_H_ */
209