1 /* 2 * \file trc_pkt_types_etmv3.h 3 * \brief OpenCSD : 4 * 5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. 6 */ 7 8 /* 9 * Redistribution and use in source and binary forms, with or without modification, 10 * are permitted provided that the following conditions are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3. Neither the name of the copyright holder nor the names of its contributors 20 * may be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef ARM_TRC_ETM3_PKT_TYPES_ETMV3_H_INCLUDED 36 #define ARM_TRC_ETM3_PKT_TYPES_ETMV3_H_INCLUDED 37 38 #include "opencsd/trc_pkt_types.h" 39 40 /** @addtogroup trc_pkts 41 @{*/ 42 43 /** @name ETMv3 Packet Types 44 @{*/ 45 46 typedef enum _ocsd_etmv3_pkt_type 47 { 48 49 // markers for unknown packets 50 ETM3_PKT_NOERROR, //!< no error in packet - supplimentary data. 51 ETM3_PKT_NOTSYNC, //!< no sync found yet 52 ETM3_PKT_INCOMPLETE_EOT, //!< flushing incomplete/empty packet at end of trace. 53 54 // markers for valid packets 55 ETM3_PKT_BRANCH_ADDRESS, 56 ETM3_PKT_A_SYNC, 57 ETM3_PKT_CYCLE_COUNT, 58 ETM3_PKT_I_SYNC, 59 ETM3_PKT_I_SYNC_CYCLE, 60 ETM3_PKT_TRIGGER, 61 ETM3_PKT_P_HDR, 62 ETM3_PKT_STORE_FAIL, 63 ETM3_PKT_OOO_DATA, 64 ETM3_PKT_OOO_ADDR_PLC, 65 ETM3_PKT_NORM_DATA, 66 ETM3_PKT_DATA_SUPPRESSED, 67 ETM3_PKT_VAL_NOT_TRACED, 68 ETM3_PKT_IGNORE, 69 ETM3_PKT_CONTEXT_ID, 70 ETM3_PKT_VMID, 71 ETM3_PKT_EXCEPTION_ENTRY, 72 ETM3_PKT_EXCEPTION_EXIT, 73 ETM3_PKT_TIMESTAMP, 74 75 // internal processing types 76 ETM3_PKT_BRANCH_OR_BYPASS_EOT, 77 78 // packet errors 79 ETM3_PKT_BAD_SEQUENCE, //!< invalid sequence for packet type 80 ETM3_PKT_BAD_TRACEMODE, //!< invalid packet type for this trace mode. 81 ETM3_PKT_RESERVED //!< packet type reserved. 82 83 } ocsd_etmv3_pkt_type; 84 85 typedef struct _ocsd_etmv3_excep { 86 ocsd_armv7_exception type; /**< exception type. */ 87 uint16_t number; /**< exception as number */ 88 struct { 89 uint32_t present:1; /**< exception present in packet */ 90 uint32_t cancel:1; /**< exception cancels prev instruction traced. */ 91 uint32_t cm_type:1; 92 uint32_t cm_resume:4; /**< M class resume code */ 93 uint32_t cm_irq_n:9; /**< M class IRQ n */ 94 } bits; 95 } ocsd_etmv3_excep; 96 97 typedef struct _etmv3_context_t { 98 struct { 99 uint32_t curr_alt_isa:1; /**< current Alt ISA flag for Tee / T32 (used if not in present packet) */ 100 uint32_t curr_NS:1; /**< current NS flag (used if not in present packet) */ 101 uint32_t curr_Hyp:1; /**< current Hyp flag (used if not in present packet) */ 102 uint32_t updated:1; /**< context updated */ 103 uint32_t updated_c:1; /**< updated CtxtID */ 104 uint32_t updated_v:1; /**< updated VMID */ 105 }; 106 uint32_t ctxtID; /**< Context ID */ 107 uint8_t VMID; /**< VMID */ 108 } etmv3_context_t; 109 110 111 typedef struct _etmv3_data_t { 112 113 uint32_t value; /**< Data value */ 114 ocsd_pkt_vaddr addr; /**< current data address */ 115 116 struct { 117 uint32_t ooo_tag:2; /**< Out of order data tag. */ 118 uint32_t be:1; /**< data transfers big-endian */ 119 uint32_t update_be:1; /**< updated Be flag */ 120 uint32_t update_addr:1; /**< updated address */ 121 uint32_t update_dval:1; /**< updated data value */ 122 }; 123 } etmv3_data_t; 124 125 typedef struct _etmv3_isync_t { 126 ocsd_iSync_reason reason; 127 struct { 128 uint32_t has_cycle_count:1; /**< updated cycle count */ 129 uint32_t has_LSipAddress:1; /**< main address is load-store instuction, data address is overlapping instruction @ start of trace */ 130 uint32_t no_address:1; /**< data only ISync */ 131 }; 132 } etmv3_isync_t; 133 134 typedef struct _ocsd_etmv3_pkt 135 { 136 ocsd_etmv3_pkt_type type; /**< Primary packet type. */ 137 138 ocsd_isa curr_isa; /**< current ISA */ 139 ocsd_isa prev_isa; /**< ISA in previous packet */ 140 141 etmv3_context_t context; /**< current context */ 142 ocsd_pkt_vaddr addr; /**< current Addr */ 143 144 etmv3_isync_t isync_info; 145 146 ocsd_etmv3_excep exception; 147 148 ocsd_pkt_atom atom; /**< atom elements - non zerom number indicates valid atom count */ 149 uint8_t p_hdr_fmt; /**< if atom elements, associated phdr format */ 150 uint32_t cycle_count; /**< cycle count associated with this packet (ETMv3 has counts in atom packets and as individual packets */ 151 152 uint64_t timestamp; /**< current timestamp value */ 153 uint8_t ts_update_bits; /**< bits of ts updated this packet (if TS packet) */ 154 155 etmv3_data_t data; /**< data transfer values */ 156 157 ocsd_etmv3_pkt_type err_type; /**< Basic packet type if primary type indicates error or incomplete. (header type) */ 158 159 } ocsd_etmv3_pkt; 160 161 typedef struct _ocsd_etmv3_cfg 162 { 163 uint32_t reg_idr; /**< ID register */ 164 uint32_t reg_ctrl; /**< Control Register */ 165 uint32_t reg_ccer; /**< CCER register */ 166 uint32_t reg_trc_id; /**< Trace Stream ID register */ 167 ocsd_arch_version_t arch_ver; /**< Architecture version */ 168 ocsd_core_profile_t core_prof; /**< Core Profile */ 169 } ocsd_etmv3_cfg; 170 171 172 #define DATA_ADDR_EXPECTED_FLAG 0x20 /**< Bit set for data trace headers if data address packets follow */ 173 174 /** @}*/ 175 /** @}*/ 176 #endif // ARM_TRC_ETM3_PKT_TYPES_ETMV3_H_INCLUDED 177 178 /* End of File trc_pkt_types_etmv3.h */ 179