1 /** @file 2 ACPI 6.0 definitions from the ACPI Specification Revision 6.0 Errata A January, 2016. 3 4 Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR> 5 (C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP<BR> 6 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR> 7 SPDX-License-Identifier: BSD-2-Clause-Patent 8 **/ 9 10 #ifndef _ACPI_6_0_H_ 11 #define _ACPI_6_0_H_ 12 13 #include <IndustryStandard/Acpi51.h> 14 15 /// 16 /// _PSD Revision for ACPI 6.0 17 /// 18 #define EFI_ACPI_6_0_AML_PSD_REVISION 0 19 20 /// 21 /// _CPC Revision for ACPI 6.0 22 /// 23 #define EFI_ACPI_6_0_AML_CPC_REVISION 2 24 25 // 26 // Ensure proper structure formats 27 // 28 #pragma pack(1) 29 30 /// 31 /// ACPI 6.0 Generic Address Space definition 32 /// 33 typedef struct { 34 UINT8 AddressSpaceId; 35 UINT8 RegisterBitWidth; 36 UINT8 RegisterBitOffset; 37 UINT8 AccessSize; 38 UINT64 Address; 39 } EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE; 40 41 // 42 // Generic Address Space Address IDs 43 // 44 #define EFI_ACPI_6_0_SYSTEM_MEMORY 0 45 #define EFI_ACPI_6_0_SYSTEM_IO 1 46 #define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2 47 #define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3 48 #define EFI_ACPI_6_0_SMBUS 4 49 #define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A 50 #define EFI_ACPI_6_0_FUNCTIONAL_FIXED_HARDWARE 0x7F 51 52 // 53 // Generic Address Space Access Sizes 54 // 55 #define EFI_ACPI_6_0_UNDEFINED 0 56 #define EFI_ACPI_6_0_BYTE 1 57 #define EFI_ACPI_6_0_WORD 2 58 #define EFI_ACPI_6_0_DWORD 3 59 #define EFI_ACPI_6_0_QWORD 4 60 61 // 62 // ACPI 6.0 table structures 63 // 64 65 /// 66 /// Root System Description Pointer Structure 67 /// 68 typedef struct { 69 UINT64 Signature; 70 UINT8 Checksum; 71 UINT8 OemId[6]; 72 UINT8 Revision; 73 UINT32 RsdtAddress; 74 UINT32 Length; 75 UINT64 XsdtAddress; 76 UINT8 ExtendedChecksum; 77 UINT8 Reserved[3]; 78 } EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER; 79 80 /// 81 /// RSD_PTR Revision (as defined in ACPI 6.0 spec.) 82 /// 83 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2 84 85 /// 86 /// Common table header, this prefaces all ACPI tables, including FACS, but 87 /// excluding the RSD PTR structure 88 /// 89 typedef struct { 90 UINT32 Signature; 91 UINT32 Length; 92 } EFI_ACPI_6_0_COMMON_HEADER; 93 94 // 95 // Root System Description Table 96 // No definition needed as it is a common description table header, the same with 97 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 98 // 99 100 /// 101 /// RSDT Revision (as defined in ACPI 6.0 spec.) 102 /// 103 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 104 105 // 106 // Extended System Description Table 107 // No definition needed as it is a common description table header, the same with 108 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 109 // 110 111 /// 112 /// XSDT Revision (as defined in ACPI 6.0 spec.) 113 /// 114 #define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 115 116 /// 117 /// Fixed ACPI Description Table Structure (FADT) 118 /// 119 typedef struct { 120 EFI_ACPI_DESCRIPTION_HEADER Header; 121 UINT32 FirmwareCtrl; 122 UINT32 Dsdt; 123 UINT8 Reserved0; 124 UINT8 PreferredPmProfile; 125 UINT16 SciInt; 126 UINT32 SmiCmd; 127 UINT8 AcpiEnable; 128 UINT8 AcpiDisable; 129 UINT8 S4BiosReq; 130 UINT8 PstateCnt; 131 UINT32 Pm1aEvtBlk; 132 UINT32 Pm1bEvtBlk; 133 UINT32 Pm1aCntBlk; 134 UINT32 Pm1bCntBlk; 135 UINT32 Pm2CntBlk; 136 UINT32 PmTmrBlk; 137 UINT32 Gpe0Blk; 138 UINT32 Gpe1Blk; 139 UINT8 Pm1EvtLen; 140 UINT8 Pm1CntLen; 141 UINT8 Pm2CntLen; 142 UINT8 PmTmrLen; 143 UINT8 Gpe0BlkLen; 144 UINT8 Gpe1BlkLen; 145 UINT8 Gpe1Base; 146 UINT8 CstCnt; 147 UINT16 PLvl2Lat; 148 UINT16 PLvl3Lat; 149 UINT16 FlushSize; 150 UINT16 FlushStride; 151 UINT8 DutyOffset; 152 UINT8 DutyWidth; 153 UINT8 DayAlrm; 154 UINT8 MonAlrm; 155 UINT8 Century; 156 UINT16 IaPcBootArch; 157 UINT8 Reserved1; 158 UINT32 Flags; 159 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg; 160 UINT8 ResetValue; 161 UINT16 ArmBootArch; 162 UINT8 MinorVersion; 163 UINT64 XFirmwareCtrl; 164 UINT64 XDsdt; 165 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 166 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 167 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 168 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 169 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 170 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 171 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 172 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 173 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 174 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 175 UINT64 HypervisorVendorIdentity; 176 } EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE; 177 178 /// 179 /// FADT Version (as defined in ACPI 6.0 spec.) 180 /// 181 #define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06 182 #define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x00 183 184 // 185 // Fixed ACPI Description Table Preferred Power Management Profile 186 // 187 #define EFI_ACPI_6_0_PM_PROFILE_UNSPECIFIED 0 188 #define EFI_ACPI_6_0_PM_PROFILE_DESKTOP 1 189 #define EFI_ACPI_6_0_PM_PROFILE_MOBILE 2 190 #define EFI_ACPI_6_0_PM_PROFILE_WORKSTATION 3 191 #define EFI_ACPI_6_0_PM_PROFILE_ENTERPRISE_SERVER 4 192 #define EFI_ACPI_6_0_PM_PROFILE_SOHO_SERVER 5 193 #define EFI_ACPI_6_0_PM_PROFILE_APPLIANCE_PC 6 194 #define EFI_ACPI_6_0_PM_PROFILE_PERFORMANCE_SERVER 7 195 #define EFI_ACPI_6_0_PM_PROFILE_TABLET 8 196 197 // 198 // Fixed ACPI Description Table Boot Architecture Flags 199 // All other bits are reserved and must be set to 0. 200 // 201 #define EFI_ACPI_6_0_LEGACY_DEVICES BIT0 202 #define EFI_ACPI_6_0_8042 BIT1 203 #define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2 204 #define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3 205 #define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4 206 #define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5 207 208 // 209 // Fixed ACPI Description Table Arm Boot Architecture Flags 210 // All other bits are reserved and must be set to 0. 211 // 212 #define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0 213 #define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1 214 215 // 216 // Fixed ACPI Description Table Fixed Feature Flags 217 // All other bits are reserved and must be set to 0. 218 // 219 #define EFI_ACPI_6_0_WBINVD BIT0 220 #define EFI_ACPI_6_0_WBINVD_FLUSH BIT1 221 #define EFI_ACPI_6_0_PROC_C1 BIT2 222 #define EFI_ACPI_6_0_P_LVL2_UP BIT3 223 #define EFI_ACPI_6_0_PWR_BUTTON BIT4 224 #define EFI_ACPI_6_0_SLP_BUTTON BIT5 225 #define EFI_ACPI_6_0_FIX_RTC BIT6 226 #define EFI_ACPI_6_0_RTC_S4 BIT7 227 #define EFI_ACPI_6_0_TMR_VAL_EXT BIT8 228 #define EFI_ACPI_6_0_DCK_CAP BIT9 229 #define EFI_ACPI_6_0_RESET_REG_SUP BIT10 230 #define EFI_ACPI_6_0_SEALED_CASE BIT11 231 #define EFI_ACPI_6_0_HEADLESS BIT12 232 #define EFI_ACPI_6_0_CPU_SW_SLP BIT13 233 #define EFI_ACPI_6_0_PCI_EXP_WAK BIT14 234 #define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15 235 #define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16 236 #define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17 237 #define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18 238 #define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 239 #define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20 240 #define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21 241 242 /// 243 /// Firmware ACPI Control Structure 244 /// 245 typedef struct { 246 UINT32 Signature; 247 UINT32 Length; 248 UINT32 HardwareSignature; 249 UINT32 FirmwareWakingVector; 250 UINT32 GlobalLock; 251 UINT32 Flags; 252 UINT64 XFirmwareWakingVector; 253 UINT8 Version; 254 UINT8 Reserved0[3]; 255 UINT32 OspmFlags; 256 UINT8 Reserved1[24]; 257 } EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE; 258 259 /// 260 /// FACS Version (as defined in ACPI 6.0 spec.) 261 /// 262 #define EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 263 264 /// 265 /// Firmware Control Structure Feature Flags 266 /// All other bits are reserved and must be set to 0. 267 /// 268 #define EFI_ACPI_6_0_S4BIOS_F BIT0 269 #define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1 270 271 /// 272 /// OSPM Enabled Firmware Control Structure Flags 273 /// All other bits are reserved and must be set to 0. 274 /// 275 #define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0 276 277 // 278 // Differentiated System Description Table, 279 // Secondary System Description Table 280 // and Persistent System Description Table, 281 // no definition needed as they are common description table header, the same with 282 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 283 // 284 #define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 285 #define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 286 287 /// 288 /// Multiple APIC Description Table header definition. The rest of the table 289 /// must be defined in a platform specific manner. 290 /// 291 typedef struct { 292 EFI_ACPI_DESCRIPTION_HEADER Header; 293 UINT32 LocalApicAddress; 294 UINT32 Flags; 295 } EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 296 297 /// 298 /// MADT Revision (as defined in ACPI 6.0 Errata A spec.) 299 /// 300 #define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04 301 302 /// 303 /// Multiple APIC Flags 304 /// All other bits are reserved and must be set to 0. 305 /// 306 #define EFI_ACPI_6_0_PCAT_COMPAT BIT0 307 308 // 309 // Multiple APIC Description Table APIC structure types 310 // All other values between 0x0D and 0x7F are reserved and 311 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 312 // 313 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC 0x00 314 #define EFI_ACPI_6_0_IO_APIC 0x01 315 #define EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE 0x02 316 #define EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03 317 #define EFI_ACPI_6_0_LOCAL_APIC_NMI 0x04 318 #define EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 319 #define EFI_ACPI_6_0_IO_SAPIC 0x06 320 #define EFI_ACPI_6_0_LOCAL_SAPIC 0x07 321 #define EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES 0x08 322 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC 0x09 323 #define EFI_ACPI_6_0_LOCAL_X2APIC_NMI 0x0A 324 #define EFI_ACPI_6_0_GIC 0x0B 325 #define EFI_ACPI_6_0_GICD 0x0C 326 #define EFI_ACPI_6_0_GIC_MSI_FRAME 0x0D 327 #define EFI_ACPI_6_0_GICR 0x0E 328 #define EFI_ACPI_6_0_GIC_ITS 0x0F 329 330 // 331 // APIC Structure Definitions 332 // 333 334 /// 335 /// Processor Local APIC Structure Definition 336 /// 337 typedef struct { 338 UINT8 Type; 339 UINT8 Length; 340 UINT8 AcpiProcessorUid; 341 UINT8 ApicId; 342 UINT32 Flags; 343 } EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_STRUCTURE; 344 345 /// 346 /// Local APIC Flags. All other bits are reserved and must be 0. 347 /// 348 #define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0 349 350 /// 351 /// IO APIC Structure 352 /// 353 typedef struct { 354 UINT8 Type; 355 UINT8 Length; 356 UINT8 IoApicId; 357 UINT8 Reserved; 358 UINT32 IoApicAddress; 359 UINT32 GlobalSystemInterruptBase; 360 } EFI_ACPI_6_0_IO_APIC_STRUCTURE; 361 362 /// 363 /// Interrupt Source Override Structure 364 /// 365 typedef struct { 366 UINT8 Type; 367 UINT8 Length; 368 UINT8 Bus; 369 UINT8 Source; 370 UINT32 GlobalSystemInterrupt; 371 UINT16 Flags; 372 } EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 373 374 /// 375 /// Platform Interrupt Sources Structure Definition 376 /// 377 typedef struct { 378 UINT8 Type; 379 UINT8 Length; 380 UINT16 Flags; 381 UINT8 InterruptType; 382 UINT8 ProcessorId; 383 UINT8 ProcessorEid; 384 UINT8 IoSapicVector; 385 UINT32 GlobalSystemInterrupt; 386 UINT32 PlatformInterruptSourceFlags; 387 UINT8 CpeiProcessorOverride; 388 UINT8 Reserved[31]; 389 } EFI_ACPI_6_0_PLATFORM_INTERRUPT_APIC_STRUCTURE; 390 391 // 392 // MPS INTI flags. 393 // All other bits are reserved and must be set to 0. 394 // 395 #define EFI_ACPI_6_0_POLARITY (3 << 0) 396 #define EFI_ACPI_6_0_TRIGGER_MODE (3 << 2) 397 398 /// 399 /// Non-Maskable Interrupt Source Structure 400 /// 401 typedef struct { 402 UINT8 Type; 403 UINT8 Length; 404 UINT16 Flags; 405 UINT32 GlobalSystemInterrupt; 406 } EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 407 408 /// 409 /// Local APIC NMI Structure 410 /// 411 typedef struct { 412 UINT8 Type; 413 UINT8 Length; 414 UINT8 AcpiProcessorUid; 415 UINT16 Flags; 416 UINT8 LocalApicLint; 417 } EFI_ACPI_6_0_LOCAL_APIC_NMI_STRUCTURE; 418 419 /// 420 /// Local APIC Address Override Structure 421 /// 422 typedef struct { 423 UINT8 Type; 424 UINT8 Length; 425 UINT16 Reserved; 426 UINT64 LocalApicAddress; 427 } EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 428 429 /// 430 /// IO SAPIC Structure 431 /// 432 typedef struct { 433 UINT8 Type; 434 UINT8 Length; 435 UINT8 IoApicId; 436 UINT8 Reserved; 437 UINT32 GlobalSystemInterruptBase; 438 UINT64 IoSapicAddress; 439 } EFI_ACPI_6_0_IO_SAPIC_STRUCTURE; 440 441 /// 442 /// Local SAPIC Structure 443 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 444 /// 445 typedef struct { 446 UINT8 Type; 447 UINT8 Length; 448 UINT8 AcpiProcessorId; 449 UINT8 LocalSapicId; 450 UINT8 LocalSapicEid; 451 UINT8 Reserved[3]; 452 UINT32 Flags; 453 UINT32 ACPIProcessorUIDValue; 454 } EFI_ACPI_6_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 455 456 /// 457 /// Platform Interrupt Sources Structure 458 /// 459 typedef struct { 460 UINT8 Type; 461 UINT8 Length; 462 UINT16 Flags; 463 UINT8 InterruptType; 464 UINT8 ProcessorId; 465 UINT8 ProcessorEid; 466 UINT8 IoSapicVector; 467 UINT32 GlobalSystemInterrupt; 468 UINT32 PlatformInterruptSourceFlags; 469 } EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 470 471 /// 472 /// Platform Interrupt Source Flags. 473 /// All other bits are reserved and must be set to 0. 474 /// 475 #define EFI_ACPI_6_0_CPEI_PROCESSOR_OVERRIDE BIT0 476 477 /// 478 /// Processor Local x2APIC Structure Definition 479 /// 480 typedef struct { 481 UINT8 Type; 482 UINT8 Length; 483 UINT8 Reserved[2]; 484 UINT32 X2ApicId; 485 UINT32 Flags; 486 UINT32 AcpiProcessorUid; 487 } EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 488 489 /// 490 /// Local x2APIC NMI Structure 491 /// 492 typedef struct { 493 UINT8 Type; 494 UINT8 Length; 495 UINT16 Flags; 496 UINT32 AcpiProcessorUid; 497 UINT8 LocalX2ApicLint; 498 UINT8 Reserved[3]; 499 } EFI_ACPI_6_0_LOCAL_X2APIC_NMI_STRUCTURE; 500 501 /// 502 /// GIC Structure 503 /// 504 typedef struct { 505 UINT8 Type; 506 UINT8 Length; 507 UINT16 Reserved; 508 UINT32 CPUInterfaceNumber; 509 UINT32 AcpiProcessorUid; 510 UINT32 Flags; 511 UINT32 ParkingProtocolVersion; 512 UINT32 PerformanceInterruptGsiv; 513 UINT64 ParkedAddress; 514 UINT64 PhysicalBaseAddress; 515 UINT64 GICV; 516 UINT64 GICH; 517 UINT32 VGICMaintenanceInterrupt; 518 UINT64 GICRBaseAddress; 519 UINT64 MPIDR; 520 UINT8 ProcessorPowerEfficiencyClass; 521 UINT8 Reserved2[3]; 522 } EFI_ACPI_6_0_GIC_STRUCTURE; 523 524 /// 525 /// GIC Flags. All other bits are reserved and must be 0. 526 /// 527 #define EFI_ACPI_6_0_GIC_ENABLED BIT0 528 #define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1 529 #define EFI_ACPI_6_0_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 530 531 /// 532 /// GIC Distributor Structure 533 /// 534 typedef struct { 535 UINT8 Type; 536 UINT8 Length; 537 UINT16 Reserved1; 538 UINT32 GicId; 539 UINT64 PhysicalBaseAddress; 540 UINT32 SystemVectorBase; 541 UINT8 GicVersion; 542 UINT8 Reserved2[3]; 543 } EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE; 544 545 /// 546 /// GIC Version 547 /// 548 #define EFI_ACPI_6_0_GIC_V1 0x01 549 #define EFI_ACPI_6_0_GIC_V2 0x02 550 #define EFI_ACPI_6_0_GIC_V3 0x03 551 #define EFI_ACPI_6_0_GIC_V4 0x04 552 553 /// 554 /// GIC MSI Frame Structure 555 /// 556 typedef struct { 557 UINT8 Type; 558 UINT8 Length; 559 UINT16 Reserved1; 560 UINT32 GicMsiFrameId; 561 UINT64 PhysicalBaseAddress; 562 UINT32 Flags; 563 UINT16 SPICount; 564 UINT16 SPIBase; 565 } EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE; 566 567 /// 568 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 569 /// 570 #define EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT BIT0 571 572 /// 573 /// GICR Structure 574 /// 575 typedef struct { 576 UINT8 Type; 577 UINT8 Length; 578 UINT16 Reserved; 579 UINT64 DiscoveryRangeBaseAddress; 580 UINT32 DiscoveryRangeLength; 581 } EFI_ACPI_6_0_GICR_STRUCTURE; 582 583 /// 584 /// GIC Interrupt Translation Service Structure 585 /// 586 typedef struct { 587 UINT8 Type; 588 UINT8 Length; 589 UINT16 Reserved; 590 UINT32 GicItsId; 591 UINT64 PhysicalBaseAddress; 592 UINT32 Reserved2; 593 } EFI_ACPI_6_0_GIC_ITS_STRUCTURE; 594 595 /// 596 /// Smart Battery Description Table (SBST) 597 /// 598 typedef struct { 599 EFI_ACPI_DESCRIPTION_HEADER Header; 600 UINT32 WarningEnergyLevel; 601 UINT32 LowEnergyLevel; 602 UINT32 CriticalEnergyLevel; 603 } EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE; 604 605 /// 606 /// SBST Version (as defined in ACPI 6.0 spec.) 607 /// 608 #define EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 609 610 /// 611 /// Embedded Controller Boot Resources Table (ECDT) 612 /// The table is followed by a null terminated ASCII string that contains 613 /// a fully qualified reference to the name space object. 614 /// 615 typedef struct { 616 EFI_ACPI_DESCRIPTION_HEADER Header; 617 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcControl; 618 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcData; 619 UINT32 Uid; 620 UINT8 GpeBit; 621 } EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 622 623 /// 624 /// ECDT Version (as defined in ACPI 6.0 spec.) 625 /// 626 #define EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 627 628 /// 629 /// System Resource Affinity Table (SRAT). The rest of the table 630 /// must be defined in a platform specific manner. 631 /// 632 typedef struct { 633 EFI_ACPI_DESCRIPTION_HEADER Header; 634 UINT32 Reserved1; ///< Must be set to 1 635 UINT64 Reserved2; 636 } EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 637 638 /// 639 /// SRAT Version (as defined in ACPI 6.0 spec.) 640 /// 641 #define EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 642 643 // 644 // SRAT structure types. 645 // All other values between 0x04 an 0xFF are reserved and 646 // will be ignored by OSPM. 647 // 648 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 649 #define EFI_ACPI_6_0_MEMORY_AFFINITY 0x01 650 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 651 #define EFI_ACPI_6_0_GICC_AFFINITY 0x03 652 653 /// 654 /// Processor Local APIC/SAPIC Affinity Structure Definition 655 /// 656 typedef struct { 657 UINT8 Type; 658 UINT8 Length; 659 UINT8 ProximityDomain7To0; 660 UINT8 ApicId; 661 UINT32 Flags; 662 UINT8 LocalSapicEid; 663 UINT8 ProximityDomain31To8[3]; 664 UINT32 ClockDomain; 665 } EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 666 667 /// 668 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 669 /// 670 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 671 672 /// 673 /// Memory Affinity Structure Definition 674 /// 675 typedef struct { 676 UINT8 Type; 677 UINT8 Length; 678 UINT32 ProximityDomain; 679 UINT16 Reserved1; 680 UINT32 AddressBaseLow; 681 UINT32 AddressBaseHigh; 682 UINT32 LengthLow; 683 UINT32 LengthHigh; 684 UINT32 Reserved2; 685 UINT32 Flags; 686 UINT64 Reserved3; 687 } EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE; 688 689 // 690 // Memory Flags. All other bits are reserved and must be 0. 691 // 692 #define EFI_ACPI_6_0_MEMORY_ENABLED (1 << 0) 693 #define EFI_ACPI_6_0_MEMORY_HOT_PLUGGABLE (1 << 1) 694 #define EFI_ACPI_6_0_MEMORY_NONVOLATILE (1 << 2) 695 696 /// 697 /// Processor Local x2APIC Affinity Structure Definition 698 /// 699 typedef struct { 700 UINT8 Type; 701 UINT8 Length; 702 UINT8 Reserved1[2]; 703 UINT32 ProximityDomain; 704 UINT32 X2ApicId; 705 UINT32 Flags; 706 UINT32 ClockDomain; 707 UINT8 Reserved2[4]; 708 } EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 709 710 /// 711 /// GICC Affinity Structure Definition 712 /// 713 typedef struct { 714 UINT8 Type; 715 UINT8 Length; 716 UINT32 ProximityDomain; 717 UINT32 AcpiProcessorUid; 718 UINT32 Flags; 719 UINT32 ClockDomain; 720 } EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE; 721 722 /// 723 /// GICC Flags. All other bits are reserved and must be 0. 724 /// 725 #define EFI_ACPI_6_0_GICC_ENABLED (1 << 0) 726 727 /// 728 /// System Locality Distance Information Table (SLIT). 729 /// The rest of the table is a matrix. 730 /// 731 typedef struct { 732 EFI_ACPI_DESCRIPTION_HEADER Header; 733 UINT64 NumberOfSystemLocalities; 734 } EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 735 736 /// 737 /// SLIT Version (as defined in ACPI 6.0 spec.) 738 /// 739 #define EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 740 741 /// 742 /// Corrected Platform Error Polling Table (CPEP) 743 /// 744 typedef struct { 745 EFI_ACPI_DESCRIPTION_HEADER Header; 746 UINT8 Reserved[8]; 747 } EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 748 749 /// 750 /// CPEP Version (as defined in ACPI 6.0 spec.) 751 /// 752 #define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 753 754 // 755 // CPEP processor structure types. 756 // 757 #define EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC 0x00 758 759 /// 760 /// Corrected Platform Error Polling Processor Structure Definition 761 /// 762 typedef struct { 763 UINT8 Type; 764 UINT8 Length; 765 UINT8 ProcessorId; 766 UINT8 ProcessorEid; 767 UINT32 PollingInterval; 768 } EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 769 770 /// 771 /// Maximum System Characteristics Table (MSCT) 772 /// 773 typedef struct { 774 EFI_ACPI_DESCRIPTION_HEADER Header; 775 UINT32 OffsetProxDomInfo; 776 UINT32 MaximumNumberOfProximityDomains; 777 UINT32 MaximumNumberOfClockDomains; 778 UINT64 MaximumPhysicalAddress; 779 } EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 780 781 /// 782 /// MSCT Version (as defined in ACPI 6.0 spec.) 783 /// 784 #define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 785 786 /// 787 /// Maximum Proximity Domain Information Structure Definition 788 /// 789 typedef struct { 790 UINT8 Revision; 791 UINT8 Length; 792 UINT32 ProximityDomainRangeLow; 793 UINT32 ProximityDomainRangeHigh; 794 UINT32 MaximumProcessorCapacity; 795 UINT64 MaximumMemoryCapacity; 796 } EFI_ACPI_6_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 797 798 /// 799 /// ACPI RAS Feature Table definition. 800 /// 801 typedef struct { 802 EFI_ACPI_DESCRIPTION_HEADER Header; 803 UINT8 PlatformCommunicationChannelIdentifier[12]; 804 } EFI_ACPI_6_0_RAS_FEATURE_TABLE; 805 806 /// 807 /// RASF Version (as defined in ACPI 6.0 spec.) 808 /// 809 #define EFI_ACPI_6_0_RAS_FEATURE_TABLE_REVISION 0x01 810 811 /// 812 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 813 /// 814 typedef struct { 815 UINT32 Signature; 816 UINT16 Command; 817 UINT16 Status; 818 UINT16 Version; 819 UINT8 RASCapabilities[16]; 820 UINT8 SetRASCapabilities[16]; 821 UINT16 NumberOfRASFParameterBlocks; 822 UINT32 SetRASCapabilitiesStatus; 823 } EFI_ACPI_6_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 824 825 /// 826 /// ACPI RASF PCC command code 827 /// 828 #define EFI_ACPI_6_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 829 830 /// 831 /// ACPI RASF Platform RAS Capabilities 832 /// 833 #define EFI_ACPI_6_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 834 #define EFI_ACPI_6_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 835 836 /// 837 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 838 /// 839 typedef struct { 840 UINT16 Type; 841 UINT16 Version; 842 UINT16 Length; 843 UINT16 PatrolScrubCommand; 844 UINT64 RequestedAddressRange[2]; 845 UINT64 ActualAddressRange[2]; 846 UINT16 Flags; 847 UINT8 RequestedSpeed; 848 } EFI_ACPI_6_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 849 850 /// 851 /// ACPI RASF Patrol Scrub command 852 /// 853 #define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 854 #define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 855 #define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 856 857 /// 858 /// Memory Power State Table definition. 859 /// 860 typedef struct { 861 EFI_ACPI_DESCRIPTION_HEADER Header; 862 UINT8 PlatformCommunicationChannelIdentifier; 863 UINT8 Reserved[3]; 864 // Memory Power Node Structure 865 // Memory Power State Characteristics 866 } EFI_ACPI_6_0_MEMORY_POWER_STATUS_TABLE; 867 868 /// 869 /// MPST Version (as defined in ACPI 6.0 spec.) 870 /// 871 #define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01 872 873 /// 874 /// MPST Platform Communication Channel Shared Memory Region definition. 875 /// 876 typedef struct { 877 UINT32 Signature; 878 UINT16 Command; 879 UINT16 Status; 880 UINT32 MemoryPowerCommandRegister; 881 UINT32 MemoryPowerStatusRegister; 882 UINT32 PowerStateId; 883 UINT32 MemoryPowerNodeId; 884 UINT64 MemoryEnergyConsumed; 885 UINT64 ExpectedAveragePowerComsuned; 886 } EFI_ACPI_6_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 887 888 /// 889 /// ACPI MPST PCC command code 890 /// 891 #define EFI_ACPI_6_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 892 893 /// 894 /// ACPI MPST Memory Power command 895 /// 896 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 897 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 898 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 899 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 900 901 /// 902 /// MPST Memory Power Node Table 903 /// 904 typedef struct { 905 UINT8 PowerStateValue; 906 UINT8 PowerStateInformationIndex; 907 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE; 908 909 typedef struct { 910 UINT8 Flag; 911 UINT8 Reserved; 912 UINT16 MemoryPowerNodeId; 913 UINT32 Length; 914 UINT64 AddressBase; 915 UINT64 AddressLength; 916 UINT32 NumberOfPowerStates; 917 UINT32 NumberOfPhysicalComponents; 918 // EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 919 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 920 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE; 921 922 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 923 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 924 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 925 926 typedef struct { 927 UINT16 MemoryPowerNodeCount; 928 UINT8 Reserved[2]; 929 } EFI_ACPI_6_0_MPST_MEMORY_POWER_NODE_TABLE; 930 931 /// 932 /// MPST Memory Power State Characteristics Table 933 /// 934 typedef struct { 935 UINT8 PowerStateStructureID; 936 UINT8 Flag; 937 UINT16 Reserved; 938 UINT32 AveragePowerConsumedInMPS0; 939 UINT32 RelativePowerSavingToMPS0; 940 UINT64 ExitLatencyToMPS0; 941 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 942 943 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 944 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 945 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 946 947 typedef struct { 948 UINT16 MemoryPowerStateCharacteristicsCount; 949 UINT8 Reserved[2]; 950 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 951 952 /// 953 /// Memory Topology Table definition. 954 /// 955 typedef struct { 956 EFI_ACPI_DESCRIPTION_HEADER Header; 957 UINT32 Reserved; 958 } EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE; 959 960 /// 961 /// PMTT Version (as defined in ACPI 6.0 spec.) 962 /// 963 #define EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 964 965 /// 966 /// Common Memory Aggregator Device Structure. 967 /// 968 typedef struct { 969 UINT8 Type; 970 UINT8 Reserved; 971 UINT16 Length; 972 UINT16 Flags; 973 UINT16 Reserved1; 974 } EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 975 976 /// 977 /// Memory Aggregator Device Type 978 /// 979 #define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0 980 #define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1 981 #define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2 982 983 /// 984 /// Socket Memory Aggregator Device Structure. 985 /// 986 typedef struct { 987 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 988 UINT16 SocketIdentifier; 989 UINT16 Reserved; 990 // EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 991 } EFI_ACPI_6_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 992 993 /// 994 /// MemoryController Memory Aggregator Device Structure. 995 /// 996 typedef struct { 997 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 998 UINT32 ReadLatency; 999 UINT32 WriteLatency; 1000 UINT32 ReadBandwidth; 1001 UINT32 WriteBandwidth; 1002 UINT16 OptimalAccessUnit; 1003 UINT16 OptimalAccessAlignment; 1004 UINT16 Reserved; 1005 UINT16 NumberOfProximityDomains; 1006 // UINT32 ProximityDomain[NumberOfProximityDomains]; 1007 // EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 1008 } EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1009 1010 /// 1011 /// DIMM Memory Aggregator Device Structure. 1012 /// 1013 typedef struct { 1014 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1015 UINT16 PhysicalComponentIdentifier; 1016 UINT16 Reserved; 1017 UINT32 SizeOfDimm; 1018 UINT32 SmbiosHandle; 1019 } EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1020 1021 /// 1022 /// Boot Graphics Resource Table definition. 1023 /// 1024 typedef struct { 1025 EFI_ACPI_DESCRIPTION_HEADER Header; 1026 /// 1027 /// 2-bytes (16 bit) version ID. This value must be 1. 1028 /// 1029 UINT16 Version; 1030 /// 1031 /// 1-byte status field indicating current status about the table. 1032 /// Bits[7:1] = Reserved (must be zero) 1033 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1034 /// 1035 UINT8 Status; 1036 /// 1037 /// 1-byte enumerated type field indicating format of the image. 1038 /// 0 = Bitmap 1039 /// 1 - 255 Reserved (for future use) 1040 /// 1041 UINT8 ImageType; 1042 /// 1043 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1044 /// of the image bitmap. 1045 /// 1046 UINT64 ImageAddress; 1047 /// 1048 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1049 /// (X, Y) display offset of the top left corner of the boot image. 1050 /// The top left corner of the display is at offset (0, 0). 1051 /// 1052 UINT32 ImageOffsetX; 1053 /// 1054 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1055 /// (X, Y) display offset of the top left corner of the boot image. 1056 /// The top left corner of the display is at offset (0, 0). 1057 /// 1058 UINT32 ImageOffsetY; 1059 } EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE; 1060 1061 /// 1062 /// BGRT Revision 1063 /// 1064 #define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1065 1066 /// 1067 /// BGRT Version 1068 /// 1069 #define EFI_ACPI_6_0_BGRT_VERSION 0x01 1070 1071 /// 1072 /// BGRT Status 1073 /// 1074 #define EFI_ACPI_6_0_BGRT_STATUS_NOT_DISPLAYED 0x00 1075 #define EFI_ACPI_6_0_BGRT_STATUS_DISPLAYED 0x01 1076 1077 /// 1078 /// BGRT Image Type 1079 /// 1080 #define EFI_ACPI_6_0_BGRT_IMAGE_TYPE_BMP 0x00 1081 1082 /// 1083 /// FPDT Version (as defined in ACPI 6.0 spec.) 1084 /// 1085 #define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1086 1087 /// 1088 /// FPDT Performance Record Types 1089 /// 1090 #define EFI_ACPI_6_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1091 #define EFI_ACPI_6_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1092 1093 /// 1094 /// FPDT Performance Record Revision 1095 /// 1096 #define EFI_ACPI_6_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1097 #define EFI_ACPI_6_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1098 1099 /// 1100 /// FPDT Runtime Performance Record Types 1101 /// 1102 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1103 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1104 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1105 1106 /// 1107 /// FPDT Runtime Performance Record Revision 1108 /// 1109 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1110 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1111 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1112 1113 /// 1114 /// FPDT Performance Record header 1115 /// 1116 typedef struct { 1117 UINT16 Type; 1118 UINT8 Length; 1119 UINT8 Revision; 1120 } EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER; 1121 1122 /// 1123 /// FPDT Performance Table header 1124 /// 1125 typedef struct { 1126 UINT32 Signature; 1127 UINT32 Length; 1128 } EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER; 1129 1130 /// 1131 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1132 /// 1133 typedef struct { 1134 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1135 UINT32 Reserved; 1136 /// 1137 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1138 /// 1139 UINT64 BootPerformanceTablePointer; 1140 } EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1141 1142 /// 1143 /// FPDT S3 Performance Table Pointer Record Structure 1144 /// 1145 typedef struct { 1146 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1147 UINT32 Reserved; 1148 /// 1149 /// 64-bit processor-relative physical address of the S3 Performance Table. 1150 /// 1151 UINT64 S3PerformanceTablePointer; 1152 } EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1153 1154 /// 1155 /// FPDT Firmware Basic Boot Performance Record Structure 1156 /// 1157 typedef struct { 1158 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1159 UINT32 Reserved; 1160 /// 1161 /// Timer value logged at the beginning of firmware image execution. 1162 /// This may not always be zero or near zero. 1163 /// 1164 UINT64 ResetEnd; 1165 /// 1166 /// Timer value logged just prior to loading the OS boot loader into memory. 1167 /// For non-UEFI compatible boots, this field must be zero. 1168 /// 1169 UINT64 OsLoaderLoadImageStart; 1170 /// 1171 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1172 /// For non-UEFI compatible boots, the timer value logged will be just prior 1173 /// to the INT 19h handler invocation. 1174 /// 1175 UINT64 OsLoaderStartImageStart; 1176 /// 1177 /// Timer value logged at the point when the OS loader calls the 1178 /// ExitBootServices function for UEFI compatible firmware. 1179 /// For non-UEFI compatible boots, this field must be zero. 1180 /// 1181 UINT64 ExitBootServicesEntry; 1182 /// 1183 /// Timer value logged at the point just prior to when the OS loader gaining 1184 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1185 /// For non-UEFI compatible boots, this field must be zero. 1186 /// 1187 UINT64 ExitBootServicesExit; 1188 } EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1189 1190 /// 1191 /// FPDT Firmware Basic Boot Performance Table signature 1192 /// 1193 #define EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1194 1195 // 1196 // FPDT Firmware Basic Boot Performance Table 1197 // 1198 typedef struct { 1199 EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header; 1200 // 1201 // one or more Performance Records. 1202 // 1203 } EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1204 1205 /// 1206 /// FPDT "S3PT" S3 Performance Table 1207 /// 1208 #define EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1209 1210 // 1211 // FPDT Firmware S3 Boot Performance Table 1212 // 1213 typedef struct { 1214 EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header; 1215 // 1216 // one or more Performance Records. 1217 // 1218 } EFI_ACPI_6_0_FPDT_FIRMWARE_S3_BOOT_TABLE; 1219 1220 /// 1221 /// FPDT Basic S3 Resume Performance Record 1222 /// 1223 typedef struct { 1224 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1225 /// 1226 /// A count of the number of S3 resume cycles since the last full boot sequence. 1227 /// 1228 UINT32 ResumeCount; 1229 /// 1230 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1231 /// OS waking vector. Only the most recent resume cycle's time is retained. 1232 /// 1233 UINT64 FullResume; 1234 /// 1235 /// Average timer value of all resume cycles logged since the last full boot 1236 /// sequence, including the most recent resume. Note that the entire log of 1237 /// timer values does not need to be retained in order to calculate this average. 1238 /// 1239 UINT64 AverageResume; 1240 } EFI_ACPI_6_0_FPDT_S3_RESUME_RECORD; 1241 1242 /// 1243 /// FPDT Basic S3 Suspend Performance Record 1244 /// 1245 typedef struct { 1246 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1247 /// 1248 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1249 /// Only the most recent suspend cycle's timer value is retained. 1250 /// 1251 UINT64 SuspendStart; 1252 /// 1253 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1254 /// mechanism) used to trigger hardware entry to S3. 1255 /// Only the most recent suspend cycle's timer value is retained. 1256 /// 1257 UINT64 SuspendEnd; 1258 } EFI_ACPI_6_0_FPDT_S3_SUSPEND_RECORD; 1259 1260 /// 1261 /// Firmware Performance Record Table definition. 1262 /// 1263 typedef struct { 1264 EFI_ACPI_DESCRIPTION_HEADER Header; 1265 } EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1266 1267 /// 1268 /// Generic Timer Description Table definition. 1269 /// 1270 typedef struct { 1271 EFI_ACPI_DESCRIPTION_HEADER Header; 1272 UINT64 CntControlBasePhysicalAddress; 1273 UINT32 Reserved; 1274 UINT32 SecurePL1TimerGSIV; 1275 UINT32 SecurePL1TimerFlags; 1276 UINT32 NonSecurePL1TimerGSIV; 1277 UINT32 NonSecurePL1TimerFlags; 1278 UINT32 VirtualTimerGSIV; 1279 UINT32 VirtualTimerFlags; 1280 UINT32 NonSecurePL2TimerGSIV; 1281 UINT32 NonSecurePL2TimerFlags; 1282 UINT64 CntReadBasePhysicalAddress; 1283 UINT32 PlatformTimerCount; 1284 UINT32 PlatformTimerOffset; 1285 } EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE; 1286 1287 /// 1288 /// GTDT Version (as defined in ACPI 6.0 spec.) 1289 /// 1290 #define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 1291 1292 /// 1293 /// Timer Flags. All other bits are reserved and must be 0. 1294 /// 1295 #define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1296 #define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1297 #define EFI_ACPI_6_0_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1298 1299 /// 1300 /// Platform Timer Type 1301 /// 1302 #define EFI_ACPI_6_0_GTDT_GT_BLOCK 0 1303 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG 1 1304 1305 /// 1306 /// GT Block Structure 1307 /// 1308 typedef struct { 1309 UINT8 Type; 1310 UINT16 Length; 1311 UINT8 Reserved; 1312 UINT64 CntCtlBase; 1313 UINT32 GTBlockTimerCount; 1314 UINT32 GTBlockTimerOffset; 1315 } EFI_ACPI_6_0_GTDT_GT_BLOCK_STRUCTURE; 1316 1317 /// 1318 /// GT Block Timer Structure 1319 /// 1320 typedef struct { 1321 UINT8 GTFrameNumber; 1322 UINT8 Reserved[3]; 1323 UINT64 CntBaseX; 1324 UINT64 CntEL0BaseX; 1325 UINT32 GTxPhysicalTimerGSIV; 1326 UINT32 GTxPhysicalTimerFlags; 1327 UINT32 GTxVirtualTimerGSIV; 1328 UINT32 GTxVirtualTimerFlags; 1329 UINT32 GTxCommonFlags; 1330 } EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1331 1332 /// 1333 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1334 /// 1335 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1336 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1337 1338 /// 1339 /// Common Flags Flags. All other bits are reserved and must be 0. 1340 /// 1341 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1342 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1343 1344 /// 1345 /// SBSA Generic Watchdog Structure 1346 /// 1347 typedef struct { 1348 UINT8 Type; 1349 UINT16 Length; 1350 UINT8 Reserved; 1351 UINT64 RefreshFramePhysicalAddress; 1352 UINT64 WatchdogControlFramePhysicalAddress; 1353 UINT32 WatchdogTimerGSIV; 1354 UINT32 WatchdogTimerFlags; 1355 } EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1356 1357 /// 1358 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1359 /// 1360 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1361 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1362 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1363 1364 // 1365 // NVDIMM Firmware Interface Table definition. 1366 // 1367 typedef struct { 1368 EFI_ACPI_DESCRIPTION_HEADER Header; 1369 UINT32 Reserved; 1370 } EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE; 1371 1372 // 1373 // NFIT Version (as defined in ACPI 6.0 spec.) 1374 // 1375 #define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1 1376 1377 // 1378 // Definition for NFIT Table Structure Types 1379 // 1380 #define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0 1381 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE_TYPE 1 1382 #define EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE_TYPE 2 1383 #define EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3 1384 #define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4 1385 #define EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5 1386 #define EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6 1387 1388 // 1389 // Definition for NFIT Structure Header 1390 // 1391 typedef struct { 1392 UINT16 Type; 1393 UINT16 Length; 1394 } EFI_ACPI_6_0_NFIT_STRUCTURE_HEADER; 1395 1396 // 1397 // Definition for System Physical Address Range Structure 1398 // 1399 #define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0 1400 #define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1 1401 #define EFI_ACPI_6_0_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }} 1402 #define EFI_ACPI_6_0_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }} 1403 #define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }} 1404 #define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }} 1405 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }} 1406 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }} 1407 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }} 1408 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }} 1409 typedef struct { 1410 UINT16 Type; 1411 UINT16 Length; 1412 UINT16 SPARangeStructureIndex; 1413 UINT16 Flags; 1414 UINT32 Reserved_8; 1415 UINT32 ProximityDomain; 1416 GUID AddressRangeTypeGUID; 1417 UINT64 SystemPhysicalAddressRangeBase; 1418 UINT64 SystemPhysicalAddressRangeLength; 1419 UINT64 AddressRangeMemoryMappingAttribute; 1420 } EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE; 1421 1422 // 1423 // Definition for Memory Device to System Physical Address Range Mapping Structure 1424 // 1425 typedef struct { 1426 UINT32 DIMMNumber : 4; 1427 UINT32 MemoryChannelNumber : 4; 1428 UINT32 MemoryControllerID : 4; 1429 UINT32 SocketID : 4; 1430 UINT32 NodeControllerID : 12; 1431 UINT32 Reserved_28 : 4; 1432 } EFI_ACPI_6_0_NFIT_DEVICE_HANDLE; 1433 1434 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0 1435 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1 1436 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2 1437 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3 1438 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4 1439 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5 1440 typedef struct { 1441 UINT16 Type; 1442 UINT16 Length; 1443 EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1444 UINT16 MemoryDevicePhysicalID; 1445 UINT16 MemoryDeviceRegionID; 1446 UINT16 SPARangeStructureIndex; 1447 UINT16 NVDIMMControlRegionStructureIndex; 1448 UINT64 MemoryDeviceRegionSize; 1449 UINT64 RegionOffset; 1450 UINT64 MemoryDevicePhysicalAddressRegionBase; 1451 UINT16 InterleaveStructureIndex; 1452 UINT16 InterleaveWays; 1453 UINT16 MemoryDeviceStateFlags; 1454 UINT16 Reserved_46; 1455 } EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE; 1456 1457 // 1458 // Definition for Interleave Structure 1459 // 1460 typedef struct { 1461 UINT16 Type; 1462 UINT16 Length; 1463 UINT16 InterleaveStructureIndex; 1464 UINT16 Reserved_6; 1465 UINT32 NumberOfLines; 1466 UINT32 LineSize; 1467 // UINT32 LineOffset[NumberOfLines]; 1468 } EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE; 1469 1470 // 1471 // Definition for SMBIOS Management Information Structure 1472 // 1473 typedef struct { 1474 UINT16 Type; 1475 UINT16 Length; 1476 UINT32 Reserved_4; 1477 // UINT8 Data[]; 1478 } EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE; 1479 1480 // 1481 // Definition for NVDIMM Control Region Structure 1482 // 1483 #define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0 1484 typedef struct { 1485 UINT16 Type; 1486 UINT16 Length; 1487 UINT16 NVDIMMControlRegionStructureIndex; 1488 UINT16 VendorID; 1489 UINT16 DeviceID; 1490 UINT16 RevisionID; 1491 UINT16 SubsystemVendorID; 1492 UINT16 SubsystemDeviceID; 1493 UINT16 SubsystemRevisionID; 1494 UINT8 Reserved_18[6]; 1495 UINT32 SerialNumber; 1496 UINT16 RegionFormatInterfaceCode; 1497 UINT16 NumberOfBlockControlWindows; 1498 UINT64 SizeOfBlockControlWindow; 1499 UINT64 CommandRegisterOffsetInBlockControlWindow; 1500 UINT64 SizeOfCommandRegisterInBlockControlWindows; 1501 UINT64 StatusRegisterOffsetInBlockControlWindow; 1502 UINT64 SizeOfStatusRegisterInBlockControlWindows; 1503 UINT16 NVDIMMControlRegionFlag; 1504 UINT8 Reserved_74[6]; 1505 } EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE; 1506 1507 // 1508 // Definition for NVDIMM Block Data Window Region Structure 1509 // 1510 typedef struct { 1511 UINT16 Type; 1512 UINT16 Length; 1513 UINT16 NVDIMMControlRegionStructureIndex; 1514 UINT16 NumberOfBlockDataWindows; 1515 UINT64 BlockDataWindowStartOffset; 1516 UINT64 SizeOfBlockDataWindow; 1517 UINT64 BlockAccessibleMemoryCapacity; 1518 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory; 1519 } EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE; 1520 1521 // 1522 // Definition for Flush Hint Address Structure 1523 // 1524 typedef struct { 1525 UINT16 Type; 1526 UINT16 Length; 1527 EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1528 UINT16 NumberOfFlushHintAddresses; 1529 UINT8 Reserved_10[6]; 1530 // UINT64 FlushHintAddress[NumberOfFlushHintAddresses]; 1531 } EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE; 1532 1533 /// 1534 /// Boot Error Record Table (BERT) 1535 /// 1536 typedef struct { 1537 EFI_ACPI_DESCRIPTION_HEADER Header; 1538 UINT32 BootErrorRegionLength; 1539 UINT64 BootErrorRegion; 1540 } EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER; 1541 1542 /// 1543 /// BERT Version (as defined in ACPI 6.0 spec.) 1544 /// 1545 #define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1546 1547 /// 1548 /// Boot Error Region Block Status Definition 1549 /// 1550 typedef struct { 1551 UINT32 UncorrectableErrorValid : 1; 1552 UINT32 CorrectableErrorValid : 1; 1553 UINT32 MultipleUncorrectableErrors : 1; 1554 UINT32 MultipleCorrectableErrors : 1; 1555 UINT32 ErrorDataEntryCount : 10; 1556 UINT32 Reserved : 18; 1557 } EFI_ACPI_6_0_ERROR_BLOCK_STATUS; 1558 1559 /// 1560 /// Boot Error Region Definition 1561 /// 1562 typedef struct { 1563 EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus; 1564 UINT32 RawDataOffset; 1565 UINT32 RawDataLength; 1566 UINT32 DataLength; 1567 UINT32 ErrorSeverity; 1568 } EFI_ACPI_6_0_BOOT_ERROR_REGION_STRUCTURE; 1569 1570 // 1571 // Boot Error Severity types 1572 // 1573 #define EFI_ACPI_6_0_ERROR_SEVERITY_RECOVERABLE 0x00 1574 #define EFI_ACPI_6_0_ERROR_SEVERITY_FATAL 0x01 1575 #define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTED 0x02 1576 #define EFI_ACPI_6_0_ERROR_SEVERITY_NONE 0x03 1577 // 1578 // The term 'Correctable' is no longer being used as an error severity of the 1579 // reported error since ACPI Specification Version 5.1 Errata B. 1580 // The below macro is considered as deprecated and should no longer be used. 1581 // 1582 #define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00 1583 1584 /// 1585 /// Generic Error Data Entry Definition 1586 /// 1587 typedef struct { 1588 UINT8 SectionType[16]; 1589 UINT32 ErrorSeverity; 1590 UINT16 Revision; 1591 UINT8 ValidationBits; 1592 UINT8 Flags; 1593 UINT32 ErrorDataLength; 1594 UINT8 FruId[16]; 1595 UINT8 FruText[20]; 1596 } EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1597 1598 /// 1599 /// Generic Error Data Entry Version (as defined in ACPI 6.0 spec.) 1600 /// 1601 #define EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 1602 1603 /// 1604 /// HEST - Hardware Error Source Table 1605 /// 1606 typedef struct { 1607 EFI_ACPI_DESCRIPTION_HEADER Header; 1608 UINT32 ErrorSourceCount; 1609 } EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1610 1611 /// 1612 /// HEST Version (as defined in ACPI 6.0 spec.) 1613 /// 1614 #define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1615 1616 // 1617 // Error Source structure types. 1618 // 1619 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1620 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1621 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR 0x02 1622 #define EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER 0x06 1623 #define EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER 0x07 1624 #define EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER 0x08 1625 #define EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR 0x09 1626 1627 // 1628 // Error Source structure flags. 1629 // 1630 #define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1631 #define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1632 1633 /// 1634 /// IA-32 Architecture Machine Check Exception Structure Definition 1635 /// 1636 typedef struct { 1637 UINT16 Type; 1638 UINT16 SourceId; 1639 UINT8 Reserved0[2]; 1640 UINT8 Flags; 1641 UINT8 Enabled; 1642 UINT32 NumberOfRecordsToPreAllocate; 1643 UINT32 MaxSectionsPerRecord; 1644 UINT64 GlobalCapabilityInitData; 1645 UINT64 GlobalControlInitData; 1646 UINT8 NumberOfHardwareBanks; 1647 UINT8 Reserved1[7]; 1648 } EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1649 1650 /// 1651 /// IA-32 Architecture Machine Check Bank Structure Definition 1652 /// 1653 typedef struct { 1654 UINT8 BankNumber; 1655 UINT8 ClearStatusOnInitialization; 1656 UINT8 StatusDataFormat; 1657 UINT8 Reserved0; 1658 UINT32 ControlRegisterMsrAddress; 1659 UINT64 ControlInitData; 1660 UINT32 StatusRegisterMsrAddress; 1661 UINT32 AddressRegisterMsrAddress; 1662 UINT32 MiscRegisterMsrAddress; 1663 } EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1664 1665 /// 1666 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1667 /// 1668 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1669 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1670 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1671 1672 // 1673 // Hardware Error Notification types. All other values are reserved 1674 // 1675 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1676 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1677 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1678 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1679 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1680 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05 1681 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_MCE 0x06 1682 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07 1683 1684 /// 1685 /// Hardware Error Notification Configuration Write Enable Structure Definition 1686 /// 1687 typedef struct { 1688 UINT16 Type : 1; 1689 UINT16 PollInterval : 1; 1690 UINT16 SwitchToPollingThresholdValue : 1; 1691 UINT16 SwitchToPollingThresholdWindow : 1; 1692 UINT16 ErrorThresholdValue : 1; 1693 UINT16 ErrorThresholdWindow : 1; 1694 UINT16 Reserved : 10; 1695 } EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1696 1697 /// 1698 /// Hardware Error Notification Structure Definition 1699 /// 1700 typedef struct { 1701 UINT8 Type; 1702 UINT8 Length; 1703 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1704 UINT32 PollInterval; 1705 UINT32 Vector; 1706 UINT32 SwitchToPollingThresholdValue; 1707 UINT32 SwitchToPollingThresholdWindow; 1708 UINT32 ErrorThresholdValue; 1709 UINT32 ErrorThresholdWindow; 1710 } EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1711 1712 /// 1713 /// IA-32 Architecture Corrected Machine Check Structure Definition 1714 /// 1715 typedef struct { 1716 UINT16 Type; 1717 UINT16 SourceId; 1718 UINT8 Reserved0[2]; 1719 UINT8 Flags; 1720 UINT8 Enabled; 1721 UINT32 NumberOfRecordsToPreAllocate; 1722 UINT32 MaxSectionsPerRecord; 1723 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1724 UINT8 NumberOfHardwareBanks; 1725 UINT8 Reserved1[3]; 1726 } EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1727 1728 /// 1729 /// IA-32 Architecture NMI Error Structure Definition 1730 /// 1731 typedef struct { 1732 UINT16 Type; 1733 UINT16 SourceId; 1734 UINT8 Reserved0[2]; 1735 UINT32 NumberOfRecordsToPreAllocate; 1736 UINT32 MaxSectionsPerRecord; 1737 UINT32 MaxRawDataLength; 1738 } EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1739 1740 /// 1741 /// PCI Express Root Port AER Structure Definition 1742 /// 1743 typedef struct { 1744 UINT16 Type; 1745 UINT16 SourceId; 1746 UINT8 Reserved0[2]; 1747 UINT8 Flags; 1748 UINT8 Enabled; 1749 UINT32 NumberOfRecordsToPreAllocate; 1750 UINT32 MaxSectionsPerRecord; 1751 UINT32 Bus; 1752 UINT16 Device; 1753 UINT16 Function; 1754 UINT16 DeviceControl; 1755 UINT8 Reserved1[2]; 1756 UINT32 UncorrectableErrorMask; 1757 UINT32 UncorrectableErrorSeverity; 1758 UINT32 CorrectableErrorMask; 1759 UINT32 AdvancedErrorCapabilitiesAndControl; 1760 UINT32 RootErrorCommand; 1761 } EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1762 1763 /// 1764 /// PCI Express Device AER Structure Definition 1765 /// 1766 typedef struct { 1767 UINT16 Type; 1768 UINT16 SourceId; 1769 UINT8 Reserved0[2]; 1770 UINT8 Flags; 1771 UINT8 Enabled; 1772 UINT32 NumberOfRecordsToPreAllocate; 1773 UINT32 MaxSectionsPerRecord; 1774 UINT32 Bus; 1775 UINT16 Device; 1776 UINT16 Function; 1777 UINT16 DeviceControl; 1778 UINT8 Reserved1[2]; 1779 UINT32 UncorrectableErrorMask; 1780 UINT32 UncorrectableErrorSeverity; 1781 UINT32 CorrectableErrorMask; 1782 UINT32 AdvancedErrorCapabilitiesAndControl; 1783 } EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1784 1785 /// 1786 /// PCI Express Bridge AER Structure Definition 1787 /// 1788 typedef struct { 1789 UINT16 Type; 1790 UINT16 SourceId; 1791 UINT8 Reserved0[2]; 1792 UINT8 Flags; 1793 UINT8 Enabled; 1794 UINT32 NumberOfRecordsToPreAllocate; 1795 UINT32 MaxSectionsPerRecord; 1796 UINT32 Bus; 1797 UINT16 Device; 1798 UINT16 Function; 1799 UINT16 DeviceControl; 1800 UINT8 Reserved1[2]; 1801 UINT32 UncorrectableErrorMask; 1802 UINT32 UncorrectableErrorSeverity; 1803 UINT32 CorrectableErrorMask; 1804 UINT32 AdvancedErrorCapabilitiesAndControl; 1805 UINT32 SecondaryUncorrectableErrorMask; 1806 UINT32 SecondaryUncorrectableErrorSeverity; 1807 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1808 } EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1809 1810 /// 1811 /// Generic Hardware Error Source Structure Definition 1812 /// 1813 typedef struct { 1814 UINT16 Type; 1815 UINT16 SourceId; 1816 UINT16 RelatedSourceId; 1817 UINT8 Flags; 1818 UINT8 Enabled; 1819 UINT32 NumberOfRecordsToPreAllocate; 1820 UINT32 MaxSectionsPerRecord; 1821 UINT32 MaxRawDataLength; 1822 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1823 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1824 UINT32 ErrorStatusBlockLength; 1825 } EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1826 1827 /// 1828 /// Generic Error Status Definition 1829 /// 1830 typedef struct { 1831 EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus; 1832 UINT32 RawDataOffset; 1833 UINT32 RawDataLength; 1834 UINT32 DataLength; 1835 UINT32 ErrorSeverity; 1836 } EFI_ACPI_6_0_GENERIC_ERROR_STATUS_STRUCTURE; 1837 1838 /// 1839 /// ERST - Error Record Serialization Table 1840 /// 1841 typedef struct { 1842 EFI_ACPI_DESCRIPTION_HEADER Header; 1843 UINT32 SerializationHeaderSize; 1844 UINT8 Reserved0[4]; 1845 UINT32 InstructionEntryCount; 1846 } EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 1847 1848 /// 1849 /// ERST Version (as defined in ACPI 6.0 spec.) 1850 /// 1851 #define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 1852 1853 /// 1854 /// ERST Serialization Actions 1855 /// 1856 #define EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION 0x00 1857 #define EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION 0x01 1858 #define EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION 0x02 1859 #define EFI_ACPI_6_0_ERST_END_OPERATION 0x03 1860 #define EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET 0x04 1861 #define EFI_ACPI_6_0_ERST_EXECUTE_OPERATION 0x05 1862 #define EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS 0x06 1863 #define EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS 0x07 1864 #define EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER 0x08 1865 #define EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER 0x09 1866 #define EFI_ACPI_6_0_ERST_GET_RECORD_COUNT 0x0A 1867 #define EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 1868 #define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 1869 #define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 1870 #define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 1871 1872 /// 1873 /// ERST Action Command Status 1874 /// 1875 #define EFI_ACPI_6_0_ERST_STATUS_SUCCESS 0x00 1876 #define EFI_ACPI_6_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 1877 #define EFI_ACPI_6_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 1878 #define EFI_ACPI_6_0_ERST_STATUS_FAILED 0x03 1879 #define EFI_ACPI_6_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04 1880 #define EFI_ACPI_6_0_ERST_STATUS_RECORD_NOT_FOUND 0x05 1881 1882 /// 1883 /// ERST Serialization Instructions 1884 /// 1885 #define EFI_ACPI_6_0_ERST_READ_REGISTER 0x00 1886 #define EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE 0x01 1887 #define EFI_ACPI_6_0_ERST_WRITE_REGISTER 0x02 1888 #define EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE 0x03 1889 #define EFI_ACPI_6_0_ERST_NOOP 0x04 1890 #define EFI_ACPI_6_0_ERST_LOAD_VAR1 0x05 1891 #define EFI_ACPI_6_0_ERST_LOAD_VAR2 0x06 1892 #define EFI_ACPI_6_0_ERST_STORE_VAR1 0x07 1893 #define EFI_ACPI_6_0_ERST_ADD 0x08 1894 #define EFI_ACPI_6_0_ERST_SUBTRACT 0x09 1895 #define EFI_ACPI_6_0_ERST_ADD_VALUE 0x0A 1896 #define EFI_ACPI_6_0_ERST_SUBTRACT_VALUE 0x0B 1897 #define EFI_ACPI_6_0_ERST_STALL 0x0C 1898 #define EFI_ACPI_6_0_ERST_STALL_WHILE_TRUE 0x0D 1899 #define EFI_ACPI_6_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1900 #define EFI_ACPI_6_0_ERST_GOTO 0x0F 1901 #define EFI_ACPI_6_0_ERST_SET_SRC_ADDRESS_BASE 0x10 1902 #define EFI_ACPI_6_0_ERST_SET_DST_ADDRESS_BASE 0x11 1903 #define EFI_ACPI_6_0_ERST_MOVE_DATA 0x12 1904 1905 /// 1906 /// ERST Instruction Flags 1907 /// 1908 #define EFI_ACPI_6_0_ERST_PRESERVE_REGISTER 0x01 1909 1910 /// 1911 /// ERST Serialization Instruction Entry 1912 /// 1913 typedef struct { 1914 UINT8 SerializationAction; 1915 UINT8 Instruction; 1916 UINT8 Flags; 1917 UINT8 Reserved0; 1918 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1919 UINT64 Value; 1920 UINT64 Mask; 1921 } EFI_ACPI_6_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1922 1923 /// 1924 /// EINJ - Error Injection Table 1925 /// 1926 typedef struct { 1927 EFI_ACPI_DESCRIPTION_HEADER Header; 1928 UINT32 InjectionHeaderSize; 1929 UINT8 InjectionFlags; 1930 UINT8 Reserved0[3]; 1931 UINT32 InjectionEntryCount; 1932 } EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER; 1933 1934 /// 1935 /// EINJ Version (as defined in ACPI 6.0 spec.) 1936 /// 1937 #define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION 0x01 1938 1939 /// 1940 /// EINJ Error Injection Actions 1941 /// 1942 #define EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION 0x00 1943 #define EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1944 #define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE 0x02 1945 #define EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE 0x03 1946 #define EFI_ACPI_6_0_EINJ_END_OPERATION 0x04 1947 #define EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION 0x05 1948 #define EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS 0x06 1949 #define EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS 0x07 1950 #define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08 1951 #define EFI_ACPI_6_0_EINJ_TRIGGER_ERROR 0xFF 1952 1953 /// 1954 /// EINJ Action Command Status 1955 /// 1956 #define EFI_ACPI_6_0_EINJ_STATUS_SUCCESS 0x00 1957 #define EFI_ACPI_6_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1958 #define EFI_ACPI_6_0_EINJ_STATUS_INVALID_ACCESS 0x02 1959 1960 /// 1961 /// EINJ Error Type Definition 1962 /// 1963 #define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1964 #define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1965 #define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1966 #define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1967 #define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1968 #define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1969 #define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1970 #define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1971 #define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1972 #define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1973 #define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1974 #define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1975 1976 /// 1977 /// EINJ Injection Instructions 1978 /// 1979 #define EFI_ACPI_6_0_EINJ_READ_REGISTER 0x00 1980 #define EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE 0x01 1981 #define EFI_ACPI_6_0_EINJ_WRITE_REGISTER 0x02 1982 #define EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE 0x03 1983 #define EFI_ACPI_6_0_EINJ_NOOP 0x04 1984 1985 /// 1986 /// EINJ Instruction Flags 1987 /// 1988 #define EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER 0x01 1989 1990 /// 1991 /// EINJ Injection Instruction Entry 1992 /// 1993 typedef struct { 1994 UINT8 InjectionAction; 1995 UINT8 Instruction; 1996 UINT8 Flags; 1997 UINT8 Reserved0; 1998 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1999 UINT64 Value; 2000 UINT64 Mask; 2001 } EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY; 2002 2003 /// 2004 /// EINJ Trigger Action Table 2005 /// 2006 typedef struct { 2007 UINT32 HeaderSize; 2008 UINT32 Revision; 2009 UINT32 TableSize; 2010 UINT32 EntryCount; 2011 } EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE; 2012 2013 /// 2014 /// Platform Communications Channel Table (PCCT) 2015 /// 2016 typedef struct { 2017 EFI_ACPI_DESCRIPTION_HEADER Header; 2018 UINT32 Flags; 2019 UINT64 Reserved; 2020 } EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 2021 2022 /// 2023 /// PCCT Version (as defined in ACPI 6.0 spec.) 2024 /// 2025 #define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 2026 2027 /// 2028 /// PCCT Global Flags 2029 /// 2030 #define EFI_ACPI_6_0_PCCT_FLAGS_SCI_DOORBELL BIT0 2031 2032 // 2033 // PCCT Subspace type 2034 // 2035 #define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00 2036 #define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01 2037 #define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02 2038 2039 /// 2040 /// PCC Subspace Structure Header 2041 /// 2042 typedef struct { 2043 UINT8 Type; 2044 UINT8 Length; 2045 } EFI_ACPI_6_0_PCCT_SUBSPACE_HEADER; 2046 2047 /// 2048 /// Generic Communications Subspace Structure 2049 /// 2050 typedef struct { 2051 UINT8 Type; 2052 UINT8 Length; 2053 UINT8 Reserved[6]; 2054 UINT64 BaseAddress; 2055 UINT64 AddressLength; 2056 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2057 UINT64 DoorbellPreserve; 2058 UINT64 DoorbellWrite; 2059 UINT32 NominalLatency; 2060 UINT32 MaximumPeriodicAccessRate; 2061 UINT16 MinimumRequestTurnaroundTime; 2062 } EFI_ACPI_6_0_PCCT_SUBSPACE_GENERIC; 2063 2064 /// 2065 /// Generic Communications Channel Shared Memory Region 2066 /// 2067 2068 typedef struct { 2069 UINT8 Command; 2070 UINT8 Reserved : 7; 2071 UINT8 GenerateSci : 1; 2072 } EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 2073 2074 typedef struct { 2075 UINT8 CommandComplete : 1; 2076 UINT8 SciDoorbell : 1; 2077 UINT8 Error : 1; 2078 UINT8 PlatformNotification : 1; 2079 UINT8 Reserved : 4; 2080 UINT8 Reserved1; 2081 } EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 2082 2083 typedef struct { 2084 UINT32 Signature; 2085 EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 2086 EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 2087 } EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 2088 2089 #define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_POLARITY BIT0 2090 #define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_MODE BIT1 2091 2092 /// 2093 /// Type 1 HW-Reduced Communications Subspace Structure 2094 /// 2095 typedef struct { 2096 UINT8 Type; 2097 UINT8 Length; 2098 UINT32 DoorbellInterrupt; 2099 UINT8 DoorbellInterruptFlags; 2100 UINT8 Reserved; 2101 UINT64 BaseAddress; 2102 UINT64 AddressLength; 2103 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2104 UINT64 DoorbellPreserve; 2105 UINT64 DoorbellWrite; 2106 UINT32 NominalLatency; 2107 UINT32 MaximumPeriodicAccessRate; 2108 UINT16 MinimumRequestTurnaroundTime; 2109 } EFI_ACPI_6_0_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS; 2110 2111 /// 2112 /// Type 2 HW-Reduced Communications Subspace Structure 2113 /// 2114 typedef struct { 2115 UINT8 Type; 2116 UINT8 Length; 2117 UINT32 DoorbellInterrupt; 2118 UINT8 DoorbellInterruptFlags; 2119 UINT8 Reserved; 2120 UINT64 BaseAddress; 2121 UINT64 AddressLength; 2122 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2123 UINT64 DoorbellPreserve; 2124 UINT64 DoorbellWrite; 2125 UINT32 NominalLatency; 2126 UINT32 MaximumPeriodicAccessRate; 2127 UINT16 MinimumRequestTurnaroundTime; 2128 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellAckRegister; 2129 UINT64 DoorbellAckPreserve; 2130 UINT64 DoorbellAckWrite; 2131 } EFI_ACPI_6_0_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS; 2132 2133 // 2134 // Known table signatures 2135 // 2136 2137 /// 2138 /// "RSD PTR " Root System Description Pointer 2139 /// 2140 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 2141 2142 /// 2143 /// "APIC" Multiple APIC Description Table 2144 /// 2145 #define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 2146 2147 /// 2148 /// "BERT" Boot Error Record Table 2149 /// 2150 #define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 2151 2152 /// 2153 /// "BGRT" Boot Graphics Resource Table 2154 /// 2155 #define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 2156 2157 /// 2158 /// "CPEP" Corrected Platform Error Polling Table 2159 /// 2160 #define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 2161 2162 /// 2163 /// "DSDT" Differentiated System Description Table 2164 /// 2165 #define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 2166 2167 /// 2168 /// "ECDT" Embedded Controller Boot Resources Table 2169 /// 2170 #define EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 2171 2172 /// 2173 /// "EINJ" Error Injection Table 2174 /// 2175 #define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 2176 2177 /// 2178 /// "ERST" Error Record Serialization Table 2179 /// 2180 #define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 2181 2182 /// 2183 /// "FACP" Fixed ACPI Description Table 2184 /// 2185 #define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 2186 2187 /// 2188 /// "FACS" Firmware ACPI Control Structure 2189 /// 2190 #define EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 2191 2192 /// 2193 /// "FPDT" Firmware Performance Data Table 2194 /// 2195 #define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 2196 2197 /// 2198 /// "GTDT" Generic Timer Description Table 2199 /// 2200 #define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 2201 2202 /// 2203 /// "HEST" Hardware Error Source Table 2204 /// 2205 #define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 2206 2207 /// 2208 /// "MPST" Memory Power State Table 2209 /// 2210 #define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 2211 2212 /// 2213 /// "MSCT" Maximum System Characteristics Table 2214 /// 2215 #define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 2216 2217 /// 2218 /// "NFIT" NVDIMM Firmware Interface Table 2219 /// 2220 #define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T') 2221 2222 /// 2223 /// "PMTT" Platform Memory Topology Table 2224 /// 2225 #define EFI_ACPI_6_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 2226 2227 /// 2228 /// "PSDT" Persistent System Description Table 2229 /// 2230 #define EFI_ACPI_6_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 2231 2232 /// 2233 /// "RASF" ACPI RAS Feature Table 2234 /// 2235 #define EFI_ACPI_6_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 2236 2237 /// 2238 /// "RSDT" Root System Description Table 2239 /// 2240 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 2241 2242 /// 2243 /// "SBST" Smart Battery Specification Table 2244 /// 2245 #define EFI_ACPI_6_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 2246 2247 /// 2248 /// "SLIT" System Locality Information Table 2249 /// 2250 #define EFI_ACPI_6_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 2251 2252 /// 2253 /// "SRAT" System Resource Affinity Table 2254 /// 2255 #define EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 2256 2257 /// 2258 /// "SSDT" Secondary System Description Table 2259 /// 2260 #define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2261 2262 /// 2263 /// "XSDT" Extended System Description Table 2264 /// 2265 #define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2266 2267 /// 2268 /// "BOOT" MS Simple Boot Spec 2269 /// 2270 #define EFI_ACPI_6_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2271 2272 /// 2273 /// "CSRT" MS Core System Resource Table 2274 /// 2275 #define EFI_ACPI_6_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2276 2277 /// 2278 /// "DBG2" MS Debug Port 2 Spec 2279 /// 2280 #define EFI_ACPI_6_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2281 2282 /// 2283 /// "DBGP" MS Debug Port Spec 2284 /// 2285 #define EFI_ACPI_6_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2286 2287 /// 2288 /// "DMAR" DMA Remapping Table 2289 /// 2290 #define EFI_ACPI_6_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2291 2292 /// 2293 /// "DRTM" Dynamic Root of Trust for Measurement Table 2294 /// 2295 #define EFI_ACPI_6_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2296 2297 /// 2298 /// "ETDT" Event Timer Description Table 2299 /// 2300 #define EFI_ACPI_6_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2301 2302 /// 2303 /// "HPET" IA-PC High Precision Event Timer Table 2304 /// 2305 #define EFI_ACPI_6_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2306 2307 /// 2308 /// "iBFT" iSCSI Boot Firmware Table 2309 /// 2310 #define EFI_ACPI_6_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2311 2312 /// 2313 /// "IORT" I/O Remapping Table 2314 /// 2315 #define EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T') 2316 2317 /// 2318 /// "IVRS" I/O Virtualization Reporting Structure 2319 /// 2320 #define EFI_ACPI_6_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2321 2322 /// 2323 /// "LPIT" Low Power Idle Table 2324 /// 2325 #define EFI_ACPI_6_0_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2326 2327 /// 2328 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2329 /// 2330 #define EFI_ACPI_6_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2331 2332 /// 2333 /// "MCHI" Management Controller Host Interface Table 2334 /// 2335 #define EFI_ACPI_6_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2336 2337 /// 2338 /// "MSDM" MS Data Management Table 2339 /// 2340 #define EFI_ACPI_6_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2341 2342 /// 2343 /// "PCCT" Platform Communications Channel Table 2344 /// 2345 #define EFI_ACPI_6_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') 2346 2347 /// 2348 /// "SLIC" MS Software Licensing Table Specification 2349 /// 2350 #define EFI_ACPI_6_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2351 2352 /// 2353 /// "SPCR" Serial Port Console Redirection Table 2354 /// 2355 #define EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2356 2357 /// 2358 /// "SPMI" Server Platform Management Interface Table 2359 /// 2360 #define EFI_ACPI_6_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2361 2362 /// 2363 /// "STAO" _STA Override Table 2364 /// 2365 #define EFI_ACPI_6_0_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O') 2366 2367 /// 2368 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2369 /// 2370 #define EFI_ACPI_6_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2371 2372 /// 2373 /// "TPM2" Trusted Computing Platform 1 Table 2374 /// 2375 #define EFI_ACPI_6_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2376 2377 /// 2378 /// "UEFI" UEFI ACPI Data Table 2379 /// 2380 #define EFI_ACPI_6_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2381 2382 /// 2383 /// "WAET" Windows ACPI Emulated Devices Table 2384 /// 2385 #define EFI_ACPI_6_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2386 2387 /// 2388 /// "WDAT" Watchdog Action Table 2389 /// 2390 #define EFI_ACPI_6_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2391 2392 /// 2393 /// "WDRT" Watchdog Resource Table 2394 /// 2395 #define EFI_ACPI_6_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2396 2397 /// 2398 /// "WPBT" MS Platform Binary Table 2399 /// 2400 #define EFI_ACPI_6_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2401 2402 /// 2403 /// "XENV" Xen Project Table 2404 /// 2405 #define EFI_ACPI_6_0_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V') 2406 2407 #pragma pack() 2408 2409 #endif 2410