1 /** @file 2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016. 3 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR> 5 Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR> 6 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR> 7 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR> 8 SPDX-License-Identifier: BSD-2-Clause-Patent 9 **/ 10 11 #ifndef _ACPI_5_1_H_ 12 #define _ACPI_5_1_H_ 13 14 #include <IndustryStandard/Acpi50.h> 15 16 /// 17 /// _PSD Revision for ACPI 5.1 18 /// 19 #define EFI_ACPI_5_1_AML_PSD_REVISION 0 20 21 /// 22 /// _CPC Revision for ACPI 5.1 23 /// 24 #define EFI_ACPI_5_1_AML_CPC_REVISION 2 25 26 // 27 // Ensure proper structure formats 28 // 29 #pragma pack(1) 30 31 /// 32 /// ACPI 5.1 Generic Address Space definition 33 /// 34 typedef struct { 35 UINT8 AddressSpaceId; 36 UINT8 RegisterBitWidth; 37 UINT8 RegisterBitOffset; 38 UINT8 AccessSize; 39 UINT64 Address; 40 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE; 41 42 // 43 // Generic Address Space Address IDs 44 // 45 #define EFI_ACPI_5_1_SYSTEM_MEMORY 0 46 #define EFI_ACPI_5_1_SYSTEM_IO 1 47 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2 48 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3 49 #define EFI_ACPI_5_1_SMBUS 4 50 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A 51 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F 52 53 // 54 // Generic Address Space Access Sizes 55 // 56 #define EFI_ACPI_5_1_UNDEFINED 0 57 #define EFI_ACPI_5_1_BYTE 1 58 #define EFI_ACPI_5_1_WORD 2 59 #define EFI_ACPI_5_1_DWORD 3 60 #define EFI_ACPI_5_1_QWORD 4 61 62 // 63 // ACPI 5.1 table structures 64 // 65 66 /// 67 /// Root System Description Pointer Structure 68 /// 69 typedef struct { 70 UINT64 Signature; 71 UINT8 Checksum; 72 UINT8 OemId[6]; 73 UINT8 Revision; 74 UINT32 RsdtAddress; 75 UINT32 Length; 76 UINT64 XsdtAddress; 77 UINT8 ExtendedChecksum; 78 UINT8 Reserved[3]; 79 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER; 80 81 /// 82 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.) 83 /// 84 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2 85 86 /// 87 /// Common table header, this prefaces all ACPI tables, including FACS, but 88 /// excluding the RSD PTR structure 89 /// 90 typedef struct { 91 UINT32 Signature; 92 UINT32 Length; 93 } EFI_ACPI_5_1_COMMON_HEADER; 94 95 // 96 // Root System Description Table 97 // No definition needed as it is a common description table header, the same with 98 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 99 // 100 101 /// 102 /// RSDT Revision (as defined in ACPI 5.1 spec.) 103 /// 104 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 105 106 // 107 // Extended System Description Table 108 // No definition needed as it is a common description table header, the same with 109 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 110 // 111 112 /// 113 /// XSDT Revision (as defined in ACPI 5.1 spec.) 114 /// 115 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 116 117 /// 118 /// Fixed ACPI Description Table Structure (FADT) 119 /// 120 typedef struct { 121 EFI_ACPI_DESCRIPTION_HEADER Header; 122 UINT32 FirmwareCtrl; 123 UINT32 Dsdt; 124 UINT8 Reserved0; 125 UINT8 PreferredPmProfile; 126 UINT16 SciInt; 127 UINT32 SmiCmd; 128 UINT8 AcpiEnable; 129 UINT8 AcpiDisable; 130 UINT8 S4BiosReq; 131 UINT8 PstateCnt; 132 UINT32 Pm1aEvtBlk; 133 UINT32 Pm1bEvtBlk; 134 UINT32 Pm1aCntBlk; 135 UINT32 Pm1bCntBlk; 136 UINT32 Pm2CntBlk; 137 UINT32 PmTmrBlk; 138 UINT32 Gpe0Blk; 139 UINT32 Gpe1Blk; 140 UINT8 Pm1EvtLen; 141 UINT8 Pm1CntLen; 142 UINT8 Pm2CntLen; 143 UINT8 PmTmrLen; 144 UINT8 Gpe0BlkLen; 145 UINT8 Gpe1BlkLen; 146 UINT8 Gpe1Base; 147 UINT8 CstCnt; 148 UINT16 PLvl2Lat; 149 UINT16 PLvl3Lat; 150 UINT16 FlushSize; 151 UINT16 FlushStride; 152 UINT8 DutyOffset; 153 UINT8 DutyWidth; 154 UINT8 DayAlrm; 155 UINT8 MonAlrm; 156 UINT8 Century; 157 UINT16 IaPcBootArch; 158 UINT8 Reserved1; 159 UINT32 Flags; 160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg; 161 UINT8 ResetValue; 162 UINT16 ArmBootArch; 163 UINT8 MinorVersion; 164 UINT64 XFirmwareCtrl; 165 UINT64 XDsdt; 166 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 167 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 168 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 169 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 170 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 171 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 172 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 173 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 174 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 175 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 176 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE; 177 178 /// 179 /// FADT Version (as defined in ACPI 5.1 spec.) 180 /// 181 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05 182 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01 183 184 // 185 // Fixed ACPI Description Table Preferred Power Management Profile 186 // 187 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0 188 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1 189 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2 190 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3 191 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4 192 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5 193 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6 194 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7 195 #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8 196 197 // 198 // Fixed ACPI Description Table Boot Architecture Flags 199 // All other bits are reserved and must be set to 0. 200 // 201 #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0 202 #define EFI_ACPI_5_1_8042 BIT1 203 #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2 204 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3 205 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4 206 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5 207 208 // 209 // Fixed ACPI Description Table Arm Boot Architecture Flags 210 // All other bits are reserved and must be set to 0. 211 // 212 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0 213 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1 214 215 // 216 // Fixed ACPI Description Table Fixed Feature Flags 217 // All other bits are reserved and must be set to 0. 218 // 219 #define EFI_ACPI_5_1_WBINVD BIT0 220 #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1 221 #define EFI_ACPI_5_1_PROC_C1 BIT2 222 #define EFI_ACPI_5_1_P_LVL2_UP BIT3 223 #define EFI_ACPI_5_1_PWR_BUTTON BIT4 224 #define EFI_ACPI_5_1_SLP_BUTTON BIT5 225 #define EFI_ACPI_5_1_FIX_RTC BIT6 226 #define EFI_ACPI_5_1_RTC_S4 BIT7 227 #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8 228 #define EFI_ACPI_5_1_DCK_CAP BIT9 229 #define EFI_ACPI_5_1_RESET_REG_SUP BIT10 230 #define EFI_ACPI_5_1_SEALED_CASE BIT11 231 #define EFI_ACPI_5_1_HEADLESS BIT12 232 #define EFI_ACPI_5_1_CPU_SW_SLP BIT13 233 #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14 234 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15 235 #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16 236 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17 237 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18 238 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 239 #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20 240 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21 241 242 /// 243 /// Firmware ACPI Control Structure 244 /// 245 typedef struct { 246 UINT32 Signature; 247 UINT32 Length; 248 UINT32 HardwareSignature; 249 UINT32 FirmwareWakingVector; 250 UINT32 GlobalLock; 251 UINT32 Flags; 252 UINT64 XFirmwareWakingVector; 253 UINT8 Version; 254 UINT8 Reserved0[3]; 255 UINT32 OspmFlags; 256 UINT8 Reserved1[24]; 257 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE; 258 259 /// 260 /// FACS Version (as defined in ACPI 5.1 spec.) 261 /// 262 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 263 264 /// 265 /// Firmware Control Structure Feature Flags 266 /// All other bits are reserved and must be set to 0. 267 /// 268 #define EFI_ACPI_5_1_S4BIOS_F BIT0 269 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1 270 271 /// 272 /// OSPM Enabled Firmware Control Structure Flags 273 /// All other bits are reserved and must be set to 0. 274 /// 275 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0 276 277 // 278 // Differentiated System Description Table, 279 // Secondary System Description Table 280 // and Persistent System Description Table, 281 // no definition needed as they are common description table header, the same with 282 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 283 // 284 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 285 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 286 287 /// 288 /// Multiple APIC Description Table header definition. The rest of the table 289 /// must be defined in a platform specific manner. 290 /// 291 typedef struct { 292 EFI_ACPI_DESCRIPTION_HEADER Header; 293 UINT32 LocalApicAddress; 294 UINT32 Flags; 295 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 296 297 /// 298 /// MADT Revision (as defined in ACPI 5.1 spec.) 299 /// 300 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03 301 302 /// 303 /// Multiple APIC Flags 304 /// All other bits are reserved and must be set to 0. 305 /// 306 #define EFI_ACPI_5_1_PCAT_COMPAT BIT0 307 308 // 309 // Multiple APIC Description Table APIC structure types 310 // All other values between 0x0D and 0x7F are reserved and 311 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 312 // 313 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00 314 #define EFI_ACPI_5_1_IO_APIC 0x01 315 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02 316 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03 317 #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04 318 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 319 #define EFI_ACPI_5_1_IO_SAPIC 0x06 320 #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07 321 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08 322 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09 323 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A 324 #define EFI_ACPI_5_1_GIC 0x0B 325 #define EFI_ACPI_5_1_GICD 0x0C 326 #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D 327 #define EFI_ACPI_5_1_GICR 0x0E 328 329 // 330 // APIC Structure Definitions 331 // 332 333 /// 334 /// Processor Local APIC Structure Definition 335 /// 336 typedef struct { 337 UINT8 Type; 338 UINT8 Length; 339 UINT8 AcpiProcessorId; 340 UINT8 ApicId; 341 UINT32 Flags; 342 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE; 343 344 /// 345 /// Local APIC Flags. All other bits are reserved and must be 0. 346 /// 347 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0 348 349 /// 350 /// IO APIC Structure 351 /// 352 typedef struct { 353 UINT8 Type; 354 UINT8 Length; 355 UINT8 IoApicId; 356 UINT8 Reserved; 357 UINT32 IoApicAddress; 358 UINT32 GlobalSystemInterruptBase; 359 } EFI_ACPI_5_1_IO_APIC_STRUCTURE; 360 361 /// 362 /// Interrupt Source Override Structure 363 /// 364 typedef struct { 365 UINT8 Type; 366 UINT8 Length; 367 UINT8 Bus; 368 UINT8 Source; 369 UINT32 GlobalSystemInterrupt; 370 UINT16 Flags; 371 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 372 373 /// 374 /// Platform Interrupt Sources Structure Definition 375 /// 376 typedef struct { 377 UINT8 Type; 378 UINT8 Length; 379 UINT16 Flags; 380 UINT8 InterruptType; 381 UINT8 ProcessorId; 382 UINT8 ProcessorEid; 383 UINT8 IoSapicVector; 384 UINT32 GlobalSystemInterrupt; 385 UINT32 PlatformInterruptSourceFlags; 386 UINT8 CpeiProcessorOverride; 387 UINT8 Reserved[31]; 388 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE; 389 390 // 391 // MPS INTI flags. 392 // All other bits are reserved and must be set to 0. 393 // 394 #define EFI_ACPI_5_1_POLARITY (3 << 0) 395 #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2) 396 397 /// 398 /// Non-Maskable Interrupt Source Structure 399 /// 400 typedef struct { 401 UINT8 Type; 402 UINT8 Length; 403 UINT16 Flags; 404 UINT32 GlobalSystemInterrupt; 405 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 406 407 /// 408 /// Local APIC NMI Structure 409 /// 410 typedef struct { 411 UINT8 Type; 412 UINT8 Length; 413 UINT8 AcpiProcessorId; 414 UINT16 Flags; 415 UINT8 LocalApicLint; 416 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE; 417 418 /// 419 /// Local APIC Address Override Structure 420 /// 421 typedef struct { 422 UINT8 Type; 423 UINT8 Length; 424 UINT16 Reserved; 425 UINT64 LocalApicAddress; 426 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 427 428 /// 429 /// IO SAPIC Structure 430 /// 431 typedef struct { 432 UINT8 Type; 433 UINT8 Length; 434 UINT8 IoApicId; 435 UINT8 Reserved; 436 UINT32 GlobalSystemInterruptBase; 437 UINT64 IoSapicAddress; 438 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE; 439 440 /// 441 /// Local SAPIC Structure 442 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 443 /// 444 typedef struct { 445 UINT8 Type; 446 UINT8 Length; 447 UINT8 AcpiProcessorId; 448 UINT8 LocalSapicId; 449 UINT8 LocalSapicEid; 450 UINT8 Reserved[3]; 451 UINT32 Flags; 452 UINT32 ACPIProcessorUIDValue; 453 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 454 455 /// 456 /// Platform Interrupt Sources Structure 457 /// 458 typedef struct { 459 UINT8 Type; 460 UINT8 Length; 461 UINT16 Flags; 462 UINT8 InterruptType; 463 UINT8 ProcessorId; 464 UINT8 ProcessorEid; 465 UINT8 IoSapicVector; 466 UINT32 GlobalSystemInterrupt; 467 UINT32 PlatformInterruptSourceFlags; 468 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 469 470 /// 471 /// Platform Interrupt Source Flags. 472 /// All other bits are reserved and must be set to 0. 473 /// 474 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0 475 476 /// 477 /// Processor Local x2APIC Structure Definition 478 /// 479 typedef struct { 480 UINT8 Type; 481 UINT8 Length; 482 UINT8 Reserved[2]; 483 UINT32 X2ApicId; 484 UINT32 Flags; 485 UINT32 AcpiProcessorUid; 486 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 487 488 /// 489 /// Local x2APIC NMI Structure 490 /// 491 typedef struct { 492 UINT8 Type; 493 UINT8 Length; 494 UINT16 Flags; 495 UINT32 AcpiProcessorUid; 496 UINT8 LocalX2ApicLint; 497 UINT8 Reserved[3]; 498 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE; 499 500 /// 501 /// GIC Structure 502 /// 503 typedef struct { 504 UINT8 Type; 505 UINT8 Length; 506 UINT16 Reserved; 507 UINT32 CPUInterfaceNumber; 508 UINT32 AcpiProcessorUid; 509 UINT32 Flags; 510 UINT32 ParkingProtocolVersion; 511 UINT32 PerformanceInterruptGsiv; 512 UINT64 ParkedAddress; 513 UINT64 PhysicalBaseAddress; 514 UINT64 GICV; 515 UINT64 GICH; 516 UINT32 VGICMaintenanceInterrupt; 517 UINT64 GICRBaseAddress; 518 UINT64 MPIDR; 519 } EFI_ACPI_5_1_GIC_STRUCTURE; 520 521 /// 522 /// GIC Flags. All other bits are reserved and must be 0. 523 /// 524 #define EFI_ACPI_5_1_GIC_ENABLED BIT0 525 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1 526 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 527 528 /// 529 /// GIC Distributor Structure 530 /// 531 typedef struct { 532 UINT8 Type; 533 UINT8 Length; 534 UINT16 Reserved1; 535 UINT32 GicId; 536 UINT64 PhysicalBaseAddress; 537 UINT32 SystemVectorBase; 538 UINT8 GicVersion; 539 UINT8 Reserved2[3]; 540 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE; 541 542 /// 543 /// GIC Version 544 /// 545 #define EFI_ACPI_5_1_GIC_V1 0x01 546 #define EFI_ACPI_5_1_GIC_V2 0x02 547 #define EFI_ACPI_5_1_GIC_V3 0x03 548 #define EFI_ACPI_5_1_GIC_V4 0x04 549 550 /// 551 /// GIC MSI Frame Structure 552 /// 553 typedef struct { 554 UINT8 Type; 555 UINT8 Length; 556 UINT16 Reserved1; 557 UINT32 GicMsiFrameId; 558 UINT64 PhysicalBaseAddress; 559 UINT32 Flags; 560 UINT16 SPICount; 561 UINT16 SPIBase; 562 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE; 563 564 /// 565 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 566 /// 567 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0 568 569 /// 570 /// GICR Structure 571 /// 572 typedef struct { 573 UINT8 Type; 574 UINT8 Length; 575 UINT16 Reserved; 576 UINT64 DiscoveryRangeBaseAddress; 577 UINT32 DiscoveryRangeLength; 578 } EFI_ACPI_5_1_GICR_STRUCTURE; 579 580 /// 581 /// Smart Battery Description Table (SBST) 582 /// 583 typedef struct { 584 EFI_ACPI_DESCRIPTION_HEADER Header; 585 UINT32 WarningEnergyLevel; 586 UINT32 LowEnergyLevel; 587 UINT32 CriticalEnergyLevel; 588 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE; 589 590 /// 591 /// SBST Version (as defined in ACPI 5.1 spec.) 592 /// 593 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 594 595 /// 596 /// Embedded Controller Boot Resources Table (ECDT) 597 /// The table is followed by a null terminated ASCII string that contains 598 /// a fully qualified reference to the name space object. 599 /// 600 typedef struct { 601 EFI_ACPI_DESCRIPTION_HEADER Header; 602 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl; 603 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData; 604 UINT32 Uid; 605 UINT8 GpeBit; 606 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 607 608 /// 609 /// ECDT Version (as defined in ACPI 5.1 spec.) 610 /// 611 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 612 613 /// 614 /// System Resource Affinity Table (SRAT). The rest of the table 615 /// must be defined in a platform specific manner. 616 /// 617 typedef struct { 618 EFI_ACPI_DESCRIPTION_HEADER Header; 619 UINT32 Reserved1; ///< Must be set to 1 620 UINT64 Reserved2; 621 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 622 623 /// 624 /// SRAT Version (as defined in ACPI 5.1 spec.) 625 /// 626 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 627 628 // 629 // SRAT structure types. 630 // All other values between 0x04 an 0xFF are reserved and 631 // will be ignored by OSPM. 632 // 633 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 634 #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01 635 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 636 #define EFI_ACPI_5_1_GICC_AFFINITY 0x03 637 638 /// 639 /// Processor Local APIC/SAPIC Affinity Structure Definition 640 /// 641 typedef struct { 642 UINT8 Type; 643 UINT8 Length; 644 UINT8 ProximityDomain7To0; 645 UINT8 ApicId; 646 UINT32 Flags; 647 UINT8 LocalSapicEid; 648 UINT8 ProximityDomain31To8[3]; 649 UINT32 ClockDomain; 650 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 651 652 /// 653 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 654 /// 655 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 656 657 /// 658 /// Memory Affinity Structure Definition 659 /// 660 typedef struct { 661 UINT8 Type; 662 UINT8 Length; 663 UINT32 ProximityDomain; 664 UINT16 Reserved1; 665 UINT32 AddressBaseLow; 666 UINT32 AddressBaseHigh; 667 UINT32 LengthLow; 668 UINT32 LengthHigh; 669 UINT32 Reserved2; 670 UINT32 Flags; 671 UINT64 Reserved3; 672 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE; 673 674 // 675 // Memory Flags. All other bits are reserved and must be 0. 676 // 677 #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0) 678 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1) 679 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2) 680 681 /// 682 /// Processor Local x2APIC Affinity Structure Definition 683 /// 684 typedef struct { 685 UINT8 Type; 686 UINT8 Length; 687 UINT8 Reserved1[2]; 688 UINT32 ProximityDomain; 689 UINT32 X2ApicId; 690 UINT32 Flags; 691 UINT32 ClockDomain; 692 UINT8 Reserved2[4]; 693 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 694 695 /// 696 /// GICC Affinity Structure Definition 697 /// 698 typedef struct { 699 UINT8 Type; 700 UINT8 Length; 701 UINT32 ProximityDomain; 702 UINT32 AcpiProcessorUid; 703 UINT32 Flags; 704 UINT32 ClockDomain; 705 } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE; 706 707 /// 708 /// GICC Flags. All other bits are reserved and must be 0. 709 /// 710 #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0) 711 712 /// 713 /// System Locality Distance Information Table (SLIT). 714 /// The rest of the table is a matrix. 715 /// 716 typedef struct { 717 EFI_ACPI_DESCRIPTION_HEADER Header; 718 UINT64 NumberOfSystemLocalities; 719 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 720 721 /// 722 /// SLIT Version (as defined in ACPI 5.1 spec.) 723 /// 724 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 725 726 /// 727 /// Corrected Platform Error Polling Table (CPEP) 728 /// 729 typedef struct { 730 EFI_ACPI_DESCRIPTION_HEADER Header; 731 UINT8 Reserved[8]; 732 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 733 734 /// 735 /// CPEP Version (as defined in ACPI 5.1 spec.) 736 /// 737 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 738 739 // 740 // CPEP processor structure types. 741 // 742 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00 743 744 /// 745 /// Corrected Platform Error Polling Processor Structure Definition 746 /// 747 typedef struct { 748 UINT8 Type; 749 UINT8 Length; 750 UINT8 ProcessorId; 751 UINT8 ProcessorEid; 752 UINT32 PollingInterval; 753 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 754 755 /// 756 /// Maximum System Characteristics Table (MSCT) 757 /// 758 typedef struct { 759 EFI_ACPI_DESCRIPTION_HEADER Header; 760 UINT32 OffsetProxDomInfo; 761 UINT32 MaximumNumberOfProximityDomains; 762 UINT32 MaximumNumberOfClockDomains; 763 UINT64 MaximumPhysicalAddress; 764 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 765 766 /// 767 /// MSCT Version (as defined in ACPI 5.1 spec.) 768 /// 769 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 770 771 /// 772 /// Maximum Proximity Domain Information Structure Definition 773 /// 774 typedef struct { 775 UINT8 Revision; 776 UINT8 Length; 777 UINT32 ProximityDomainRangeLow; 778 UINT32 ProximityDomainRangeHigh; 779 UINT32 MaximumProcessorCapacity; 780 UINT64 MaximumMemoryCapacity; 781 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 782 783 /// 784 /// ACPI RAS Feature Table definition. 785 /// 786 typedef struct { 787 EFI_ACPI_DESCRIPTION_HEADER Header; 788 UINT8 PlatformCommunicationChannelIdentifier[12]; 789 } EFI_ACPI_5_1_RAS_FEATURE_TABLE; 790 791 /// 792 /// RASF Version (as defined in ACPI 5.1 spec.) 793 /// 794 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01 795 796 /// 797 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 798 /// 799 typedef struct { 800 UINT32 Signature; 801 UINT16 Command; 802 UINT16 Status; 803 UINT16 Version; 804 UINT8 RASCapabilities[16]; 805 UINT8 SetRASCapabilities[16]; 806 UINT16 NumberOfRASFParameterBlocks; 807 UINT32 SetRASCapabilitiesStatus; 808 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 809 810 /// 811 /// ACPI RASF PCC command code 812 /// 813 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 814 815 /// 816 /// ACPI RASF Platform RAS Capabilities 817 /// 818 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 819 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 820 821 /// 822 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 823 /// 824 typedef struct { 825 UINT16 Type; 826 UINT16 Version; 827 UINT16 Length; 828 UINT16 PatrolScrubCommand; 829 UINT64 RequestedAddressRange[2]; 830 UINT64 ActualAddressRange[2]; 831 UINT16 Flags; 832 UINT8 RequestedSpeed; 833 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 834 835 /// 836 /// ACPI RASF Patrol Scrub command 837 /// 838 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 839 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 840 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 841 842 /// 843 /// Memory Power State Table definition. 844 /// 845 typedef struct { 846 EFI_ACPI_DESCRIPTION_HEADER Header; 847 UINT8 PlatformCommunicationChannelIdentifier; 848 UINT8 Reserved[3]; 849 // Memory Power Node Structure 850 // Memory Power State Characteristics 851 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE; 852 853 /// 854 /// MPST Version (as defined in ACPI 5.1 spec.) 855 /// 856 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01 857 858 /// 859 /// MPST Platform Communication Channel Shared Memory Region definition. 860 /// 861 typedef struct { 862 UINT32 Signature; 863 UINT16 Command; 864 UINT16 Status; 865 UINT32 MemoryPowerCommandRegister; 866 UINT32 MemoryPowerStatusRegister; 867 UINT32 PowerStateId; 868 UINT32 MemoryPowerNodeId; 869 UINT64 MemoryEnergyConsumed; 870 UINT64 ExpectedAveragePowerComsuned; 871 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 872 873 /// 874 /// ACPI MPST PCC command code 875 /// 876 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 877 878 /// 879 /// ACPI MPST Memory Power command 880 /// 881 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 882 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 883 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 884 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 885 886 /// 887 /// MPST Memory Power Node Table 888 /// 889 typedef struct { 890 UINT8 PowerStateValue; 891 UINT8 PowerStateInformationIndex; 892 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE; 893 894 typedef struct { 895 UINT8 Flag; 896 UINT8 Reserved; 897 UINT16 MemoryPowerNodeId; 898 UINT32 Length; 899 UINT64 AddressBase; 900 UINT64 AddressLength; 901 UINT32 NumberOfPowerStates; 902 UINT32 NumberOfPhysicalComponents; 903 // EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 904 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 905 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE; 906 907 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 908 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 909 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 910 911 typedef struct { 912 UINT16 MemoryPowerNodeCount; 913 UINT8 Reserved[2]; 914 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE; 915 916 /// 917 /// MPST Memory Power State Characteristics Table 918 /// 919 typedef struct { 920 UINT8 PowerStateStructureID; 921 UINT8 Flag; 922 UINT16 Reserved; 923 UINT32 AveragePowerConsumedInMPS0; 924 UINT32 RelativePowerSavingToMPS0; 925 UINT64 ExitLatencyToMPS0; 926 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 927 928 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 929 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 930 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 931 932 typedef struct { 933 UINT16 MemoryPowerStateCharacteristicsCount; 934 UINT8 Reserved[2]; 935 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 936 937 /// 938 /// Memory Topology Table definition. 939 /// 940 typedef struct { 941 EFI_ACPI_DESCRIPTION_HEADER Header; 942 UINT32 Reserved; 943 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE; 944 945 /// 946 /// PMTT Version (as defined in ACPI 5.1 spec.) 947 /// 948 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 949 950 /// 951 /// Common Memory Aggregator Device Structure. 952 /// 953 typedef struct { 954 UINT8 Type; 955 UINT8 Reserved; 956 UINT16 Length; 957 UINT16 Flags; 958 UINT16 Reserved1; 959 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 960 961 /// 962 /// Memory Aggregator Device Type 963 /// 964 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0 965 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1 966 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2 967 968 /// 969 /// Socket Memory Aggregator Device Structure. 970 /// 971 typedef struct { 972 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 973 UINT16 SocketIdentifier; 974 UINT16 Reserved; 975 // EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 976 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 977 978 /// 979 /// MemoryController Memory Aggregator Device Structure. 980 /// 981 typedef struct { 982 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 983 UINT32 ReadLatency; 984 UINT32 WriteLatency; 985 UINT32 ReadBandwidth; 986 UINT32 WriteBandwidth; 987 UINT16 OptimalAccessUnit; 988 UINT16 OptimalAccessAlignment; 989 UINT16 Reserved; 990 UINT16 NumberOfProximityDomains; 991 // UINT32 ProximityDomain[NumberOfProximityDomains]; 992 // EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 993 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 994 995 /// 996 /// DIMM Memory Aggregator Device Structure. 997 /// 998 typedef struct { 999 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1000 UINT16 PhysicalComponentIdentifier; 1001 UINT16 Reserved; 1002 UINT32 SizeOfDimm; 1003 UINT32 SmbiosHandle; 1004 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1005 1006 /// 1007 /// Boot Graphics Resource Table definition. 1008 /// 1009 typedef struct { 1010 EFI_ACPI_DESCRIPTION_HEADER Header; 1011 /// 1012 /// 2-bytes (16 bit) version ID. This value must be 1. 1013 /// 1014 UINT16 Version; 1015 /// 1016 /// 1-byte status field indicating current status about the table. 1017 /// Bits[7:1] = Reserved (must be zero) 1018 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1019 /// 1020 UINT8 Status; 1021 /// 1022 /// 1-byte enumerated type field indicating format of the image. 1023 /// 0 = Bitmap 1024 /// 1 - 255 Reserved (for future use) 1025 /// 1026 UINT8 ImageType; 1027 /// 1028 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1029 /// of the image bitmap. 1030 /// 1031 UINT64 ImageAddress; 1032 /// 1033 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1034 /// (X, Y) display offset of the top left corner of the boot image. 1035 /// The top left corner of the display is at offset (0, 0). 1036 /// 1037 UINT32 ImageOffsetX; 1038 /// 1039 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1040 /// (X, Y) display offset of the top left corner of the boot image. 1041 /// The top left corner of the display is at offset (0, 0). 1042 /// 1043 UINT32 ImageOffsetY; 1044 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE; 1045 1046 /// 1047 /// BGRT Revision 1048 /// 1049 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1050 1051 /// 1052 /// BGRT Version 1053 /// 1054 #define EFI_ACPI_5_1_BGRT_VERSION 0x01 1055 1056 /// 1057 /// BGRT Status 1058 /// 1059 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00 1060 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01 1061 1062 /// 1063 /// BGRT Image Type 1064 /// 1065 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00 1066 1067 /// 1068 /// FPDT Version (as defined in ACPI 5.1 spec.) 1069 /// 1070 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1071 1072 /// 1073 /// FPDT Performance Record Types 1074 /// 1075 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1076 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1077 1078 /// 1079 /// FPDT Performance Record Revision 1080 /// 1081 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1082 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1083 1084 /// 1085 /// FPDT Runtime Performance Record Types 1086 /// 1087 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1088 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1089 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1090 1091 /// 1092 /// FPDT Runtime Performance Record Revision 1093 /// 1094 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1095 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1096 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1097 1098 /// 1099 /// FPDT Performance Record header 1100 /// 1101 typedef struct { 1102 UINT16 Type; 1103 UINT8 Length; 1104 UINT8 Revision; 1105 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER; 1106 1107 /// 1108 /// FPDT Performance Table header 1109 /// 1110 typedef struct { 1111 UINT32 Signature; 1112 UINT32 Length; 1113 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER; 1114 1115 /// 1116 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1117 /// 1118 typedef struct { 1119 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1120 UINT32 Reserved; 1121 /// 1122 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1123 /// 1124 UINT64 BootPerformanceTablePointer; 1125 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1126 1127 /// 1128 /// FPDT S3 Performance Table Pointer Record Structure 1129 /// 1130 typedef struct { 1131 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1132 UINT32 Reserved; 1133 /// 1134 /// 64-bit processor-relative physical address of the S3 Performance Table. 1135 /// 1136 UINT64 S3PerformanceTablePointer; 1137 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1138 1139 /// 1140 /// FPDT Firmware Basic Boot Performance Record Structure 1141 /// 1142 typedef struct { 1143 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1144 UINT32 Reserved; 1145 /// 1146 /// Timer value logged at the beginning of firmware image execution. 1147 /// This may not always be zero or near zero. 1148 /// 1149 UINT64 ResetEnd; 1150 /// 1151 /// Timer value logged just prior to loading the OS boot loader into memory. 1152 /// For non-UEFI compatible boots, this field must be zero. 1153 /// 1154 UINT64 OsLoaderLoadImageStart; 1155 /// 1156 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1157 /// For non-UEFI compatible boots, the timer value logged will be just prior 1158 /// to the INT 19h handler invocation. 1159 /// 1160 UINT64 OsLoaderStartImageStart; 1161 /// 1162 /// Timer value logged at the point when the OS loader calls the 1163 /// ExitBootServices function for UEFI compatible firmware. 1164 /// For non-UEFI compatible boots, this field must be zero. 1165 /// 1166 UINT64 ExitBootServicesEntry; 1167 /// 1168 /// Timer value logged at the point just prior to when the OS loader gaining 1169 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1170 /// For non-UEFI compatible boots, this field must be zero. 1171 /// 1172 UINT64 ExitBootServicesExit; 1173 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1174 1175 /// 1176 /// FPDT Firmware Basic Boot Performance Table signature 1177 /// 1178 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1179 1180 // 1181 // FPDT Firmware Basic Boot Performance Table 1182 // 1183 typedef struct { 1184 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1185 // 1186 // one or more Performance Records. 1187 // 1188 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1189 1190 /// 1191 /// FPDT "S3PT" S3 Performance Table 1192 /// 1193 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1194 1195 // 1196 // FPDT Firmware S3 Boot Performance Table 1197 // 1198 typedef struct { 1199 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1200 // 1201 // one or more Performance Records. 1202 // 1203 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE; 1204 1205 /// 1206 /// FPDT Basic S3 Resume Performance Record 1207 /// 1208 typedef struct { 1209 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1210 /// 1211 /// A count of the number of S3 resume cycles since the last full boot sequence. 1212 /// 1213 UINT32 ResumeCount; 1214 /// 1215 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1216 /// OS waking vector. Only the most recent resume cycle's time is retained. 1217 /// 1218 UINT64 FullResume; 1219 /// 1220 /// Average timer value of all resume cycles logged since the last full boot 1221 /// sequence, including the most recent resume. Note that the entire log of 1222 /// timer values does not need to be retained in order to calculate this average. 1223 /// 1224 UINT64 AverageResume; 1225 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD; 1226 1227 /// 1228 /// FPDT Basic S3 Suspend Performance Record 1229 /// 1230 typedef struct { 1231 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1232 /// 1233 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1234 /// Only the most recent suspend cycle's timer value is retained. 1235 /// 1236 UINT64 SuspendStart; 1237 /// 1238 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1239 /// mechanism) used to trigger hardware entry to S3. 1240 /// Only the most recent suspend cycle's timer value is retained. 1241 /// 1242 UINT64 SuspendEnd; 1243 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD; 1244 1245 /// 1246 /// Firmware Performance Record Table definition. 1247 /// 1248 typedef struct { 1249 EFI_ACPI_DESCRIPTION_HEADER Header; 1250 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1251 1252 /// 1253 /// Generic Timer Description Table definition. 1254 /// 1255 typedef struct { 1256 EFI_ACPI_DESCRIPTION_HEADER Header; 1257 UINT64 CntControlBasePhysicalAddress; 1258 UINT32 Reserved; 1259 UINT32 SecurePL1TimerGSIV; 1260 UINT32 SecurePL1TimerFlags; 1261 UINT32 NonSecurePL1TimerGSIV; 1262 UINT32 NonSecurePL1TimerFlags; 1263 UINT32 VirtualTimerGSIV; 1264 UINT32 VirtualTimerFlags; 1265 UINT32 NonSecurePL2TimerGSIV; 1266 UINT32 NonSecurePL2TimerFlags; 1267 UINT64 CntReadBasePhysicalAddress; 1268 UINT32 PlatformTimerCount; 1269 UINT32 PlatformTimerOffset; 1270 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE; 1271 1272 /// 1273 /// GTDT Version (as defined in ACPI 5.1 spec.) 1274 /// 1275 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 1276 1277 /// 1278 /// Timer Flags. All other bits are reserved and must be 0. 1279 /// 1280 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1281 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1282 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1283 1284 /// 1285 /// Platform Timer Type 1286 /// 1287 #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0 1288 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1 1289 1290 /// 1291 /// GT Block Structure 1292 /// 1293 typedef struct { 1294 UINT8 Type; 1295 UINT16 Length; 1296 UINT8 Reserved; 1297 UINT64 CntCtlBase; 1298 UINT32 GTBlockTimerCount; 1299 UINT32 GTBlockTimerOffset; 1300 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE; 1301 1302 /// 1303 /// GT Block Timer Structure 1304 /// 1305 typedef struct { 1306 UINT8 GTFrameNumber; 1307 UINT8 Reserved[3]; 1308 UINT64 CntBaseX; 1309 UINT64 CntEL0BaseX; 1310 UINT32 GTxPhysicalTimerGSIV; 1311 UINT32 GTxPhysicalTimerFlags; 1312 UINT32 GTxVirtualTimerGSIV; 1313 UINT32 GTxVirtualTimerFlags; 1314 UINT32 GTxCommonFlags; 1315 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1316 1317 /// 1318 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1319 /// 1320 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1321 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1322 1323 /// 1324 /// Common Flags Flags. All other bits are reserved and must be 0. 1325 /// 1326 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1327 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1328 1329 /// 1330 /// SBSA Generic Watchdog Structure 1331 /// 1332 typedef struct { 1333 UINT8 Type; 1334 UINT16 Length; 1335 UINT8 Reserved; 1336 UINT64 RefreshFramePhysicalAddress; 1337 UINT64 WatchdogControlFramePhysicalAddress; 1338 UINT32 WatchdogTimerGSIV; 1339 UINT32 WatchdogTimerFlags; 1340 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1341 1342 /// 1343 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1344 /// 1345 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1346 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1347 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1348 1349 /// 1350 /// Boot Error Record Table (BERT) 1351 /// 1352 typedef struct { 1353 EFI_ACPI_DESCRIPTION_HEADER Header; 1354 UINT32 BootErrorRegionLength; 1355 UINT64 BootErrorRegion; 1356 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER; 1357 1358 /// 1359 /// BERT Version (as defined in ACPI 5.1 spec.) 1360 /// 1361 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1362 1363 /// 1364 /// Boot Error Region Block Status Definition 1365 /// 1366 typedef struct { 1367 UINT32 UncorrectableErrorValid : 1; 1368 UINT32 CorrectableErrorValid : 1; 1369 UINT32 MultipleUncorrectableErrors : 1; 1370 UINT32 MultipleCorrectableErrors : 1; 1371 UINT32 ErrorDataEntryCount : 10; 1372 UINT32 Reserved : 18; 1373 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS; 1374 1375 /// 1376 /// Boot Error Region Definition 1377 /// 1378 typedef struct { 1379 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1380 UINT32 RawDataOffset; 1381 UINT32 RawDataLength; 1382 UINT32 DataLength; 1383 UINT32 ErrorSeverity; 1384 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE; 1385 1386 // 1387 // Boot Error Severity types 1388 // 1389 #define EFI_ACPI_5_1_ERROR_SEVERITY_RECOVERABLE 0x00 1390 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01 1391 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02 1392 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03 1393 // 1394 // The term 'Correctable' is no longer being used as an error severity of the 1395 // reported error since ACPI Specification Version 5.1 Errata B. 1396 // The below macro is considered as deprecated and should no longer be used. 1397 // 1398 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00 1399 1400 /// 1401 /// Generic Error Data Entry Definition 1402 /// 1403 typedef struct { 1404 UINT8 SectionType[16]; 1405 UINT32 ErrorSeverity; 1406 UINT16 Revision; 1407 UINT8 ValidationBits; 1408 UINT8 Flags; 1409 UINT32 ErrorDataLength; 1410 UINT8 FruId[16]; 1411 UINT8 FruText[20]; 1412 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1413 1414 /// 1415 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.) 1416 /// 1417 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 1418 1419 /// 1420 /// HEST - Hardware Error Source Table 1421 /// 1422 typedef struct { 1423 EFI_ACPI_DESCRIPTION_HEADER Header; 1424 UINT32 ErrorSourceCount; 1425 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1426 1427 /// 1428 /// HEST Version (as defined in ACPI 5.1 spec.) 1429 /// 1430 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1431 1432 // 1433 // Error Source structure types. 1434 // 1435 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1436 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1437 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02 1438 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06 1439 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07 1440 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08 1441 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09 1442 1443 // 1444 // Error Source structure flags. 1445 // 1446 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1447 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1448 1449 /// 1450 /// IA-32 Architecture Machine Check Exception Structure Definition 1451 /// 1452 typedef struct { 1453 UINT16 Type; 1454 UINT16 SourceId; 1455 UINT8 Reserved0[2]; 1456 UINT8 Flags; 1457 UINT8 Enabled; 1458 UINT32 NumberOfRecordsToPreAllocate; 1459 UINT32 MaxSectionsPerRecord; 1460 UINT64 GlobalCapabilityInitData; 1461 UINT64 GlobalControlInitData; 1462 UINT8 NumberOfHardwareBanks; 1463 UINT8 Reserved1[7]; 1464 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1465 1466 /// 1467 /// IA-32 Architecture Machine Check Bank Structure Definition 1468 /// 1469 typedef struct { 1470 UINT8 BankNumber; 1471 UINT8 ClearStatusOnInitialization; 1472 UINT8 StatusDataFormat; 1473 UINT8 Reserved0; 1474 UINT32 ControlRegisterMsrAddress; 1475 UINT64 ControlInitData; 1476 UINT32 StatusRegisterMsrAddress; 1477 UINT32 AddressRegisterMsrAddress; 1478 UINT32 MiscRegisterMsrAddress; 1479 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1480 1481 /// 1482 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1483 /// 1484 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1485 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1486 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1487 1488 // 1489 // Hardware Error Notification types. All other values are reserved 1490 // 1491 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1492 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1493 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1494 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1495 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1496 1497 /// 1498 /// Hardware Error Notification Configuration Write Enable Structure Definition 1499 /// 1500 typedef struct { 1501 UINT16 Type : 1; 1502 UINT16 PollInterval : 1; 1503 UINT16 SwitchToPollingThresholdValue : 1; 1504 UINT16 SwitchToPollingThresholdWindow : 1; 1505 UINT16 ErrorThresholdValue : 1; 1506 UINT16 ErrorThresholdWindow : 1; 1507 UINT16 Reserved : 10; 1508 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1509 1510 /// 1511 /// Hardware Error Notification Structure Definition 1512 /// 1513 typedef struct { 1514 UINT8 Type; 1515 UINT8 Length; 1516 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1517 UINT32 PollInterval; 1518 UINT32 Vector; 1519 UINT32 SwitchToPollingThresholdValue; 1520 UINT32 SwitchToPollingThresholdWindow; 1521 UINT32 ErrorThresholdValue; 1522 UINT32 ErrorThresholdWindow; 1523 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1524 1525 /// 1526 /// IA-32 Architecture Corrected Machine Check Structure Definition 1527 /// 1528 typedef struct { 1529 UINT16 Type; 1530 UINT16 SourceId; 1531 UINT8 Reserved0[2]; 1532 UINT8 Flags; 1533 UINT8 Enabled; 1534 UINT32 NumberOfRecordsToPreAllocate; 1535 UINT32 MaxSectionsPerRecord; 1536 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1537 UINT8 NumberOfHardwareBanks; 1538 UINT8 Reserved1[3]; 1539 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1540 1541 /// 1542 /// IA-32 Architecture NMI Error Structure Definition 1543 /// 1544 typedef struct { 1545 UINT16 Type; 1546 UINT16 SourceId; 1547 UINT8 Reserved0[2]; 1548 UINT32 NumberOfRecordsToPreAllocate; 1549 UINT32 MaxSectionsPerRecord; 1550 UINT32 MaxRawDataLength; 1551 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1552 1553 /// 1554 /// PCI Express Root Port AER Structure Definition 1555 /// 1556 typedef struct { 1557 UINT16 Type; 1558 UINT16 SourceId; 1559 UINT8 Reserved0[2]; 1560 UINT8 Flags; 1561 UINT8 Enabled; 1562 UINT32 NumberOfRecordsToPreAllocate; 1563 UINT32 MaxSectionsPerRecord; 1564 UINT32 Bus; 1565 UINT16 Device; 1566 UINT16 Function; 1567 UINT16 DeviceControl; 1568 UINT8 Reserved1[2]; 1569 UINT32 UncorrectableErrorMask; 1570 UINT32 UncorrectableErrorSeverity; 1571 UINT32 CorrectableErrorMask; 1572 UINT32 AdvancedErrorCapabilitiesAndControl; 1573 UINT32 RootErrorCommand; 1574 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1575 1576 /// 1577 /// PCI Express Device AER Structure Definition 1578 /// 1579 typedef struct { 1580 UINT16 Type; 1581 UINT16 SourceId; 1582 UINT8 Reserved0[2]; 1583 UINT8 Flags; 1584 UINT8 Enabled; 1585 UINT32 NumberOfRecordsToPreAllocate; 1586 UINT32 MaxSectionsPerRecord; 1587 UINT32 Bus; 1588 UINT16 Device; 1589 UINT16 Function; 1590 UINT16 DeviceControl; 1591 UINT8 Reserved1[2]; 1592 UINT32 UncorrectableErrorMask; 1593 UINT32 UncorrectableErrorSeverity; 1594 UINT32 CorrectableErrorMask; 1595 UINT32 AdvancedErrorCapabilitiesAndControl; 1596 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1597 1598 /// 1599 /// PCI Express Bridge AER Structure Definition 1600 /// 1601 typedef struct { 1602 UINT16 Type; 1603 UINT16 SourceId; 1604 UINT8 Reserved0[2]; 1605 UINT8 Flags; 1606 UINT8 Enabled; 1607 UINT32 NumberOfRecordsToPreAllocate; 1608 UINT32 MaxSectionsPerRecord; 1609 UINT32 Bus; 1610 UINT16 Device; 1611 UINT16 Function; 1612 UINT16 DeviceControl; 1613 UINT8 Reserved1[2]; 1614 UINT32 UncorrectableErrorMask; 1615 UINT32 UncorrectableErrorSeverity; 1616 UINT32 CorrectableErrorMask; 1617 UINT32 AdvancedErrorCapabilitiesAndControl; 1618 UINT32 SecondaryUncorrectableErrorMask; 1619 UINT32 SecondaryUncorrectableErrorSeverity; 1620 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1621 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1622 1623 /// 1624 /// Generic Hardware Error Source Structure Definition 1625 /// 1626 typedef struct { 1627 UINT16 Type; 1628 UINT16 SourceId; 1629 UINT16 RelatedSourceId; 1630 UINT8 Flags; 1631 UINT8 Enabled; 1632 UINT32 NumberOfRecordsToPreAllocate; 1633 UINT32 MaxSectionsPerRecord; 1634 UINT32 MaxRawDataLength; 1635 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1636 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1637 UINT32 ErrorStatusBlockLength; 1638 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1639 1640 /// 1641 /// Generic Error Status Definition 1642 /// 1643 typedef struct { 1644 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1645 UINT32 RawDataOffset; 1646 UINT32 RawDataLength; 1647 UINT32 DataLength; 1648 UINT32 ErrorSeverity; 1649 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE; 1650 1651 /// 1652 /// ERST - Error Record Serialization Table 1653 /// 1654 typedef struct { 1655 EFI_ACPI_DESCRIPTION_HEADER Header; 1656 UINT32 SerializationHeaderSize; 1657 UINT8 Reserved0[4]; 1658 UINT32 InstructionEntryCount; 1659 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 1660 1661 /// 1662 /// ERST Version (as defined in ACPI 5.1 spec.) 1663 /// 1664 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 1665 1666 /// 1667 /// ERST Serialization Actions 1668 /// 1669 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00 1670 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01 1671 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02 1672 #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03 1673 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04 1674 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05 1675 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06 1676 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07 1677 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08 1678 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09 1679 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A 1680 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 1681 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 1682 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 1683 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 1684 1685 /// 1686 /// ERST Action Command Status 1687 /// 1688 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00 1689 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 1690 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 1691 #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03 1692 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04 1693 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05 1694 1695 /// 1696 /// ERST Serialization Instructions 1697 /// 1698 #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00 1699 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01 1700 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02 1701 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03 1702 #define EFI_ACPI_5_1_ERST_NOOP 0x04 1703 #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05 1704 #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06 1705 #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07 1706 #define EFI_ACPI_5_1_ERST_ADD 0x08 1707 #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09 1708 #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A 1709 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B 1710 #define EFI_ACPI_5_1_ERST_STALL 0x0C 1711 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D 1712 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1713 #define EFI_ACPI_5_1_ERST_GOTO 0x0F 1714 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10 1715 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11 1716 #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12 1717 1718 /// 1719 /// ERST Instruction Flags 1720 /// 1721 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01 1722 1723 /// 1724 /// ERST Serialization Instruction Entry 1725 /// 1726 typedef struct { 1727 UINT8 SerializationAction; 1728 UINT8 Instruction; 1729 UINT8 Flags; 1730 UINT8 Reserved0; 1731 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1732 UINT64 Value; 1733 UINT64 Mask; 1734 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1735 1736 /// 1737 /// EINJ - Error Injection Table 1738 /// 1739 typedef struct { 1740 EFI_ACPI_DESCRIPTION_HEADER Header; 1741 UINT32 InjectionHeaderSize; 1742 UINT8 InjectionFlags; 1743 UINT8 Reserved0[3]; 1744 UINT32 InjectionEntryCount; 1745 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER; 1746 1747 /// 1748 /// EINJ Version (as defined in ACPI 5.1 spec.) 1749 /// 1750 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01 1751 1752 /// 1753 /// EINJ Error Injection Actions 1754 /// 1755 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00 1756 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1757 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02 1758 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03 1759 #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04 1760 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05 1761 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06 1762 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07 1763 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08 1764 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF 1765 1766 /// 1767 /// EINJ Action Command Status 1768 /// 1769 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00 1770 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1771 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02 1772 1773 /// 1774 /// EINJ Error Type Definition 1775 /// 1776 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1777 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1778 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1779 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1780 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1781 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1782 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1783 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1784 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1785 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1786 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1787 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1788 1789 /// 1790 /// EINJ Injection Instructions 1791 /// 1792 #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00 1793 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01 1794 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02 1795 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03 1796 #define EFI_ACPI_5_1_EINJ_NOOP 0x04 1797 1798 /// 1799 /// EINJ Instruction Flags 1800 /// 1801 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01 1802 1803 /// 1804 /// EINJ Injection Instruction Entry 1805 /// 1806 typedef struct { 1807 UINT8 InjectionAction; 1808 UINT8 Instruction; 1809 UINT8 Flags; 1810 UINT8 Reserved0; 1811 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1812 UINT64 Value; 1813 UINT64 Mask; 1814 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY; 1815 1816 /// 1817 /// EINJ Trigger Action Table 1818 /// 1819 typedef struct { 1820 UINT32 HeaderSize; 1821 UINT32 Revision; 1822 UINT32 TableSize; 1823 UINT32 EntryCount; 1824 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE; 1825 1826 /// 1827 /// Platform Communications Channel Table (PCCT) 1828 /// 1829 typedef struct { 1830 EFI_ACPI_DESCRIPTION_HEADER Header; 1831 UINT32 Flags; 1832 UINT64 Reserved; 1833 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 1834 1835 /// 1836 /// PCCT Version (as defined in ACPI 5.1 spec.) 1837 /// 1838 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 1839 1840 /// 1841 /// PCCT Global Flags 1842 /// 1843 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0 1844 1845 // 1846 // PCCT Subspace type 1847 // 1848 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00 1849 1850 /// 1851 /// PCC Subspace Structure Header 1852 /// 1853 typedef struct { 1854 UINT8 Type; 1855 UINT8 Length; 1856 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER; 1857 1858 /// 1859 /// Generic Communications Subspace Structure 1860 /// 1861 typedef struct { 1862 UINT8 Type; 1863 UINT8 Length; 1864 UINT8 Reserved[6]; 1865 UINT64 BaseAddress; 1866 UINT64 AddressLength; 1867 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 1868 UINT64 DoorbellPreserve; 1869 UINT64 DoorbellWrite; 1870 UINT32 NominalLatency; 1871 UINT32 MaximumPeriodicAccessRate; 1872 UINT16 MinimumRequestTurnaroundTime; 1873 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC; 1874 1875 /// 1876 /// Generic Communications Channel Shared Memory Region 1877 /// 1878 1879 typedef struct { 1880 UINT8 Command; 1881 UINT8 Reserved : 7; 1882 UINT8 GenerateSci : 1; 1883 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 1884 1885 typedef struct { 1886 UINT8 CommandComplete : 1; 1887 UINT8 SciDoorbell : 1; 1888 UINT8 Error : 1; 1889 UINT8 PlatformNotification : 1; 1890 UINT8 Reserved : 4; 1891 UINT8 Reserved1; 1892 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 1893 1894 typedef struct { 1895 UINT32 Signature; 1896 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 1897 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 1898 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 1899 1900 // 1901 // Known table signatures 1902 // 1903 1904 /// 1905 /// "RSD PTR " Root System Description Pointer 1906 /// 1907 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 1908 1909 /// 1910 /// "APIC" Multiple APIC Description Table 1911 /// 1912 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 1913 1914 /// 1915 /// "BERT" Boot Error Record Table 1916 /// 1917 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 1918 1919 /// 1920 /// "BGRT" Boot Graphics Resource Table 1921 /// 1922 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 1923 1924 /// 1925 /// "CPEP" Corrected Platform Error Polling Table 1926 /// 1927 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 1928 1929 /// 1930 /// "DSDT" Differentiated System Description Table 1931 /// 1932 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 1933 1934 /// 1935 /// "ECDT" Embedded Controller Boot Resources Table 1936 /// 1937 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 1938 1939 /// 1940 /// "EINJ" Error Injection Table 1941 /// 1942 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 1943 1944 /// 1945 /// "ERST" Error Record Serialization Table 1946 /// 1947 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 1948 1949 /// 1950 /// "FACP" Fixed ACPI Description Table 1951 /// 1952 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 1953 1954 /// 1955 /// "FACS" Firmware ACPI Control Structure 1956 /// 1957 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 1958 1959 /// 1960 /// "FPDT" Firmware Performance Data Table 1961 /// 1962 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 1963 1964 /// 1965 /// "GTDT" Generic Timer Description Table 1966 /// 1967 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 1968 1969 /// 1970 /// "HEST" Hardware Error Source Table 1971 /// 1972 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 1973 1974 /// 1975 /// "MPST" Memory Power State Table 1976 /// 1977 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 1978 1979 /// 1980 /// "MSCT" Maximum System Characteristics Table 1981 /// 1982 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 1983 1984 /// 1985 /// "PMTT" Platform Memory Topology Table 1986 /// 1987 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 1988 1989 /// 1990 /// "PSDT" Persistent System Description Table 1991 /// 1992 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 1993 1994 /// 1995 /// "RASF" ACPI RAS Feature Table 1996 /// 1997 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 1998 1999 /// 2000 /// "RSDT" Root System Description Table 2001 /// 2002 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 2003 2004 /// 2005 /// "SBST" Smart Battery Specification Table 2006 /// 2007 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 2008 2009 /// 2010 /// "SLIT" System Locality Information Table 2011 /// 2012 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 2013 2014 /// 2015 /// "SRAT" System Resource Affinity Table 2016 /// 2017 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 2018 2019 /// 2020 /// "SSDT" Secondary System Description Table 2021 /// 2022 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2023 2024 /// 2025 /// "XSDT" Extended System Description Table 2026 /// 2027 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2028 2029 /// 2030 /// "BOOT" MS Simple Boot Spec 2031 /// 2032 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2033 2034 /// 2035 /// "CSRT" MS Core System Resource Table 2036 /// 2037 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2038 2039 /// 2040 /// "DBG2" MS Debug Port 2 Spec 2041 /// 2042 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2043 2044 /// 2045 /// "DBGP" MS Debug Port Spec 2046 /// 2047 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2048 2049 /// 2050 /// "DMAR" DMA Remapping Table 2051 /// 2052 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2053 2054 /// 2055 /// "DRTM" Dynamic Root of Trust for Measurement Table 2056 /// 2057 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2058 2059 /// 2060 /// "ETDT" Event Timer Description Table 2061 /// 2062 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2063 2064 /// 2065 /// "HPET" IA-PC High Precision Event Timer Table 2066 /// 2067 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2068 2069 /// 2070 /// "iBFT" iSCSI Boot Firmware Table 2071 /// 2072 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2073 2074 /// 2075 /// "IVRS" I/O Virtualization Reporting Structure 2076 /// 2077 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2078 2079 /// 2080 /// "LPIT" Low Power Idle Table 2081 /// 2082 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2083 2084 /// 2085 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2086 /// 2087 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2088 2089 /// 2090 /// "MCHI" Management Controller Host Interface Table 2091 /// 2092 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2093 2094 /// 2095 /// "MSDM" MS Data Management Table 2096 /// 2097 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2098 2099 /// 2100 /// "PCCT" Platform Communications Channel Table 2101 /// 2102 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') 2103 2104 /// 2105 /// "SLIC" MS Software Licensing Table Specification 2106 /// 2107 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2108 2109 /// 2110 /// "SPCR" Serial Port Console Redirection Table 2111 /// 2112 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2113 2114 /// 2115 /// "SPMI" Server Platform Management Interface Table 2116 /// 2117 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2118 2119 /// 2120 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2121 /// 2122 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2123 2124 /// 2125 /// "TPM2" Trusted Computing Platform 1 Table 2126 /// 2127 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2128 2129 /// 2130 /// "UEFI" UEFI ACPI Data Table 2131 /// 2132 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2133 2134 /// 2135 /// "WAET" Windows ACPI Emulated Devices Table 2136 /// 2137 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2138 2139 /// 2140 /// "WDAT" Watchdog Action Table 2141 /// 2142 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2143 2144 /// 2145 /// "WDRT" Watchdog Resource Table 2146 /// 2147 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2148 2149 /// 2150 /// "WPBT" MS Platform Binary Table 2151 /// 2152 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2153 2154 #pragma pack() 2155 2156 #endif 2157