1 /** @file 2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013. 3 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR> 5 Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR> 6 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR> 7 SPDX-License-Identifier: BSD-2-Clause-Patent 8 **/ 9 10 #ifndef _ACPI_5_0_H_ 11 #define _ACPI_5_0_H_ 12 13 #include <IndustryStandard/Acpi40.h> 14 15 // 16 // Define for Descriptor 17 // 18 #define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A 19 #define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C 20 #define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E 21 22 #define ACPI_FIXED_DMA_DESCRIPTOR 0x55 23 #define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C 24 #define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E 25 26 /// 27 /// _PSD Revision for ACPI 5.0 28 /// 29 #define EFI_ACPI_5_0_AML_PSD_REVISION 0 30 31 /// 32 /// _CPC Revision for ACPI 5.0 33 /// 34 #define EFI_ACPI_5_0_AML_CPC_REVISION 1 35 36 #pragma pack(1) 37 38 /// 39 /// Generic DMA Descriptor. 40 /// 41 typedef PACKED struct { 42 ACPI_SMALL_RESOURCE_HEADER Header; 43 UINT16 DmaRequestLine; 44 UINT16 DmaChannel; 45 UINT8 DmaTransferWidth; 46 } EFI_ACPI_FIXED_DMA_DESCRIPTOR; 47 48 /// 49 /// GPIO Connection Descriptor 50 /// 51 typedef PACKED struct { 52 ACPI_LARGE_RESOURCE_HEADER Header; 53 UINT8 RevisionId; 54 UINT8 ConnectionType; 55 UINT16 GeneralFlags; 56 UINT16 InterruptFlags; 57 UINT8 PinConfiguration; 58 UINT16 OutputDriveStrength; 59 UINT16 DebounceTimeout; 60 UINT16 PinTableOffset; 61 UINT8 ResourceSourceIndex; 62 UINT16 ResourceSourceNameOffset; 63 UINT16 VendorDataOffset; 64 UINT16 VendorDataLength; 65 } EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR; 66 67 #define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0 68 #define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1 69 70 /// 71 /// Serial Bus Resource Descriptor (Generic) 72 /// 73 typedef PACKED struct { 74 ACPI_LARGE_RESOURCE_HEADER Header; 75 UINT8 RevisionId; 76 UINT8 ResourceSourceIndex; 77 UINT8 SerialBusType; 78 UINT8 GeneralFlags; 79 UINT16 TypeSpecificFlags; 80 UINT8 TypeSpecificRevisionId; 81 UINT16 TypeDataLength; 82 // Type specific data 83 } EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR; 84 85 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1 86 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2 87 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3 88 89 /// 90 /// Serial Bus Resource Descriptor (I2C) 91 /// 92 typedef PACKED struct { 93 ACPI_LARGE_RESOURCE_HEADER Header; 94 UINT8 RevisionId; 95 UINT8 ResourceSourceIndex; 96 UINT8 SerialBusType; 97 UINT8 GeneralFlags; 98 UINT16 TypeSpecificFlags; 99 UINT8 TypeSpecificRevisionId; 100 UINT16 TypeDataLength; 101 UINT32 ConnectionSpeed; 102 UINT16 SlaveAddress; 103 } EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR; 104 105 /// 106 /// Serial Bus Resource Descriptor (SPI) 107 /// 108 typedef PACKED struct { 109 ACPI_LARGE_RESOURCE_HEADER Header; 110 UINT8 RevisionId; 111 UINT8 ResourceSourceIndex; 112 UINT8 SerialBusType; 113 UINT8 GeneralFlags; 114 UINT16 TypeSpecificFlags; 115 UINT8 TypeSpecificRevisionId; 116 UINT16 TypeDataLength; 117 UINT32 ConnectionSpeed; 118 UINT8 DataBitLength; 119 UINT8 Phase; 120 UINT8 Polarity; 121 UINT16 DeviceSelection; 122 } EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR; 123 124 /// 125 /// Serial Bus Resource Descriptor (UART) 126 /// 127 typedef PACKED struct { 128 ACPI_LARGE_RESOURCE_HEADER Header; 129 UINT8 RevisionId; 130 UINT8 ResourceSourceIndex; 131 UINT8 SerialBusType; 132 UINT8 GeneralFlags; 133 UINT16 TypeSpecificFlags; 134 UINT8 TypeSpecificRevisionId; 135 UINT16 TypeDataLength; 136 UINT32 DefaultBaudRate; 137 UINT16 RxFIFO; 138 UINT16 TxFIFO; 139 UINT8 Parity; 140 UINT8 SerialLinesEnabled; 141 } EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR; 142 143 #pragma pack() 144 145 // 146 // Ensure proper structure formats 147 // 148 #pragma pack(1) 149 150 /// 151 /// ACPI 5.0 Generic Address Space definition 152 /// 153 typedef struct { 154 UINT8 AddressSpaceId; 155 UINT8 RegisterBitWidth; 156 UINT8 RegisterBitOffset; 157 UINT8 AccessSize; 158 UINT64 Address; 159 } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE; 160 161 // 162 // Generic Address Space Address IDs 163 // 164 #define EFI_ACPI_5_0_SYSTEM_MEMORY 0 165 #define EFI_ACPI_5_0_SYSTEM_IO 1 166 #define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2 167 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3 168 #define EFI_ACPI_5_0_SMBUS 4 169 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A 170 #define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F 171 172 // 173 // Generic Address Space Access Sizes 174 // 175 #define EFI_ACPI_5_0_UNDEFINED 0 176 #define EFI_ACPI_5_0_BYTE 1 177 #define EFI_ACPI_5_0_WORD 2 178 #define EFI_ACPI_5_0_DWORD 3 179 #define EFI_ACPI_5_0_QWORD 4 180 181 // 182 // ACPI 5.0 table structures 183 // 184 185 /// 186 /// Root System Description Pointer Structure 187 /// 188 typedef struct { 189 UINT64 Signature; 190 UINT8 Checksum; 191 UINT8 OemId[6]; 192 UINT8 Revision; 193 UINT32 RsdtAddress; 194 UINT32 Length; 195 UINT64 XsdtAddress; 196 UINT8 ExtendedChecksum; 197 UINT8 Reserved[3]; 198 } EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER; 199 200 /// 201 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.) 202 /// 203 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2 204 205 /// 206 /// Common table header, this prefaces all ACPI tables, including FACS, but 207 /// excluding the RSD PTR structure 208 /// 209 typedef struct { 210 UINT32 Signature; 211 UINT32 Length; 212 } EFI_ACPI_5_0_COMMON_HEADER; 213 214 // 215 // Root System Description Table 216 // No definition needed as it is a common description table header, the same with 217 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 218 // 219 220 /// 221 /// RSDT Revision (as defined in ACPI 5.0 spec.) 222 /// 223 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 224 225 // 226 // Extended System Description Table 227 // No definition needed as it is a common description table header, the same with 228 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 229 // 230 231 /// 232 /// XSDT Revision (as defined in ACPI 5.0 spec.) 233 /// 234 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 235 236 /// 237 /// Fixed ACPI Description Table Structure (FADT) 238 /// 239 typedef struct { 240 EFI_ACPI_DESCRIPTION_HEADER Header; 241 UINT32 FirmwareCtrl; 242 UINT32 Dsdt; 243 UINT8 Reserved0; 244 UINT8 PreferredPmProfile; 245 UINT16 SciInt; 246 UINT32 SmiCmd; 247 UINT8 AcpiEnable; 248 UINT8 AcpiDisable; 249 UINT8 S4BiosReq; 250 UINT8 PstateCnt; 251 UINT32 Pm1aEvtBlk; 252 UINT32 Pm1bEvtBlk; 253 UINT32 Pm1aCntBlk; 254 UINT32 Pm1bCntBlk; 255 UINT32 Pm2CntBlk; 256 UINT32 PmTmrBlk; 257 UINT32 Gpe0Blk; 258 UINT32 Gpe1Blk; 259 UINT8 Pm1EvtLen; 260 UINT8 Pm1CntLen; 261 UINT8 Pm2CntLen; 262 UINT8 PmTmrLen; 263 UINT8 Gpe0BlkLen; 264 UINT8 Gpe1BlkLen; 265 UINT8 Gpe1Base; 266 UINT8 CstCnt; 267 UINT16 PLvl2Lat; 268 UINT16 PLvl3Lat; 269 UINT16 FlushSize; 270 UINT16 FlushStride; 271 UINT8 DutyOffset; 272 UINT8 DutyWidth; 273 UINT8 DayAlrm; 274 UINT8 MonAlrm; 275 UINT8 Century; 276 UINT16 IaPcBootArch; 277 UINT8 Reserved1; 278 UINT32 Flags; 279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg; 280 UINT8 ResetValue; 281 UINT8 Reserved2[3]; 282 UINT64 XFirmwareCtrl; 283 UINT64 XDsdt; 284 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 285 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 286 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 287 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 288 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 289 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 290 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 291 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 292 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 293 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 294 } EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE; 295 296 /// 297 /// FADT Version (as defined in ACPI 5.0 spec.) 298 /// 299 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05 300 301 // 302 // Fixed ACPI Description Table Preferred Power Management Profile 303 // 304 #define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0 305 #define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1 306 #define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2 307 #define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3 308 #define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4 309 #define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5 310 #define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6 311 #define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7 312 #define EFI_ACPI_5_0_PM_PROFILE_TABLET 8 313 314 // 315 // Fixed ACPI Description Table Boot Architecture Flags 316 // All other bits are reserved and must be set to 0. 317 // 318 #define EFI_ACPI_5_0_LEGACY_DEVICES BIT0 319 #define EFI_ACPI_5_0_8042 BIT1 320 #define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2 321 #define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3 322 #define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4 323 #define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5 324 325 // 326 // Fixed ACPI Description Table Fixed Feature Flags 327 // All other bits are reserved and must be set to 0. 328 // 329 #define EFI_ACPI_5_0_WBINVD BIT0 330 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1 331 #define EFI_ACPI_5_0_PROC_C1 BIT2 332 #define EFI_ACPI_5_0_P_LVL2_UP BIT3 333 #define EFI_ACPI_5_0_PWR_BUTTON BIT4 334 #define EFI_ACPI_5_0_SLP_BUTTON BIT5 335 #define EFI_ACPI_5_0_FIX_RTC BIT6 336 #define EFI_ACPI_5_0_RTC_S4 BIT7 337 #define EFI_ACPI_5_0_TMR_VAL_EXT BIT8 338 #define EFI_ACPI_5_0_DCK_CAP BIT9 339 #define EFI_ACPI_5_0_RESET_REG_SUP BIT10 340 #define EFI_ACPI_5_0_SEALED_CASE BIT11 341 #define EFI_ACPI_5_0_HEADLESS BIT12 342 #define EFI_ACPI_5_0_CPU_SW_SLP BIT13 343 #define EFI_ACPI_5_0_PCI_EXP_WAK BIT14 344 #define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15 345 #define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16 346 #define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17 347 #define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18 348 #define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 349 #define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20 350 #define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21 351 352 /// 353 /// Firmware ACPI Control Structure 354 /// 355 typedef struct { 356 UINT32 Signature; 357 UINT32 Length; 358 UINT32 HardwareSignature; 359 UINT32 FirmwareWakingVector; 360 UINT32 GlobalLock; 361 UINT32 Flags; 362 UINT64 XFirmwareWakingVector; 363 UINT8 Version; 364 UINT8 Reserved0[3]; 365 UINT32 OspmFlags; 366 UINT8 Reserved1[24]; 367 } EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE; 368 369 /// 370 /// FACS Version (as defined in ACPI 5.0 spec.) 371 /// 372 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 373 374 /// 375 /// Firmware Control Structure Feature Flags 376 /// All other bits are reserved and must be set to 0. 377 /// 378 #define EFI_ACPI_5_0_S4BIOS_F BIT0 379 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1 380 381 /// 382 /// OSPM Enabled Firmware Control Structure Flags 383 /// All other bits are reserved and must be set to 0. 384 /// 385 #define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0 386 387 // 388 // Differentiated System Description Table, 389 // Secondary System Description Table 390 // and Persistent System Description Table, 391 // no definition needed as they are common description table header, the same with 392 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 393 // 394 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 395 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 396 397 /// 398 /// Multiple APIC Description Table header definition. The rest of the table 399 /// must be defined in a platform specific manner. 400 /// 401 typedef struct { 402 EFI_ACPI_DESCRIPTION_HEADER Header; 403 UINT32 LocalApicAddress; 404 UINT32 Flags; 405 } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 406 407 /// 408 /// MADT Revision (as defined in ACPI 5.0 spec.) 409 /// 410 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03 411 412 /// 413 /// Multiple APIC Flags 414 /// All other bits are reserved and must be set to 0. 415 /// 416 #define EFI_ACPI_5_0_PCAT_COMPAT BIT0 417 418 // 419 // Multiple APIC Description Table APIC structure types 420 // All other values between 0x0D and 0x7F are reserved and 421 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 422 // 423 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00 424 #define EFI_ACPI_5_0_IO_APIC 0x01 425 #define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02 426 #define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03 427 #define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04 428 #define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 429 #define EFI_ACPI_5_0_IO_SAPIC 0x06 430 #define EFI_ACPI_5_0_LOCAL_SAPIC 0x07 431 #define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08 432 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09 433 #define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A 434 #define EFI_ACPI_5_0_GIC 0x0B 435 #define EFI_ACPI_5_0_GICD 0x0C 436 437 // 438 // APIC Structure Definitions 439 // 440 441 /// 442 /// Processor Local APIC Structure Definition 443 /// 444 typedef struct { 445 UINT8 Type; 446 UINT8 Length; 447 UINT8 AcpiProcessorId; 448 UINT8 ApicId; 449 UINT32 Flags; 450 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE; 451 452 /// 453 /// Local APIC Flags. All other bits are reserved and must be 0. 454 /// 455 #define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0 456 457 /// 458 /// IO APIC Structure 459 /// 460 typedef struct { 461 UINT8 Type; 462 UINT8 Length; 463 UINT8 IoApicId; 464 UINT8 Reserved; 465 UINT32 IoApicAddress; 466 UINT32 GlobalSystemInterruptBase; 467 } EFI_ACPI_5_0_IO_APIC_STRUCTURE; 468 469 /// 470 /// Interrupt Source Override Structure 471 /// 472 typedef struct { 473 UINT8 Type; 474 UINT8 Length; 475 UINT8 Bus; 476 UINT8 Source; 477 UINT32 GlobalSystemInterrupt; 478 UINT16 Flags; 479 } EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 480 481 /// 482 /// Platform Interrupt Sources Structure Definition 483 /// 484 typedef struct { 485 UINT8 Type; 486 UINT8 Length; 487 UINT16 Flags; 488 UINT8 InterruptType; 489 UINT8 ProcessorId; 490 UINT8 ProcessorEid; 491 UINT8 IoSapicVector; 492 UINT32 GlobalSystemInterrupt; 493 UINT32 PlatformInterruptSourceFlags; 494 UINT8 CpeiProcessorOverride; 495 UINT8 Reserved[31]; 496 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE; 497 498 // 499 // MPS INTI flags. 500 // All other bits are reserved and must be set to 0. 501 // 502 #define EFI_ACPI_5_0_POLARITY (3 << 0) 503 #define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2) 504 505 /// 506 /// Non-Maskable Interrupt Source Structure 507 /// 508 typedef struct { 509 UINT8 Type; 510 UINT8 Length; 511 UINT16 Flags; 512 UINT32 GlobalSystemInterrupt; 513 } EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 514 515 /// 516 /// Local APIC NMI Structure 517 /// 518 typedef struct { 519 UINT8 Type; 520 UINT8 Length; 521 UINT8 AcpiProcessorId; 522 UINT16 Flags; 523 UINT8 LocalApicLint; 524 } EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE; 525 526 /// 527 /// Local APIC Address Override Structure 528 /// 529 typedef struct { 530 UINT8 Type; 531 UINT8 Length; 532 UINT16 Reserved; 533 UINT64 LocalApicAddress; 534 } EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 535 536 /// 537 /// IO SAPIC Structure 538 /// 539 typedef struct { 540 UINT8 Type; 541 UINT8 Length; 542 UINT8 IoApicId; 543 UINT8 Reserved; 544 UINT32 GlobalSystemInterruptBase; 545 UINT64 IoSapicAddress; 546 } EFI_ACPI_5_0_IO_SAPIC_STRUCTURE; 547 548 /// 549 /// Local SAPIC Structure 550 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 551 /// 552 typedef struct { 553 UINT8 Type; 554 UINT8 Length; 555 UINT8 AcpiProcessorId; 556 UINT8 LocalSapicId; 557 UINT8 LocalSapicEid; 558 UINT8 Reserved[3]; 559 UINT32 Flags; 560 UINT32 ACPIProcessorUIDValue; 561 } EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 562 563 /// 564 /// Platform Interrupt Sources Structure 565 /// 566 typedef struct { 567 UINT8 Type; 568 UINT8 Length; 569 UINT16 Flags; 570 UINT8 InterruptType; 571 UINT8 ProcessorId; 572 UINT8 ProcessorEid; 573 UINT8 IoSapicVector; 574 UINT32 GlobalSystemInterrupt; 575 UINT32 PlatformInterruptSourceFlags; 576 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 577 578 /// 579 /// Platform Interrupt Source Flags. 580 /// All other bits are reserved and must be set to 0. 581 /// 582 #define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0 583 584 /// 585 /// Processor Local x2APIC Structure Definition 586 /// 587 typedef struct { 588 UINT8 Type; 589 UINT8 Length; 590 UINT8 Reserved[2]; 591 UINT32 X2ApicId; 592 UINT32 Flags; 593 UINT32 AcpiProcessorUid; 594 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 595 596 /// 597 /// Local x2APIC NMI Structure 598 /// 599 typedef struct { 600 UINT8 Type; 601 UINT8 Length; 602 UINT16 Flags; 603 UINT32 AcpiProcessorUid; 604 UINT8 LocalX2ApicLint; 605 UINT8 Reserved[3]; 606 } EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE; 607 608 /// 609 /// GIC Structure 610 /// 611 typedef struct { 612 UINT8 Type; 613 UINT8 Length; 614 UINT16 Reserved; 615 UINT32 GicId; 616 UINT32 AcpiProcessorUid; 617 UINT32 Flags; 618 UINT32 ParkingProtocolVersion; 619 UINT32 PerformanceInterruptGsiv; 620 UINT64 ParkedAddress; 621 UINT64 PhysicalBaseAddress; 622 } EFI_ACPI_5_0_GIC_STRUCTURE; 623 624 /// 625 /// GIC Flags. All other bits are reserved and must be 0. 626 /// 627 #define EFI_ACPI_5_0_GIC_ENABLED BIT0 628 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1 629 630 /// 631 /// GIC Distributor Structure 632 /// 633 typedef struct { 634 UINT8 Type; 635 UINT8 Length; 636 UINT16 Reserved1; 637 UINT32 GicId; 638 UINT64 PhysicalBaseAddress; 639 UINT32 SystemVectorBase; 640 UINT32 Reserved2; 641 } EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE; 642 643 /// 644 /// Smart Battery Description Table (SBST) 645 /// 646 typedef struct { 647 EFI_ACPI_DESCRIPTION_HEADER Header; 648 UINT32 WarningEnergyLevel; 649 UINT32 LowEnergyLevel; 650 UINT32 CriticalEnergyLevel; 651 } EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE; 652 653 /// 654 /// SBST Version (as defined in ACPI 5.0 spec.) 655 /// 656 #define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 657 658 /// 659 /// Embedded Controller Boot Resources Table (ECDT) 660 /// The table is followed by a null terminated ASCII string that contains 661 /// a fully qualified reference to the name space object. 662 /// 663 typedef struct { 664 EFI_ACPI_DESCRIPTION_HEADER Header; 665 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl; 666 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData; 667 UINT32 Uid; 668 UINT8 GpeBit; 669 } EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 670 671 /// 672 /// ECDT Version (as defined in ACPI 5.0 spec.) 673 /// 674 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 675 676 /// 677 /// System Resource Affinity Table (SRAT). The rest of the table 678 /// must be defined in a platform specific manner. 679 /// 680 typedef struct { 681 EFI_ACPI_DESCRIPTION_HEADER Header; 682 UINT32 Reserved1; ///< Must be set to 1 683 UINT64 Reserved2; 684 } EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 685 686 /// 687 /// SRAT Version (as defined in ACPI 5.0 spec.) 688 /// 689 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 690 691 // 692 // SRAT structure types. 693 // All other values between 0x03 an 0xFF are reserved and 694 // will be ignored by OSPM. 695 // 696 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 697 #define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01 698 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 699 700 /// 701 /// Processor Local APIC/SAPIC Affinity Structure Definition 702 /// 703 typedef struct { 704 UINT8 Type; 705 UINT8 Length; 706 UINT8 ProximityDomain7To0; 707 UINT8 ApicId; 708 UINT32 Flags; 709 UINT8 LocalSapicEid; 710 UINT8 ProximityDomain31To8[3]; 711 UINT32 ClockDomain; 712 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 713 714 /// 715 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 716 /// 717 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 718 719 /// 720 /// Memory Affinity Structure Definition 721 /// 722 typedef struct { 723 UINT8 Type; 724 UINT8 Length; 725 UINT32 ProximityDomain; 726 UINT16 Reserved1; 727 UINT32 AddressBaseLow; 728 UINT32 AddressBaseHigh; 729 UINT32 LengthLow; 730 UINT32 LengthHigh; 731 UINT32 Reserved2; 732 UINT32 Flags; 733 UINT64 Reserved3; 734 } EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE; 735 736 // 737 // Memory Flags. All other bits are reserved and must be 0. 738 // 739 #define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0) 740 #define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1) 741 #define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2) 742 743 /// 744 /// Processor Local x2APIC Affinity Structure Definition 745 /// 746 typedef struct { 747 UINT8 Type; 748 UINT8 Length; 749 UINT8 Reserved1[2]; 750 UINT32 ProximityDomain; 751 UINT32 X2ApicId; 752 UINT32 Flags; 753 UINT32 ClockDomain; 754 UINT8 Reserved2[4]; 755 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 756 757 /// 758 /// System Locality Distance Information Table (SLIT). 759 /// The rest of the table is a matrix. 760 /// 761 typedef struct { 762 EFI_ACPI_DESCRIPTION_HEADER Header; 763 UINT64 NumberOfSystemLocalities; 764 } EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 765 766 /// 767 /// SLIT Version (as defined in ACPI 5.0 spec.) 768 /// 769 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 770 771 /// 772 /// Corrected Platform Error Polling Table (CPEP) 773 /// 774 typedef struct { 775 EFI_ACPI_DESCRIPTION_HEADER Header; 776 UINT8 Reserved[8]; 777 } EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 778 779 /// 780 /// CPEP Version (as defined in ACPI 5.0 spec.) 781 /// 782 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 783 784 // 785 // CPEP processor structure types. 786 // 787 #define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00 788 789 /// 790 /// Corrected Platform Error Polling Processor Structure Definition 791 /// 792 typedef struct { 793 UINT8 Type; 794 UINT8 Length; 795 UINT8 ProcessorId; 796 UINT8 ProcessorEid; 797 UINT32 PollingInterval; 798 } EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 799 800 /// 801 /// Maximum System Characteristics Table (MSCT) 802 /// 803 typedef struct { 804 EFI_ACPI_DESCRIPTION_HEADER Header; 805 UINT32 OffsetProxDomInfo; 806 UINT32 MaximumNumberOfProximityDomains; 807 UINT32 MaximumNumberOfClockDomains; 808 UINT64 MaximumPhysicalAddress; 809 } EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 810 811 /// 812 /// MSCT Version (as defined in ACPI 5.0 spec.) 813 /// 814 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 815 816 /// 817 /// Maximum Proximity Domain Information Structure Definition 818 /// 819 typedef struct { 820 UINT8 Revision; 821 UINT8 Length; 822 UINT32 ProximityDomainRangeLow; 823 UINT32 ProximityDomainRangeHigh; 824 UINT32 MaximumProcessorCapacity; 825 UINT64 MaximumMemoryCapacity; 826 } EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 827 828 /// 829 /// ACPI RAS Feature Table definition. 830 /// 831 typedef struct { 832 EFI_ACPI_DESCRIPTION_HEADER Header; 833 UINT8 PlatformCommunicationChannelIdentifier[12]; 834 } EFI_ACPI_5_0_RAS_FEATURE_TABLE; 835 836 /// 837 /// RASF Version (as defined in ACPI 5.0 spec.) 838 /// 839 #define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01 840 841 /// 842 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 843 /// 844 typedef struct { 845 UINT32 Signature; 846 UINT16 Command; 847 UINT16 Status; 848 UINT16 Version; 849 UINT8 RASCapabilities[16]; 850 UINT8 SetRASCapabilities[16]; 851 UINT16 NumberOfRASFParameterBlocks; 852 UINT32 SetRASCapabilitiesStatus; 853 } EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 854 855 /// 856 /// ACPI RASF PCC command code 857 /// 858 #define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 859 860 /// 861 /// ACPI RASF Platform RAS Capabilities 862 /// 863 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 864 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 865 866 /// 867 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 868 /// 869 typedef struct { 870 UINT16 Type; 871 UINT16 Version; 872 UINT16 Length; 873 UINT16 PatrolScrubCommand; 874 UINT64 RequestedAddressRange[2]; 875 UINT64 ActualAddressRange[2]; 876 UINT16 Flags; 877 UINT8 RequestedSpeed; 878 } EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 879 880 /// 881 /// ACPI RASF Patrol Scrub command 882 /// 883 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 884 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 885 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 886 887 /// 888 /// Memory Power State Table definition. 889 /// 890 typedef struct { 891 EFI_ACPI_DESCRIPTION_HEADER Header; 892 UINT8 PlatformCommunicationChannelIdentifier; 893 UINT8 Reserved[3]; 894 // Memory Power Node Structure 895 // Memory Power State Characteristics 896 } EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE; 897 898 /// 899 /// MPST Version (as defined in ACPI 5.0 spec.) 900 /// 901 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01 902 903 /// 904 /// MPST Platform Communication Channel Shared Memory Region definition. 905 /// 906 typedef struct { 907 UINT32 Signature; 908 UINT16 Command; 909 UINT16 Status; 910 UINT32 MemoryPowerCommandRegister; 911 UINT32 MemoryPowerStatusRegister; 912 UINT32 PowerStateId; 913 UINT32 MemoryPowerNodeId; 914 UINT64 MemoryEnergyConsumed; 915 UINT64 ExpectedAveragePowerComsuned; 916 } EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 917 918 /// 919 /// ACPI MPST PCC command code 920 /// 921 #define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 922 923 /// 924 /// ACPI MPST Memory Power command 925 /// 926 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 927 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 928 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 929 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 930 931 /// 932 /// MPST Memory Power Node Table 933 /// 934 typedef struct { 935 UINT8 PowerStateValue; 936 UINT8 PowerStateInformationIndex; 937 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE; 938 939 typedef struct { 940 UINT8 Flag; 941 UINT8 Reserved; 942 UINT16 MemoryPowerNodeId; 943 UINT32 Length; 944 UINT64 AddressBase; 945 UINT64 AddressLength; 946 UINT32 NumberOfPowerStates; 947 UINT32 NumberOfPhysicalComponents; 948 // EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 949 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 950 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE; 951 952 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 953 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 954 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 955 956 typedef struct { 957 UINT16 MemoryPowerNodeCount; 958 UINT8 Reserved[2]; 959 } EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE; 960 961 /// 962 /// MPST Memory Power State Characteristics Table 963 /// 964 typedef struct { 965 UINT8 PowerStateStructureID; 966 UINT8 Flag; 967 UINT16 Reserved; 968 UINT32 AveragePowerConsumedInMPS0; 969 UINT32 RelativePowerSavingToMPS0; 970 UINT64 ExitLatencyToMPS0; 971 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 972 973 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 974 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 975 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 976 977 typedef struct { 978 UINT16 MemoryPowerStateCharacteristicsCount; 979 UINT8 Reserved[2]; 980 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 981 982 /// 983 /// Memory Topology Table definition. 984 /// 985 typedef struct { 986 EFI_ACPI_DESCRIPTION_HEADER Header; 987 UINT32 Reserved; 988 } EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE; 989 990 /// 991 /// PMTT Version (as defined in ACPI 5.0 spec.) 992 /// 993 #define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 994 995 /// 996 /// Common Memory Aggregator Device Structure. 997 /// 998 typedef struct { 999 UINT8 Type; 1000 UINT8 Reserved; 1001 UINT16 Length; 1002 UINT16 Flags; 1003 UINT16 Reserved1; 1004 } EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1005 1006 /// 1007 /// Memory Aggregator Device Type 1008 /// 1009 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0 1010 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1 1011 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2 1012 1013 /// 1014 /// Socket Memory Aggregator Device Structure. 1015 /// 1016 typedef struct { 1017 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1018 UINT16 SocketIdentifier; 1019 UINT16 Reserved; 1020 // EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 1021 } EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1022 1023 /// 1024 /// MemoryController Memory Aggregator Device Structure. 1025 /// 1026 typedef struct { 1027 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1028 UINT32 ReadLatency; 1029 UINT32 WriteLatency; 1030 UINT32 ReadBandwidth; 1031 UINT32 WriteBandwidth; 1032 UINT16 OptimalAccessUnit; 1033 UINT16 OptimalAccessAlignment; 1034 UINT16 Reserved; 1035 UINT16 NumberOfProximityDomains; 1036 // UINT32 ProximityDomain[NumberOfProximityDomains]; 1037 // EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 1038 } EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1039 1040 /// 1041 /// DIMM Memory Aggregator Device Structure. 1042 /// 1043 typedef struct { 1044 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1045 UINT16 PhysicalComponentIdentifier; 1046 UINT16 Reserved; 1047 UINT32 SizeOfDimm; 1048 UINT32 SmbiosHandle; 1049 } EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1050 1051 /// 1052 /// Boot Graphics Resource Table definition. 1053 /// 1054 typedef struct { 1055 EFI_ACPI_DESCRIPTION_HEADER Header; 1056 /// 1057 /// 2-bytes (16 bit) version ID. This value must be 1. 1058 /// 1059 UINT16 Version; 1060 /// 1061 /// 1-byte status field indicating current status about the table. 1062 /// Bits[7:1] = Reserved (must be zero) 1063 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1064 /// 1065 UINT8 Status; 1066 /// 1067 /// 1-byte enumerated type field indicating format of the image. 1068 /// 0 = Bitmap 1069 /// 1 - 255 Reserved (for future use) 1070 /// 1071 UINT8 ImageType; 1072 /// 1073 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1074 /// of the image bitmap. 1075 /// 1076 UINT64 ImageAddress; 1077 /// 1078 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1079 /// (X, Y) display offset of the top left corner of the boot image. 1080 /// The top left corner of the display is at offset (0, 0). 1081 /// 1082 UINT32 ImageOffsetX; 1083 /// 1084 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1085 /// (X, Y) display offset of the top left corner of the boot image. 1086 /// The top left corner of the display is at offset (0, 0). 1087 /// 1088 UINT32 ImageOffsetY; 1089 } EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE; 1090 1091 /// 1092 /// BGRT Revision 1093 /// 1094 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1095 1096 /// 1097 /// BGRT Version 1098 /// 1099 #define EFI_ACPI_5_0_BGRT_VERSION 0x01 1100 1101 /// 1102 /// BGRT Status 1103 /// 1104 #define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00 1105 #define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01 1106 #define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 1107 #define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 1108 1109 /// 1110 /// BGRT Image Type 1111 /// 1112 #define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00 1113 1114 /// 1115 /// FPDT Version (as defined in ACPI 5.0 spec.) 1116 /// 1117 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1118 1119 /// 1120 /// FPDT Performance Record Types 1121 /// 1122 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1123 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1124 1125 /// 1126 /// FPDT Performance Record Revision 1127 /// 1128 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1129 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1130 1131 /// 1132 /// FPDT Runtime Performance Record Types 1133 /// 1134 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1135 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1136 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1137 1138 /// 1139 /// FPDT Runtime Performance Record Revision 1140 /// 1141 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1142 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1143 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1144 1145 /// 1146 /// FPDT Performance Record header 1147 /// 1148 typedef struct { 1149 UINT16 Type; 1150 UINT8 Length; 1151 UINT8 Revision; 1152 } EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER; 1153 1154 /// 1155 /// FPDT Performance Table header 1156 /// 1157 typedef struct { 1158 UINT32 Signature; 1159 UINT32 Length; 1160 } EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER; 1161 1162 /// 1163 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1164 /// 1165 typedef struct { 1166 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1167 UINT32 Reserved; 1168 /// 1169 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1170 /// 1171 UINT64 BootPerformanceTablePointer; 1172 } EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1173 1174 /// 1175 /// FPDT S3 Performance Table Pointer Record Structure 1176 /// 1177 typedef struct { 1178 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1179 UINT32 Reserved; 1180 /// 1181 /// 64-bit processor-relative physical address of the S3 Performance Table. 1182 /// 1183 UINT64 S3PerformanceTablePointer; 1184 } EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1185 1186 /// 1187 /// FPDT Firmware Basic Boot Performance Record Structure 1188 /// 1189 typedef struct { 1190 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1191 UINT32 Reserved; 1192 /// 1193 /// Timer value logged at the beginning of firmware image execution. 1194 /// This may not always be zero or near zero. 1195 /// 1196 UINT64 ResetEnd; 1197 /// 1198 /// Timer value logged just prior to loading the OS boot loader into memory. 1199 /// For non-UEFI compatible boots, this field must be zero. 1200 /// 1201 UINT64 OsLoaderLoadImageStart; 1202 /// 1203 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1204 /// For non-UEFI compatible boots, the timer value logged will be just prior 1205 /// to the INT 19h handler invocation. 1206 /// 1207 UINT64 OsLoaderStartImageStart; 1208 /// 1209 /// Timer value logged at the point when the OS loader calls the 1210 /// ExitBootServices function for UEFI compatible firmware. 1211 /// For non-UEFI compatible boots, this field must be zero. 1212 /// 1213 UINT64 ExitBootServicesEntry; 1214 /// 1215 /// Timer value logged at the point just prior to when the OS loader gaining 1216 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1217 /// For non-UEFI compatible boots, this field must be zero. 1218 /// 1219 UINT64 ExitBootServicesExit; 1220 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1221 1222 /// 1223 /// FPDT Firmware Basic Boot Performance Table signature 1224 /// 1225 #define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1226 1227 // 1228 // FPDT Firmware Basic Boot Performance Table 1229 // 1230 typedef struct { 1231 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header; 1232 // 1233 // one or more Performance Records. 1234 // 1235 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1236 1237 /// 1238 /// FPDT "S3PT" S3 Performance Table 1239 /// 1240 #define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1241 1242 // 1243 // FPDT Firmware S3 Boot Performance Table 1244 // 1245 typedef struct { 1246 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header; 1247 // 1248 // one or more Performance Records. 1249 // 1250 } EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE; 1251 1252 /// 1253 /// FPDT Basic S3 Resume Performance Record 1254 /// 1255 typedef struct { 1256 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1257 /// 1258 /// A count of the number of S3 resume cycles since the last full boot sequence. 1259 /// 1260 UINT32 ResumeCount; 1261 /// 1262 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1263 /// OS waking vector. Only the most recent resume cycle's time is retained. 1264 /// 1265 UINT64 FullResume; 1266 /// 1267 /// Average timer value of all resume cycles logged since the last full boot 1268 /// sequence, including the most recent resume. Note that the entire log of 1269 /// timer values does not need to be retained in order to calculate this average. 1270 /// 1271 UINT64 AverageResume; 1272 } EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD; 1273 1274 /// 1275 /// FPDT Basic S3 Suspend Performance Record 1276 /// 1277 typedef struct { 1278 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1279 /// 1280 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1281 /// Only the most recent suspend cycle's timer value is retained. 1282 /// 1283 UINT64 SuspendStart; 1284 /// 1285 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1286 /// mechanism) used to trigger hardware entry to S3. 1287 /// Only the most recent suspend cycle's timer value is retained. 1288 /// 1289 UINT64 SuspendEnd; 1290 } EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD; 1291 1292 /// 1293 /// Firmware Performance Record Table definition. 1294 /// 1295 typedef struct { 1296 EFI_ACPI_DESCRIPTION_HEADER Header; 1297 } EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1298 1299 /// 1300 /// Generic Timer Description Table definition. 1301 /// 1302 typedef struct { 1303 EFI_ACPI_DESCRIPTION_HEADER Header; 1304 UINT64 PhysicalAddress; 1305 UINT32 GlobalFlags; 1306 UINT32 SecurePL1TimerGSIV; 1307 UINT32 SecurePL1TimerFlags; 1308 UINT32 NonSecurePL1TimerGSIV; 1309 UINT32 NonSecurePL1TimerFlags; 1310 UINT32 VirtualTimerGSIV; 1311 UINT32 VirtualTimerFlags; 1312 UINT32 NonSecurePL2TimerGSIV; 1313 UINT32 NonSecurePL2TimerFlags; 1314 } EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE; 1315 1316 /// 1317 /// GTDT Version (as defined in ACPI 5.0 spec.) 1318 /// 1319 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01 1320 1321 /// 1322 /// Global Flags. All other bits are reserved and must be 0. 1323 /// 1324 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0 1325 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1 1326 1327 /// 1328 /// Timer Flags. All other bits are reserved and must be 0. 1329 /// 1330 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1331 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1332 1333 /// 1334 /// Boot Error Record Table (BERT) 1335 /// 1336 typedef struct { 1337 EFI_ACPI_DESCRIPTION_HEADER Header; 1338 UINT32 BootErrorRegionLength; 1339 UINT64 BootErrorRegion; 1340 } EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER; 1341 1342 /// 1343 /// BERT Version (as defined in ACPI 5.0 spec.) 1344 /// 1345 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1346 1347 /// 1348 /// Boot Error Region Block Status Definition 1349 /// 1350 typedef struct { 1351 UINT32 UncorrectableErrorValid : 1; 1352 UINT32 CorrectableErrorValid : 1; 1353 UINT32 MultipleUncorrectableErrors : 1; 1354 UINT32 MultipleCorrectableErrors : 1; 1355 UINT32 ErrorDataEntryCount : 10; 1356 UINT32 Reserved : 18; 1357 } EFI_ACPI_5_0_ERROR_BLOCK_STATUS; 1358 1359 /// 1360 /// Boot Error Region Definition 1361 /// 1362 typedef struct { 1363 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus; 1364 UINT32 RawDataOffset; 1365 UINT32 RawDataLength; 1366 UINT32 DataLength; 1367 UINT32 ErrorSeverity; 1368 } EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE; 1369 1370 // 1371 // Boot Error Severity types 1372 // 1373 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00 1374 #define EFI_ACPI_5_0_ERROR_SEVERITY_RECOVERABLE 0x00 1375 #define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01 1376 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02 1377 #define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03 1378 1379 /// 1380 /// Generic Error Data Entry Definition 1381 /// 1382 typedef struct { 1383 UINT8 SectionType[16]; 1384 UINT32 ErrorSeverity; 1385 UINT16 Revision; 1386 UINT8 ValidationBits; 1387 UINT8 Flags; 1388 UINT32 ErrorDataLength; 1389 UINT8 FruId[16]; 1390 UINT8 FruText[20]; 1391 } EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1392 1393 /// 1394 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.) 1395 /// 1396 #define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 1397 1398 /// 1399 /// HEST - Hardware Error Source Table 1400 /// 1401 typedef struct { 1402 EFI_ACPI_DESCRIPTION_HEADER Header; 1403 UINT32 ErrorSourceCount; 1404 } EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1405 1406 /// 1407 /// HEST Version (as defined in ACPI 5.0 spec.) 1408 /// 1409 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1410 1411 // 1412 // Error Source structure types. 1413 // 1414 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1415 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1416 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02 1417 #define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06 1418 #define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07 1419 #define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08 1420 #define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09 1421 1422 // 1423 // Error Source structure flags. 1424 // 1425 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1426 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1427 1428 /// 1429 /// IA-32 Architecture Machine Check Exception Structure Definition 1430 /// 1431 typedef struct { 1432 UINT16 Type; 1433 UINT16 SourceId; 1434 UINT8 Reserved0[2]; 1435 UINT8 Flags; 1436 UINT8 Enabled; 1437 UINT32 NumberOfRecordsToPreAllocate; 1438 UINT32 MaxSectionsPerRecord; 1439 UINT64 GlobalCapabilityInitData; 1440 UINT64 GlobalControlInitData; 1441 UINT8 NumberOfHardwareBanks; 1442 UINT8 Reserved1[7]; 1443 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1444 1445 /// 1446 /// IA-32 Architecture Machine Check Bank Structure Definition 1447 /// 1448 typedef struct { 1449 UINT8 BankNumber; 1450 UINT8 ClearStatusOnInitialization; 1451 UINT8 StatusDataFormat; 1452 UINT8 Reserved0; 1453 UINT32 ControlRegisterMsrAddress; 1454 UINT64 ControlInitData; 1455 UINT32 StatusRegisterMsrAddress; 1456 UINT32 AddressRegisterMsrAddress; 1457 UINT32 MiscRegisterMsrAddress; 1458 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1459 1460 /// 1461 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1462 /// 1463 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1464 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1465 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1466 1467 // 1468 // Hardware Error Notification types. All other values are reserved 1469 // 1470 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1471 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1472 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1473 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1474 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1475 1476 /// 1477 /// Hardware Error Notification Configuration Write Enable Structure Definition 1478 /// 1479 typedef struct { 1480 UINT16 Type : 1; 1481 UINT16 PollInterval : 1; 1482 UINT16 SwitchToPollingThresholdValue : 1; 1483 UINT16 SwitchToPollingThresholdWindow : 1; 1484 UINT16 ErrorThresholdValue : 1; 1485 UINT16 ErrorThresholdWindow : 1; 1486 UINT16 Reserved : 10; 1487 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1488 1489 /// 1490 /// Hardware Error Notification Structure Definition 1491 /// 1492 typedef struct { 1493 UINT8 Type; 1494 UINT8 Length; 1495 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1496 UINT32 PollInterval; 1497 UINT32 Vector; 1498 UINT32 SwitchToPollingThresholdValue; 1499 UINT32 SwitchToPollingThresholdWindow; 1500 UINT32 ErrorThresholdValue; 1501 UINT32 ErrorThresholdWindow; 1502 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1503 1504 /// 1505 /// IA-32 Architecture Corrected Machine Check Structure Definition 1506 /// 1507 typedef struct { 1508 UINT16 Type; 1509 UINT16 SourceId; 1510 UINT8 Reserved0[2]; 1511 UINT8 Flags; 1512 UINT8 Enabled; 1513 UINT32 NumberOfRecordsToPreAllocate; 1514 UINT32 MaxSectionsPerRecord; 1515 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1516 UINT8 NumberOfHardwareBanks; 1517 UINT8 Reserved1[3]; 1518 } EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1519 1520 /// 1521 /// IA-32 Architecture NMI Error Structure Definition 1522 /// 1523 typedef struct { 1524 UINT16 Type; 1525 UINT16 SourceId; 1526 UINT8 Reserved0[2]; 1527 UINT32 NumberOfRecordsToPreAllocate; 1528 UINT32 MaxSectionsPerRecord; 1529 UINT32 MaxRawDataLength; 1530 } EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1531 1532 /// 1533 /// PCI Express Root Port AER Structure Definition 1534 /// 1535 typedef struct { 1536 UINT16 Type; 1537 UINT16 SourceId; 1538 UINT8 Reserved0[2]; 1539 UINT8 Flags; 1540 UINT8 Enabled; 1541 UINT32 NumberOfRecordsToPreAllocate; 1542 UINT32 MaxSectionsPerRecord; 1543 UINT32 Bus; 1544 UINT16 Device; 1545 UINT16 Function; 1546 UINT16 DeviceControl; 1547 UINT8 Reserved1[2]; 1548 UINT32 UncorrectableErrorMask; 1549 UINT32 UncorrectableErrorSeverity; 1550 UINT32 CorrectableErrorMask; 1551 UINT32 AdvancedErrorCapabilitiesAndControl; 1552 UINT32 RootErrorCommand; 1553 } EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1554 1555 /// 1556 /// PCI Express Device AER Structure Definition 1557 /// 1558 typedef struct { 1559 UINT16 Type; 1560 UINT16 SourceId; 1561 UINT8 Reserved0[2]; 1562 UINT8 Flags; 1563 UINT8 Enabled; 1564 UINT32 NumberOfRecordsToPreAllocate; 1565 UINT32 MaxSectionsPerRecord; 1566 UINT32 Bus; 1567 UINT16 Device; 1568 UINT16 Function; 1569 UINT16 DeviceControl; 1570 UINT8 Reserved1[2]; 1571 UINT32 UncorrectableErrorMask; 1572 UINT32 UncorrectableErrorSeverity; 1573 UINT32 CorrectableErrorMask; 1574 UINT32 AdvancedErrorCapabilitiesAndControl; 1575 } EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1576 1577 /// 1578 /// PCI Express Bridge AER Structure Definition 1579 /// 1580 typedef struct { 1581 UINT16 Type; 1582 UINT16 SourceId; 1583 UINT8 Reserved0[2]; 1584 UINT8 Flags; 1585 UINT8 Enabled; 1586 UINT32 NumberOfRecordsToPreAllocate; 1587 UINT32 MaxSectionsPerRecord; 1588 UINT32 Bus; 1589 UINT16 Device; 1590 UINT16 Function; 1591 UINT16 DeviceControl; 1592 UINT8 Reserved1[2]; 1593 UINT32 UncorrectableErrorMask; 1594 UINT32 UncorrectableErrorSeverity; 1595 UINT32 CorrectableErrorMask; 1596 UINT32 AdvancedErrorCapabilitiesAndControl; 1597 UINT32 SecondaryUncorrectableErrorMask; 1598 UINT32 SecondaryUncorrectableErrorSeverity; 1599 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1600 } EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1601 1602 /// 1603 /// Generic Hardware Error Source Structure Definition 1604 /// 1605 typedef struct { 1606 UINT16 Type; 1607 UINT16 SourceId; 1608 UINT16 RelatedSourceId; 1609 UINT8 Flags; 1610 UINT8 Enabled; 1611 UINT32 NumberOfRecordsToPreAllocate; 1612 UINT32 MaxSectionsPerRecord; 1613 UINT32 MaxRawDataLength; 1614 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1615 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1616 UINT32 ErrorStatusBlockLength; 1617 } EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1618 1619 /// 1620 /// Generic Error Status Definition 1621 /// 1622 typedef struct { 1623 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus; 1624 UINT32 RawDataOffset; 1625 UINT32 RawDataLength; 1626 UINT32 DataLength; 1627 UINT32 ErrorSeverity; 1628 } EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE; 1629 1630 /// 1631 /// ERST - Error Record Serialization Table 1632 /// 1633 typedef struct { 1634 EFI_ACPI_DESCRIPTION_HEADER Header; 1635 UINT32 SerializationHeaderSize; 1636 UINT8 Reserved0[4]; 1637 UINT32 InstructionEntryCount; 1638 } EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 1639 1640 /// 1641 /// ERST Version (as defined in ACPI 5.0 spec.) 1642 /// 1643 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 1644 1645 /// 1646 /// ERST Serialization Actions 1647 /// 1648 #define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00 1649 #define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01 1650 #define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02 1651 #define EFI_ACPI_5_0_ERST_END_OPERATION 0x03 1652 #define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04 1653 #define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05 1654 #define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06 1655 #define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07 1656 #define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08 1657 #define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09 1658 #define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A 1659 #define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 1660 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 1661 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 1662 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 1663 1664 /// 1665 /// ERST Action Command Status 1666 /// 1667 #define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00 1668 #define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 1669 #define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 1670 #define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03 1671 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04 1672 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05 1673 1674 /// 1675 /// ERST Serialization Instructions 1676 /// 1677 #define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00 1678 #define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01 1679 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02 1680 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03 1681 #define EFI_ACPI_5_0_ERST_NOOP 0x04 1682 #define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05 1683 #define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06 1684 #define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07 1685 #define EFI_ACPI_5_0_ERST_ADD 0x08 1686 #define EFI_ACPI_5_0_ERST_SUBTRACT 0x09 1687 #define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A 1688 #define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B 1689 #define EFI_ACPI_5_0_ERST_STALL 0x0C 1690 #define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D 1691 #define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1692 #define EFI_ACPI_5_0_ERST_GOTO 0x0F 1693 #define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10 1694 #define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11 1695 #define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12 1696 1697 /// 1698 /// ERST Instruction Flags 1699 /// 1700 #define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01 1701 1702 /// 1703 /// ERST Serialization Instruction Entry 1704 /// 1705 typedef struct { 1706 UINT8 SerializationAction; 1707 UINT8 Instruction; 1708 UINT8 Flags; 1709 UINT8 Reserved0; 1710 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1711 UINT64 Value; 1712 UINT64 Mask; 1713 } EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1714 1715 /// 1716 /// EINJ - Error Injection Table 1717 /// 1718 typedef struct { 1719 EFI_ACPI_DESCRIPTION_HEADER Header; 1720 UINT32 InjectionHeaderSize; 1721 UINT8 InjectionFlags; 1722 UINT8 Reserved0[3]; 1723 UINT32 InjectionEntryCount; 1724 } EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER; 1725 1726 /// 1727 /// EINJ Version (as defined in ACPI 5.0 spec.) 1728 /// 1729 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01 1730 1731 /// 1732 /// EINJ Error Injection Actions 1733 /// 1734 #define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00 1735 #define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1736 #define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02 1737 #define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03 1738 #define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04 1739 #define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05 1740 #define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06 1741 #define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07 1742 #define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF 1743 1744 /// 1745 /// EINJ Action Command Status 1746 /// 1747 #define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00 1748 #define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1749 #define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02 1750 1751 /// 1752 /// EINJ Error Type Definition 1753 /// 1754 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1755 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1756 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1757 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1758 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1759 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1760 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1761 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1762 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1763 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1764 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1765 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1766 1767 /// 1768 /// EINJ Injection Instructions 1769 /// 1770 #define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00 1771 #define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01 1772 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02 1773 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03 1774 #define EFI_ACPI_5_0_EINJ_NOOP 0x04 1775 1776 /// 1777 /// EINJ Instruction Flags 1778 /// 1779 #define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01 1780 1781 /// 1782 /// EINJ Injection Instruction Entry 1783 /// 1784 typedef struct { 1785 UINT8 InjectionAction; 1786 UINT8 Instruction; 1787 UINT8 Flags; 1788 UINT8 Reserved0; 1789 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1790 UINT64 Value; 1791 UINT64 Mask; 1792 } EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY; 1793 1794 /// 1795 /// EINJ Trigger Action Table 1796 /// 1797 typedef struct { 1798 UINT32 HeaderSize; 1799 UINT32 Revision; 1800 UINT32 TableSize; 1801 UINT32 EntryCount; 1802 } EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE; 1803 1804 /// 1805 /// Platform Communications Channel Table (PCCT) 1806 /// 1807 typedef struct { 1808 EFI_ACPI_DESCRIPTION_HEADER Header; 1809 UINT32 Flags; 1810 UINT64 Reserved; 1811 } EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 1812 1813 /// 1814 /// PCCT Version (as defined in ACPI 5.0 spec.) 1815 /// 1816 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 1817 1818 /// 1819 /// PCCT Global Flags 1820 /// 1821 #define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0 1822 1823 // 1824 // PCCT Subspace type 1825 // 1826 #define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00 1827 1828 /// 1829 /// PCC Subspace Structure Header 1830 /// 1831 typedef struct { 1832 UINT8 Type; 1833 UINT8 Length; 1834 } EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER; 1835 1836 /// 1837 /// Generic Communications Subspace Structure 1838 /// 1839 typedef struct { 1840 UINT8 Type; 1841 UINT8 Length; 1842 UINT8 Reserved[6]; 1843 UINT64 BaseAddress; 1844 UINT64 AddressLength; 1845 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 1846 UINT64 DoorbellPreserve; 1847 UINT64 DoorbellWrite; 1848 UINT32 NominalLatency; 1849 UINT32 MaximumPeriodicAccessRate; 1850 UINT16 MinimumRequestTurnaroundTime; 1851 } EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC; 1852 1853 /// 1854 /// Generic Communications Channel Shared Memory Region 1855 /// 1856 1857 typedef struct { 1858 UINT8 Command; 1859 UINT8 Reserved : 7; 1860 UINT8 GenerateSci : 1; 1861 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 1862 1863 typedef struct { 1864 UINT8 CommandComplete : 1; 1865 UINT8 SciDoorbell : 1; 1866 UINT8 Error : 1; 1867 UINT8 PlatformNotification : 1; 1868 UINT8 Reserved : 4; 1869 UINT8 Reserved1; 1870 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 1871 1872 typedef struct { 1873 UINT32 Signature; 1874 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 1875 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 1876 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 1877 1878 // 1879 // Known table signatures 1880 // 1881 1882 /// 1883 /// "RSD PTR " Root System Description Pointer 1884 /// 1885 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 1886 1887 /// 1888 /// "APIC" Multiple APIC Description Table 1889 /// 1890 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 1891 1892 /// 1893 /// "BERT" Boot Error Record Table 1894 /// 1895 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 1896 1897 /// 1898 /// "BGRT" Boot Graphics Resource Table 1899 /// 1900 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 1901 1902 /// 1903 /// "CPEP" Corrected Platform Error Polling Table 1904 /// 1905 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 1906 1907 /// 1908 /// "DSDT" Differentiated System Description Table 1909 /// 1910 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 1911 1912 /// 1913 /// "ECDT" Embedded Controller Boot Resources Table 1914 /// 1915 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 1916 1917 /// 1918 /// "EINJ" Error Injection Table 1919 /// 1920 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 1921 1922 /// 1923 /// "ERST" Error Record Serialization Table 1924 /// 1925 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 1926 1927 /// 1928 /// "FACP" Fixed ACPI Description Table 1929 /// 1930 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 1931 1932 /// 1933 /// "FACS" Firmware ACPI Control Structure 1934 /// 1935 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 1936 1937 /// 1938 /// "FPDT" Firmware Performance Data Table 1939 /// 1940 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 1941 1942 /// 1943 /// "GTDT" Generic Timer Description Table 1944 /// 1945 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 1946 1947 /// 1948 /// "HEST" Hardware Error Source Table 1949 /// 1950 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 1951 1952 /// 1953 /// "MPST" Memory Power State Table 1954 /// 1955 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 1956 1957 /// 1958 /// "MSCT" Maximum System Characteristics Table 1959 /// 1960 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 1961 1962 /// 1963 /// "PMTT" Platform Memory Topology Table 1964 /// 1965 #define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 1966 1967 /// 1968 /// "PSDT" Persistent System Description Table 1969 /// 1970 #define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 1971 1972 /// 1973 /// "RASF" ACPI RAS Feature Table 1974 /// 1975 #define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 1976 1977 /// 1978 /// "RSDT" Root System Description Table 1979 /// 1980 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 1981 1982 /// 1983 /// "SBST" Smart Battery Specification Table 1984 /// 1985 #define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 1986 1987 /// 1988 /// "SLIT" System Locality Information Table 1989 /// 1990 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 1991 1992 /// 1993 /// "SRAT" System Resource Affinity Table 1994 /// 1995 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 1996 1997 /// 1998 /// "SSDT" Secondary System Description Table 1999 /// 2000 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2001 2002 /// 2003 /// "XSDT" Extended System Description Table 2004 /// 2005 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2006 2007 /// 2008 /// "BOOT" MS Simple Boot Spec 2009 /// 2010 #define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2011 2012 /// 2013 /// "CSRT" MS Core System Resource Table 2014 /// 2015 #define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2016 2017 /// 2018 /// "DBG2" MS Debug Port 2 Spec 2019 /// 2020 #define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2021 2022 /// 2023 /// "DBGP" MS Debug Port Spec 2024 /// 2025 #define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2026 2027 /// 2028 /// "DMAR" DMA Remapping Table 2029 /// 2030 #define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2031 2032 /// 2033 /// "DRTM" Dynamic Root of Trust for Measurement Table 2034 /// 2035 #define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2036 2037 /// 2038 /// "ETDT" Event Timer Description Table 2039 /// 2040 #define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2041 2042 /// 2043 /// "HPET" IA-PC High Precision Event Timer Table 2044 /// 2045 #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2046 2047 /// 2048 /// "iBFT" iSCSI Boot Firmware Table 2049 /// 2050 #define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2051 2052 /// 2053 /// "IVRS" I/O Virtualization Reporting Structure 2054 /// 2055 #define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2056 2057 /// 2058 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2059 /// 2060 #define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2061 2062 /// 2063 /// "MCHI" Management Controller Host Interface Table 2064 /// 2065 #define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2066 2067 /// 2068 /// "MSDM" MS Data Management Table 2069 /// 2070 #define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2071 2072 /// 2073 /// "PCCT" Platform Communications Channel Table 2074 /// 2075 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') 2076 2077 /// 2078 /// "SLIC" MS Software Licensing Table Specification 2079 /// 2080 #define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2081 2082 /// 2083 /// "SPCR" Serial Port Console Redirection Table 2084 /// 2085 #define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2086 2087 /// 2088 /// "SPMI" Server Platform Management Interface Table 2089 /// 2090 #define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2091 2092 /// 2093 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2094 /// 2095 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2096 2097 /// 2098 /// "TPM2" Trusted Computing Platform 1 Table 2099 /// 2100 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2101 2102 /// 2103 /// "UEFI" UEFI ACPI Data Table 2104 /// 2105 #define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2106 2107 /// 2108 /// "WAET" Windows ACPI Emulated Devices Table 2109 /// 2110 #define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2111 #define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE 2112 2113 /// 2114 /// "WDAT" Watchdog Action Table 2115 /// 2116 #define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2117 2118 /// 2119 /// "WDRT" Watchdog Resource Table 2120 /// 2121 #define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2122 2123 /// 2124 /// "WPBT" MS Platform Binary Table 2125 /// 2126 #define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2127 2128 #pragma pack() 2129 2130 #endif 2131