1 /*- 2 * Copyright (c) 2012-2015 LSI Corp. 3 * Copyright (c) 2013-2016 Avago Technologies 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of any co-contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * Copyright (c) 2000-2015 LSI Corporation. 33 * Copyright (c) 2013-2016 Avago Technologies 34 * All rights reserved. 35 * 36 * 37 * Name: mpi2_init.h 38 * Title: MPI SCSI initiator mode messages and structures 39 * Creation Date: June 23, 2006 40 * 41 * mpi2_init.h Version: 02.00.21 42 * 43 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 44 * prefix are for use only on MPI v2.5 products, and must not be used 45 * with MPI v2.0 products. Unless otherwise noted, names beginning with 46 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 47 * 48 * Version History 49 * --------------- 50 * 51 * Date Version Description 52 * -------- -------- ------------------------------------------------------ 53 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 54 * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t. 55 * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines. 56 * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention. 57 * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY. 58 * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t. 59 * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO 60 * Control field Task Attribute flags. 61 * Moved LUN field defines to mpi2.h because they are 62 * common to many structures. 63 * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to 64 * Query Asynchronous Event. 65 * Defined two new bits in the SlotStatus field of the SCSI 66 * Enclosure Processor Request and Reply. 67 * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for 68 * both SCSI IO Error Reply and SCSI Task Management Reply. 69 * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY. 70 * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define. 71 * 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it. 72 * 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request. 73 * 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define. 74 * 11-18-11 02.00.12 Incorporating additions for MPI v2.5. 75 * 02-06-12 02.00.13 Added alternate defines for Task Priority / Command 76 * Priority to match SAM-4. 77 * Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY. 78 * 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION. 79 * 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY, 80 * replacing the Reserved4 field. 81 * 11-18-14 02.00.16 Updated copyright information. 82 * 03-16-15 02.00.17 Updated for MPI v2.6. 83 * Added MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH. 84 * Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and 85 * MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF. 86 * 08-26-15 02.00.18 Added SCSITASKMGMT_MSGFLAGS for Target Reset. 87 * 12-18-15 02.00.19 Added EEDPObservedValue added to SCSI IO Reply message. 88 * 01-04-16 02.00.20 Modified EEDP reported values in SCSI IO Reply message. 89 * 01-21-16 02.00.21 Modified MPI26_SCSITASKMGMT_MSGFLAGS_PCIE* defines to 90 * be unique within first 32 characters. 91 * -------------------------------------------------------------------------- 92 */ 93 94 #ifndef MPI2_INIT_H 95 #define MPI2_INIT_H 96 97 /***************************************************************************** 98 * 99 * SCSI Initiator Messages 100 * 101 *****************************************************************************/ 102 103 /**************************************************************************** 104 * SCSI IO messages and associated structures 105 ****************************************************************************/ 106 107 typedef struct _MPI2_SCSI_IO_CDB_EEDP32 108 { 109 U8 CDB[20]; /* 0x00 */ 110 U32 PrimaryReferenceTag; /* 0x14 */ 111 U16 PrimaryApplicationTag; /* 0x18 */ 112 U16 PrimaryApplicationTagMask; /* 0x1A */ 113 U32 TransferLength; /* 0x1C */ 114 } MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32, 115 Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t; 116 117 /* MPI v2.0 CDB field */ 118 typedef union _MPI2_SCSI_IO_CDB_UNION 119 { 120 U8 CDB32[32]; 121 MPI2_SCSI_IO_CDB_EEDP32 EEDP32; 122 MPI2_SGE_SIMPLE_UNION SGE; 123 } MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION, 124 Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t; 125 126 /* MPI v2.0 SCSI IO Request Message */ 127 typedef struct _MPI2_SCSI_IO_REQUEST 128 { 129 U16 DevHandle; /* 0x00 */ 130 U8 ChainOffset; /* 0x02 */ 131 U8 Function; /* 0x03 */ 132 U16 Reserved1; /* 0x04 */ 133 U8 Reserved2; /* 0x06 */ 134 U8 MsgFlags; /* 0x07 */ 135 U8 VP_ID; /* 0x08 */ 136 U8 VF_ID; /* 0x09 */ 137 U16 Reserved3; /* 0x0A */ 138 U32 SenseBufferLowAddress; /* 0x0C */ 139 U16 SGLFlags; /* 0x10 */ 140 U8 SenseBufferLength; /* 0x12 */ 141 U8 Reserved4; /* 0x13 */ 142 U8 SGLOffset0; /* 0x14 */ 143 U8 SGLOffset1; /* 0x15 */ 144 U8 SGLOffset2; /* 0x16 */ 145 U8 SGLOffset3; /* 0x17 */ 146 U32 SkipCount; /* 0x18 */ 147 U32 DataLength; /* 0x1C */ 148 U32 BidirectionalDataLength; /* 0x20 */ 149 U16 IoFlags; /* 0x24 */ 150 U16 EEDPFlags; /* 0x26 */ 151 U32 EEDPBlockSize; /* 0x28 */ 152 U32 SecondaryReferenceTag; /* 0x2C */ 153 U16 SecondaryApplicationTag; /* 0x30 */ 154 U16 ApplicationTagTranslationMask; /* 0x32 */ 155 U8 LUN[8]; /* 0x34 */ 156 U32 Control; /* 0x3C */ 157 MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */ 158 159 #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */ 160 MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion; 161 #endif 162 163 MPI2_SGE_IO_UNION SGL; /* 0x60 */ 164 165 } MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST, 166 Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t; 167 168 /* SCSI IO MsgFlags bits */ 169 170 /* MsgFlags for SenseBufferAddressSpace */ 171 #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C) 172 #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00) 173 #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04) 174 #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08) /* for MPI v2.5 and earlier only */ 175 #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C) /* for MPI v2.5 and earlier only */ 176 #define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR (0x08) /* for MPI v2.6 only */ 177 178 /* SCSI IO SGLFlags bits */ 179 180 /* base values for Data Location Address Space */ 181 #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C) 182 #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00) 183 #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04) 184 #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08) 185 #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) 186 187 /* base values for Type */ 188 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03) 189 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00) 190 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01) 191 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02) 192 193 /* shift values for each sub-field */ 194 #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12) 195 #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8) 196 #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4) 197 #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0) 198 199 /* number of SGLOffset fields */ 200 #define MPI2_SCSIIO_NUM_SGLOFFSETS (4) 201 202 /* SCSI IO IoFlags bits */ 203 204 /* Large CDB Address Space */ 205 #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000) 206 #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000) 207 #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000) 208 #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000) 209 #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000) 210 211 #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) 212 #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) 213 #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400) 214 #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200) 215 #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) 216 217 /* SCSI IO EEDPFlags bits */ 218 219 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 220 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 221 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 222 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 223 224 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400) 225 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200) 226 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100) 227 228 #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) 229 230 #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007) 231 #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000) 232 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001) 233 #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002) 234 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) 235 #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004) 236 #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006) 237 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007) 238 239 /* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */ 240 241 /* SCSI IO Control bits */ 242 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000) 243 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 244 245 #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 246 #define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24) 247 #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 248 #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000) 249 #define MPI2_SCSIIO_CONTROL_READ (0x02000000) 250 #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000) 251 252 #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800) 253 #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11) 254 /* alternate name for the previous field; called Command Priority in SAM-4 */ 255 #define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800) 256 #define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11) 257 258 #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 259 #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 260 #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100) 261 #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 262 #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400) 263 264 #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0) 265 #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000) 266 #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040) 267 #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080) 268 269 270 /* MPI v2.5 CDB field */ 271 typedef union _MPI25_SCSI_IO_CDB_UNION 272 { 273 U8 CDB32[32]; 274 MPI2_SCSI_IO_CDB_EEDP32 EEDP32; 275 MPI2_IEEE_SGE_SIMPLE64 SGE; 276 } MPI25_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI25_SCSI_IO_CDB_UNION, 277 Mpi25ScsiIoCdb_t, MPI2_POINTER pMpi25ScsiIoCdb_t; 278 279 /* MPI v2.5/2.6 SCSI IO Request Message */ 280 typedef struct _MPI25_SCSI_IO_REQUEST 281 { 282 U16 DevHandle; /* 0x00 */ 283 U8 ChainOffset; /* 0x02 */ 284 U8 Function; /* 0x03 */ 285 U16 Reserved1; /* 0x04 */ 286 U8 Reserved2; /* 0x06 */ 287 U8 MsgFlags; /* 0x07 */ 288 U8 VP_ID; /* 0x08 */ 289 U8 VF_ID; /* 0x09 */ 290 U16 Reserved3; /* 0x0A */ 291 U32 SenseBufferLowAddress; /* 0x0C */ 292 U8 DMAFlags; /* 0x10 */ 293 U8 Reserved5; /* 0x11 */ 294 U8 SenseBufferLength; /* 0x12 */ 295 U8 Reserved4; /* 0x13 */ 296 U8 SGLOffset0; /* 0x14 */ 297 U8 SGLOffset1; /* 0x15 */ 298 U8 SGLOffset2; /* 0x16 */ 299 U8 SGLOffset3; /* 0x17 */ 300 U32 SkipCount; /* 0x18 */ 301 U32 DataLength; /* 0x1C */ 302 U32 BidirectionalDataLength; /* 0x20 */ 303 U16 IoFlags; /* 0x24 */ 304 U16 EEDPFlags; /* 0x26 */ 305 U16 EEDPBlockSize; /* 0x28 */ 306 U16 Reserved6; /* 0x2A */ 307 U32 SecondaryReferenceTag; /* 0x2C */ 308 U16 SecondaryApplicationTag; /* 0x30 */ 309 U16 ApplicationTagTranslationMask; /* 0x32 */ 310 U8 LUN[8]; /* 0x34 */ 311 U32 Control; /* 0x3C */ 312 MPI25_SCSI_IO_CDB_UNION CDB; /* 0x40 */ 313 314 #ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */ 315 MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion; 316 #endif 317 318 MPI25_SGE_IO_UNION SGL; /* 0x60 */ 319 320 } MPI25_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI25_SCSI_IO_REQUEST, 321 Mpi25SCSIIORequest_t, MPI2_POINTER pMpi25SCSIIORequest_t; 322 323 /* use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */ 324 325 /* Defines for the DMAFlags field 326 * Each setting affects 4 SGLS, from SGL0 to SGL3. 327 * D = Data 328 * C = Cache DIF 329 * I = Interleaved 330 * H = Host DIF 331 */ 332 #define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F) 333 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00) 334 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01) 335 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02) 336 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03) 337 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04) 338 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05) 339 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06) 340 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07) 341 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08) 342 #define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09) 343 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A) 344 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B) 345 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C) 346 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D) 347 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E) 348 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F) 349 350 /* number of SGLOffset fields */ 351 #define MPI25_SCSIIO_NUM_SGLOFFSETS (4) 352 353 /* defines for the IoFlags field */ 354 #define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000) 355 #define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000) 356 #define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000) 357 358 #define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000) /* MPI v2.6 and later */ 359 #define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) 360 #define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) 361 #define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST (0x0400) /* MPI v2.6 and later; IOC use only */ 362 #define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) 363 364 /* MPI v2.5 defines for the EEDPFlags bits */ 365 /* use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */ 366 #define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0) 367 #define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000) 368 #define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040) 369 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080) 370 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0) 371 372 #define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030) 373 #define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000) 374 #define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010) 375 376 /* use MPI2_LUN_ defines from mpi2.h for the LUN field */ 377 378 /* use MPI2_SCSIIO_CONTROL_ defines for the Control field */ 379 380 381 /* NOTE: The SCSI IO Reply is nearly the same for MPI 2.0 and MPI 2.5, so 382 * MPI2_SCSI_IO_REPLY is used for both. 383 */ 384 385 /* SCSI IO Error Reply Message */ 386 typedef struct _MPI2_SCSI_IO_REPLY 387 { 388 U16 DevHandle; /* 0x00 */ 389 U8 MsgLength; /* 0x02 */ 390 U8 Function; /* 0x03 */ 391 U16 Reserved1; /* 0x04 */ 392 U8 Reserved2; /* 0x06 */ 393 U8 MsgFlags; /* 0x07 */ 394 U8 VP_ID; /* 0x08 */ 395 U8 VF_ID; /* 0x09 */ 396 U16 Reserved3; /* 0x0A */ 397 U8 SCSIStatus; /* 0x0C */ 398 U8 SCSIState; /* 0x0D */ 399 U16 IOCStatus; /* 0x0E */ 400 U32 IOCLogInfo; /* 0x10 */ 401 U32 TransferCount; /* 0x14 */ 402 U32 SenseCount; /* 0x18 */ 403 U32 ResponseInfo; /* 0x1C */ 404 U16 TaskTag; /* 0x20 */ 405 U16 SCSIStatusQualifier; /* 0x22 */ 406 U32 BidirectionalTransferCount; /* 0x24 */ 407 U32 EEDPErrorOffset; /* 0x28 */ /* MPI 2.5+ only; Reserved in MPI 2.0 */ 408 U16 EEDPObservedAppTag; /* 0x2C */ /* MPI 2.5+ only; Reserved in MPI 2.0 */ 409 U16 EEDPObservedGuard; /* 0x2E */ /* MPI 2.5+ only; Reserved in MPI 2.0 */ 410 U32 EEDPObservedRefTag; /* 0x30 */ /* MPI 2.5+ only; Reserved in MPI 2.0 */ 411 } MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY, 412 Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t; 413 414 /* SCSI IO Reply MsgFlags bits */ 415 #define MPI26_SCSIIO_REPLY_MSGFLAGS_REFTAG_OBSERVED_VALID (0x01) 416 #define MPI26_SCSIIO_REPLY_MSGFLAGS_GUARD_OBSERVED_VALID (0x02) 417 #define MPI26_SCSIIO_REPLY_MSGFLAGS_APPTAG_OBSERVED_VALID (0x04) 418 419 420 /* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */ 421 422 #define MPI2_SCSI_STATUS_GOOD (0x00) 423 #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02) 424 #define MPI2_SCSI_STATUS_CONDITION_MET (0x04) 425 #define MPI2_SCSI_STATUS_BUSY (0x08) 426 #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10) 427 #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 428 #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 429 #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */ 430 #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28) 431 #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30) 432 #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40) 433 434 /* SCSI IO Reply SCSIState flags */ 435 436 #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 437 #define MPI2_SCSI_STATE_TERMINATED (0x08) 438 #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04) 439 #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02) 440 #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01) 441 442 /* masks and shifts for the ResponseInfo field */ 443 444 #define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF) 445 #define MPI2_SCSI_RI_SHIFT_REASONCODE (0) 446 447 #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF) 448 449 450 /**************************************************************************** 451 * SCSI Task Management messages 452 ****************************************************************************/ 453 454 /* SCSI Task Management Request Message */ 455 typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST 456 { 457 U16 DevHandle; /* 0x00 */ 458 U8 ChainOffset; /* 0x02 */ 459 U8 Function; /* 0x03 */ 460 U8 Reserved1; /* 0x04 */ 461 U8 TaskType; /* 0x05 */ 462 U8 Reserved2; /* 0x06 */ 463 U8 MsgFlags; /* 0x07 */ 464 U8 VP_ID; /* 0x08 */ 465 U8 VF_ID; /* 0x09 */ 466 U16 Reserved3; /* 0x0A */ 467 U8 LUN[8]; /* 0x0C */ 468 U32 Reserved4[7]; /* 0x14 */ 469 U16 TaskMID; /* 0x30 */ 470 U16 Reserved5; /* 0x32 */ 471 } MPI2_SCSI_TASK_MANAGE_REQUEST, 472 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST, 473 Mpi2SCSITaskManagementRequest_t, 474 MPI2_POINTER pMpi2SCSITaskManagementRequest_t; 475 476 /* TaskType values */ 477 478 #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 479 #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 480 #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 481 #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 482 #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) 483 #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) 484 #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) 485 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09) 486 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A) 487 488 /* obsolete TaskType name */ 489 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT) 490 491 /* MsgFlags bits */ 492 #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18) 493 #define MPI26_SCSITASKMGMT_MSGFLAGS_HOT_RESET_PCIE (0x00) 494 #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00) 495 #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) 496 #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08) 497 #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10) 498 #define MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE (0x18) 499 500 501 /* SCSI Task Management Reply Message */ 502 typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY 503 { 504 U16 DevHandle; /* 0x00 */ 505 U8 MsgLength; /* 0x02 */ 506 U8 Function; /* 0x03 */ 507 U8 ResponseCode; /* 0x04 */ 508 U8 TaskType; /* 0x05 */ 509 U8 Reserved1; /* 0x06 */ 510 U8 MsgFlags; /* 0x07 */ 511 U8 VP_ID; /* 0x08 */ 512 U8 VF_ID; /* 0x09 */ 513 U16 Reserved2; /* 0x0A */ 514 U16 Reserved3; /* 0x0C */ 515 U16 IOCStatus; /* 0x0E */ 516 U32 IOCLogInfo; /* 0x10 */ 517 U32 TerminationCount; /* 0x14 */ 518 U32 ResponseInfo; /* 0x18 */ 519 } MPI2_SCSI_TASK_MANAGE_REPLY, 520 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY, 521 Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t; 522 523 /* ResponseCode values */ 524 525 #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) 526 #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) 527 #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) 528 #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05) 529 #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 530 #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 531 #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A) 532 #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 533 534 /* masks and shifts for the ResponseInfo field */ 535 536 #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF) 537 #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0) 538 #define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00) 539 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8) 540 #define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000) 541 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16) 542 #define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000) 543 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24) 544 545 546 /**************************************************************************** 547 * SCSI Enclosure Processor messages 548 ****************************************************************************/ 549 550 /* SCSI Enclosure Processor Request Message */ 551 typedef struct _MPI2_SEP_REQUEST 552 { 553 U16 DevHandle; /* 0x00 */ 554 U8 ChainOffset; /* 0x02 */ 555 U8 Function; /* 0x03 */ 556 U8 Action; /* 0x04 */ 557 U8 Flags; /* 0x05 */ 558 U8 Reserved1; /* 0x06 */ 559 U8 MsgFlags; /* 0x07 */ 560 U8 VP_ID; /* 0x08 */ 561 U8 VF_ID; /* 0x09 */ 562 U16 Reserved2; /* 0x0A */ 563 U32 SlotStatus; /* 0x0C */ 564 U32 Reserved3; /* 0x10 */ 565 U32 Reserved4; /* 0x14 */ 566 U32 Reserved5; /* 0x18 */ 567 U16 Slot; /* 0x1C */ 568 U16 EnclosureHandle; /* 0x1E */ 569 } MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST, 570 Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t; 571 572 /* Action defines */ 573 #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00) 574 #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01) 575 576 /* Flags defines */ 577 #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00) 578 #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) 579 580 /* SlotStatus defines */ 581 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF (0x00080000) /* MPI v2.6 and newer */ 582 #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 583 #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 584 #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 585 #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 586 #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 587 #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 588 #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 589 #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 590 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 591 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 592 #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 593 594 595 /* SCSI Enclosure Processor Reply Message */ 596 typedef struct _MPI2_SEP_REPLY 597 { 598 U16 DevHandle; /* 0x00 */ 599 U8 MsgLength; /* 0x02 */ 600 U8 Function; /* 0x03 */ 601 U8 Action; /* 0x04 */ 602 U8 Flags; /* 0x05 */ 603 U8 Reserved1; /* 0x06 */ 604 U8 MsgFlags; /* 0x07 */ 605 U8 VP_ID; /* 0x08 */ 606 U8 VF_ID; /* 0x09 */ 607 U16 Reserved2; /* 0x0A */ 608 U16 Reserved3; /* 0x0C */ 609 U16 IOCStatus; /* 0x0E */ 610 U32 IOCLogInfo; /* 0x10 */ 611 U32 SlotStatus; /* 0x14 */ 612 U32 Reserved4; /* 0x18 */ 613 U16 Slot; /* 0x1C */ 614 U16 EnclosureHandle; /* 0x1E */ 615 } MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY, 616 Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t; 617 618 /* SlotStatus defines */ 619 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x00080000) /* MPI v2.6 and newer */ 620 #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 621 #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 622 #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 623 #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 624 #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 625 #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 626 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 627 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 628 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 629 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 630 #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 631 632 633 #endif 634 635 636