1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Host communication command constants for ChromeOS EC 4 * 5 * Copyright (C) 2012 Google, Inc 6 * 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 9 */ 10 11 /* Host communication command constants for Chrome EC */ 12 13 #ifndef __CROS_EC_COMMANDS_H 14 #define __CROS_EC_COMMANDS_H 15 16 #include <linux/bits.h> 17 #include <linux/types.h> 18 19 #define BUILD_ASSERT(_cond) 20 21 /* 22 * Current version of this protocol 23 * 24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 25 * determined in other ways. Remove this once the kernel code no longer 26 * depends on it. 27 */ 28 #define EC_PROTO_VERSION 0x00000002 29 30 /* Command version mask */ 31 #define EC_VER_MASK(version) BIT(version) 32 33 /* I/O addresses for ACPI commands */ 34 #define EC_LPC_ADDR_ACPI_DATA 0x62 35 #define EC_LPC_ADDR_ACPI_CMD 0x66 36 37 /* I/O addresses for host command */ 38 #define EC_LPC_ADDR_HOST_DATA 0x200 39 #define EC_LPC_ADDR_HOST_CMD 0x204 40 41 /* I/O addresses for host command args and params */ 42 /* Protocol version 2 */ 43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 * EC_PROTO2_MAX_PARAM_SIZE 46 */ 47 /* Protocol version 3 */ 48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 50 51 /* 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 53 * and they tell the kernel that so we have to think of it as two parts. 54 * 55 * Other BIOSes report only the I/O port region spanned by the Microchip 56 * MEC series EC; an attempt to address a larger region may fail. 57 */ 58 #define EC_HOST_CMD_REGION0 0x800 59 #define EC_HOST_CMD_REGION1 0x880 60 #define EC_HOST_CMD_REGION_SIZE 0x80 61 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8 62 63 /* EC command register bit functions */ 64 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 65 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 66 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 67 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 68 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 69 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 70 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 71 72 #define EC_LPC_ADDR_MEMMAP 0x900 73 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 74 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 75 76 /* The offset address of each type of data in mapped memory. */ 77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 80 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 85 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 86 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 87 /* Unused 0x28 - 0x2f */ 88 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 89 /* Unused 0x31 - 0x33 */ 90 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 91 /* Battery values are all 32 bits, unless otherwise noted. */ 92 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 93 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 94 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 95 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 96 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 97 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 98 /* Unused 0x4f */ 99 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 100 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 101 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 102 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 103 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 104 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 105 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 106 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 107 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 108 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 109 /* Unused 0x84 - 0x8f */ 110 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 111 /* Unused 0x91 */ 112 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 113 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 114 /* 0x94 - 0x99: 1st Accelerometer */ 115 /* 0x9a - 0x9f: 2nd Accelerometer */ 116 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 117 /* Unused 0xa6 - 0xdf */ 118 119 /* 120 * ACPI is unable to access memory mapped data at or above this offset due to 121 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 122 * which might be needed by ACPI. 123 */ 124 #define EC_MEMMAP_NO_ACPI 0xe0 125 126 /* Define the format of the accelerometer mapped memory status byte. */ 127 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 128 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 129 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 130 131 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 132 #define EC_TEMP_SENSOR_ENTRIES 16 133 /* 134 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 135 * 136 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 137 */ 138 #define EC_TEMP_SENSOR_B_ENTRIES 8 139 140 /* Special values for mapped temperature sensors */ 141 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 142 #define EC_TEMP_SENSOR_ERROR 0xfe 143 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 144 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 145 /* 146 * The offset of temperature value stored in mapped memory. This allows 147 * reporting a temperature range of 200K to 454K = -73C to 181C. 148 */ 149 #define EC_TEMP_SENSOR_OFFSET 200 150 151 /* 152 * Number of ALS readings at EC_MEMMAP_ALS 153 */ 154 #define EC_ALS_ENTRIES 2 155 156 /* 157 * The default value a temperature sensor will return when it is present but 158 * has not been read this boot. This is a reasonable number to avoid 159 * triggering alarms on the host. 160 */ 161 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 162 163 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 164 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 165 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 166 167 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 168 #define EC_BATT_FLAG_AC_PRESENT 0x01 169 #define EC_BATT_FLAG_BATT_PRESENT 0x02 170 #define EC_BATT_FLAG_DISCHARGING 0x04 171 #define EC_BATT_FLAG_CHARGING 0x08 172 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 173 /* Set if some of the static/dynamic data is invalid (or outdated). */ 174 #define EC_BATT_FLAG_INVALID_DATA 0x20 175 176 /* Switch flags at EC_MEMMAP_SWITCHES */ 177 #define EC_SWITCH_LID_OPEN 0x01 178 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 179 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 180 /* Was recovery requested via keyboard; now unused. */ 181 #define EC_SWITCH_IGNORE1 0x08 182 /* Recovery requested via dedicated signal (from servo board) */ 183 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 184 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 185 #define EC_SWITCH_IGNORE0 0x20 186 187 /* Host command interface flags */ 188 /* Host command interface supports LPC args (LPC interface only) */ 189 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 190 /* Host command interface supports version 3 protocol */ 191 #define EC_HOST_CMD_FLAG_VERSION_3 0x02 192 193 /* Wireless switch flags */ 194 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 195 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 196 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 197 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 198 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 199 200 /*****************************************************************************/ 201 /* 202 * ACPI commands 203 * 204 * These are valid ONLY on the ACPI command/data port. 205 */ 206 207 /* 208 * ACPI Read Embedded Controller 209 * 210 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 211 * 212 * Use the following sequence: 213 * 214 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 215 * - Wait for EC_LPC_CMDR_PENDING bit to clear 216 * - Write address to EC_LPC_ADDR_ACPI_DATA 217 * - Wait for EC_LPC_CMDR_DATA bit to set 218 * - Read value from EC_LPC_ADDR_ACPI_DATA 219 */ 220 #define EC_CMD_ACPI_READ 0x0080 221 222 /* 223 * ACPI Write Embedded Controller 224 * 225 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 226 * 227 * Use the following sequence: 228 * 229 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 230 * - Wait for EC_LPC_CMDR_PENDING bit to clear 231 * - Write address to EC_LPC_ADDR_ACPI_DATA 232 * - Wait for EC_LPC_CMDR_PENDING bit to clear 233 * - Write value to EC_LPC_ADDR_ACPI_DATA 234 */ 235 #define EC_CMD_ACPI_WRITE 0x0081 236 237 /* 238 * ACPI Burst Enable Embedded Controller 239 * 240 * This enables burst mode on the EC to allow the host to issue several 241 * commands back-to-back. While in this mode, writes to mapped multi-byte 242 * data are locked out to ensure data consistency. 243 */ 244 #define EC_CMD_ACPI_BURST_ENABLE 0x0082 245 246 /* 247 * ACPI Burst Disable Embedded Controller 248 * 249 * This disables burst mode on the EC and stops preventing EC writes to mapped 250 * multi-byte data. 251 */ 252 #define EC_CMD_ACPI_BURST_DISABLE 0x0083 253 254 /* 255 * ACPI Query Embedded Controller 256 * 257 * This clears the lowest-order bit in the currently pending host events, and 258 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 259 * event 0x80000000 = 32), or 0 if no event was pending. 260 */ 261 #define EC_CMD_ACPI_QUERY_EVENT 0x0084 262 263 /* Valid addresses in ACPI memory space, for read/write commands */ 264 265 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 266 #define EC_ACPI_MEM_VERSION 0x00 267 /* 268 * Test location; writing value here updates test compliment byte to (0xff - 269 * value). 270 */ 271 #define EC_ACPI_MEM_TEST 0x01 272 /* Test compliment; writes here are ignored. */ 273 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 274 275 /* Keyboard backlight brightness percent (0 - 100) */ 276 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 277 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 278 #define EC_ACPI_MEM_FAN_DUTY 0x04 279 280 /* 281 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 282 * independent thresholds attached to them. The current value of the ID 283 * register determines which sensor is affected by the THRESHOLD and COMMIT 284 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 285 * as the memory-mapped sensors. The COMMIT register applies those settings. 286 * 287 * The spec does not mandate any way to read back the threshold settings 288 * themselves, but when a threshold is crossed the AP needs a way to determine 289 * which sensor(s) are responsible. Each reading of the ID register clears and 290 * returns one sensor ID that has crossed one of its threshold (in either 291 * direction) since the last read. A value of 0xFF means "no new thresholds 292 * have tripped". Setting or enabling the thresholds for a sensor will clear 293 * the unread event count for that sensor. 294 */ 295 #define EC_ACPI_MEM_TEMP_ID 0x05 296 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 297 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 298 /* 299 * Here are the bits for the COMMIT register: 300 * bit 0 selects the threshold index for the chosen sensor (0/1) 301 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 302 * Each write to the commit register affects one threshold. 303 */ 304 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 305 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 306 /* 307 * Example: 308 * 309 * Set the thresholds for sensor 2 to 50 C and 60 C: 310 * write 2 to [0x05] -- select temp sensor 2 311 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 312 * write 0x2 to [0x07] -- enable threshold 0 with this value 313 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 314 * write 0x3 to [0x07] -- enable threshold 1 with this value 315 * 316 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 317 * write 2 to [0x05] -- select temp sensor 2 318 * write 0x1 to [0x07] -- disable threshold 1 319 */ 320 321 /* DPTF battery charging current limit */ 322 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 323 324 /* Charging limit is specified in 64 mA steps */ 325 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 326 /* Value to disable DPTF battery charging limit */ 327 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 328 329 /* 330 * Report device orientation 331 * Bits Definition 332 * 3:1 Device DPTF Profile Number (DDPN) 333 * 0 = Reserved for backward compatibility (indicates no valid 334 * profile number. Host should fall back to using TBMD). 335 * 1..7 = DPTF Profile number to indicate to host which table needs 336 * to be loaded. 337 * 0 Tablet Mode Device Indicator (TBMD) 338 */ 339 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 340 #define EC_ACPI_MEM_TBMD_SHIFT 0 341 #define EC_ACPI_MEM_TBMD_MASK 0x1 342 #define EC_ACPI_MEM_DDPN_SHIFT 1 343 #define EC_ACPI_MEM_DDPN_MASK 0x7 344 345 /* 346 * Report device features. Uses the same format as the host command, except: 347 * 348 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 349 * of features", which is of limited interest when the system is already 350 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 351 * these are supported, it defaults to 0. 352 * This allows detecting the presence of this field since older versions of 353 * the EC codebase would simply return 0xff to that unknown address. Check 354 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 355 * are valid. 356 */ 357 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 358 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 359 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 360 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 361 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 362 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 363 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 364 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 365 366 #define EC_ACPI_MEM_BATTERY_INDEX 0x12 367 368 /* 369 * USB Port Power. Each bit indicates whether the corresponding USB ports' power 370 * is enabled (1) or disabled (0). 371 * bit 0 USB port ID 0 372 * ... 373 * bit 7 USB port ID 7 374 */ 375 #define EC_ACPI_MEM_USB_PORT_POWER 0x13 376 377 /* 378 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 379 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 380 */ 381 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 382 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 383 384 /* Current version of ACPI memory address space */ 385 #define EC_ACPI_MEM_VERSION_CURRENT 2 386 387 388 /* 389 * This header file is used in coreboot both in C and ACPI code. The ACPI code 390 * is pre-processed to handle constants but the ASL compiler is unable to 391 * handle actual C code so keep it separate. 392 */ 393 394 395 /* 396 * Attributes for EC request and response packets. Just defining __packed 397 * results in inefficient assembly code on ARM, if the structure is actually 398 * 32-bit aligned, as it should be for all buffers. 399 * 400 * Be very careful when adding these to existing structures. They will round 401 * up the structure size to the specified boundary. 402 * 403 * Also be very careful to make that if a structure is included in some other 404 * parent structure that the alignment will still be true given the packing of 405 * the parent structure. This is particularly important if the sub-structure 406 * will be passed as a pointer to another function, since that function will 407 * not know about the misaligment caused by the parent structure's packing. 408 * 409 * Also be very careful using __packed - particularly when nesting non-packed 410 * structures inside packed ones. In fact, DO NOT use __packed directly; 411 * always use one of these attributes. 412 * 413 * Once everything is annotated properly, the following search strings should 414 * not return ANY matches in this file other than right here: 415 * 416 * "__packed" - generates inefficient code; all sub-structs must also be packed 417 * 418 * "struct [^_]" - all structs should be annotated, except for structs that are 419 * members of other structs/unions (and their original declarations should be 420 * annotated). 421 */ 422 423 /* 424 * Packed structures make no assumption about alignment, so they do inefficient 425 * byte-wise reads. 426 */ 427 #define __ec_align1 __packed 428 #define __ec_align2 __packed 429 #define __ec_align4 __packed 430 #define __ec_align_size1 __packed 431 #define __ec_align_offset1 __packed 432 #define __ec_align_offset2 __packed 433 #define __ec_todo_packed __packed 434 #define __ec_todo_unpacked 435 436 437 /* LPC command status byte masks */ 438 /* EC has written a byte in the data register and host hasn't read it yet */ 439 #define EC_LPC_STATUS_TO_HOST 0x01 440 /* Host has written a command/data byte and the EC hasn't read it yet */ 441 #define EC_LPC_STATUS_FROM_HOST 0x02 442 /* EC is processing a command */ 443 #define EC_LPC_STATUS_PROCESSING 0x04 444 /* Last write to EC was a command, not data */ 445 #define EC_LPC_STATUS_LAST_CMD 0x08 446 /* EC is in burst mode */ 447 #define EC_LPC_STATUS_BURST_MODE 0x10 448 /* SCI event is pending (requesting SCI query) */ 449 #define EC_LPC_STATUS_SCI_PENDING 0x20 450 /* SMI event is pending (requesting SMI query) */ 451 #define EC_LPC_STATUS_SMI_PENDING 0x40 452 /* (reserved) */ 453 #define EC_LPC_STATUS_RESERVED 0x80 454 455 /* 456 * EC is busy. This covers both the EC processing a command, and the host has 457 * written a new command but the EC hasn't picked it up yet. 458 */ 459 #define EC_LPC_STATUS_BUSY_MASK \ 460 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 461 462 /* 463 * Host command response codes (16-bit). Note that response codes should be 464 * stored in a uint16_t rather than directly in a value of this type. 465 */ 466 enum ec_status { 467 EC_RES_SUCCESS = 0, 468 EC_RES_INVALID_COMMAND = 1, 469 EC_RES_ERROR = 2, 470 EC_RES_INVALID_PARAM = 3, 471 EC_RES_ACCESS_DENIED = 4, 472 EC_RES_INVALID_RESPONSE = 5, 473 EC_RES_INVALID_VERSION = 6, 474 EC_RES_INVALID_CHECKSUM = 7, 475 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 476 EC_RES_UNAVAILABLE = 9, /* No response available */ 477 EC_RES_TIMEOUT = 10, /* We got a timeout */ 478 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 479 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 480 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 481 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 482 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 483 EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 484 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 485 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 486 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 487 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 488 }; 489 490 /* 491 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 492 * EC command uses code 0 to mean "no event pending". We explicitly specify 493 * each value in the enum listing so they won't change if we delete/insert an 494 * item or rearrange the list (it needs to be stable across platforms, not 495 * just within a single compiled instance). 496 */ 497 enum host_event_code { 498 EC_HOST_EVENT_LID_CLOSED = 1, 499 EC_HOST_EVENT_LID_OPEN = 2, 500 EC_HOST_EVENT_POWER_BUTTON = 3, 501 EC_HOST_EVENT_AC_CONNECTED = 4, 502 EC_HOST_EVENT_AC_DISCONNECTED = 5, 503 EC_HOST_EVENT_BATTERY_LOW = 6, 504 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 505 EC_HOST_EVENT_BATTERY = 8, 506 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 507 /* Event generated by a device attached to the EC */ 508 EC_HOST_EVENT_DEVICE = 10, 509 EC_HOST_EVENT_THERMAL = 11, 510 EC_HOST_EVENT_USB_CHARGER = 12, 511 EC_HOST_EVENT_KEY_PRESSED = 13, 512 /* 513 * EC has finished initializing the host interface. The host can check 514 * for this event following sending a EC_CMD_REBOOT_EC command to 515 * determine when the EC is ready to accept subsequent commands. 516 */ 517 EC_HOST_EVENT_INTERFACE_READY = 14, 518 /* Keyboard recovery combo has been pressed */ 519 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 520 521 /* Shutdown due to thermal overload */ 522 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 523 /* Shutdown due to battery level too low */ 524 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 525 526 /* Suggest that the AP throttle itself */ 527 EC_HOST_EVENT_THROTTLE_START = 18, 528 /* Suggest that the AP resume normal speed */ 529 EC_HOST_EVENT_THROTTLE_STOP = 19, 530 531 /* Hang detect logic detected a hang and host event timeout expired */ 532 EC_HOST_EVENT_HANG_DETECT = 20, 533 /* Hang detect logic detected a hang and warm rebooted the AP */ 534 EC_HOST_EVENT_HANG_REBOOT = 21, 535 536 /* PD MCU triggering host event */ 537 EC_HOST_EVENT_PD_MCU = 22, 538 539 /* Battery Status flags have changed */ 540 EC_HOST_EVENT_BATTERY_STATUS = 23, 541 542 /* EC encountered a panic, triggering a reset */ 543 EC_HOST_EVENT_PANIC = 24, 544 545 /* Keyboard fastboot combo has been pressed */ 546 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 547 548 /* EC RTC event occurred */ 549 EC_HOST_EVENT_RTC = 26, 550 551 /* Emulate MKBP event */ 552 EC_HOST_EVENT_MKBP = 27, 553 554 /* EC desires to change state of host-controlled USB mux */ 555 EC_HOST_EVENT_USB_MUX = 28, 556 557 /* TABLET/LAPTOP mode or detachable base attach/detach event */ 558 EC_HOST_EVENT_MODE_CHANGE = 29, 559 560 /* Keyboard recovery combo with hardware reinitialization */ 561 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 562 563 /* WoV */ 564 EC_HOST_EVENT_WOV = 31, 565 566 /* 567 * The high bit of the event mask is not used as a host event code. If 568 * it reads back as set, then the entire event mask should be 569 * considered invalid by the host. This can happen when reading the 570 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 571 * not initialized on the EC, or improperly configured on the host. 572 */ 573 EC_HOST_EVENT_INVALID = 32 574 }; 575 /* Host event mask */ 576 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 577 578 /** 579 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS 580 * @flags: The host argument flags. 581 * @command_version: Command version. 582 * @data_size: The length of data. 583 * @checksum: Checksum; sum of command + flags + command_version + data_size + 584 * all params/response data bytes. 585 */ 586 struct ec_lpc_host_args { 587 uint8_t flags; 588 uint8_t command_version; 589 uint8_t data_size; 590 uint8_t checksum; 591 } __ec_align4; 592 593 /* Flags for ec_lpc_host_args.flags */ 594 /* 595 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 596 * params. 597 * 598 * If EC gets a command and this flag is not set, this is an old-style command. 599 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 600 * unknown length. EC must respond with an old-style response (that is, 601 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 602 */ 603 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 604 /* 605 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 606 * 607 * If EC responds to a command and this flag is not set, this is an old-style 608 * response. Command version is 0 and response data from EC is at 609 * EC_LPC_ADDR_OLD_PARAM with unknown length. 610 */ 611 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 612 613 /*****************************************************************************/ 614 /* 615 * Byte codes returned by EC over SPI interface. 616 * 617 * These can be used by the AP to debug the EC interface, and to determine 618 * when the EC is not in a state where it will ever get around to responding 619 * to the AP. 620 * 621 * Example of sequence of bytes read from EC for a current good transfer: 622 * 1. - - AP asserts chip select (CS#) 623 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 624 * 3. - - EC starts handling CS# interrupt 625 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 626 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 627 * bytes looking for EC_SPI_FRAME_START 628 * 6. - - EC finishes processing and sets up response 629 * 7. EC_SPI_FRAME_START - AP reads frame byte 630 * 8. (response packet) - AP reads response packet 631 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 632 * 10 - - AP deasserts chip select 633 * 11 - - EC processes CS# interrupt and sets up DMA for 634 * next request 635 * 636 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 637 * the following byte values: 638 * EC_SPI_OLD_READY 639 * EC_SPI_RX_READY 640 * EC_SPI_RECEIVING 641 * EC_SPI_PROCESSING 642 * 643 * Then the EC found an error in the request, or was not ready for the request 644 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 645 * because the EC is unable to tell when the AP is done sending its request. 646 */ 647 648 /* 649 * Framing byte which precedes a response packet from the EC. After sending a 650 * request, the AP will clock in bytes until it sees the framing byte, then 651 * clock in the response packet. 652 */ 653 #define EC_SPI_FRAME_START 0xec 654 655 /* 656 * Padding bytes which are clocked out after the end of a response packet. 657 */ 658 #define EC_SPI_PAST_END 0xed 659 660 /* 661 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 662 * that the AP will send a valid packet header (starting with 663 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 664 */ 665 #define EC_SPI_RX_READY 0xf8 666 667 /* 668 * EC has started receiving the request from the AP, but hasn't started 669 * processing it yet. 670 */ 671 #define EC_SPI_RECEIVING 0xf9 672 673 /* EC has received the entire request from the AP and is processing it. */ 674 #define EC_SPI_PROCESSING 0xfa 675 676 /* 677 * EC received bad data from the AP, such as a packet header with an invalid 678 * length. EC will ignore all data until chip select deasserts. 679 */ 680 #define EC_SPI_RX_BAD_DATA 0xfb 681 682 /* 683 * EC received data from the AP before it was ready. That is, the AP asserted 684 * chip select and started clocking data before the EC was ready to receive it. 685 * EC will ignore all data until chip select deasserts. 686 */ 687 #define EC_SPI_NOT_READY 0xfc 688 689 /* 690 * EC was ready to receive a request from the AP. EC has treated the byte sent 691 * by the AP as part of a request packet, or (for old-style ECs) is processing 692 * a fully received packet but is not ready to respond yet. 693 */ 694 #define EC_SPI_OLD_READY 0xfd 695 696 /*****************************************************************************/ 697 698 /* 699 * Protocol version 2 for I2C and SPI send a request this way: 700 * 701 * 0 EC_CMD_VERSION0 + (command version) 702 * 1 Command number 703 * 2 Length of params = N 704 * 3..N+2 Params, if any 705 * N+3 8-bit checksum of bytes 0..N+2 706 * 707 * The corresponding response is: 708 * 709 * 0 Result code (EC_RES_*) 710 * 1 Length of params = M 711 * 2..M+1 Params, if any 712 * M+2 8-bit checksum of bytes 0..M+1 713 */ 714 #define EC_PROTO2_REQUEST_HEADER_BYTES 3 715 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 716 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 717 EC_PROTO2_REQUEST_TRAILER_BYTES) 718 719 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 720 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 721 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 722 EC_PROTO2_RESPONSE_TRAILER_BYTES) 723 724 /* Parameter length was limited by the LPC interface */ 725 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc 726 727 /* Maximum request and response packet sizes for protocol version 2 */ 728 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 729 EC_PROTO2_MAX_PARAM_SIZE) 730 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 731 EC_PROTO2_MAX_PARAM_SIZE) 732 733 /*****************************************************************************/ 734 735 /* 736 * Value written to legacy command port / prefix byte to indicate protocol 737 * 3+ structs are being used. Usage is bus-dependent. 738 */ 739 #define EC_COMMAND_PROTOCOL_3 0xda 740 741 #define EC_HOST_REQUEST_VERSION 3 742 743 /** 744 * struct ec_host_request - Version 3 request from host. 745 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it 746 * receives a header with a version it doesn't know how to 747 * parse. 748 * @checksum: Checksum of request and data; sum of all bytes including checksum 749 * should total to 0. 750 * @command: Command to send (EC_CMD_...) 751 * @command_version: Command version. 752 * @reserved: Unused byte in current protocol version; set to 0. 753 * @data_len: Length of data which follows this header. 754 */ 755 struct ec_host_request { 756 uint8_t struct_version; 757 uint8_t checksum; 758 uint16_t command; 759 uint8_t command_version; 760 uint8_t reserved; 761 uint16_t data_len; 762 } __ec_align4; 763 764 #define EC_HOST_RESPONSE_VERSION 3 765 766 /** 767 * struct ec_host_response - Version 3 response from EC. 768 * @struct_version: Struct version (=3). 769 * @checksum: Checksum of response and data; sum of all bytes including 770 * checksum should total to 0. 771 * @result: EC's response to the command (separate from communication failure) 772 * @data_len: Length of data which follows this header. 773 * @reserved: Unused bytes in current protocol version; set to 0. 774 */ 775 struct ec_host_response { 776 uint8_t struct_version; 777 uint8_t checksum; 778 uint16_t result; 779 uint16_t data_len; 780 uint16_t reserved; 781 } __ec_align4; 782 783 /*****************************************************************************/ 784 785 /* 786 * Host command protocol V4. 787 * 788 * Packets always start with a request or response header. They are followed 789 * by data_len bytes of data. If the data_crc_present flag is set, the data 790 * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1 791 * polynomial. 792 * 793 * Host algorithm when sending a request q: 794 * 795 * 101) tries_left=(some value, e.g. 3); 796 * 102) q.seq_num++ 797 * 103) q.seq_dup=0 798 * 104) Calculate q.header_crc. 799 * 105) Send request q to EC. 800 * 106) Wait for response r. Go to 201 if received or 301 if timeout. 801 * 802 * 201) If r.struct_version != 4, go to 301. 803 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 804 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 805 * 204) If r.seq_num != q.seq_num, go to 301. 806 * 205) If r.seq_dup == q.seq_dup, return success. 807 * 207) If r.seq_dup == 1, go to 301. 808 * 208) Return error. 809 * 810 * 301) If --tries_left <= 0, return error. 811 * 302) If q.seq_dup == 1, go to 105. 812 * 303) q.seq_dup = 1 813 * 304) Go to 104. 814 * 815 * EC algorithm when receiving a request q. 816 * EC has response buffer r, error buffer e. 817 * 818 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 819 * and go to 301 820 * 102) If q.header_crc mismatches calculated CRC, set e.result = 821 * EC_RES_INVALID_HEADER_CRC and go to 301 822 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 823 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 824 * and go to 301. 825 * 104) If q.seq_dup == 0, go to 201. 826 * 105) If q.seq_num != r.seq_num, go to 201. 827 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 828 * 829 * 201) Process request q into response r. 830 * 202) r.seq_num = q.seq_num 831 * 203) r.seq_dup = q.seq_dup 832 * 204) Calculate r.header_crc 833 * 205) If r.data_len > 0 and data is no longer available, set e.result = 834 * EC_RES_DUP_UNAVAILABLE and go to 301. 835 * 206) Send response r. 836 * 837 * 301) e.seq_num = q.seq_num 838 * 302) e.seq_dup = q.seq_dup 839 * 303) Calculate e.header_crc. 840 * 304) Send error response e. 841 */ 842 843 /* Version 4 request from host */ 844 struct ec_host_request4 { 845 /* 846 * bits 0-3: struct_version: Structure version (=4) 847 * bit 4: is_response: Is response (=0) 848 * bits 5-6: seq_num: Sequence number 849 * bit 7: seq_dup: Sequence duplicate flag 850 */ 851 uint8_t fields0; 852 853 /* 854 * bits 0-4: command_version: Command version 855 * bits 5-6: Reserved (set 0, ignore on read) 856 * bit 7: data_crc_present: Is data CRC present after data 857 */ 858 uint8_t fields1; 859 860 /* Command code (EC_CMD_*) */ 861 uint16_t command; 862 863 /* Length of data which follows this header (not including data CRC) */ 864 uint16_t data_len; 865 866 /* Reserved (set 0, ignore on read) */ 867 uint8_t reserved; 868 869 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 870 uint8_t header_crc; 871 } __ec_align4; 872 873 /* Version 4 response from EC */ 874 struct ec_host_response4 { 875 /* 876 * bits 0-3: struct_version: Structure version (=4) 877 * bit 4: is_response: Is response (=1) 878 * bits 5-6: seq_num: Sequence number 879 * bit 7: seq_dup: Sequence duplicate flag 880 */ 881 uint8_t fields0; 882 883 /* 884 * bits 0-6: Reserved (set 0, ignore on read) 885 * bit 7: data_crc_present: Is data CRC present after data 886 */ 887 uint8_t fields1; 888 889 /* Result code (EC_RES_*) */ 890 uint16_t result; 891 892 /* Length of data which follows this header (not including data CRC) */ 893 uint16_t data_len; 894 895 /* Reserved (set 0, ignore on read) */ 896 uint8_t reserved; 897 898 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 899 uint8_t header_crc; 900 } __ec_align4; 901 902 /* Fields in fields0 byte */ 903 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 904 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 905 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 906 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 907 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 908 909 /* Fields in fields1 byte */ 910 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 911 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 912 913 /*****************************************************************************/ 914 /* 915 * Notes on commands: 916 * 917 * Each command is an 16-bit command value. Commands which take params or 918 * return response data specify structures for that data. If no structure is 919 * specified, the command does not input or output data, respectively. 920 * Parameter/response length is implicit in the structs. Some underlying 921 * communication protocols (I2C, SPI) may add length or checksum headers, but 922 * those are implementation-dependent and not defined here. 923 * 924 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 925 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 926 */ 927 928 /*****************************************************************************/ 929 /* General / test commands */ 930 931 /* 932 * Get protocol version, used to deal with non-backward compatible protocol 933 * changes. 934 */ 935 #define EC_CMD_PROTO_VERSION 0x0000 936 937 /** 938 * struct ec_response_proto_version - Response to the proto version command. 939 * @version: The protocol version. 940 */ 941 struct ec_response_proto_version { 942 uint32_t version; 943 } __ec_align4; 944 945 /* 946 * Hello. This is a simple command to test the EC is responsive to 947 * commands. 948 */ 949 #define EC_CMD_HELLO 0x0001 950 951 /** 952 * struct ec_params_hello - Parameters to the hello command. 953 * @in_data: Pass anything here. 954 */ 955 struct ec_params_hello { 956 uint32_t in_data; 957 } __ec_align4; 958 959 /** 960 * struct ec_response_hello - Response to the hello command. 961 * @out_data: Output will be in_data + 0x01020304. 962 */ 963 struct ec_response_hello { 964 uint32_t out_data; 965 } __ec_align4; 966 967 /* Get version number */ 968 #define EC_CMD_GET_VERSION 0x0002 969 970 enum ec_current_image { 971 EC_IMAGE_UNKNOWN = 0, 972 EC_IMAGE_RO, 973 EC_IMAGE_RW 974 }; 975 976 /** 977 * struct ec_response_get_version - Response to the get version command. 978 * @version_string_ro: Null-terminated RO firmware version string. 979 * @version_string_rw: Null-terminated RW firmware version string. 980 * @reserved: Unused bytes; was previously RW-B firmware version string. 981 * @current_image: One of ec_current_image. 982 */ 983 struct ec_response_get_version { 984 char version_string_ro[32]; 985 char version_string_rw[32]; 986 char reserved[32]; 987 uint32_t current_image; 988 } __ec_align4; 989 990 /* Read test */ 991 #define EC_CMD_READ_TEST 0x0003 992 993 /** 994 * struct ec_params_read_test - Parameters for the read test command. 995 * @offset: Starting value for read buffer. 996 * @size: Size to read in bytes. 997 */ 998 struct ec_params_read_test { 999 uint32_t offset; 1000 uint32_t size; 1001 } __ec_align4; 1002 1003 /** 1004 * struct ec_response_read_test - Response to the read test command. 1005 * @data: Data returned by the read test command. 1006 */ 1007 struct ec_response_read_test { 1008 uint32_t data[32]; 1009 } __ec_align4; 1010 1011 /* 1012 * Get build information 1013 * 1014 * Response is null-terminated string. 1015 */ 1016 #define EC_CMD_GET_BUILD_INFO 0x0004 1017 1018 /* Get chip info */ 1019 #define EC_CMD_GET_CHIP_INFO 0x0005 1020 1021 /** 1022 * struct ec_response_get_chip_info - Response to the get chip info command. 1023 * @vendor: Null-terminated string for chip vendor. 1024 * @name: Null-terminated string for chip name. 1025 * @revision: Null-terminated string for chip mask version. 1026 */ 1027 struct ec_response_get_chip_info { 1028 char vendor[32]; 1029 char name[32]; 1030 char revision[32]; 1031 } __ec_align4; 1032 1033 /* Get board HW version */ 1034 #define EC_CMD_GET_BOARD_VERSION 0x0006 1035 1036 /** 1037 * struct ec_response_board_version - Response to the board version command. 1038 * @board_version: A monotonously incrementing number. 1039 */ 1040 struct ec_response_board_version { 1041 uint16_t board_version; 1042 } __ec_align2; 1043 1044 /* 1045 * Read memory-mapped data. 1046 * 1047 * This is an alternate interface to memory-mapped data for bus protocols 1048 * which don't support direct-mapped memory - I2C, SPI, etc. 1049 * 1050 * Response is params.size bytes of data. 1051 */ 1052 #define EC_CMD_READ_MEMMAP 0x0007 1053 1054 /** 1055 * struct ec_params_read_memmap - Parameters for the read memory map command. 1056 * @offset: Offset in memmap (EC_MEMMAP_*). 1057 * @size: Size to read in bytes. 1058 */ 1059 struct ec_params_read_memmap { 1060 uint8_t offset; 1061 uint8_t size; 1062 } __ec_align1; 1063 1064 /* Read versions supported for a command */ 1065 #define EC_CMD_GET_CMD_VERSIONS 0x0008 1066 1067 /** 1068 * struct ec_params_get_cmd_versions - Parameters for the get command versions. 1069 * @cmd: Command to check. 1070 */ 1071 struct ec_params_get_cmd_versions { 1072 uint8_t cmd; 1073 } __ec_align1; 1074 1075 /** 1076 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command 1077 * versions (v1) 1078 * @cmd: Command to check. 1079 */ 1080 struct ec_params_get_cmd_versions_v1 { 1081 uint16_t cmd; 1082 } __ec_align2; 1083 1084 /** 1085 * struct ec_response_get_cmd_versions - Response to the get command versions. 1086 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with 1087 * a desired version. 1088 */ 1089 struct ec_response_get_cmd_versions { 1090 uint32_t version_mask; 1091 } __ec_align4; 1092 1093 /* 1094 * Check EC communications status (busy). This is needed on i2c/spi but not 1095 * on lpc since it has its own out-of-band busy indicator. 1096 * 1097 * lpc must read the status from the command register. Attempting this on 1098 * lpc will overwrite the args/parameter space and corrupt its data. 1099 */ 1100 #define EC_CMD_GET_COMMS_STATUS 0x0009 1101 1102 /* Avoid using ec_status which is for return values */ 1103 enum ec_comms_status { 1104 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1105 }; 1106 1107 /** 1108 * struct ec_response_get_comms_status - Response to the get comms status 1109 * command. 1110 * @flags: Mask of enum ec_comms_status. 1111 */ 1112 struct ec_response_get_comms_status { 1113 uint32_t flags; /* Mask of enum ec_comms_status */ 1114 } __ec_align4; 1115 1116 /* Fake a variety of responses, purely for testing purposes. */ 1117 #define EC_CMD_TEST_PROTOCOL 0x000A 1118 1119 /* Tell the EC what to send back to us. */ 1120 struct ec_params_test_protocol { 1121 uint32_t ec_result; 1122 uint32_t ret_len; 1123 uint8_t buf[32]; 1124 } __ec_align4; 1125 1126 /* Here it comes... */ 1127 struct ec_response_test_protocol { 1128 uint8_t buf[32]; 1129 } __ec_align4; 1130 1131 /* Get protocol information */ 1132 #define EC_CMD_GET_PROTOCOL_INFO 0x000B 1133 1134 /* Flags for ec_response_get_protocol_info.flags */ 1135 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1136 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1137 1138 /** 1139 * struct ec_response_get_protocol_info - Response to the get protocol info. 1140 * @protocol_versions: Bitmask of protocol versions supported (1 << n means 1141 * version n). 1142 * @max_request_packet_size: Maximum request packet size in bytes. 1143 * @max_response_packet_size: Maximum response packet size in bytes. 1144 * @flags: see EC_PROTOCOL_INFO_* 1145 */ 1146 struct ec_response_get_protocol_info { 1147 /* Fields which exist if at least protocol version 3 supported */ 1148 uint32_t protocol_versions; 1149 uint16_t max_request_packet_size; 1150 uint16_t max_response_packet_size; 1151 uint32_t flags; 1152 } __ec_align4; 1153 1154 1155 /*****************************************************************************/ 1156 /* Get/Set miscellaneous values */ 1157 1158 /* The upper byte of .flags tells what to do (nothing means "get") */ 1159 #define EC_GSV_SET 0x80000000 1160 1161 /* 1162 * The lower three bytes of .flags identifies the parameter, if that has 1163 * meaning for an individual command. 1164 */ 1165 #define EC_GSV_PARAM_MASK 0x00ffffff 1166 1167 struct ec_params_get_set_value { 1168 uint32_t flags; 1169 uint32_t value; 1170 } __ec_align4; 1171 1172 struct ec_response_get_set_value { 1173 uint32_t flags; 1174 uint32_t value; 1175 } __ec_align4; 1176 1177 /* More than one command can use these structs to get/set parameters. */ 1178 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1179 1180 /*****************************************************************************/ 1181 /* List the features supported by the firmware */ 1182 #define EC_CMD_GET_FEATURES 0x000D 1183 1184 /* Supported features */ 1185 enum ec_feature_code { 1186 /* 1187 * This image contains a limited set of features. Another image 1188 * in RW partition may support more features. 1189 */ 1190 EC_FEATURE_LIMITED = 0, 1191 /* 1192 * Commands for probing/reading/writing/erasing the flash in the 1193 * EC are present. 1194 */ 1195 EC_FEATURE_FLASH = 1, 1196 /* 1197 * Can control the fan speed directly. 1198 */ 1199 EC_FEATURE_PWM_FAN = 2, 1200 /* 1201 * Can control the intensity of the keyboard backlight. 1202 */ 1203 EC_FEATURE_PWM_KEYB = 3, 1204 /* 1205 * Support Google lightbar, introduced on Pixel. 1206 */ 1207 EC_FEATURE_LIGHTBAR = 4, 1208 /* Control of LEDs */ 1209 EC_FEATURE_LED = 5, 1210 /* Exposes an interface to control gyro and sensors. 1211 * The host goes through the EC to access these sensors. 1212 * In addition, the EC may provide composite sensors, like lid angle. 1213 */ 1214 EC_FEATURE_MOTION_SENSE = 6, 1215 /* The keyboard is controlled by the EC */ 1216 EC_FEATURE_KEYB = 7, 1217 /* The AP can use part of the EC flash as persistent storage. */ 1218 EC_FEATURE_PSTORE = 8, 1219 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1220 EC_FEATURE_PORT80 = 9, 1221 /* 1222 * Thermal management: include TMP specific commands. 1223 * Higher level than direct fan control. 1224 */ 1225 EC_FEATURE_THERMAL = 10, 1226 /* Can switch the screen backlight on/off */ 1227 EC_FEATURE_BKLIGHT_SWITCH = 11, 1228 /* Can switch the wifi module on/off */ 1229 EC_FEATURE_WIFI_SWITCH = 12, 1230 /* Monitor host events, through for example SMI or SCI */ 1231 EC_FEATURE_HOST_EVENTS = 13, 1232 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1233 EC_FEATURE_GPIO = 14, 1234 /* The EC can send i2c messages to downstream devices. */ 1235 EC_FEATURE_I2C = 15, 1236 /* Command to control charger are included */ 1237 EC_FEATURE_CHARGER = 16, 1238 /* Simple battery support. */ 1239 EC_FEATURE_BATTERY = 17, 1240 /* 1241 * Support Smart battery protocol 1242 * (Common Smart Battery System Interface Specification) 1243 */ 1244 EC_FEATURE_SMART_BATTERY = 18, 1245 /* EC can detect when the host hangs. */ 1246 EC_FEATURE_HANG_DETECT = 19, 1247 /* Report power information, for pit only */ 1248 EC_FEATURE_PMU = 20, 1249 /* Another Cros EC device is present downstream of this one */ 1250 EC_FEATURE_SUB_MCU = 21, 1251 /* Support USB Power delivery (PD) commands */ 1252 EC_FEATURE_USB_PD = 22, 1253 /* Control USB multiplexer, for audio through USB port for instance. */ 1254 EC_FEATURE_USB_MUX = 23, 1255 /* Motion Sensor code has an internal software FIFO */ 1256 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1257 /* Support temporary secure vstore */ 1258 EC_FEATURE_VSTORE = 25, 1259 /* EC decides on USB-C SS mux state, muxes configured by host */ 1260 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1261 /* EC has RTC feature that can be controlled by host commands */ 1262 EC_FEATURE_RTC = 27, 1263 /* The MCU exposes a Fingerprint sensor */ 1264 EC_FEATURE_FINGERPRINT = 28, 1265 /* The MCU exposes a Touchpad */ 1266 EC_FEATURE_TOUCHPAD = 29, 1267 /* The MCU has RWSIG task enabled */ 1268 EC_FEATURE_RWSIG = 30, 1269 /* EC has device events support */ 1270 EC_FEATURE_DEVICE_EVENT = 31, 1271 /* EC supports the unified wake masks for LPC/eSPI systems */ 1272 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1273 /* EC supports 64-bit host events */ 1274 EC_FEATURE_HOST_EVENT64 = 33, 1275 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1276 EC_FEATURE_EXEC_IN_RAM = 34, 1277 /* EC supports CEC commands */ 1278 EC_FEATURE_CEC = 35, 1279 /* EC supports tight sensor timestamping. */ 1280 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1281 /* 1282 * EC supports tablet mode detection aligned to Chrome and allows 1283 * setting of threshold by host command using 1284 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1285 */ 1286 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1287 /* The MCU is a System Companion Processor (SCP). */ 1288 EC_FEATURE_SCP = 39, 1289 /* The MCU is an Integrated Sensor Hub */ 1290 EC_FEATURE_ISH = 40, 1291 /* New TCPMv2 TYPEC_ prefaced commands supported */ 1292 EC_FEATURE_TYPEC_CMD = 41, 1293 /* 1294 * The EC will wait for direction from the AP to enter Type-C alternate 1295 * modes or USB4. 1296 */ 1297 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, 1298 /* 1299 * The EC will wait for an acknowledge from the AP after setting the 1300 * mux. 1301 */ 1302 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, 1303 /* 1304 * The EC supports entering and residing in S4. 1305 */ 1306 EC_FEATURE_S4_RESIDENCY = 44, 1307 /* 1308 * The EC supports the AP directing mux sets for the board. 1309 */ 1310 EC_FEATURE_TYPEC_AP_MUX_SET = 45, 1311 /* 1312 * The EC supports the AP composing VDMs for us to send. 1313 */ 1314 EC_FEATURE_TYPEC_AP_VDM_SEND = 46, 1315 /* 1316 * The EC supports system safe mode panic recovery. 1317 */ 1318 EC_FEATURE_SYSTEM_SAFE_MODE = 47, 1319 /* 1320 * The EC will reboot on runtime assertion failures. 1321 */ 1322 EC_FEATURE_ASSERT_REBOOTS = 48, 1323 /* 1324 * The EC image is built with tokenized logging enabled. 1325 */ 1326 EC_FEATURE_TOKENIZED_LOGGING = 49, 1327 /* 1328 * The EC supports triggering an STB dump. 1329 */ 1330 EC_FEATURE_AMD_STB_DUMP = 50, 1331 /* 1332 * The EC supports memory dump commands. 1333 */ 1334 EC_FEATURE_MEMORY_DUMP = 51, 1335 /* 1336 * The EC supports DP2.1 capability 1337 */ 1338 EC_FEATURE_TYPEC_DP2_1 = 52, 1339 /* 1340 * The MCU is System Companion Processor Core 1 1341 */ 1342 EC_FEATURE_SCP_C1 = 53, 1343 /* 1344 * The EC supports UCSI PPM. 1345 */ 1346 EC_FEATURE_UCSI_PPM = 54, 1347 }; 1348 1349 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1350 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1351 1352 struct ec_response_get_features { 1353 uint32_t flags[2]; 1354 } __ec_align4; 1355 1356 /*****************************************************************************/ 1357 /* Get the board's SKU ID from EC */ 1358 #define EC_CMD_GET_SKU_ID 0x000E 1359 1360 /* Set SKU ID from AP */ 1361 #define EC_CMD_SET_SKU_ID 0x000F 1362 1363 struct ec_sku_id_info { 1364 uint32_t sku_id; 1365 } __ec_align4; 1366 1367 /*****************************************************************************/ 1368 /* Flash commands */ 1369 1370 /* Get flash info */ 1371 #define EC_CMD_FLASH_INFO 0x0010 1372 #define EC_VER_FLASH_INFO 2 1373 1374 /** 1375 * struct ec_response_flash_info - Response to the flash info command. 1376 * @flash_size: Usable flash size in bytes. 1377 * @write_block_size: Write block size. Write offset and size must be a 1378 * multiple of this. 1379 * @erase_block_size: Erase block size. Erase offset and size must be a 1380 * multiple of this. 1381 * @protect_block_size: Protection block size. Protection offset and size 1382 * must be a multiple of this. 1383 * 1384 * Version 0 returns these fields. 1385 */ 1386 struct ec_response_flash_info { 1387 uint32_t flash_size; 1388 uint32_t write_block_size; 1389 uint32_t erase_block_size; 1390 uint32_t protect_block_size; 1391 } __ec_align4; 1392 1393 /* 1394 * Flags for version 1+ flash info command 1395 * EC flash erases bits to 0 instead of 1. 1396 */ 1397 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 1398 1399 /* 1400 * Flash must be selected for read/write/erase operations to succeed. This may 1401 * be necessary on a chip where write/erase can be corrupted by other board 1402 * activity, or where the chip needs to enable some sort of programming voltage, 1403 * or where the read/write/erase operations require cleanly suspending other 1404 * chip functionality. 1405 */ 1406 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1407 1408 /** 1409 * struct ec_response_flash_info_1 - Response to the flash info v1 command. 1410 * @flash_size: Usable flash size in bytes. 1411 * @write_block_size: Write block size. Write offset and size must be a 1412 * multiple of this. 1413 * @erase_block_size: Erase block size. Erase offset and size must be a 1414 * multiple of this. 1415 * @protect_block_size: Protection block size. Protection offset and size 1416 * must be a multiple of this. 1417 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if 1418 * size is exactly this and offset is a multiple of this. 1419 * For example, an EC may have a write buffer which can do 1420 * half-page operations if data is aligned, and a slower 1421 * word-at-a-time write mode. 1422 * @flags: Flags; see EC_FLASH_INFO_* 1423 * 1424 * Version 1 returns the same initial fields as version 0, with additional 1425 * fields following. 1426 * 1427 * gcc anonymous structs don't seem to get along with the __packed directive; 1428 * if they did we'd define the version 0 structure as a sub-structure of this 1429 * one. 1430 * 1431 * Version 2 supports flash banks of different sizes: 1432 * The caller specified the number of banks it has preallocated 1433 * (num_banks_desc) 1434 * The EC returns the number of banks describing the flash memory. 1435 * It adds banks descriptions up to num_banks_desc. 1436 */ 1437 struct ec_response_flash_info_1 { 1438 /* Version 0 fields; see above for description */ 1439 uint32_t flash_size; 1440 uint32_t write_block_size; 1441 uint32_t erase_block_size; 1442 uint32_t protect_block_size; 1443 1444 /* Version 1 adds these fields: */ 1445 uint32_t write_ideal_size; 1446 uint32_t flags; 1447 } __ec_align4; 1448 1449 struct ec_params_flash_info_2 { 1450 /* Number of banks to describe */ 1451 uint16_t num_banks_desc; 1452 /* Reserved; set 0; ignore on read */ 1453 uint8_t reserved[2]; 1454 } __ec_align4; 1455 1456 struct ec_flash_bank { 1457 /* Number of sector is in this bank. */ 1458 uint16_t count; 1459 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1460 uint8_t size_exp; 1461 /* Minimal write size for the sectors in this bank */ 1462 uint8_t write_size_exp; 1463 /* Erase size for the sectors in this bank */ 1464 uint8_t erase_size_exp; 1465 /* Size for write protection, usually identical to erase size. */ 1466 uint8_t protect_size_exp; 1467 /* Reserved; set 0; ignore on read */ 1468 uint8_t reserved[2]; 1469 }; 1470 1471 struct ec_response_flash_info_2 { 1472 /* Total flash in the EC. */ 1473 uint32_t flash_size; 1474 /* Flags; see EC_FLASH_INFO_* */ 1475 uint32_t flags; 1476 /* Maximum size to use to send data to write to the EC. */ 1477 uint32_t write_ideal_size; 1478 /* Number of banks present in the EC. */ 1479 uint16_t num_banks_total; 1480 /* Number of banks described in banks array. */ 1481 uint16_t num_banks_desc; 1482 struct ec_flash_bank banks[]; 1483 } __ec_align4; 1484 1485 /* 1486 * Read flash 1487 * 1488 * Response is params.size bytes of data. 1489 */ 1490 #define EC_CMD_FLASH_READ 0x0011 1491 1492 /** 1493 * struct ec_params_flash_read - Parameters for the flash read command. 1494 * @offset: Byte offset to read. 1495 * @size: Size to read in bytes. 1496 */ 1497 struct ec_params_flash_read { 1498 uint32_t offset; 1499 uint32_t size; 1500 } __ec_align4; 1501 1502 /* Write flash */ 1503 #define EC_CMD_FLASH_WRITE 0x0012 1504 #define EC_VER_FLASH_WRITE 1 1505 1506 /* Version 0 of the flash command supported only 64 bytes of data */ 1507 #define EC_FLASH_WRITE_VER0_SIZE 64 1508 1509 /** 1510 * struct ec_params_flash_write - Parameters for the flash write command. 1511 * @offset: Byte offset to write. 1512 * @size: Size to write in bytes. 1513 */ 1514 struct ec_params_flash_write { 1515 uint32_t offset; 1516 uint32_t size; 1517 /* Followed by data to write */ 1518 } __ec_align4; 1519 1520 /* Erase flash */ 1521 #define EC_CMD_FLASH_ERASE 0x0013 1522 1523 /** 1524 * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1525 * @offset: Byte offset to erase. 1526 * @size: Size to erase in bytes. 1527 */ 1528 struct ec_params_flash_erase { 1529 uint32_t offset; 1530 uint32_t size; 1531 } __ec_align4; 1532 1533 /* 1534 * v1 add async erase: 1535 * subcommands can returns: 1536 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1537 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1538 * EC_RES_ERROR : other errors. 1539 * EC_RES_BUSY : an existing erase operation is in progress. 1540 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1541 * 1542 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1543 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1544 * the proper result. 1545 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1546 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1547 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1548 * permitted while erasing. (For instance, STM32F4). 1549 */ 1550 enum ec_flash_erase_cmd { 1551 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1552 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1553 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1554 }; 1555 1556 /** 1557 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1558 * @cmd: One of ec_flash_erase_cmd. 1559 * @reserved: Pad byte; currently always contains 0. 1560 * @flag: No flags defined yet; set to 0. 1561 * @params: Same as v0 parameters. 1562 */ 1563 struct ec_params_flash_erase_v1 { 1564 uint8_t cmd; 1565 uint8_t reserved; 1566 uint16_t flag; 1567 struct ec_params_flash_erase params; 1568 } __ec_align4; 1569 1570 /* 1571 * Get/set flash protection. 1572 * 1573 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1574 * firmware write protect GPIO, not all flags will take effect immediately; 1575 * some flags require a subsequent hard reset to take effect. Check the 1576 * returned flags bits to see what actually happened. 1577 * 1578 * If mask=0, simply returns the current flags state. 1579 */ 1580 #define EC_CMD_FLASH_PROTECT 0x0015 1581 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1582 1583 /* Flags for flash protection */ 1584 /* RO flash code protected when the EC boots */ 1585 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1586 /* 1587 * RO flash code protected now. If this bit is set, at-boot status cannot 1588 * be changed. 1589 */ 1590 #define EC_FLASH_PROTECT_RO_NOW BIT(1) 1591 /* Entire flash code protected now, until reboot. */ 1592 #define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1593 /* Flash write protect GPIO is asserted now */ 1594 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1595 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1596 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1597 /* 1598 * Error - flash protection is in inconsistent state. At least one bank of 1599 * flash which should be protected is not protected. Usually fixed by 1600 * re-requesting the desired flags, or by a hard reset if that fails. 1601 */ 1602 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1603 /* Entire flash code protected when the EC boots */ 1604 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1605 /* RW flash code protected when the EC boots */ 1606 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1607 /* RW flash code protected now. */ 1608 #define EC_FLASH_PROTECT_RW_NOW BIT(8) 1609 /* Rollback information flash region protected when the EC boots */ 1610 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1611 /* Rollback information flash region protected now */ 1612 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1613 1614 1615 /** 1616 * struct ec_params_flash_protect - Parameters for the flash protect command. 1617 * @mask: Bits in flags to apply. 1618 * @flags: New flags to apply. 1619 */ 1620 struct ec_params_flash_protect { 1621 uint32_t mask; 1622 uint32_t flags; 1623 } __ec_align4; 1624 1625 /** 1626 * struct ec_response_flash_protect - Response to the flash protect command. 1627 * @flags: Current value of flash protect flags. 1628 * @valid_flags: Flags which are valid on this platform. This allows the 1629 * caller to distinguish between flags which aren't set vs. flags 1630 * which can't be set on this platform. 1631 * @writable_flags: Flags which can be changed given the current protection 1632 * state. 1633 */ 1634 struct ec_response_flash_protect { 1635 uint32_t flags; 1636 uint32_t valid_flags; 1637 uint32_t writable_flags; 1638 } __ec_align4; 1639 1640 /* 1641 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1642 * write protect. These commands may be reused with version > 0. 1643 */ 1644 1645 /* Get the region offset/size */ 1646 #define EC_CMD_FLASH_REGION_INFO 0x0016 1647 #define EC_VER_FLASH_REGION_INFO 1 1648 1649 enum ec_flash_region { 1650 /* Region which holds read-only EC image */ 1651 EC_FLASH_REGION_RO = 0, 1652 /* 1653 * Region which holds active RW image. 'Active' is different from 1654 * 'running'. Active means 'scheduled-to-run'. Since RO image always 1655 * scheduled to run, active/non-active applies only to RW images (for 1656 * the same reason 'update' applies only to RW images. It's a state of 1657 * an image on a flash. Running image can be RO, RW_A, RW_B but active 1658 * image can only be RW_A or RW_B. In recovery mode, an active RW image 1659 * doesn't enter 'running' state but it's still active on a flash. 1660 */ 1661 EC_FLASH_REGION_ACTIVE, 1662 /* 1663 * Region which should be write-protected in the factory (a superset of 1664 * EC_FLASH_REGION_RO) 1665 */ 1666 EC_FLASH_REGION_WP_RO, 1667 /* Region which holds updatable (non-active) RW image */ 1668 EC_FLASH_REGION_UPDATE, 1669 /* Number of regions */ 1670 EC_FLASH_REGION_COUNT, 1671 }; 1672 /* 1673 * 'RW' is vague if there are multiple RW images; we mean the active one, 1674 * so the old constant is deprecated. 1675 */ 1676 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1677 1678 /** 1679 * struct ec_params_flash_region_info - Parameters for the flash region info 1680 * command. 1681 * @region: Flash region; see EC_FLASH_REGION_* 1682 */ 1683 struct ec_params_flash_region_info { 1684 uint32_t region; 1685 } __ec_align4; 1686 1687 struct ec_response_flash_region_info { 1688 uint32_t offset; 1689 uint32_t size; 1690 } __ec_align4; 1691 1692 /* Read/write VbNvContext */ 1693 #define EC_CMD_VBNV_CONTEXT 0x0017 1694 #define EC_VER_VBNV_CONTEXT 1 1695 #define EC_VBNV_BLOCK_SIZE 16 1696 1697 enum ec_vbnvcontext_op { 1698 EC_VBNV_CONTEXT_OP_READ, 1699 EC_VBNV_CONTEXT_OP_WRITE, 1700 }; 1701 1702 struct ec_params_vbnvcontext { 1703 uint32_t op; 1704 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1705 } __ec_align4; 1706 1707 struct ec_response_vbnvcontext { 1708 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1709 } __ec_align4; 1710 1711 1712 /* Get SPI flash information */ 1713 #define EC_CMD_FLASH_SPI_INFO 0x0018 1714 1715 struct ec_response_flash_spi_info { 1716 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1717 uint8_t jedec[3]; 1718 1719 /* Pad byte; currently always contains 0 */ 1720 uint8_t reserved0; 1721 1722 /* Manufacturer / device ID from command 0x90 */ 1723 uint8_t mfr_dev_id[2]; 1724 1725 /* Status registers from command 0x05 and 0x35 */ 1726 uint8_t sr1, sr2; 1727 } __ec_align1; 1728 1729 1730 /* Select flash during flash operations */ 1731 #define EC_CMD_FLASH_SELECT 0x0019 1732 1733 /** 1734 * struct ec_params_flash_select - Parameters for the flash select command. 1735 * @select: 1 to select flash, 0 to deselect flash 1736 */ 1737 struct ec_params_flash_select { 1738 uint8_t select; 1739 } __ec_align4; 1740 1741 1742 /*****************************************************************************/ 1743 /* PWM commands */ 1744 1745 /* Get fan target RPM */ 1746 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1747 1748 struct ec_response_pwm_get_fan_rpm { 1749 uint32_t rpm; 1750 } __ec_align4; 1751 1752 /* Set target fan RPM */ 1753 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1754 1755 /* Version 0 of input params */ 1756 struct ec_params_pwm_set_fan_target_rpm_v0 { 1757 uint32_t rpm; 1758 } __ec_align4; 1759 1760 /* Version 1 of input params */ 1761 struct ec_params_pwm_set_fan_target_rpm_v1 { 1762 uint32_t rpm; 1763 uint8_t fan_idx; 1764 } __ec_align_size1; 1765 1766 /* Get keyboard backlight */ 1767 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1768 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1769 1770 struct ec_response_pwm_get_keyboard_backlight { 1771 uint8_t percent; 1772 uint8_t enabled; 1773 } __ec_align1; 1774 1775 /* Set keyboard backlight */ 1776 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1777 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1778 1779 struct ec_params_pwm_set_keyboard_backlight { 1780 uint8_t percent; 1781 } __ec_align1; 1782 1783 /* Set target fan PWM duty cycle */ 1784 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1785 1786 /* Version 0 of input params */ 1787 struct ec_params_pwm_set_fan_duty_v0 { 1788 uint32_t percent; 1789 } __ec_align4; 1790 1791 /* Version 1 of input params */ 1792 struct ec_params_pwm_set_fan_duty_v1 { 1793 uint32_t percent; 1794 uint8_t fan_idx; 1795 } __ec_align_size1; 1796 1797 #define EC_CMD_PWM_SET_DUTY 0x0025 1798 /* 16 bit duty cycle, 0xffff = 100% */ 1799 #define EC_PWM_MAX_DUTY 0xffff 1800 1801 enum ec_pwm_type { 1802 /* All types, indexed by board-specific enum pwm_channel */ 1803 EC_PWM_TYPE_GENERIC = 0, 1804 /* Keyboard backlight */ 1805 EC_PWM_TYPE_KB_LIGHT, 1806 /* Display backlight */ 1807 EC_PWM_TYPE_DISPLAY_LIGHT, 1808 EC_PWM_TYPE_COUNT, 1809 }; 1810 1811 struct ec_params_pwm_set_duty { 1812 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1813 uint8_t pwm_type; /* ec_pwm_type */ 1814 uint8_t index; /* Type-specific index, or 0 if unique */ 1815 } __ec_align4; 1816 1817 #define EC_CMD_PWM_GET_DUTY 0x0026 1818 1819 struct ec_params_pwm_get_duty { 1820 uint8_t pwm_type; /* ec_pwm_type */ 1821 uint8_t index; /* Type-specific index, or 0 if unique */ 1822 } __ec_align1; 1823 1824 struct ec_response_pwm_get_duty { 1825 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1826 } __ec_align2; 1827 1828 /*****************************************************************************/ 1829 /* 1830 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1831 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1832 * into a subcommand. We'll make separate structs for subcommands with 1833 * different input args, so that we know how much to expect. 1834 */ 1835 #define EC_CMD_LIGHTBAR_CMD 0x0028 1836 1837 struct rgb_s { 1838 uint8_t r, g, b; 1839 } __ec_todo_unpacked; 1840 1841 #define LB_BATTERY_LEVELS 4 1842 1843 /* 1844 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1845 * host command, but the alignment is the same regardless. Keep it that way. 1846 */ 1847 struct lightbar_params_v0 { 1848 /* Timing */ 1849 int32_t google_ramp_up; 1850 int32_t google_ramp_down; 1851 int32_t s3s0_ramp_up; 1852 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1853 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1854 int32_t s0s3_ramp_down; 1855 int32_t s3_sleep_for; 1856 int32_t s3_ramp_up; 1857 int32_t s3_ramp_down; 1858 1859 /* Oscillation */ 1860 uint8_t new_s0; 1861 uint8_t osc_min[2]; /* AC=0/1 */ 1862 uint8_t osc_max[2]; /* AC=0/1 */ 1863 uint8_t w_ofs[2]; /* AC=0/1 */ 1864 1865 /* Brightness limits based on the backlight and AC. */ 1866 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1867 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1868 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1869 1870 /* Battery level thresholds */ 1871 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1872 1873 /* Map [AC][battery_level] to color index */ 1874 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1875 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1876 1877 /* Color palette */ 1878 struct rgb_s color[8]; /* 0-3 are Google colors */ 1879 } __ec_todo_packed; 1880 1881 struct lightbar_params_v1 { 1882 /* Timing */ 1883 int32_t google_ramp_up; 1884 int32_t google_ramp_down; 1885 int32_t s3s0_ramp_up; 1886 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1887 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1888 int32_t s0s3_ramp_down; 1889 int32_t s3_sleep_for; 1890 int32_t s3_ramp_up; 1891 int32_t s3_ramp_down; 1892 int32_t s5_ramp_up; 1893 int32_t s5_ramp_down; 1894 int32_t tap_tick_delay; 1895 int32_t tap_gate_delay; 1896 int32_t tap_display_time; 1897 1898 /* Tap-for-battery params */ 1899 uint8_t tap_pct_red; 1900 uint8_t tap_pct_green; 1901 uint8_t tap_seg_min_on; 1902 uint8_t tap_seg_max_on; 1903 uint8_t tap_seg_osc; 1904 uint8_t tap_idx[3]; 1905 1906 /* Oscillation */ 1907 uint8_t osc_min[2]; /* AC=0/1 */ 1908 uint8_t osc_max[2]; /* AC=0/1 */ 1909 uint8_t w_ofs[2]; /* AC=0/1 */ 1910 1911 /* Brightness limits based on the backlight and AC. */ 1912 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1913 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1914 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1915 1916 /* Battery level thresholds */ 1917 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1918 1919 /* Map [AC][battery_level] to color index */ 1920 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1921 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1922 1923 /* s5: single color pulse on inhibited power-up */ 1924 uint8_t s5_idx; 1925 1926 /* Color palette */ 1927 struct rgb_s color[8]; /* 0-3 are Google colors */ 1928 } __ec_todo_packed; 1929 1930 /* Lightbar command params v2 1931 * crbug.com/467716 1932 * 1933 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1934 * logical groups to make it more manageable ( < 120 bytes). 1935 * 1936 * NOTE: Each of these groups must be less than 120 bytes. 1937 */ 1938 1939 struct lightbar_params_v2_timing { 1940 /* Timing */ 1941 int32_t google_ramp_up; 1942 int32_t google_ramp_down; 1943 int32_t s3s0_ramp_up; 1944 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1945 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1946 int32_t s0s3_ramp_down; 1947 int32_t s3_sleep_for; 1948 int32_t s3_ramp_up; 1949 int32_t s3_ramp_down; 1950 int32_t s5_ramp_up; 1951 int32_t s5_ramp_down; 1952 int32_t tap_tick_delay; 1953 int32_t tap_gate_delay; 1954 int32_t tap_display_time; 1955 } __ec_todo_packed; 1956 1957 struct lightbar_params_v2_tap { 1958 /* Tap-for-battery params */ 1959 uint8_t tap_pct_red; 1960 uint8_t tap_pct_green; 1961 uint8_t tap_seg_min_on; 1962 uint8_t tap_seg_max_on; 1963 uint8_t tap_seg_osc; 1964 uint8_t tap_idx[3]; 1965 } __ec_todo_packed; 1966 1967 struct lightbar_params_v2_oscillation { 1968 /* Oscillation */ 1969 uint8_t osc_min[2]; /* AC=0/1 */ 1970 uint8_t osc_max[2]; /* AC=0/1 */ 1971 uint8_t w_ofs[2]; /* AC=0/1 */ 1972 } __ec_todo_packed; 1973 1974 struct lightbar_params_v2_brightness { 1975 /* Brightness limits based on the backlight and AC. */ 1976 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1977 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1978 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1979 } __ec_todo_packed; 1980 1981 struct lightbar_params_v2_thresholds { 1982 /* Battery level thresholds */ 1983 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1984 } __ec_todo_packed; 1985 1986 struct lightbar_params_v2_colors { 1987 /* Map [AC][battery_level] to color index */ 1988 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1989 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1990 1991 /* s5: single color pulse on inhibited power-up */ 1992 uint8_t s5_idx; 1993 1994 /* Color palette */ 1995 struct rgb_s color[8]; /* 0-3 are Google colors */ 1996 } __ec_todo_packed; 1997 1998 /* Lightbar program. */ 1999 #define EC_LB_PROG_LEN 192 2000 struct lightbar_program { 2001 uint8_t size; 2002 uint8_t data[EC_LB_PROG_LEN]; 2003 } __ec_todo_unpacked; 2004 2005 struct ec_params_lightbar { 2006 uint8_t cmd; /* Command (see enum lightbar_command) */ 2007 union { 2008 /* 2009 * The following commands have no args: 2010 * 2011 * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 2012 * version, get_brightness, get_demo, suspend, resume, 2013 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 2014 * get_params_v2_bright, get_params_v2_thlds, 2015 * get_params_v2_colors 2016 * 2017 * Don't use an empty struct, because C++ hates that. 2018 */ 2019 2020 struct __ec_todo_unpacked { 2021 uint8_t num; 2022 } set_brightness, seq, demo; 2023 2024 struct __ec_todo_unpacked { 2025 uint8_t ctrl, reg, value; 2026 } reg; 2027 2028 struct __ec_todo_unpacked { 2029 uint8_t led, red, green, blue; 2030 } set_rgb; 2031 2032 struct __ec_todo_unpacked { 2033 uint8_t led; 2034 } get_rgb; 2035 2036 struct __ec_todo_unpacked { 2037 uint8_t enable; 2038 } manual_suspend_ctrl; 2039 2040 struct lightbar_params_v0 set_params_v0; 2041 struct lightbar_params_v1 set_params_v1; 2042 2043 struct lightbar_params_v2_timing set_v2par_timing; 2044 struct lightbar_params_v2_tap set_v2par_tap; 2045 struct lightbar_params_v2_oscillation set_v2par_osc; 2046 struct lightbar_params_v2_brightness set_v2par_bright; 2047 struct lightbar_params_v2_thresholds set_v2par_thlds; 2048 struct lightbar_params_v2_colors set_v2par_colors; 2049 2050 struct lightbar_program set_program; 2051 }; 2052 } __ec_todo_packed; 2053 2054 struct ec_response_lightbar { 2055 union { 2056 struct __ec_todo_unpacked { 2057 struct __ec_todo_unpacked { 2058 uint8_t reg; 2059 uint8_t ic0; 2060 uint8_t ic1; 2061 } vals[23]; 2062 } dump; 2063 2064 struct __ec_todo_unpacked { 2065 uint8_t num; 2066 } get_seq, get_brightness, get_demo; 2067 2068 struct lightbar_params_v0 get_params_v0; 2069 struct lightbar_params_v1 get_params_v1; 2070 2071 2072 struct lightbar_params_v2_timing get_params_v2_timing; 2073 struct lightbar_params_v2_tap get_params_v2_tap; 2074 struct lightbar_params_v2_oscillation get_params_v2_osc; 2075 struct lightbar_params_v2_brightness get_params_v2_bright; 2076 struct lightbar_params_v2_thresholds get_params_v2_thlds; 2077 struct lightbar_params_v2_colors get_params_v2_colors; 2078 2079 struct __ec_todo_unpacked { 2080 uint32_t num; 2081 uint32_t flags; 2082 } version; 2083 2084 struct __ec_todo_unpacked { 2085 uint8_t red, green, blue; 2086 } get_rgb; 2087 2088 /* 2089 * The following commands have no response: 2090 * 2091 * off, on, init, set_brightness, seq, reg, set_rgb, demo, 2092 * set_params_v0, set_params_v1, set_program, 2093 * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 2094 * set_v2par_tap, set_v2par_osc, set_v2par_bright, 2095 * set_v2par_thlds, set_v2par_colors 2096 */ 2097 }; 2098 } __ec_todo_packed; 2099 2100 /* Lightbar commands */ 2101 enum lightbar_command { 2102 LIGHTBAR_CMD_DUMP = 0, 2103 LIGHTBAR_CMD_OFF = 1, 2104 LIGHTBAR_CMD_ON = 2, 2105 LIGHTBAR_CMD_INIT = 3, 2106 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 2107 LIGHTBAR_CMD_SEQ = 5, 2108 LIGHTBAR_CMD_REG = 6, 2109 LIGHTBAR_CMD_SET_RGB = 7, 2110 LIGHTBAR_CMD_GET_SEQ = 8, 2111 LIGHTBAR_CMD_DEMO = 9, 2112 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 2113 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 2114 LIGHTBAR_CMD_VERSION = 12, 2115 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 2116 LIGHTBAR_CMD_GET_RGB = 14, 2117 LIGHTBAR_CMD_GET_DEMO = 15, 2118 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 2119 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 2120 LIGHTBAR_CMD_SET_PROGRAM = 18, 2121 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2122 LIGHTBAR_CMD_SUSPEND = 20, 2123 LIGHTBAR_CMD_RESUME = 21, 2124 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 2125 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 2126 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 2127 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 2128 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 2129 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 2130 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 2131 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 2132 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 2133 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 2134 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 2135 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2136 LIGHTBAR_NUM_CMDS 2137 }; 2138 2139 /*****************************************************************************/ 2140 /* LED control commands */ 2141 2142 #define EC_CMD_LED_CONTROL 0x0029 2143 2144 enum ec_led_id { 2145 /* LED to indicate battery state of charge */ 2146 EC_LED_ID_BATTERY_LED = 0, 2147 /* 2148 * LED to indicate system power state (on or in suspend). 2149 * May be on power button or on C-panel. 2150 */ 2151 EC_LED_ID_POWER_LED, 2152 /* LED on power adapter or its plug */ 2153 EC_LED_ID_ADAPTER_LED, 2154 /* LED to indicate left side */ 2155 EC_LED_ID_LEFT_LED, 2156 /* LED to indicate right side */ 2157 EC_LED_ID_RIGHT_LED, 2158 /* LED to indicate recovery mode with HW_REINIT */ 2159 EC_LED_ID_RECOVERY_HW_REINIT_LED, 2160 /* LED to indicate sysrq debug mode. */ 2161 EC_LED_ID_SYSRQ_DEBUG_LED, 2162 2163 EC_LED_ID_COUNT 2164 }; 2165 2166 /* LED control flags */ 2167 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 2168 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2169 2170 enum ec_led_colors { 2171 EC_LED_COLOR_RED = 0, 2172 EC_LED_COLOR_GREEN, 2173 EC_LED_COLOR_BLUE, 2174 EC_LED_COLOR_YELLOW, 2175 EC_LED_COLOR_WHITE, 2176 EC_LED_COLOR_AMBER, 2177 2178 EC_LED_COLOR_COUNT 2179 }; 2180 2181 struct ec_params_led_control { 2182 uint8_t led_id; /* Which LED to control */ 2183 uint8_t flags; /* Control flags */ 2184 2185 uint8_t brightness[EC_LED_COLOR_COUNT]; 2186 } __ec_align1; 2187 2188 struct ec_response_led_control { 2189 /* 2190 * Available brightness value range. 2191 * 2192 * Range 0 means color channel not present. 2193 * Range 1 means on/off control. 2194 * Other values means the LED is control by PWM. 2195 */ 2196 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2197 } __ec_align1; 2198 2199 /*****************************************************************************/ 2200 /* Verified boot commands */ 2201 2202 /* 2203 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 2204 * reused for other purposes with version > 0. 2205 */ 2206 2207 /* Verified boot hash command */ 2208 #define EC_CMD_VBOOT_HASH 0x002A 2209 2210 struct ec_params_vboot_hash { 2211 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 2212 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2213 uint8_t nonce_size; /* Nonce size; may be 0 */ 2214 uint8_t reserved0; /* Reserved; set 0 */ 2215 uint32_t offset; /* Offset in flash to hash */ 2216 uint32_t size; /* Number of bytes to hash */ 2217 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2218 } __ec_align4; 2219 2220 struct ec_response_vboot_hash { 2221 uint8_t status; /* enum ec_vboot_hash_status */ 2222 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2223 uint8_t digest_size; /* Size of hash digest in bytes */ 2224 uint8_t reserved0; /* Ignore; will be 0 */ 2225 uint32_t offset; /* Offset in flash which was hashed */ 2226 uint32_t size; /* Number of bytes hashed */ 2227 uint8_t hash_digest[64]; /* Hash digest data */ 2228 } __ec_align4; 2229 2230 enum ec_vboot_hash_cmd { 2231 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 2232 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 2233 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 2234 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 2235 }; 2236 2237 enum ec_vboot_hash_type { 2238 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 2239 }; 2240 2241 enum ec_vboot_hash_status { 2242 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 2243 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 2244 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 2245 }; 2246 2247 /* 2248 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 2249 * If one of these is specified, the EC will automatically update offset and 2250 * size to the correct values for the specified image (RO or RW). 2251 */ 2252 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2253 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 2254 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 2255 2256 /* 2257 * 'RW' is vague if there are multiple RW images; we mean the active one, 2258 * so the old constant is deprecated. 2259 */ 2260 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2261 2262 /*****************************************************************************/ 2263 /* 2264 * Motion sense commands. We'll make separate structs for sub-commands with 2265 * different input args, so that we know how much to expect. 2266 */ 2267 #define EC_CMD_MOTION_SENSE_CMD 0x002B 2268 2269 /* Motion sense commands */ 2270 enum motionsense_command { 2271 /* 2272 * Dump command returns all motion sensor data including motion sense 2273 * module flags and individual sensor flags. 2274 */ 2275 MOTIONSENSE_CMD_DUMP = 0, 2276 2277 /* 2278 * Info command returns data describing the details of a given sensor, 2279 * including enum motionsensor_type, enum motionsensor_location, and 2280 * enum motionsensor_chip. 2281 */ 2282 MOTIONSENSE_CMD_INFO = 1, 2283 2284 /* 2285 * EC Rate command is a setter/getter command for the EC sampling rate 2286 * in milliseconds. 2287 * It is per sensor, the EC run sample task at the minimum of all 2288 * sensors EC_RATE. 2289 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2290 * to collect all the sensor samples. 2291 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2292 * to process of all motion sensors in milliseconds. 2293 */ 2294 MOTIONSENSE_CMD_EC_RATE = 2, 2295 2296 /* 2297 * Sensor ODR command is a setter/getter command for the output data 2298 * rate of a specific motion sensor in millihertz. 2299 */ 2300 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2301 2302 /* 2303 * Sensor range command is a setter/getter command for the range of 2304 * a specified motion sensor in +/-G's or +/- deg/s. 2305 */ 2306 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2307 2308 /* 2309 * Setter/getter command for the keyboard wake angle. When the lid 2310 * angle is greater than this value, keyboard wake is disabled in S3, 2311 * and when the lid angle goes less than this value, keyboard wake is 2312 * enabled. Note, the lid angle measurement is an approximate, 2313 * un-calibrated value, hence the wake angle isn't exact. 2314 */ 2315 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2316 2317 /* 2318 * Returns a single sensor data. 2319 */ 2320 MOTIONSENSE_CMD_DATA = 6, 2321 2322 /* 2323 * Return sensor fifo info. 2324 */ 2325 MOTIONSENSE_CMD_FIFO_INFO = 7, 2326 2327 /* 2328 * Insert a flush element in the fifo and return sensor fifo info. 2329 * The host can use that element to synchronize its operation. 2330 */ 2331 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2332 2333 /* 2334 * Return a portion of the fifo. 2335 */ 2336 MOTIONSENSE_CMD_FIFO_READ = 9, 2337 2338 /* 2339 * Perform low level calibration. 2340 * On sensors that support it, ask to do offset calibration. 2341 */ 2342 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2343 2344 /* 2345 * Sensor Offset command is a setter/getter command for the offset 2346 * used for calibration. 2347 * The offsets can be calculated by the host, or via 2348 * PERFORM_CALIB command. 2349 */ 2350 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2351 2352 /* 2353 * List available activities for a MOTION sensor. 2354 * Indicates if they are enabled or disabled. 2355 */ 2356 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2357 2358 /* 2359 * Activity management 2360 * Enable/Disable activity recognition. 2361 */ 2362 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2363 2364 /* 2365 * Lid Angle 2366 */ 2367 MOTIONSENSE_CMD_LID_ANGLE = 14, 2368 2369 /* 2370 * Allow the FIFO to trigger interrupt via MKBP events. 2371 * By default the FIFO does not send interrupt to process the FIFO 2372 * until the AP is ready or it is coming from a wakeup sensor. 2373 */ 2374 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2375 2376 /* 2377 * Spoof the readings of the sensors. The spoofed readings can be set 2378 * to arbitrary values, or will lock to the last read actual values. 2379 */ 2380 MOTIONSENSE_CMD_SPOOF = 16, 2381 2382 /* Set lid angle for tablet mode detection. */ 2383 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 2384 2385 /* 2386 * Sensor Scale command is a setter/getter command for the calibration 2387 * scale. 2388 */ 2389 MOTIONSENSE_CMD_SENSOR_SCALE = 18, 2390 2391 /* 2392 * Activity management 2393 * Retrieve current status of given activity. 2394 */ 2395 MOTIONSENSE_CMD_GET_ACTIVITY = 20, 2396 2397 /* Number of motionsense sub-commands. */ 2398 MOTIONSENSE_NUM_CMDS 2399 }; 2400 2401 /* List of motion sensor types. */ 2402 enum motionsensor_type { 2403 MOTIONSENSE_TYPE_ACCEL = 0, 2404 MOTIONSENSE_TYPE_GYRO = 1, 2405 MOTIONSENSE_TYPE_MAG = 2, 2406 MOTIONSENSE_TYPE_PROX = 3, 2407 MOTIONSENSE_TYPE_LIGHT = 4, 2408 MOTIONSENSE_TYPE_ACTIVITY = 5, 2409 MOTIONSENSE_TYPE_BARO = 6, 2410 MOTIONSENSE_TYPE_SYNC = 7, 2411 MOTIONSENSE_TYPE_MAX, 2412 }; 2413 2414 /* List of motion sensor locations. */ 2415 enum motionsensor_location { 2416 MOTIONSENSE_LOC_BASE = 0, 2417 MOTIONSENSE_LOC_LID = 1, 2418 MOTIONSENSE_LOC_CAMERA = 2, 2419 MOTIONSENSE_LOC_MAX, 2420 }; 2421 2422 /* List of motion sensor chips. */ 2423 enum motionsensor_chip { 2424 MOTIONSENSE_CHIP_KXCJ9 = 0, 2425 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2426 MOTIONSENSE_CHIP_BMI160 = 2, 2427 MOTIONSENSE_CHIP_SI1141 = 3, 2428 MOTIONSENSE_CHIP_SI1142 = 4, 2429 MOTIONSENSE_CHIP_SI1143 = 5, 2430 MOTIONSENSE_CHIP_KX022 = 6, 2431 MOTIONSENSE_CHIP_L3GD20H = 7, 2432 MOTIONSENSE_CHIP_BMA255 = 8, 2433 MOTIONSENSE_CHIP_BMP280 = 9, 2434 MOTIONSENSE_CHIP_OPT3001 = 10, 2435 MOTIONSENSE_CHIP_BH1730 = 11, 2436 MOTIONSENSE_CHIP_GPIO = 12, 2437 MOTIONSENSE_CHIP_LIS2DH = 13, 2438 MOTIONSENSE_CHIP_LSM6DSM = 14, 2439 MOTIONSENSE_CHIP_LIS2DE = 15, 2440 MOTIONSENSE_CHIP_LIS2MDL = 16, 2441 MOTIONSENSE_CHIP_LSM6DS3 = 17, 2442 MOTIONSENSE_CHIP_LSM6DSO = 18, 2443 MOTIONSENSE_CHIP_LNG2DM = 19, 2444 MOTIONSENSE_CHIP_MAX, 2445 }; 2446 2447 /* List of orientation positions */ 2448 enum motionsensor_orientation { 2449 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 2450 MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 2451 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 2452 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 2453 MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 2454 }; 2455 2456 struct ec_response_activity_data { 2457 uint8_t activity; /* motionsensor_activity */ 2458 uint8_t state; 2459 } __ec_todo_packed; 2460 2461 struct ec_response_motion_sensor_data { 2462 /* Flags for each sensor. */ 2463 uint8_t flags; 2464 /* Sensor number the data comes from. */ 2465 uint8_t sensor_num; 2466 /* Each sensor is up to 3-axis. */ 2467 union { 2468 int16_t data[3]; 2469 struct __ec_todo_packed { 2470 uint16_t reserved; 2471 uint32_t timestamp; 2472 }; 2473 struct __ec_todo_unpacked { 2474 struct ec_response_activity_data activity_data; 2475 int16_t add_info[2]; 2476 }; 2477 }; 2478 } __ec_todo_packed; 2479 2480 /* Note: used in ec_response_get_next_data */ 2481 struct ec_response_motion_sense_fifo_info { 2482 /* Size of the fifo */ 2483 uint16_t size; 2484 /* Amount of space used in the fifo */ 2485 uint16_t count; 2486 /* Timestamp recorded in us. 2487 * aka accurate timestamp when host event was triggered. 2488 */ 2489 uint32_t timestamp; 2490 /* Total amount of vector lost */ 2491 uint16_t total_lost; 2492 /* Lost events since the last fifo_info, per sensors */ 2493 uint16_t lost[]; 2494 } __ec_todo_packed; 2495 2496 struct ec_response_motion_sense_fifo_data { 2497 uint32_t number_data; 2498 struct ec_response_motion_sensor_data data[]; 2499 } __ec_todo_packed; 2500 2501 /* List supported activity recognition */ 2502 enum motionsensor_activity { 2503 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2504 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2505 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2506 MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 2507 MOTIONSENSE_ACTIVITY_BODY_DETECTION = 4, 2508 }; 2509 2510 struct ec_motion_sense_activity { 2511 uint8_t sensor_num; 2512 uint8_t activity; /* one of enum motionsensor_activity */ 2513 uint8_t enable; /* 1: enable, 0: disable */ 2514 uint8_t reserved; 2515 uint16_t parameters[3]; /* activity dependent parameters */ 2516 } __ec_todo_unpacked; 2517 2518 /* Module flag masks used for the dump sub-command. */ 2519 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2520 2521 /* Sensor flag masks used for the dump sub-command. */ 2522 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 2523 2524 /* 2525 * Flush entry for synchronization. 2526 * data contains time stamp 2527 */ 2528 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 2529 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 2530 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 2531 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 2532 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2533 2534 /* 2535 * Send this value for the data element to only perform a read. If you 2536 * send any other value, the EC will interpret it as data to set and will 2537 * return the actual value set. 2538 */ 2539 #define EC_MOTION_SENSE_NO_VALUE -1 2540 2541 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2542 2543 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2544 /* Set Calibration information */ 2545 #define MOTION_SENSE_SET_OFFSET BIT(0) 2546 2547 /* Default Scale value, factor 1. */ 2548 #define MOTION_SENSE_DEFAULT_SCALE BIT(15) 2549 2550 #define LID_ANGLE_UNRELIABLE 500 2551 2552 enum motionsense_spoof_mode { 2553 /* Disable spoof mode. */ 2554 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2555 2556 /* Enable spoof mode, but use provided component values. */ 2557 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2558 2559 /* Enable spoof mode, but use the current sensor values. */ 2560 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2561 2562 /* Query the current spoof mode status for the sensor. */ 2563 MOTIONSENSE_SPOOF_MODE_QUERY, 2564 }; 2565 2566 struct ec_params_motion_sense { 2567 uint8_t cmd; 2568 union { 2569 /* Used for MOTIONSENSE_CMD_DUMP. */ 2570 struct __ec_todo_unpacked { 2571 /* 2572 * Maximal number of sensor the host is expecting. 2573 * 0 means the host is only interested in the number 2574 * of sensors controlled by the EC. 2575 */ 2576 uint8_t max_sensor_count; 2577 } dump; 2578 2579 /* 2580 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2581 */ 2582 struct __ec_todo_unpacked { 2583 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2584 * kb_wake_angle: angle to wakup AP. 2585 */ 2586 int16_t data; 2587 } kb_wake_angle; 2588 2589 /* 2590 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2591 * and MOTIONSENSE_CMD_PERFORM_CALIB. 2592 */ 2593 struct __ec_todo_unpacked { 2594 uint8_t sensor_num; 2595 } info, info_3, data, fifo_flush, perform_calib, 2596 list_activities; 2597 2598 /* 2599 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2600 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2601 */ 2602 struct __ec_todo_unpacked { 2603 uint8_t sensor_num; 2604 2605 /* Rounding flag, true for round-up, false for down. */ 2606 uint8_t roundup; 2607 2608 uint16_t reserved; 2609 2610 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2611 int32_t data; 2612 } ec_rate, sensor_odr, sensor_range; 2613 2614 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2615 struct __ec_todo_packed { 2616 uint8_t sensor_num; 2617 2618 /* 2619 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2620 * the calibration information in the EC. 2621 * If unset, just retrieve calibration information. 2622 */ 2623 uint16_t flags; 2624 2625 /* 2626 * Temperature at calibration, in units of 0.01 C 2627 * 0x8000: invalid / unknown. 2628 * 0x0: 0C 2629 * 0x7fff: +327.67C 2630 */ 2631 int16_t temp; 2632 2633 /* 2634 * Offset for calibration. 2635 * Unit: 2636 * Accelerometer: 1/1024 g 2637 * Gyro: 1/1024 deg/s 2638 * Compass: 1/16 uT 2639 */ 2640 int16_t offset[3]; 2641 } sensor_offset; 2642 2643 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2644 struct __ec_todo_packed { 2645 uint8_t sensor_num; 2646 2647 /* 2648 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2649 * the calibration information in the EC. 2650 * If unset, just retrieve calibration information. 2651 */ 2652 uint16_t flags; 2653 2654 /* 2655 * Temperature at calibration, in units of 0.01 C 2656 * 0x8000: invalid / unknown. 2657 * 0x0: 0C 2658 * 0x7fff: +327.67C 2659 */ 2660 int16_t temp; 2661 2662 /* 2663 * Scale for calibration: 2664 * By default scale is 1, it is encoded on 16bits: 2665 * 1 = BIT(15) 2666 * ~2 = 0xFFFF 2667 * ~0 = 0. 2668 */ 2669 uint16_t scale[3]; 2670 } sensor_scale; 2671 2672 2673 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2674 /* (no params) */ 2675 2676 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2677 struct __ec_todo_unpacked { 2678 /* 2679 * Number of expected vector to return. 2680 * EC may return less or 0 if none available. 2681 */ 2682 uint32_t max_data_vector; 2683 } fifo_read; 2684 2685 /* Used for MOTIONSENSE_CMD_SET_ACTIVITY */ 2686 struct ec_motion_sense_activity set_activity; 2687 2688 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2689 /* (no params) */ 2690 2691 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2692 struct __ec_todo_unpacked { 2693 /* 2694 * 1: enable, 0 disable fifo, 2695 * EC_MOTION_SENSE_NO_VALUE return value. 2696 */ 2697 int8_t enable; 2698 } fifo_int_enable; 2699 2700 /* Used for MOTIONSENSE_CMD_SPOOF */ 2701 struct __ec_todo_packed { 2702 uint8_t sensor_id; 2703 2704 /* See enum motionsense_spoof_mode. */ 2705 uint8_t spoof_enable; 2706 2707 /* Ignored, used for alignment. */ 2708 uint8_t reserved; 2709 2710 /* Individual component values to spoof. */ 2711 int16_t components[3]; 2712 } spoof; 2713 2714 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2715 struct __ec_todo_unpacked { 2716 /* 2717 * Lid angle threshold for switching between tablet and 2718 * clamshell mode. 2719 */ 2720 int16_t lid_angle; 2721 2722 /* 2723 * Hysteresis degree to prevent fluctuations between 2724 * clamshell and tablet mode if lid angle keeps 2725 * changing around the threshold. Lid motion driver will 2726 * use lid_angle + hys_degree to trigger tablet mode and 2727 * lid_angle - hys_degree to trigger clamshell mode. 2728 */ 2729 int16_t hys_degree; 2730 } tablet_mode_threshold; 2731 2732 /* Used for MOTIONSENSE_CMD_GET_ACTIVITY */ 2733 struct __ec_todo_unpacked { 2734 uint8_t sensor_num; 2735 uint8_t activity; /* enum motionsensor_activity */ 2736 } get_activity; 2737 }; 2738 } __ec_todo_packed; 2739 2740 struct ec_response_motion_sense { 2741 union { 2742 /* Used for MOTIONSENSE_CMD_DUMP */ 2743 struct __ec_todo_unpacked { 2744 /* Flags representing the motion sensor module. */ 2745 uint8_t module_flags; 2746 2747 /* Number of sensors managed directly by the EC. */ 2748 uint8_t sensor_count; 2749 2750 /* 2751 * Sensor data is truncated if response_max is too small 2752 * for holding all the data. 2753 */ 2754 DECLARE_FLEX_ARRAY(struct ec_response_motion_sensor_data, sensor); 2755 } dump; 2756 2757 /* Used for MOTIONSENSE_CMD_INFO. */ 2758 struct __ec_todo_unpacked { 2759 /* Should be element of enum motionsensor_type. */ 2760 uint8_t type; 2761 2762 /* Should be element of enum motionsensor_location. */ 2763 uint8_t location; 2764 2765 /* Should be element of enum motionsensor_chip. */ 2766 uint8_t chip; 2767 } info; 2768 2769 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2770 struct __ec_todo_unpacked { 2771 /* Should be element of enum motionsensor_type. */ 2772 uint8_t type; 2773 2774 /* Should be element of enum motionsensor_location. */ 2775 uint8_t location; 2776 2777 /* Should be element of enum motionsensor_chip. */ 2778 uint8_t chip; 2779 2780 /* Minimum sensor sampling frequency */ 2781 uint32_t min_frequency; 2782 2783 /* Maximum sensor sampling frequency */ 2784 uint32_t max_frequency; 2785 2786 /* Max number of sensor events that could be in fifo */ 2787 uint32_t fifo_max_event_count; 2788 } info_3; 2789 2790 /* Used for MOTIONSENSE_CMD_DATA */ 2791 struct ec_response_motion_sensor_data data; 2792 2793 /* 2794 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2795 * MOTIONSENSE_CMD_SENSOR_RANGE, 2796 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2797 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2798 * MOTIONSENSE_CMD_SPOOF. 2799 */ 2800 struct __ec_todo_unpacked { 2801 /* Current value of the parameter queried. */ 2802 int32_t ret; 2803 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2804 fifo_int_enable, spoof; 2805 2806 /* 2807 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 2808 * PERFORM_CALIB. 2809 */ 2810 struct __ec_todo_unpacked { 2811 int16_t temp; 2812 int16_t offset[3]; 2813 } sensor_offset, perform_calib; 2814 2815 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2816 struct __ec_todo_unpacked { 2817 int16_t temp; 2818 uint16_t scale[3]; 2819 } sensor_scale; 2820 2821 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2822 2823 struct ec_response_motion_sense_fifo_data fifo_read; 2824 2825 struct __ec_todo_packed { 2826 uint16_t reserved; 2827 uint32_t enabled; 2828 uint32_t disabled; 2829 } list_activities; 2830 2831 /* No params for set activity */ 2832 2833 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2834 struct __ec_todo_unpacked { 2835 /* 2836 * Angle between 0 and 360 degree if available, 2837 * LID_ANGLE_UNRELIABLE otherwise. 2838 */ 2839 uint16_t value; 2840 } lid_angle; 2841 2842 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2843 struct __ec_todo_unpacked { 2844 /* 2845 * Lid angle threshold for switching between tablet and 2846 * clamshell mode. 2847 */ 2848 uint16_t lid_angle; 2849 2850 /* Hysteresis degree. */ 2851 uint16_t hys_degree; 2852 } tablet_mode_threshold; 2853 2854 /* USED for MOTIONSENSE_CMD_GET_ACTIVITY. */ 2855 struct __ec_todo_unpacked { 2856 uint8_t state; 2857 } get_activity; 2858 }; 2859 } __ec_todo_packed; 2860 2861 /*****************************************************************************/ 2862 /* Force lid open command */ 2863 2864 /* Make lid event always open */ 2865 #define EC_CMD_FORCE_LID_OPEN 0x002C 2866 2867 struct ec_params_force_lid_open { 2868 uint8_t enabled; 2869 } __ec_align1; 2870 2871 /*****************************************************************************/ 2872 /* Configure the behavior of the power button */ 2873 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2874 2875 enum ec_config_power_button_flags { 2876 /* Enable/Disable power button pulses for x86 devices */ 2877 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 2878 }; 2879 2880 struct ec_params_config_power_button { 2881 /* See enum ec_config_power_button_flags */ 2882 uint8_t flags; 2883 } __ec_align1; 2884 2885 /*****************************************************************************/ 2886 /* USB charging control commands */ 2887 2888 /* Set USB port charging mode */ 2889 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2890 2891 struct ec_params_usb_charge_set_mode { 2892 uint8_t usb_port_id; 2893 uint8_t mode:7; 2894 uint8_t inhibit_charge:1; 2895 } __ec_align1; 2896 2897 /*****************************************************************************/ 2898 /* Persistent storage for host */ 2899 2900 /* Maximum bytes that can be read/written in a single command */ 2901 #define EC_PSTORE_SIZE_MAX 64 2902 2903 /* Get persistent storage info */ 2904 #define EC_CMD_PSTORE_INFO 0x0040 2905 2906 struct ec_response_pstore_info { 2907 /* Persistent storage size, in bytes */ 2908 uint32_t pstore_size; 2909 /* Access size; read/write offset and size must be a multiple of this */ 2910 uint32_t access_size; 2911 } __ec_align4; 2912 2913 /* 2914 * Read persistent storage 2915 * 2916 * Response is params.size bytes of data. 2917 */ 2918 #define EC_CMD_PSTORE_READ 0x0041 2919 2920 struct ec_params_pstore_read { 2921 uint32_t offset; /* Byte offset to read */ 2922 uint32_t size; /* Size to read in bytes */ 2923 } __ec_align4; 2924 2925 /* Write persistent storage */ 2926 #define EC_CMD_PSTORE_WRITE 0x0042 2927 2928 struct ec_params_pstore_write { 2929 uint32_t offset; /* Byte offset to write */ 2930 uint32_t size; /* Size to write in bytes */ 2931 uint8_t data[EC_PSTORE_SIZE_MAX]; 2932 } __ec_align4; 2933 2934 /*****************************************************************************/ 2935 /* Real-time clock */ 2936 2937 /* RTC params and response structures */ 2938 struct ec_params_rtc { 2939 uint32_t time; 2940 } __ec_align4; 2941 2942 struct ec_response_rtc { 2943 uint32_t time; 2944 } __ec_align4; 2945 2946 /* These use ec_response_rtc */ 2947 #define EC_CMD_RTC_GET_VALUE 0x0044 2948 #define EC_CMD_RTC_GET_ALARM 0x0045 2949 2950 /* These all use ec_params_rtc */ 2951 #define EC_CMD_RTC_SET_VALUE 0x0046 2952 #define EC_CMD_RTC_SET_ALARM 0x0047 2953 2954 /* Pass as time param to SET_ALARM to clear the current alarm */ 2955 #define EC_RTC_ALARM_CLEAR 0 2956 2957 /*****************************************************************************/ 2958 /* Port80 log access */ 2959 2960 /* Maximum entries that can be read/written in a single command */ 2961 #define EC_PORT80_SIZE_MAX 32 2962 2963 /* Get last port80 code from previous boot */ 2964 #define EC_CMD_PORT80_LAST_BOOT 0x0048 2965 #define EC_CMD_PORT80_READ 0x0048 2966 2967 enum ec_port80_subcmd { 2968 EC_PORT80_GET_INFO = 0, 2969 EC_PORT80_READ_BUFFER, 2970 }; 2971 2972 struct ec_params_port80_read { 2973 uint16_t subcmd; 2974 union { 2975 struct __ec_todo_unpacked { 2976 uint32_t offset; 2977 uint32_t num_entries; 2978 } read_buffer; 2979 }; 2980 } __ec_todo_packed; 2981 2982 struct ec_response_port80_read { 2983 union { 2984 struct __ec_todo_unpacked { 2985 uint32_t writes; 2986 uint32_t history_size; 2987 uint32_t last_boot; 2988 } get_info; 2989 struct __ec_todo_unpacked { 2990 uint16_t codes[EC_PORT80_SIZE_MAX]; 2991 } data; 2992 }; 2993 } __ec_todo_packed; 2994 2995 struct ec_response_port80_last_boot { 2996 uint16_t code; 2997 } __ec_align2; 2998 2999 /*****************************************************************************/ 3000 /* Temporary secure storage for host verified boot use */ 3001 3002 /* Number of bytes in a vstore slot */ 3003 #define EC_VSTORE_SLOT_SIZE 64 3004 3005 /* Maximum number of vstore slots */ 3006 #define EC_VSTORE_SLOT_MAX 32 3007 3008 /* Get persistent storage info */ 3009 #define EC_CMD_VSTORE_INFO 0x0049 3010 struct ec_response_vstore_info { 3011 /* Indicates which slots are locked */ 3012 uint32_t slot_locked; 3013 /* Total number of slots available */ 3014 uint8_t slot_count; 3015 } __ec_align_size1; 3016 3017 /* 3018 * Read temporary secure storage 3019 * 3020 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 3021 */ 3022 #define EC_CMD_VSTORE_READ 0x004A 3023 3024 struct ec_params_vstore_read { 3025 uint8_t slot; /* Slot to read from */ 3026 } __ec_align1; 3027 3028 struct ec_response_vstore_read { 3029 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3030 } __ec_align1; 3031 3032 /* 3033 * Write temporary secure storage and lock it. 3034 */ 3035 #define EC_CMD_VSTORE_WRITE 0x004B 3036 3037 struct ec_params_vstore_write { 3038 uint8_t slot; /* Slot to write to */ 3039 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3040 } __ec_align1; 3041 3042 /*****************************************************************************/ 3043 /* Thermal engine commands. Note that there are two implementations. We'll 3044 * reuse the command number, but the data and behavior is incompatible. 3045 * Version 0 is what originally shipped on Link. 3046 * Version 1 separates the CPU thermal limits from the fan control. 3047 */ 3048 3049 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 3050 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 3051 3052 /* The version 0 structs are opaque. You have to know what they are for 3053 * the get/set commands to make any sense. 3054 */ 3055 3056 /* Version 0 - set */ 3057 struct ec_params_thermal_set_threshold { 3058 uint8_t sensor_type; 3059 uint8_t threshold_id; 3060 uint16_t value; 3061 } __ec_align2; 3062 3063 /* Version 0 - get */ 3064 struct ec_params_thermal_get_threshold { 3065 uint8_t sensor_type; 3066 uint8_t threshold_id; 3067 } __ec_align1; 3068 3069 struct ec_response_thermal_get_threshold { 3070 uint16_t value; 3071 } __ec_align2; 3072 3073 3074 /* The version 1 structs are visible. */ 3075 enum ec_temp_thresholds { 3076 EC_TEMP_THRESH_WARN = 0, 3077 EC_TEMP_THRESH_HIGH, 3078 EC_TEMP_THRESH_HALT, 3079 3080 EC_TEMP_THRESH_COUNT 3081 }; 3082 3083 /* 3084 * Thermal configuration for one temperature sensor. Temps are in degrees K. 3085 * Zero values will be silently ignored by the thermal task. 3086 * 3087 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 3088 * hysteresis. 3089 * For example, 3090 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3091 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 3092 * EC will throttle ap when temperature >= 301 K, and release throttling when 3093 * temperature <= 299 K. 3094 * 3095 * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 3096 * For example, 3097 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3098 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 3099 * EC will throttle ap when temperature >= 301 K, and release throttling when 3100 * temperature <= 294 K. 3101 * 3102 * Note that this structure is a sub-structure of 3103 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3104 */ 3105 struct ec_thermal_config { 3106 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 3107 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3108 uint32_t temp_fan_off; /* no active cooling needed */ 3109 uint32_t temp_fan_max; /* max active cooling needed */ 3110 } __ec_align4; 3111 3112 /* Version 1 - get config for one sensor. */ 3113 struct ec_params_thermal_get_threshold_v1 { 3114 uint32_t sensor_num; 3115 } __ec_align4; 3116 /* This returns a struct ec_thermal_config */ 3117 3118 /* 3119 * Version 1 - set config for one sensor. 3120 * Use read-modify-write for best results! 3121 */ 3122 struct ec_params_thermal_set_threshold_v1 { 3123 uint32_t sensor_num; 3124 struct ec_thermal_config cfg; 3125 } __ec_align4; 3126 /* This returns no data */ 3127 3128 /****************************************************************************/ 3129 3130 /* Toggle automatic fan control */ 3131 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3132 3133 /* Version 1 of input params */ 3134 struct ec_params_auto_fan_ctrl_v1 { 3135 uint8_t fan_idx; 3136 } __ec_align1; 3137 3138 /* Get/Set TMP006 calibration data */ 3139 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 3140 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 3141 3142 /* 3143 * The original TMP006 calibration only needed four params, but now we need 3144 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 3145 * the params opaque. The v1 "get" response will include the algorithm number 3146 * and how many params it requires. That way we can change the EC code without 3147 * needing to update this file. We can also use a different algorithm on each 3148 * sensor. 3149 */ 3150 3151 /* This is the same struct for both v0 and v1. */ 3152 struct ec_params_tmp006_get_calibration { 3153 uint8_t index; 3154 } __ec_align1; 3155 3156 /* Version 0 */ 3157 struct ec_response_tmp006_get_calibration_v0 { 3158 float s0; 3159 float b0; 3160 float b1; 3161 float b2; 3162 } __ec_align4; 3163 3164 struct ec_params_tmp006_set_calibration_v0 { 3165 uint8_t index; 3166 uint8_t reserved[3]; 3167 float s0; 3168 float b0; 3169 float b1; 3170 float b2; 3171 } __ec_align4; 3172 3173 /* Version 1 */ 3174 struct ec_response_tmp006_get_calibration_v1 { 3175 uint8_t algorithm; 3176 uint8_t num_params; 3177 uint8_t reserved[2]; 3178 float val[]; 3179 } __ec_align4; 3180 3181 struct ec_params_tmp006_set_calibration_v1 { 3182 uint8_t index; 3183 uint8_t algorithm; 3184 uint8_t num_params; 3185 uint8_t reserved; 3186 float val[]; 3187 } __ec_align4; 3188 3189 3190 /* Read raw TMP006 data */ 3191 #define EC_CMD_TMP006_GET_RAW 0x0055 3192 3193 struct ec_params_tmp006_get_raw { 3194 uint8_t index; 3195 } __ec_align1; 3196 3197 struct ec_response_tmp006_get_raw { 3198 int32_t t; /* In 1/100 K */ 3199 int32_t v; /* In nV */ 3200 } __ec_align4; 3201 3202 /*****************************************************************************/ 3203 /* MKBP - Matrix KeyBoard Protocol */ 3204 3205 /* 3206 * Read key state 3207 * 3208 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 3209 * expected response size. 3210 * 3211 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 3212 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3213 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3214 */ 3215 #define EC_CMD_MKBP_STATE 0x0060 3216 3217 /* 3218 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3219 */ 3220 #define EC_CMD_MKBP_INFO 0x0061 3221 3222 struct ec_response_mkbp_info { 3223 uint32_t rows; 3224 uint32_t cols; 3225 /* Formerly "switches", which was 0. */ 3226 uint8_t reserved; 3227 } __ec_align_size1; 3228 3229 struct ec_params_mkbp_info { 3230 uint8_t info_type; 3231 uint8_t event_type; 3232 } __ec_align1; 3233 3234 enum ec_mkbp_info_type { 3235 /* 3236 * Info about the keyboard matrix: number of rows and columns. 3237 * 3238 * Returns struct ec_response_mkbp_info. 3239 */ 3240 EC_MKBP_INFO_KBD = 0, 3241 3242 /* 3243 * For buttons and switches, info about which specifically are 3244 * supported. event_type must be set to one of the values in enum 3245 * ec_mkbp_event. 3246 * 3247 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 3248 * bitmask indicating which buttons or switches are present. See the 3249 * bit inidices below. 3250 */ 3251 EC_MKBP_INFO_SUPPORTED = 1, 3252 3253 /* 3254 * Instantaneous state of buttons and switches. 3255 * 3256 * event_type must be set to one of the values in enum ec_mkbp_event. 3257 * 3258 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 3259 * indicating the current state of the keyboard matrix. 3260 * 3261 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 3262 * event state. 3263 * 3264 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 3265 * state of supported buttons. 3266 * 3267 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 3268 * state of supported switches. 3269 */ 3270 EC_MKBP_INFO_CURRENT = 2, 3271 }; 3272 3273 /* Simulate key press */ 3274 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3275 3276 struct ec_params_mkbp_simulate_key { 3277 uint8_t col; 3278 uint8_t row; 3279 uint8_t pressed; 3280 } __ec_align1; 3281 3282 #define EC_CMD_GET_KEYBOARD_ID 0x0063 3283 3284 struct ec_response_keyboard_id { 3285 uint32_t keyboard_id; 3286 } __ec_align4; 3287 3288 enum keyboard_id { 3289 KEYBOARD_ID_UNSUPPORTED = 0, 3290 KEYBOARD_ID_UNREADABLE = 0xffffffff, 3291 }; 3292 3293 /* Configure keyboard scanning */ 3294 #define EC_CMD_MKBP_SET_CONFIG 0x0064 3295 #define EC_CMD_MKBP_GET_CONFIG 0x0065 3296 3297 /* flags */ 3298 enum mkbp_config_flags { 3299 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 3300 }; 3301 3302 enum mkbp_config_valid { 3303 EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 3304 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 3305 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 3306 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 3307 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 3308 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 3309 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3310 }; 3311 3312 /* 3313 * Configuration for our key scanning algorithm. 3314 * 3315 * Note that this is used as a sub-structure of 3316 * ec_{params/response}_mkbp_get_config. 3317 */ 3318 struct ec_mkbp_config { 3319 uint32_t valid_mask; /* valid fields */ 3320 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 3321 uint8_t valid_flags; /* which flags are valid */ 3322 uint16_t scan_period_us; /* period between start of scans */ 3323 /* revert to interrupt mode after no activity for this long */ 3324 uint32_t poll_timeout_us; 3325 /* 3326 * minimum post-scan relax time. Once we finish a scan we check 3327 * the time until we are due to start the next one. If this time is 3328 * shorter this field, we use this instead. 3329 */ 3330 uint16_t min_post_scan_delay_us; 3331 /* delay between setting up output and waiting for it to settle */ 3332 uint16_t output_settle_us; 3333 uint16_t debounce_down_us; /* time for debounce on key down */ 3334 uint16_t debounce_up_us; /* time for debounce on key up */ 3335 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3336 uint8_t fifo_max_depth; 3337 } __ec_align_size1; 3338 3339 struct ec_params_mkbp_set_config { 3340 struct ec_mkbp_config config; 3341 } __ec_align_size1; 3342 3343 struct ec_response_mkbp_get_config { 3344 struct ec_mkbp_config config; 3345 } __ec_align_size1; 3346 3347 /* Run the key scan emulation */ 3348 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3349 3350 enum ec_keyscan_seq_cmd { 3351 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 3352 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 3353 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 3354 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 3355 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 3356 }; 3357 3358 enum ec_collect_flags { 3359 /* 3360 * Indicates this scan was processed by the EC. Due to timing, some 3361 * scans may be skipped. 3362 */ 3363 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3364 }; 3365 3366 struct ec_collect_item { 3367 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3368 } __ec_align1; 3369 3370 struct ec_params_keyscan_seq_ctrl { 3371 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3372 union { 3373 struct __ec_align1 { 3374 uint8_t active; /* still active */ 3375 uint8_t num_items; /* number of items */ 3376 /* Current item being presented */ 3377 uint8_t cur_item; 3378 } status; 3379 struct __ec_todo_unpacked { 3380 /* 3381 * Absolute time for this scan, measured from the 3382 * start of the sequence. 3383 */ 3384 uint32_t time_us; 3385 uint8_t scan[0]; /* keyscan data */ 3386 } add; 3387 struct __ec_align1 { 3388 uint8_t start_item; /* First item to return */ 3389 uint8_t num_items; /* Number of items to return */ 3390 } collect; 3391 }; 3392 } __ec_todo_packed; 3393 3394 struct ec_result_keyscan_seq_ctrl { 3395 union { 3396 struct __ec_todo_unpacked { 3397 uint8_t num_items; /* Number of items */ 3398 /* Data for each item */ 3399 struct ec_collect_item item[0]; 3400 } collect; 3401 }; 3402 } __ec_todo_packed; 3403 3404 /* 3405 * Get the next pending MKBP event. 3406 * 3407 * Returns EC_RES_UNAVAILABLE if there is no event pending. 3408 */ 3409 #define EC_CMD_GET_NEXT_EVENT 0x0067 3410 3411 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 3412 3413 /* 3414 * We use the most significant bit of the event type to indicate to the host 3415 * that the EC has more MKBP events available to provide. 3416 */ 3417 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 3418 3419 /* The mask to apply to get the raw event type */ 3420 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3421 3422 enum ec_mkbp_event { 3423 /* Keyboard matrix changed. The event data is the new matrix state. */ 3424 EC_MKBP_EVENT_KEY_MATRIX = 0, 3425 3426 /* New host event. The event data is 4 bytes of host event flags. */ 3427 EC_MKBP_EVENT_HOST_EVENT = 1, 3428 3429 /* New Sensor FIFO data. The event data is fifo_info structure. */ 3430 EC_MKBP_EVENT_SENSOR_FIFO = 2, 3431 3432 /* The state of the non-matrixed buttons have changed. */ 3433 EC_MKBP_EVENT_BUTTON = 3, 3434 3435 /* The state of the switches have changed. */ 3436 EC_MKBP_EVENT_SWITCH = 4, 3437 3438 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 3439 EC_MKBP_EVENT_FINGERPRINT = 5, 3440 3441 /* 3442 * Sysrq event: send emulated sysrq. The event data is sysrq, 3443 * corresponding to the key to be pressed. 3444 */ 3445 EC_MKBP_EVENT_SYSRQ = 6, 3446 3447 /* 3448 * New 64-bit host event. 3449 * The event data is 8 bytes of host event flags. 3450 */ 3451 EC_MKBP_EVENT_HOST_EVENT64 = 7, 3452 3453 /* Notify the AP that something happened on CEC */ 3454 EC_MKBP_EVENT_CEC_EVENT = 8, 3455 3456 /* Send an incoming CEC message to the AP */ 3457 EC_MKBP_EVENT_CEC_MESSAGE = 9, 3458 3459 /* Peripheral device charger event */ 3460 EC_MKBP_EVENT_PCHG = 12, 3461 3462 /* Number of MKBP events */ 3463 EC_MKBP_EVENT_COUNT, 3464 }; 3465 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3466 3467 union __ec_align_offset1 ec_response_get_next_data { 3468 uint8_t key_matrix[13]; 3469 3470 /* Unaligned */ 3471 uint32_t host_event; 3472 uint64_t host_event64; 3473 3474 struct __ec_todo_unpacked { 3475 /* For aligning the fifo_info */ 3476 uint8_t reserved[3]; 3477 struct ec_response_motion_sense_fifo_info info; 3478 } sensor_fifo; 3479 3480 uint32_t buttons; 3481 3482 uint32_t switches; 3483 3484 uint32_t fp_events; 3485 3486 uint32_t sysrq; 3487 3488 /* CEC events from enum mkbp_cec_event */ 3489 uint32_t cec_events; 3490 }; 3491 3492 union __ec_align_offset1 ec_response_get_next_data_v1 { 3493 uint8_t key_matrix[16]; 3494 3495 /* Unaligned */ 3496 uint32_t host_event; 3497 uint64_t host_event64; 3498 3499 struct __ec_todo_unpacked { 3500 /* For aligning the fifo_info */ 3501 uint8_t reserved[3]; 3502 struct ec_response_motion_sense_fifo_info info; 3503 } sensor_fifo; 3504 3505 uint32_t buttons; 3506 3507 uint32_t switches; 3508 3509 uint32_t fp_events; 3510 3511 uint32_t sysrq; 3512 3513 /* CEC events from enum mkbp_cec_event */ 3514 uint32_t cec_events; 3515 3516 uint8_t cec_message[16]; 3517 }; 3518 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3519 3520 union __ec_align_offset1 ec_response_get_next_data_v3 { 3521 uint8_t key_matrix[18]; 3522 3523 /* Unaligned */ 3524 uint32_t host_event; 3525 uint64_t host_event64; 3526 3527 struct __ec_todo_unpacked { 3528 /* For aligning the fifo_info */ 3529 uint8_t reserved[3]; 3530 struct ec_response_motion_sense_fifo_info info; 3531 } sensor_fifo; 3532 3533 uint32_t buttons; 3534 3535 uint32_t switches; 3536 3537 uint32_t fp_events; 3538 3539 uint32_t sysrq; 3540 3541 /* CEC events from enum mkbp_cec_event */ 3542 uint32_t cec_events; 3543 3544 uint8_t cec_message[16]; 3545 }; 3546 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3) == 18); 3547 3548 struct ec_response_get_next_event { 3549 uint8_t event_type; 3550 /* Followed by event data if any */ 3551 union ec_response_get_next_data data; 3552 } __ec_align1; 3553 3554 struct ec_response_get_next_event_v1 { 3555 uint8_t event_type; 3556 /* Followed by event data if any */ 3557 union ec_response_get_next_data_v1 data; 3558 } __ec_align1; 3559 3560 struct ec_response_get_next_event_v3 { 3561 uint8_t event_type; 3562 /* Followed by event data if any */ 3563 union ec_response_get_next_data_v3 data; 3564 } __ec_align1; 3565 3566 /* Bit indices for buttons and switches.*/ 3567 /* Buttons */ 3568 #define EC_MKBP_POWER_BUTTON 0 3569 #define EC_MKBP_VOL_UP 1 3570 #define EC_MKBP_VOL_DOWN 2 3571 #define EC_MKBP_RECOVERY 3 3572 #define EC_MKBP_BRI_UP 4 3573 #define EC_MKBP_BRI_DOWN 5 3574 #define EC_MKBP_SCREEN_LOCK 6 3575 3576 /* Switches */ 3577 #define EC_MKBP_LID_OPEN 0 3578 #define EC_MKBP_TABLET_MODE 1 3579 #define EC_MKBP_BASE_ATTACHED 2 3580 #define EC_MKBP_FRONT_PROXIMITY 3 3581 3582 /* Run keyboard factory test scanning */ 3583 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3584 3585 struct ec_response_keyboard_factory_test { 3586 uint16_t shorted; /* Keyboard pins are shorted */ 3587 } __ec_align2; 3588 3589 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3590 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3591 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 3592 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 3593 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 3594 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 3595 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 3596 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 3597 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 3598 >> EC_MKBP_FP_MATCH_IDX_OFFSET) 3599 #define EC_MKBP_FP_ENROLL BIT(27) 3600 #define EC_MKBP_FP_MATCH BIT(28) 3601 #define EC_MKBP_FP_FINGER_DOWN BIT(29) 3602 #define EC_MKBP_FP_FINGER_UP BIT(30) 3603 #define EC_MKBP_FP_IMAGE_READY BIT(31) 3604 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 3605 #define EC_MKBP_FP_ERR_ENROLL_OK 0 3606 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 3607 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 3608 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 3609 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 3610 /* Can be used to detect if image was usable for enrollment or not. */ 3611 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 3612 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 3613 #define EC_MKBP_FP_ERR_MATCH_NO 0 3614 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 3615 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 3616 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 3617 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 3618 #define EC_MKBP_FP_ERR_MATCH_YES 1 3619 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 3620 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 3621 3622 3623 /*****************************************************************************/ 3624 /* Temperature sensor commands */ 3625 3626 /* Read temperature sensor info */ 3627 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3628 3629 struct ec_params_temp_sensor_get_info { 3630 uint8_t id; 3631 } __ec_align1; 3632 3633 struct ec_response_temp_sensor_get_info { 3634 char sensor_name[32]; 3635 uint8_t sensor_type; 3636 } __ec_align1; 3637 3638 /*****************************************************************************/ 3639 3640 /* 3641 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3642 * commands accidentally sent to the wrong interface. See the ACPI section 3643 * below. 3644 */ 3645 3646 /*****************************************************************************/ 3647 /* Host event commands */ 3648 3649 3650 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3651 /* 3652 * Host event mask params and response structures, shared by all of the host 3653 * event commands below. 3654 */ 3655 struct ec_params_host_event_mask { 3656 uint32_t mask; 3657 } __ec_align4; 3658 3659 struct ec_response_host_event_mask { 3660 uint32_t mask; 3661 } __ec_align4; 3662 3663 /* These all use ec_response_host_event_mask */ 3664 #define EC_CMD_HOST_EVENT_GET_B 0x0087 3665 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3666 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3667 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3668 3669 /* These all use ec_params_host_event_mask */ 3670 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3671 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3672 #define EC_CMD_HOST_EVENT_CLEAR 0x008C 3673 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3674 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3675 3676 /* 3677 * Unified host event programming interface - Should be used by newer versions 3678 * of BIOS/OS to program host events and masks 3679 */ 3680 3681 struct ec_params_host_event { 3682 3683 /* Action requested by host - one of enum ec_host_event_action. */ 3684 uint8_t action; 3685 3686 /* 3687 * Mask type that the host requested the action on - one of 3688 * enum ec_host_event_mask_type. 3689 */ 3690 uint8_t mask_type; 3691 3692 /* Set to 0, ignore on read */ 3693 uint16_t reserved; 3694 3695 /* Value to be used in case of set operations. */ 3696 uint64_t value; 3697 } __ec_align4; 3698 3699 /* 3700 * Response structure returned by EC_CMD_HOST_EVENT. 3701 * Update the value on a GET request. Set to 0 on GET/CLEAR 3702 */ 3703 3704 struct ec_response_host_event { 3705 3706 /* Mask value in case of get operation */ 3707 uint64_t value; 3708 } __ec_align4; 3709 3710 enum ec_host_event_action { 3711 /* 3712 * params.value is ignored. Value of mask_type populated 3713 * in response.value 3714 */ 3715 EC_HOST_EVENT_GET, 3716 3717 /* Bits in params.value are set */ 3718 EC_HOST_EVENT_SET, 3719 3720 /* Bits in params.value are cleared */ 3721 EC_HOST_EVENT_CLEAR, 3722 }; 3723 3724 enum ec_host_event_mask_type { 3725 3726 /* Main host event copy */ 3727 EC_HOST_EVENT_MAIN, 3728 3729 /* Copy B of host events */ 3730 EC_HOST_EVENT_B, 3731 3732 /* SCI Mask */ 3733 EC_HOST_EVENT_SCI_MASK, 3734 3735 /* SMI Mask */ 3736 EC_HOST_EVENT_SMI_MASK, 3737 3738 /* Mask of events that should be always reported in hostevents */ 3739 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3740 3741 /* Active wake mask */ 3742 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3743 3744 /* Lazy wake mask for S0ix */ 3745 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3746 3747 /* Lazy wake mask for S3 */ 3748 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3749 3750 /* Lazy wake mask for S5 */ 3751 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3752 }; 3753 3754 #define EC_CMD_HOST_EVENT 0x00A4 3755 3756 /*****************************************************************************/ 3757 /* Switch commands */ 3758 3759 /* Enable/disable LCD backlight */ 3760 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3761 3762 struct ec_params_switch_enable_backlight { 3763 uint8_t enabled; 3764 } __ec_align1; 3765 3766 /* Enable/disable WLAN/Bluetooth */ 3767 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3768 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3769 3770 /* Version 0 params; no response */ 3771 struct ec_params_switch_enable_wireless_v0 { 3772 uint8_t enabled; 3773 } __ec_align1; 3774 3775 /* Version 1 params */ 3776 struct ec_params_switch_enable_wireless_v1 { 3777 /* Flags to enable now */ 3778 uint8_t now_flags; 3779 3780 /* Which flags to copy from now_flags */ 3781 uint8_t now_mask; 3782 3783 /* 3784 * Flags to leave enabled in S3, if they're on at the S0->S3 3785 * transition. (Other flags will be disabled by the S0->S3 3786 * transition.) 3787 */ 3788 uint8_t suspend_flags; 3789 3790 /* Which flags to copy from suspend_flags */ 3791 uint8_t suspend_mask; 3792 } __ec_align1; 3793 3794 /* Version 1 response */ 3795 struct ec_response_switch_enable_wireless_v1 { 3796 /* Flags to enable now */ 3797 uint8_t now_flags; 3798 3799 /* Flags to leave enabled in S3 */ 3800 uint8_t suspend_flags; 3801 } __ec_align1; 3802 3803 /*****************************************************************************/ 3804 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3805 3806 /* Set GPIO output value */ 3807 #define EC_CMD_GPIO_SET 0x0092 3808 3809 struct ec_params_gpio_set { 3810 char name[32]; 3811 uint8_t val; 3812 } __ec_align1; 3813 3814 /* Get GPIO value */ 3815 #define EC_CMD_GPIO_GET 0x0093 3816 3817 /* Version 0 of input params and response */ 3818 struct ec_params_gpio_get { 3819 char name[32]; 3820 } __ec_align1; 3821 3822 struct ec_response_gpio_get { 3823 uint8_t val; 3824 } __ec_align1; 3825 3826 /* Version 1 of input params and response */ 3827 struct ec_params_gpio_get_v1 { 3828 uint8_t subcmd; 3829 union { 3830 struct __ec_align1 { 3831 char name[32]; 3832 } get_value_by_name; 3833 struct __ec_align1 { 3834 uint8_t index; 3835 } get_info; 3836 }; 3837 } __ec_align1; 3838 3839 struct ec_response_gpio_get_v1 { 3840 union { 3841 struct __ec_align1 { 3842 uint8_t val; 3843 } get_value_by_name, get_count; 3844 struct __ec_todo_unpacked { 3845 uint8_t val; 3846 char name[32]; 3847 uint32_t flags; 3848 } get_info; 3849 }; 3850 } __ec_todo_packed; 3851 3852 enum gpio_get_subcmd { 3853 EC_GPIO_GET_BY_NAME = 0, 3854 EC_GPIO_GET_COUNT = 1, 3855 EC_GPIO_GET_INFO = 2, 3856 }; 3857 3858 /*****************************************************************************/ 3859 /* I2C commands. Only available when flash write protect is unlocked. */ 3860 3861 /* 3862 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3863 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3864 * 3865 * Use EC_CMD_I2C_PASSTHRU instead. 3866 */ 3867 3868 /* Read I2C bus */ 3869 #define EC_CMD_I2C_READ 0x0094 3870 3871 struct ec_params_i2c_read { 3872 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3873 uint8_t read_size; /* Either 8 or 16. */ 3874 uint8_t port; 3875 uint8_t offset; 3876 } __ec_align_size1; 3877 3878 struct ec_response_i2c_read { 3879 uint16_t data; 3880 } __ec_align2; 3881 3882 /* Write I2C bus */ 3883 #define EC_CMD_I2C_WRITE 0x0095 3884 3885 struct ec_params_i2c_write { 3886 uint16_t data; 3887 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3888 uint8_t write_size; /* Either 8 or 16. */ 3889 uint8_t port; 3890 uint8_t offset; 3891 } __ec_align_size1; 3892 3893 /*****************************************************************************/ 3894 /* Charge state commands. Only available when flash write protect unlocked. */ 3895 3896 /* Force charge state machine to stop charging the battery or force it to 3897 * discharge the battery. 3898 */ 3899 #define EC_CMD_CHARGE_CONTROL 0x0096 3900 #define EC_VER_CHARGE_CONTROL 3 3901 3902 enum ec_charge_control_mode { 3903 CHARGE_CONTROL_NORMAL = 0, 3904 CHARGE_CONTROL_IDLE, 3905 CHARGE_CONTROL_DISCHARGE, 3906 /* Add no more entry below. */ 3907 CHARGE_CONTROL_COUNT, 3908 }; 3909 3910 #define EC_CHARGE_MODE_TEXT \ 3911 { \ 3912 [CHARGE_CONTROL_NORMAL] = "NORMAL", \ 3913 [CHARGE_CONTROL_IDLE] = "IDLE", \ 3914 [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \ 3915 } 3916 3917 enum ec_charge_control_cmd { 3918 EC_CHARGE_CONTROL_CMD_SET = 0, 3919 EC_CHARGE_CONTROL_CMD_GET, 3920 }; 3921 3922 enum ec_charge_control_flag { 3923 EC_CHARGE_CONTROL_FLAG_NO_IDLE = BIT(0), 3924 }; 3925 3926 struct ec_params_charge_control { 3927 uint32_t mode; /* enum charge_control_mode */ 3928 3929 /* Below are the fields added in V2. */ 3930 uint8_t cmd; /* enum ec_charge_control_cmd. */ 3931 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 3932 /* 3933 * Lower and upper thresholds for battery sustainer. This struct isn't 3934 * named to avoid tainting foreign projects' name spaces. 3935 * 3936 * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer 3937 * will be disabled. To disable battery sustainer, set mode=NORMAL, 3938 * lower=-1, upper=-1. 3939 */ 3940 struct { 3941 int8_t lower; /* Display SoC in percentage. */ 3942 int8_t upper; /* Display SoC in percentage. */ 3943 } sustain_soc; 3944 } __ec_align4; 3945 3946 /* Added in v2 */ 3947 struct ec_response_charge_control { 3948 uint32_t mode; /* enum charge_control_mode */ 3949 struct { /* Battery sustainer thresholds */ 3950 int8_t lower; 3951 int8_t upper; 3952 } sustain_soc; 3953 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 3954 uint8_t reserved; 3955 } __ec_align4; 3956 3957 /*****************************************************************************/ 3958 3959 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3960 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3961 3962 /* 3963 * Read data from the saved snapshot. If the subcmd parameter is 3964 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 3965 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 3966 * end of the previous snapshot. 3967 * 3968 * The params are only looked at in version >= 1 of this command. Prior 3969 * versions will just default to CONSOLE_READ_NEXT behavior. 3970 * 3971 * Response is null-terminated string. Empty string, if there is no more 3972 * remaining output. 3973 */ 3974 #define EC_CMD_CONSOLE_READ 0x0098 3975 3976 enum ec_console_read_subcmd { 3977 CONSOLE_READ_NEXT = 0, 3978 CONSOLE_READ_RECENT 3979 }; 3980 3981 struct ec_params_console_read_v1 { 3982 uint8_t subcmd; /* enum ec_console_read_subcmd */ 3983 } __ec_align1; 3984 3985 /*****************************************************************************/ 3986 3987 /* 3988 * Cut off battery power immediately or after the host has shut down. 3989 * 3990 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 3991 * EC_RES_SUCCESS if the command was successful. 3992 * EC_RES_ERROR if the cut off command failed. 3993 */ 3994 #define EC_CMD_BATTERY_CUT_OFF 0x0099 3995 3996 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 3997 3998 struct ec_params_battery_cutoff { 3999 uint8_t flags; 4000 } __ec_align1; 4001 4002 /*****************************************************************************/ 4003 /* USB port mux control. */ 4004 4005 /* 4006 * Switch USB mux or return to automatic switching. 4007 */ 4008 #define EC_CMD_USB_MUX 0x009A 4009 4010 struct ec_params_usb_mux { 4011 uint8_t mux; 4012 } __ec_align1; 4013 4014 /*****************************************************************************/ 4015 /* LDOs / FETs control. */ 4016 4017 enum ec_ldo_state { 4018 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 4019 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 4020 }; 4021 4022 /* 4023 * Switch on/off a LDO. 4024 */ 4025 #define EC_CMD_LDO_SET 0x009B 4026 4027 struct ec_params_ldo_set { 4028 uint8_t index; 4029 uint8_t state; 4030 } __ec_align1; 4031 4032 /* 4033 * Get LDO state. 4034 */ 4035 #define EC_CMD_LDO_GET 0x009C 4036 4037 struct ec_params_ldo_get { 4038 uint8_t index; 4039 } __ec_align1; 4040 4041 struct ec_response_ldo_get { 4042 uint8_t state; 4043 } __ec_align1; 4044 4045 /*****************************************************************************/ 4046 /* Power info. */ 4047 4048 /* 4049 * Get power info. 4050 */ 4051 #define EC_CMD_POWER_INFO 0x009D 4052 4053 struct ec_response_power_info { 4054 uint32_t usb_dev_type; 4055 uint16_t voltage_ac; 4056 uint16_t voltage_system; 4057 uint16_t current_system; 4058 uint16_t usb_current_limit; 4059 } __ec_align4; 4060 4061 /*****************************************************************************/ 4062 /* I2C passthru command */ 4063 4064 #define EC_CMD_I2C_PASSTHRU 0x009E 4065 4066 /* Read data; if not present, message is a write */ 4067 #define EC_I2C_FLAG_READ BIT(15) 4068 4069 /* Mask for address */ 4070 #define EC_I2C_ADDR_MASK 0x3ff 4071 4072 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 4073 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 4074 4075 /* Any error */ 4076 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 4077 4078 struct ec_params_i2c_passthru_msg { 4079 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 4080 uint16_t len; /* Number of bytes to read or write */ 4081 } __ec_align2; 4082 4083 struct ec_params_i2c_passthru { 4084 uint8_t port; /* I2C port number */ 4085 uint8_t num_msgs; /* Number of messages */ 4086 struct ec_params_i2c_passthru_msg msg[]; 4087 /* Data to write for all messages is concatenated here */ 4088 } __ec_align2; 4089 4090 struct ec_response_i2c_passthru { 4091 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 4092 uint8_t num_msgs; /* Number of messages processed */ 4093 uint8_t data[]; /* Data read by messages concatenated here */ 4094 } __ec_align1; 4095 4096 /*****************************************************************************/ 4097 /* AP hang detect */ 4098 #define EC_CMD_HANG_DETECT 0x009F 4099 4100 #define EC_HANG_DETECT_MIN_TIMEOUT 5 4101 #define EC_HANG_DETECT_MAX_TIMEOUT 65535 4102 4103 /* EC hang detect commands */ 4104 enum ec_hang_detect_cmds { 4105 /* Reload AP hang detect timer. */ 4106 EC_HANG_DETECT_CMD_RELOAD = 0x0, 4107 4108 /* Stop AP hang detect timer. */ 4109 EC_HANG_DETECT_CMD_CANCEL = 0x1, 4110 4111 /* Configure watchdog with given reboot timeout and 4112 * cancel currently running AP hang detect timer. 4113 */ 4114 EC_HANG_DETECT_CMD_SET_TIMEOUT = 0x2, 4115 4116 /* Get last hang status - whether the AP boot was clear or not */ 4117 EC_HANG_DETECT_CMD_GET_STATUS = 0x3, 4118 4119 /* Clear last hang status. Called when AP is rebooting/shutting down 4120 * gracefully. 4121 */ 4122 EC_HANG_DETECT_CMD_CLEAR_STATUS = 0x4 4123 }; 4124 4125 struct ec_params_hang_detect { 4126 uint16_t command; /* enum ec_hang_detect_cmds */ 4127 /* Timeout in seconds before generating reboot */ 4128 uint16_t reboot_timeout_sec; 4129 } __ec_align2; 4130 4131 /* Status codes that describe whether AP has boot normally or the hang has been 4132 * detected and EC has reset AP 4133 */ 4134 enum ec_hang_detect_status { 4135 EC_HANG_DETECT_AP_BOOT_NORMAL = 0x0, 4136 EC_HANG_DETECT_AP_BOOT_EC_WDT = 0x1, 4137 EC_HANG_DETECT_AP_BOOT_COUNT, 4138 }; 4139 4140 struct ec_response_hang_detect { 4141 uint8_t status; /* enum ec_hang_detect_status */ 4142 } __ec_align1; 4143 /*****************************************************************************/ 4144 /* Commands for battery charging */ 4145 4146 /* 4147 * This is the single catch-all host command to exchange data regarding the 4148 * charge state machine (v2 and up). 4149 */ 4150 #define EC_CMD_CHARGE_STATE 0x00A0 4151 4152 /* Subcommands for this host command */ 4153 enum charge_state_command { 4154 CHARGE_STATE_CMD_GET_STATE, 4155 CHARGE_STATE_CMD_GET_PARAM, 4156 CHARGE_STATE_CMD_SET_PARAM, 4157 CHARGE_STATE_NUM_CMDS 4158 }; 4159 4160 /* 4161 * Known param numbers are defined here. Ranges are reserved for board-specific 4162 * params, which are handled by the particular implementations. 4163 */ 4164 enum charge_state_params { 4165 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 4166 CS_PARAM_CHG_CURRENT, /* charger current limit */ 4167 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4168 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4169 CS_PARAM_CHG_OPTION, /* charger-specific options */ 4170 CS_PARAM_LIMIT_POWER, /* 4171 * Check if power is limited due to 4172 * low battery and / or a weak external 4173 * charger. READ ONLY. 4174 */ 4175 /* How many so far? */ 4176 CS_NUM_BASE_PARAMS, 4177 4178 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 4179 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4180 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4181 4182 /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 4183 CS_PARAM_DEBUG_MIN = 0x20000, 4184 CS_PARAM_DEBUG_CTL_MODE = 0x20000, 4185 CS_PARAM_DEBUG_MANUAL_MODE, 4186 CS_PARAM_DEBUG_SEEMS_DEAD, 4187 CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 4188 CS_PARAM_DEBUG_BATT_REMOVED, 4189 CS_PARAM_DEBUG_MANUAL_CURRENT, 4190 CS_PARAM_DEBUG_MANUAL_VOLTAGE, 4191 CS_PARAM_DEBUG_MAX = 0x2ffff, 4192 4193 /* Other custom param ranges go here... */ 4194 }; 4195 4196 struct ec_params_charge_state { 4197 uint8_t cmd; /* enum charge_state_command */ 4198 union { 4199 /* get_state has no args */ 4200 4201 struct __ec_todo_unpacked { 4202 uint32_t param; /* enum charge_state_param */ 4203 } get_param; 4204 4205 struct __ec_todo_unpacked { 4206 uint32_t param; /* param to set */ 4207 uint32_t value; /* value to set */ 4208 } set_param; 4209 }; 4210 } __ec_todo_packed; 4211 4212 struct ec_response_charge_state { 4213 union { 4214 struct __ec_align4 { 4215 int ac; 4216 int chg_voltage; 4217 int chg_current; 4218 int chg_input_current; 4219 int batt_state_of_charge; 4220 } get_state; 4221 4222 struct __ec_align4 { 4223 uint32_t value; 4224 } get_param; 4225 4226 /* set_param returns no args */ 4227 }; 4228 } __ec_align4; 4229 4230 4231 /* 4232 * Set maximum battery charging current. 4233 */ 4234 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4235 4236 struct ec_params_current_limit { 4237 uint32_t limit; /* in mA */ 4238 } __ec_align4; 4239 4240 /* 4241 * Set maximum external voltage / current. 4242 */ 4243 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 4244 4245 /* Command v0 is used only on Spring and is obsolete + unsupported */ 4246 struct ec_params_external_power_limit_v1 { 4247 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4248 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4249 } __ec_align2; 4250 4251 #define EC_POWER_LIMIT_NONE 0xffff 4252 4253 /* 4254 * Set maximum voltage & current of a dedicated charge port 4255 */ 4256 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 4257 4258 struct ec_params_dedicated_charger_limit { 4259 uint16_t current_lim; /* in mA */ 4260 uint16_t voltage_lim; /* in mV */ 4261 } __ec_align2; 4262 4263 /*****************************************************************************/ 4264 /* Hibernate/Deep Sleep Commands */ 4265 4266 /* Set the delay before going into hibernation. */ 4267 #define EC_CMD_HIBERNATION_DELAY 0x00A8 4268 4269 struct ec_params_hibernation_delay { 4270 /* 4271 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 4272 * current settings without changing them. 4273 */ 4274 uint32_t seconds; 4275 } __ec_align4; 4276 4277 struct ec_response_hibernation_delay { 4278 /* 4279 * The current time in seconds in which the system has been in the G3 4280 * state. This value is reset if the EC transitions out of G3. 4281 */ 4282 uint32_t time_g3; 4283 4284 /* 4285 * The current time remaining in seconds until the EC should hibernate. 4286 * This value is also reset if the EC transitions out of G3. 4287 */ 4288 uint32_t time_remaining; 4289 4290 /* 4291 * The current time in seconds that the EC should wait in G3 before 4292 * hibernating. 4293 */ 4294 uint32_t hibernate_delay; 4295 } __ec_align4; 4296 4297 /* Inform the EC when entering a sleep state */ 4298 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4299 4300 enum host_sleep_event { 4301 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4302 HOST_SLEEP_EVENT_S3_RESUME = 2, 4303 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4304 HOST_SLEEP_EVENT_S0IX_RESUME = 4, 4305 /* S3 suspend with additional enabled wake sources */ 4306 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4307 }; 4308 4309 struct ec_params_host_sleep_event { 4310 uint8_t sleep_event; 4311 } __ec_align1; 4312 4313 /* 4314 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep 4315 * transition failures 4316 */ 4317 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 4318 4319 /* Disable timeout detection for this sleep transition */ 4320 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF 4321 4322 struct ec_params_host_sleep_event_v1 { 4323 /* The type of sleep being entered or exited. */ 4324 uint8_t sleep_event; 4325 4326 /* Padding */ 4327 uint8_t reserved; 4328 union { 4329 /* Parameters that apply for suspend messages. */ 4330 struct { 4331 /* 4332 * The timeout in milliseconds between when this message 4333 * is received and when the EC will declare sleep 4334 * transition failure if the sleep signal is not 4335 * asserted. 4336 */ 4337 uint16_t sleep_timeout_ms; 4338 } suspend_params; 4339 4340 /* No parameters for non-suspend messages. */ 4341 }; 4342 } __ec_align2; 4343 4344 /* A timeout occurred when this bit is set */ 4345 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 4346 4347 /* 4348 * The mask defining which bits correspond to the number of sleep transitions, 4349 * as well as the maximum number of suspend line transitions that will be 4350 * reported back to the host. 4351 */ 4352 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF 4353 4354 struct ec_response_host_sleep_event_v1 { 4355 union { 4356 /* Response fields that apply for resume messages. */ 4357 struct { 4358 /* 4359 * The number of sleep power signal transitions that 4360 * occurred since the suspend message. The high bit 4361 * indicates a timeout occurred. 4362 */ 4363 uint32_t sleep_transitions; 4364 } resume_response; 4365 4366 /* No response fields for non-resume messages. */ 4367 }; 4368 } __ec_align4; 4369 4370 /*****************************************************************************/ 4371 /* Device events */ 4372 #define EC_CMD_DEVICE_EVENT 0x00AA 4373 4374 enum ec_device_event { 4375 EC_DEVICE_EVENT_TRACKPAD, 4376 EC_DEVICE_EVENT_DSP, 4377 EC_DEVICE_EVENT_WIFI, 4378 EC_DEVICE_EVENT_WLC, 4379 }; 4380 4381 enum ec_device_event_param { 4382 /* Get and clear pending device events */ 4383 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 4384 /* Get device event mask */ 4385 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 4386 /* Set device event mask */ 4387 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 4388 }; 4389 4390 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 4391 4392 struct ec_params_device_event { 4393 uint32_t event_mask; 4394 uint8_t param; 4395 } __ec_align_size1; 4396 4397 struct ec_response_device_event { 4398 uint32_t event_mask; 4399 } __ec_align4; 4400 4401 /*****************************************************************************/ 4402 /* Smart battery pass-through */ 4403 4404 /* Get / Set 16-bit smart battery registers */ 4405 #define EC_CMD_SB_READ_WORD 0x00B0 4406 #define EC_CMD_SB_WRITE_WORD 0x00B1 4407 4408 /* Get / Set string smart battery parameters 4409 * formatted as SMBUS "block". 4410 */ 4411 #define EC_CMD_SB_READ_BLOCK 0x00B2 4412 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 4413 4414 struct ec_params_sb_rd { 4415 uint8_t reg; 4416 } __ec_align1; 4417 4418 struct ec_response_sb_rd_word { 4419 uint16_t value; 4420 } __ec_align2; 4421 4422 struct ec_params_sb_wr_word { 4423 uint8_t reg; 4424 uint16_t value; 4425 } __ec_align1; 4426 4427 struct ec_response_sb_rd_block { 4428 uint8_t data[32]; 4429 } __ec_align1; 4430 4431 struct ec_params_sb_wr_block { 4432 uint8_t reg; 4433 uint16_t data[32]; 4434 } __ec_align1; 4435 4436 /*****************************************************************************/ 4437 /* Battery vendor parameters 4438 * 4439 * Get or set vendor-specific parameters in the battery. Implementations may 4440 * differ between boards or batteries. On a set operation, the response 4441 * contains the actual value set, which may be rounded or clipped from the 4442 * requested value. 4443 */ 4444 4445 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4446 4447 enum ec_battery_vendor_param_mode { 4448 BATTERY_VENDOR_PARAM_MODE_GET = 0, 4449 BATTERY_VENDOR_PARAM_MODE_SET, 4450 }; 4451 4452 struct ec_params_battery_vendor_param { 4453 uint32_t param; 4454 uint32_t value; 4455 uint8_t mode; 4456 } __ec_align_size1; 4457 4458 struct ec_response_battery_vendor_param { 4459 uint32_t value; 4460 } __ec_align4; 4461 4462 /*****************************************************************************/ 4463 /* 4464 * Smart Battery Firmware Update Commands 4465 */ 4466 #define EC_CMD_SB_FW_UPDATE 0x00B5 4467 4468 enum ec_sb_fw_update_subcmd { 4469 EC_SB_FW_UPDATE_PREPARE = 0x0, 4470 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 4471 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 4472 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 4473 EC_SB_FW_UPDATE_END = 0x4, 4474 EC_SB_FW_UPDATE_STATUS = 0x5, 4475 EC_SB_FW_UPDATE_PROTECT = 0x6, 4476 EC_SB_FW_UPDATE_MAX = 0x7, 4477 }; 4478 4479 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 4480 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 4481 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 4482 4483 struct ec_sb_fw_update_header { 4484 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 4485 uint16_t fw_id; /* firmware id */ 4486 } __ec_align4; 4487 4488 struct ec_params_sb_fw_update { 4489 struct ec_sb_fw_update_header hdr; 4490 union { 4491 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 4492 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4493 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 4494 /* EC_SB_FW_UPDATE_END = 0x4 */ 4495 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4496 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 4497 /* Those have no args */ 4498 4499 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 4500 struct __ec_align4 { 4501 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 4502 } write; 4503 }; 4504 } __ec_align4; 4505 4506 struct ec_response_sb_fw_update { 4507 union { 4508 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4509 struct __ec_align1 { 4510 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 4511 } info; 4512 4513 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4514 struct __ec_align1 { 4515 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 4516 } status; 4517 }; 4518 } __ec_align1; 4519 4520 /* 4521 * Entering Verified Boot Mode Command 4522 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 4523 * Valid Modes are: normal, developer, and recovery. 4524 */ 4525 #define EC_CMD_ENTERING_MODE 0x00B6 4526 4527 struct ec_params_entering_mode { 4528 int vboot_mode; 4529 } __ec_align4; 4530 4531 #define VBOOT_MODE_NORMAL 0 4532 #define VBOOT_MODE_DEVELOPER 1 4533 #define VBOOT_MODE_RECOVERY 2 4534 4535 /*****************************************************************************/ 4536 /* 4537 * I2C passthru protection command: Protects I2C tunnels against access on 4538 * certain addresses (board-specific). 4539 */ 4540 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 4541 4542 enum ec_i2c_passthru_protect_subcmd { 4543 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 4544 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 4545 }; 4546 4547 struct ec_params_i2c_passthru_protect { 4548 uint8_t subcmd; 4549 uint8_t port; /* I2C port number */ 4550 } __ec_align1; 4551 4552 struct ec_response_i2c_passthru_protect { 4553 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 4554 } __ec_align1; 4555 4556 4557 /*****************************************************************************/ 4558 /* 4559 * HDMI CEC commands 4560 * 4561 * These commands are for sending and receiving message via HDMI CEC 4562 */ 4563 4564 #define EC_CEC_MAX_PORTS 16 4565 4566 #define MAX_CEC_MSG_LEN 16 4567 4568 /* 4569 * Helper macros for packing/unpacking cec_events. 4570 * bits[27:0] : bitmask of events from enum mkbp_cec_event 4571 * bits[31:28]: port number 4572 */ 4573 #define EC_MKBP_EVENT_CEC_PACK(events, port) \ 4574 (((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28)) 4575 #define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0)) 4576 #define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf) 4577 4578 /* CEC message from the AP to be written on the CEC bus */ 4579 #define EC_CMD_CEC_WRITE_MSG 0x00B8 4580 4581 /** 4582 * struct ec_params_cec_write - Message to write to the CEC bus 4583 * @msg: message content to write to the CEC bus 4584 */ 4585 struct ec_params_cec_write { 4586 uint8_t msg[MAX_CEC_MSG_LEN]; 4587 } __ec_align1; 4588 4589 /** 4590 * struct ec_params_cec_write_v1 - Message to write to the CEC bus 4591 * @port: CEC port to write the message on 4592 * @msg_len: length of msg in bytes 4593 * @msg: message content to write to the CEC bus 4594 */ 4595 struct ec_params_cec_write_v1 { 4596 uint8_t port; 4597 uint8_t msg_len; 4598 uint8_t msg[MAX_CEC_MSG_LEN]; 4599 } __ec_align1; 4600 4601 /* CEC message read from a CEC bus reported back to the AP */ 4602 #define EC_CMD_CEC_READ_MSG 0x00B9 4603 4604 /** 4605 * struct ec_params_cec_read - Read a message from the CEC bus 4606 * @port: CEC port to read a message on 4607 */ 4608 struct ec_params_cec_read { 4609 uint8_t port; 4610 } __ec_align1; 4611 4612 /** 4613 * struct ec_response_cec_read - Message read from the CEC bus 4614 * @msg_len: length of msg in bytes 4615 * @msg: message content read from the CEC bus 4616 */ 4617 struct ec_response_cec_read { 4618 uint8_t msg_len; 4619 uint8_t msg[MAX_CEC_MSG_LEN]; 4620 } __ec_align1; 4621 4622 /* Set various CEC parameters */ 4623 #define EC_CMD_CEC_SET 0x00BA 4624 4625 /** 4626 * struct ec_params_cec_set - CEC parameters set 4627 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4628 * @port: CEC port to set the parameter on 4629 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4630 * or 1 to enable CEC functionality, in case cmd is 4631 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 4632 * address between 0 and 15 or 0xff to unregister 4633 */ 4634 struct ec_params_cec_set { 4635 uint8_t cmd : 4; /* enum cec_command */ 4636 uint8_t port : 4; 4637 uint8_t val; 4638 } __ec_align1; 4639 4640 /* Read various CEC parameters */ 4641 #define EC_CMD_CEC_GET 0x00BB 4642 4643 /** 4644 * struct ec_params_cec_get - CEC parameters get 4645 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4646 * @port: CEC port to get the parameter on 4647 */ 4648 struct ec_params_cec_get { 4649 uint8_t cmd : 4; /* enum cec_command */ 4650 uint8_t port : 4; 4651 } __ec_align1; 4652 4653 /** 4654 * struct ec_response_cec_get - CEC parameters get response 4655 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4656 * disabled or 1 if CEC functionality is enabled, 4657 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4658 * configured logical address between 0 and 15 or 0xff if unregistered 4659 */ 4660 struct ec_response_cec_get { 4661 uint8_t val; 4662 } __ec_align1; 4663 4664 /* Get the number of CEC ports */ 4665 #define EC_CMD_CEC_PORT_COUNT 0x00C1 4666 4667 /** 4668 * struct ec_response_cec_port_count - CEC port count response 4669 * @port_count: number of CEC ports 4670 */ 4671 struct ec_response_cec_port_count { 4672 uint8_t port_count; 4673 } __ec_align1; 4674 4675 /* CEC parameters command */ 4676 enum cec_command { 4677 /* CEC reading, writing and events enable */ 4678 CEC_CMD_ENABLE, 4679 /* CEC logical address */ 4680 CEC_CMD_LOGICAL_ADDRESS, 4681 }; 4682 4683 /* Events from CEC to AP */ 4684 enum mkbp_cec_event { 4685 /* Outgoing message was acknowledged by a follower */ 4686 EC_MKBP_CEC_SEND_OK = BIT(0), 4687 /* Outgoing message was not acknowledged */ 4688 EC_MKBP_CEC_SEND_FAILED = BIT(1), 4689 /* Incoming message can be read out by AP */ 4690 EC_MKBP_CEC_HAVE_DATA = BIT(2), 4691 }; 4692 4693 /*****************************************************************************/ 4694 4695 /* Commands for audio codec. */ 4696 #define EC_CMD_EC_CODEC 0x00BC 4697 4698 enum ec_codec_subcmd { 4699 EC_CODEC_GET_CAPABILITIES = 0x0, 4700 EC_CODEC_GET_SHM_ADDR = 0x1, 4701 EC_CODEC_SET_SHM_ADDR = 0x2, 4702 EC_CODEC_SUBCMD_COUNT, 4703 }; 4704 4705 enum ec_codec_cap { 4706 EC_CODEC_CAP_WOV_AUDIO_SHM = 0, 4707 EC_CODEC_CAP_WOV_LANG_SHM = 1, 4708 EC_CODEC_CAP_LAST = 32, 4709 }; 4710 4711 enum ec_codec_shm_id { 4712 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, 4713 EC_CODEC_SHM_ID_WOV_LANG = 0x1, 4714 EC_CODEC_SHM_ID_LAST, 4715 }; 4716 4717 enum ec_codec_shm_type { 4718 EC_CODEC_SHM_TYPE_EC_RAM = 0x0, 4719 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, 4720 }; 4721 4722 struct __ec_align1 ec_param_ec_codec_get_shm_addr { 4723 uint8_t shm_id; 4724 uint8_t reserved[3]; 4725 }; 4726 4727 struct __ec_align4 ec_param_ec_codec_set_shm_addr { 4728 uint64_t phys_addr; 4729 uint32_t len; 4730 uint8_t shm_id; 4731 uint8_t reserved[3]; 4732 }; 4733 4734 struct __ec_align4 ec_param_ec_codec { 4735 uint8_t cmd; /* enum ec_codec_subcmd */ 4736 uint8_t reserved[3]; 4737 4738 union { 4739 struct ec_param_ec_codec_get_shm_addr 4740 get_shm_addr_param; 4741 struct ec_param_ec_codec_set_shm_addr 4742 set_shm_addr_param; 4743 }; 4744 }; 4745 4746 struct __ec_align4 ec_response_ec_codec_get_capabilities { 4747 uint32_t capabilities; 4748 }; 4749 4750 struct __ec_align4 ec_response_ec_codec_get_shm_addr { 4751 uint64_t phys_addr; 4752 uint32_t len; 4753 uint8_t type; 4754 uint8_t reserved[3]; 4755 }; 4756 4757 /*****************************************************************************/ 4758 4759 /* Commands for DMIC on audio codec. */ 4760 #define EC_CMD_EC_CODEC_DMIC 0x00BD 4761 4762 enum ec_codec_dmic_subcmd { 4763 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, 4764 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, 4765 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, 4766 EC_CODEC_DMIC_SUBCMD_COUNT, 4767 }; 4768 4769 enum ec_codec_dmic_channel { 4770 EC_CODEC_DMIC_CHANNEL_0 = 0x0, 4771 EC_CODEC_DMIC_CHANNEL_1 = 0x1, 4772 EC_CODEC_DMIC_CHANNEL_2 = 0x2, 4773 EC_CODEC_DMIC_CHANNEL_3 = 0x3, 4774 EC_CODEC_DMIC_CHANNEL_4 = 0x4, 4775 EC_CODEC_DMIC_CHANNEL_5 = 0x5, 4776 EC_CODEC_DMIC_CHANNEL_6 = 0x6, 4777 EC_CODEC_DMIC_CHANNEL_7 = 0x7, 4778 EC_CODEC_DMIC_CHANNEL_COUNT, 4779 }; 4780 4781 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { 4782 uint8_t channel; /* enum ec_codec_dmic_channel */ 4783 uint8_t gain; 4784 uint8_t reserved[2]; 4785 }; 4786 4787 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { 4788 uint8_t channel; /* enum ec_codec_dmic_channel */ 4789 uint8_t reserved[3]; 4790 }; 4791 4792 struct __ec_align4 ec_param_ec_codec_dmic { 4793 uint8_t cmd; /* enum ec_codec_dmic_subcmd */ 4794 uint8_t reserved[3]; 4795 4796 union { 4797 struct ec_param_ec_codec_dmic_set_gain_idx 4798 set_gain_idx_param; 4799 struct ec_param_ec_codec_dmic_get_gain_idx 4800 get_gain_idx_param; 4801 }; 4802 }; 4803 4804 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { 4805 uint8_t max_gain; 4806 }; 4807 4808 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { 4809 uint8_t gain; 4810 }; 4811 4812 /*****************************************************************************/ 4813 4814 /* Commands for I2S RX on audio codec. */ 4815 4816 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE 4817 4818 enum ec_codec_i2s_rx_subcmd { 4819 EC_CODEC_I2S_RX_ENABLE = 0x0, 4820 EC_CODEC_I2S_RX_DISABLE = 0x1, 4821 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, 4822 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, 4823 EC_CODEC_I2S_RX_SET_BCLK = 0x4, 4824 EC_CODEC_I2S_RX_RESET = 0x5, 4825 EC_CODEC_I2S_RX_SUBCMD_COUNT, 4826 }; 4827 4828 enum ec_codec_i2s_rx_sample_depth { 4829 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, 4830 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, 4831 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, 4832 }; 4833 4834 enum ec_codec_i2s_rx_daifmt { 4835 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, 4836 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, 4837 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, 4838 EC_CODEC_I2S_RX_DAIFMT_COUNT, 4839 }; 4840 4841 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { 4842 uint8_t depth; 4843 uint8_t reserved[3]; 4844 }; 4845 4846 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { 4847 uint8_t left; 4848 uint8_t right; 4849 uint8_t reserved[2]; 4850 }; 4851 4852 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { 4853 uint8_t daifmt; 4854 uint8_t reserved[3]; 4855 }; 4856 4857 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { 4858 uint32_t bclk; 4859 }; 4860 4861 struct __ec_align4 ec_param_ec_codec_i2s_rx { 4862 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ 4863 uint8_t reserved[3]; 4864 4865 union { 4866 struct ec_param_ec_codec_i2s_rx_set_sample_depth 4867 set_sample_depth_param; 4868 struct ec_param_ec_codec_i2s_rx_set_daifmt 4869 set_daifmt_param; 4870 struct ec_param_ec_codec_i2s_rx_set_bclk 4871 set_bclk_param; 4872 }; 4873 }; 4874 4875 /*****************************************************************************/ 4876 /* Commands for WoV on audio codec. */ 4877 4878 #define EC_CMD_EC_CODEC_WOV 0x00BF 4879 4880 enum ec_codec_wov_subcmd { 4881 EC_CODEC_WOV_SET_LANG = 0x0, 4882 EC_CODEC_WOV_SET_LANG_SHM = 0x1, 4883 EC_CODEC_WOV_GET_LANG = 0x2, 4884 EC_CODEC_WOV_ENABLE = 0x3, 4885 EC_CODEC_WOV_DISABLE = 0x4, 4886 EC_CODEC_WOV_READ_AUDIO = 0x5, 4887 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, 4888 EC_CODEC_WOV_SUBCMD_COUNT, 4889 }; 4890 4891 /* 4892 * @hash is SHA256 of the whole language model. 4893 * @total_len indicates the length of whole language model. 4894 * @offset is the cursor from the beginning of the model. 4895 * @buf is the packet buffer. 4896 * @len denotes how many bytes in the buf. 4897 */ 4898 struct __ec_align4 ec_param_ec_codec_wov_set_lang { 4899 uint8_t hash[32]; 4900 uint32_t total_len; 4901 uint32_t offset; 4902 uint8_t buf[128]; 4903 uint32_t len; 4904 }; 4905 4906 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { 4907 uint8_t hash[32]; 4908 uint32_t total_len; 4909 }; 4910 4911 struct __ec_align4 ec_param_ec_codec_wov { 4912 uint8_t cmd; /* enum ec_codec_wov_subcmd */ 4913 uint8_t reserved[3]; 4914 4915 union { 4916 struct ec_param_ec_codec_wov_set_lang 4917 set_lang_param; 4918 struct ec_param_ec_codec_wov_set_lang_shm 4919 set_lang_shm_param; 4920 }; 4921 }; 4922 4923 struct __ec_align4 ec_response_ec_codec_wov_get_lang { 4924 uint8_t hash[32]; 4925 }; 4926 4927 struct __ec_align4 ec_response_ec_codec_wov_read_audio { 4928 uint8_t buf[128]; 4929 uint32_t len; 4930 }; 4931 4932 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { 4933 uint32_t offset; 4934 uint32_t len; 4935 }; 4936 4937 /*****************************************************************************/ 4938 /* System commands */ 4939 4940 /* 4941 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 4942 * necessarily reboot the EC. Rename to "image" or something similar? 4943 */ 4944 #define EC_CMD_REBOOT_EC 0x00D2 4945 4946 /* Command */ 4947 enum ec_reboot_cmd { 4948 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 4949 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 4950 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 4951 /* (command 3 was jump to RW-B) */ 4952 EC_REBOOT_COLD = 4, /* Cold-reboot */ 4953 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 4954 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 4955 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 4956 EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ 4957 }; 4958 4959 /* Flags for ec_params_reboot_ec.reboot_flags */ 4960 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 4961 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 4962 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 4963 4964 struct ec_params_reboot_ec { 4965 uint8_t cmd; /* enum ec_reboot_cmd */ 4966 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 4967 } __ec_align1; 4968 4969 /* 4970 * Get information on last EC panic. 4971 * 4972 * Returns variable-length platform-dependent panic information. See panic.h 4973 * for details. 4974 */ 4975 #define EC_CMD_GET_PANIC_INFO 0x00D3 4976 4977 /*****************************************************************************/ 4978 /* 4979 * Special commands 4980 * 4981 * These do not follow the normal rules for commands. See each command for 4982 * details. 4983 */ 4984 4985 /* 4986 * Reboot NOW 4987 * 4988 * This command will work even when the EC LPC interface is busy, because the 4989 * reboot command is processed at interrupt level. Note that when the EC 4990 * reboots, the host will reboot too, so there is no response to this command. 4991 * 4992 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 4993 */ 4994 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 4995 4996 /* 4997 * Resend last response (not supported on LPC). 4998 * 4999 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 5000 * there was no previous command, or the previous command's response was too 5001 * big to save. 5002 */ 5003 #define EC_CMD_RESEND_RESPONSE 0x00DB 5004 5005 /* 5006 * This header byte on a command indicate version 0. Any header byte less 5007 * than this means that we are talking to an old EC which doesn't support 5008 * versioning. In that case, we assume version 0. 5009 * 5010 * Header bytes greater than this indicate a later version. For example, 5011 * EC_CMD_VERSION0 + 1 means we are using version 1. 5012 * 5013 * The old EC interface must not use commands 0xdc or higher. 5014 */ 5015 #define EC_CMD_VERSION0 0x00DC 5016 5017 /*****************************************************************************/ 5018 /* 5019 * PD commands 5020 * 5021 * These commands are for PD MCU communication. 5022 */ 5023 5024 /* EC to PD MCU exchange status command */ 5025 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 5026 #define EC_VER_PD_EXCHANGE_STATUS 2 5027 5028 enum pd_charge_state { 5029 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 5030 PD_CHARGE_NONE, /* No charging allowed */ 5031 PD_CHARGE_5V, /* 5V charging only */ 5032 PD_CHARGE_MAX /* Charge at max voltage */ 5033 }; 5034 5035 /* Status of EC being sent to PD */ 5036 #define EC_STATUS_HIBERNATING BIT(0) 5037 5038 struct ec_params_pd_status { 5039 uint8_t status; /* EC status */ 5040 int8_t batt_soc; /* battery state of charge */ 5041 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 5042 } __ec_align1; 5043 5044 /* Status of PD being sent back to EC */ 5045 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 5046 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 5047 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 5048 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 5049 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 5050 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 5051 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 5052 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 5053 PD_STATUS_TCPC_ALERT_1 | \ 5054 PD_STATUS_HOST_EVENT) 5055 struct ec_response_pd_status { 5056 uint32_t curr_lim_ma; /* input current limit */ 5057 uint16_t status; /* PD MCU status */ 5058 int8_t active_charge_port; /* active charging port */ 5059 } __ec_align_size1; 5060 5061 /* AP to PD MCU host event status command, cleared on read */ 5062 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 5063 5064 /* PD MCU host event status bits */ 5065 #define PD_EVENT_UPDATE_DEVICE BIT(0) 5066 #define PD_EVENT_POWER_CHANGE BIT(1) 5067 #define PD_EVENT_IDENTITY_RECEIVED BIT(2) 5068 #define PD_EVENT_DATA_SWAP BIT(3) 5069 #define PD_EVENT_TYPEC BIT(4) 5070 #define PD_EVENT_PPM BIT(5) 5071 #define PD_EVENT_INIT BIT(6) 5072 5073 struct ec_response_host_event_status { 5074 uint32_t status; /* PD MCU host event status */ 5075 } __ec_align4; 5076 5077 /* Set USB type-C port role and muxes */ 5078 #define EC_CMD_USB_PD_CONTROL 0x0101 5079 5080 enum usb_pd_control_role { 5081 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 5082 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 5083 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 5084 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 5085 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 5086 USB_PD_CTRL_ROLE_FREEZE = 5, 5087 USB_PD_CTRL_ROLE_COUNT 5088 }; 5089 5090 enum usb_pd_control_mux { 5091 USB_PD_CTRL_MUX_NO_CHANGE = 0, 5092 USB_PD_CTRL_MUX_NONE = 1, 5093 USB_PD_CTRL_MUX_USB = 2, 5094 USB_PD_CTRL_MUX_DP = 3, 5095 USB_PD_CTRL_MUX_DOCK = 4, 5096 USB_PD_CTRL_MUX_AUTO = 5, 5097 USB_PD_CTRL_MUX_COUNT 5098 }; 5099 5100 enum usb_pd_control_swap { 5101 USB_PD_CTRL_SWAP_NONE = 0, 5102 USB_PD_CTRL_SWAP_DATA = 1, 5103 USB_PD_CTRL_SWAP_POWER = 2, 5104 USB_PD_CTRL_SWAP_VCONN = 3, 5105 USB_PD_CTRL_SWAP_COUNT 5106 }; 5107 5108 struct ec_params_usb_pd_control { 5109 uint8_t port; 5110 uint8_t role; 5111 uint8_t mux; 5112 uint8_t swap; 5113 } __ec_align1; 5114 5115 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 5116 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 5117 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 5118 5119 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 5120 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ 5121 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ 5122 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ 5123 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ 5124 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 5125 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 5126 5127 struct ec_response_usb_pd_control { 5128 uint8_t enabled; 5129 uint8_t role; 5130 uint8_t polarity; 5131 uint8_t state; 5132 } __ec_align1; 5133 5134 struct ec_response_usb_pd_control_v1 { 5135 uint8_t enabled; 5136 uint8_t role; 5137 uint8_t polarity; 5138 char state[32]; 5139 } __ec_align1; 5140 5141 /* Values representing usbc PD CC state */ 5142 #define USBC_PD_CC_NONE 0 /* No accessory connected */ 5143 #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 5144 #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 5145 #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 5146 #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 5147 #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 5148 5149 /* Active/Passive Cable */ 5150 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) 5151 /* Optical/Non-optical cable */ 5152 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) 5153 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ 5154 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) 5155 /* Active Link Uni-Direction */ 5156 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) 5157 5158 struct ec_response_usb_pd_control_v2 { 5159 uint8_t enabled; 5160 uint8_t role; 5161 uint8_t polarity; 5162 char state[32]; 5163 uint8_t cc_state; /* enum pd_cc_states representing cc state */ 5164 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 5165 uint8_t reserved; /* Reserved for future use */ 5166 uint8_t control_flags; /* USB_PD_CTRL_*flags */ 5167 uint8_t cable_speed; /* TBT_SS_* cable speed */ 5168 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ 5169 } __ec_align1; 5170 5171 #define EC_CMD_USB_PD_PORTS 0x0102 5172 5173 /* Maximum number of PD ports on a device, num_ports will be <= this */ 5174 #define EC_USB_PD_MAX_PORTS 8 5175 5176 struct ec_response_usb_pd_ports { 5177 uint8_t num_ports; 5178 } __ec_align1; 5179 5180 #define EC_CMD_USB_PD_POWER_INFO 0x0103 5181 5182 #define PD_POWER_CHARGING_PORT 0xff 5183 struct ec_params_usb_pd_power_info { 5184 uint8_t port; 5185 } __ec_align1; 5186 5187 enum usb_chg_type { 5188 USB_CHG_TYPE_NONE, 5189 USB_CHG_TYPE_PD, 5190 USB_CHG_TYPE_C, 5191 USB_CHG_TYPE_PROPRIETARY, 5192 USB_CHG_TYPE_BC12_DCP, 5193 USB_CHG_TYPE_BC12_CDP, 5194 USB_CHG_TYPE_BC12_SDP, 5195 USB_CHG_TYPE_OTHER, 5196 USB_CHG_TYPE_VBUS, 5197 USB_CHG_TYPE_UNKNOWN, 5198 USB_CHG_TYPE_DEDICATED, 5199 }; 5200 enum usb_power_roles { 5201 USB_PD_PORT_POWER_DISCONNECTED, 5202 USB_PD_PORT_POWER_SOURCE, 5203 USB_PD_PORT_POWER_SINK, 5204 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 5205 }; 5206 5207 struct usb_chg_measures { 5208 uint16_t voltage_max; 5209 uint16_t voltage_now; 5210 uint16_t current_max; 5211 uint16_t current_lim; 5212 } __ec_align2; 5213 5214 struct ec_response_usb_pd_power_info { 5215 uint8_t role; 5216 uint8_t type; 5217 uint8_t dualrole; 5218 uint8_t reserved1; 5219 struct usb_chg_measures meas; 5220 uint32_t max_power; 5221 } __ec_align4; 5222 5223 5224 /* 5225 * This command will return the number of USB PD charge port + the number 5226 * of dedicated port present. 5227 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports 5228 */ 5229 #define EC_CMD_CHARGE_PORT_COUNT 0x0105 5230 struct ec_response_charge_port_count { 5231 uint8_t port_count; 5232 } __ec_align1; 5233 5234 /* Write USB-PD device FW */ 5235 #define EC_CMD_USB_PD_FW_UPDATE 0x0110 5236 5237 enum usb_pd_fw_update_cmds { 5238 USB_PD_FW_REBOOT, 5239 USB_PD_FW_FLASH_ERASE, 5240 USB_PD_FW_FLASH_WRITE, 5241 USB_PD_FW_ERASE_SIG, 5242 }; 5243 5244 struct ec_params_usb_pd_fw_update { 5245 uint16_t dev_id; 5246 uint8_t cmd; 5247 uint8_t port; 5248 uint32_t size; /* Size to write in bytes */ 5249 /* Followed by data to write */ 5250 } __ec_align4; 5251 5252 /* Write USB-PD Accessory RW_HASH table entry */ 5253 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 5254 /* RW hash is first 20 bytes of SHA-256 of RW section */ 5255 #define PD_RW_HASH_SIZE 20 5256 struct ec_params_usb_pd_rw_hash_entry { 5257 uint16_t dev_id; 5258 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 5259 uint8_t reserved; /* 5260 * For alignment of current_image 5261 * TODO(rspangler) but it's not aligned! 5262 * Should have been reserved[2]. 5263 */ 5264 uint32_t current_image; /* One of ec_current_image */ 5265 } __ec_align1; 5266 5267 /* Read USB-PD Accessory info */ 5268 #define EC_CMD_USB_PD_DEV_INFO 0x0112 5269 5270 struct ec_params_usb_pd_info_request { 5271 uint8_t port; 5272 } __ec_align1; 5273 5274 /* Read USB-PD Device discovery info */ 5275 #define EC_CMD_USB_PD_DISCOVERY 0x0113 5276 struct ec_params_usb_pd_discovery_entry { 5277 uint16_t vid; /* USB-IF VID */ 5278 uint16_t pid; /* USB-IF PID */ 5279 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 5280 } __ec_align_size1; 5281 5282 /* Override default charge behavior */ 5283 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 5284 5285 /* Negative port parameters have special meaning */ 5286 enum usb_pd_override_ports { 5287 OVERRIDE_DONT_CHARGE = -2, 5288 OVERRIDE_OFF = -1, 5289 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 5290 }; 5291 5292 struct ec_params_charge_port_override { 5293 int16_t override_port; /* Override port# */ 5294 } __ec_align2; 5295 5296 /* 5297 * Read (and delete) one entry of PD event log. 5298 * TODO(crbug.com/751742): Make this host command more generic to accommodate 5299 * future non-PD logs that use the same internal EC event_log. 5300 */ 5301 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 5302 5303 struct ec_response_pd_log { 5304 uint32_t timestamp; /* relative timestamp in milliseconds */ 5305 uint8_t type; /* event type : see PD_EVENT_xx below */ 5306 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 5307 uint16_t data; /* type-defined data payload */ 5308 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ 5309 } __ec_align4; 5310 5311 /* The timestamp is the microsecond counter shifted to get about a ms. */ 5312 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 5313 5314 #define PD_LOG_SIZE_MASK 0x1f 5315 #define PD_LOG_PORT_MASK 0xe0 5316 #define PD_LOG_PORT_SHIFT 5 5317 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 5318 ((size) & PD_LOG_SIZE_MASK)) 5319 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 5320 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 5321 5322 /* PD event log : entry types */ 5323 /* PD MCU events */ 5324 #define PD_EVENT_MCU_BASE 0x00 5325 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 5326 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 5327 /* Reserved for custom board event */ 5328 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 5329 /* PD generic accessory events */ 5330 #define PD_EVENT_ACC_BASE 0x20 5331 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 5332 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 5333 /* PD power supply events */ 5334 #define PD_EVENT_PS_BASE 0x40 5335 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 5336 /* PD video dongles events */ 5337 #define PD_EVENT_VIDEO_BASE 0x60 5338 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 5339 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 5340 /* Returned in the "type" field, when there is no entry available */ 5341 #define PD_EVENT_NO_ENTRY 0xff 5342 5343 /* 5344 * PD_EVENT_MCU_CHARGE event definition : 5345 * the payload is "struct usb_chg_measures" 5346 * the data field contains the port state flags as defined below : 5347 */ 5348 /* Port partner is a dual role device */ 5349 #define CHARGE_FLAGS_DUAL_ROLE BIT(15) 5350 /* Port is the pending override port */ 5351 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) 5352 /* Port is the override port */ 5353 #define CHARGE_FLAGS_OVERRIDE BIT(13) 5354 /* Charger type */ 5355 #define CHARGE_FLAGS_TYPE_SHIFT 3 5356 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 5357 /* Power delivery role */ 5358 #define CHARGE_FLAGS_ROLE_MASK (7 << 0) 5359 5360 /* 5361 * PD_EVENT_PS_FAULT data field flags definition : 5362 */ 5363 #define PS_FAULT_OCP 1 5364 #define PS_FAULT_FAST_OCP 2 5365 #define PS_FAULT_OVP 3 5366 #define PS_FAULT_DISCH 4 5367 5368 /* 5369 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 5370 */ 5371 struct mcdp_version { 5372 uint8_t major; 5373 uint8_t minor; 5374 uint16_t build; 5375 } __ec_align4; 5376 5377 struct mcdp_info { 5378 uint8_t family[2]; 5379 uint8_t chipid[2]; 5380 struct mcdp_version irom; 5381 struct mcdp_version fw; 5382 } __ec_align4; 5383 5384 /* struct mcdp_info field decoding */ 5385 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 5386 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 5387 5388 /* Get/Set USB-PD Alternate mode info */ 5389 #define EC_CMD_USB_PD_GET_AMODE 0x0116 5390 struct ec_params_usb_pd_get_mode_request { 5391 uint16_t svid_idx; /* SVID index to get */ 5392 uint8_t port; /* port */ 5393 } __ec_align_size1; 5394 5395 struct ec_params_usb_pd_get_mode_response { 5396 uint16_t svid; /* SVID */ 5397 uint16_t opos; /* Object Position */ 5398 uint32_t vdo[6]; /* Mode VDOs */ 5399 } __ec_align4; 5400 5401 #define EC_CMD_USB_PD_SET_AMODE 0x0117 5402 5403 enum pd_mode_cmd { 5404 PD_EXIT_MODE = 0, 5405 PD_ENTER_MODE = 1, 5406 /* Not a command. Do NOT remove. */ 5407 PD_MODE_CMD_COUNT, 5408 }; 5409 5410 struct ec_params_usb_pd_set_mode_request { 5411 uint32_t cmd; /* enum pd_mode_cmd */ 5412 uint16_t svid; /* SVID to set */ 5413 uint8_t opos; /* Object Position */ 5414 uint8_t port; /* port */ 5415 } __ec_align4; 5416 5417 /* Ask the PD MCU to record a log of a requested type */ 5418 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 5419 5420 struct ec_params_pd_write_log_entry { 5421 uint8_t type; /* event type : see PD_EVENT_xx above */ 5422 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 5423 } __ec_align1; 5424 5425 5426 /* Control USB-PD chip */ 5427 #define EC_CMD_PD_CONTROL 0x0119 5428 5429 enum ec_pd_control_cmd { 5430 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 5431 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 5432 PD_RESET, /* Force reset the PD chip */ 5433 PD_CONTROL_DISABLE, /* Disable further calls to this command */ 5434 PD_CHIP_ON, /* Power on the PD chip */ 5435 }; 5436 5437 struct ec_params_pd_control { 5438 uint8_t chip; /* chip id */ 5439 uint8_t subcmd; 5440 } __ec_align1; 5441 5442 /* Get info about USB-C SS muxes */ 5443 #define EC_CMD_USB_PD_MUX_INFO 0x011A 5444 5445 struct ec_params_usb_pd_mux_info { 5446 uint8_t port; /* USB-C port number */ 5447 } __ec_align1; 5448 5449 /* Flags representing mux state */ 5450 #define USB_PD_MUX_NONE 0 /* Open switch */ 5451 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 5452 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 5453 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 5454 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 5455 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5456 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ 5457 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ 5458 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ 5459 5460 struct ec_response_usb_pd_mux_info { 5461 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5462 } __ec_align1; 5463 5464 #define EC_CMD_PD_CHIP_INFO 0x011B 5465 5466 struct ec_params_pd_chip_info { 5467 uint8_t port; /* USB-C port number */ 5468 uint8_t renew; /* Force renewal */ 5469 } __ec_align1; 5470 5471 struct ec_response_pd_chip_info { 5472 uint16_t vendor_id; 5473 uint16_t product_id; 5474 uint16_t device_id; 5475 union { 5476 uint8_t fw_version_string[8]; 5477 uint64_t fw_version_number; 5478 }; 5479 } __ec_align2; 5480 5481 struct ec_response_pd_chip_info_v1 { 5482 uint16_t vendor_id; 5483 uint16_t product_id; 5484 uint16_t device_id; 5485 union { 5486 uint8_t fw_version_string[8]; 5487 uint64_t fw_version_number; 5488 }; 5489 union { 5490 uint8_t min_req_fw_version_string[8]; 5491 uint64_t min_req_fw_version_number; 5492 }; 5493 } __ec_align2; 5494 5495 /* Run RW signature verification and get status */ 5496 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 5497 5498 struct ec_response_rwsig_check_status { 5499 uint32_t status; 5500 } __ec_align4; 5501 5502 /* For controlling RWSIG task */ 5503 #define EC_CMD_RWSIG_ACTION 0x011D 5504 5505 enum rwsig_action { 5506 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 5507 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 5508 }; 5509 5510 struct ec_params_rwsig_action { 5511 uint32_t action; 5512 } __ec_align4; 5513 5514 /* Run verification on a slot */ 5515 #define EC_CMD_EFS_VERIFY 0x011E 5516 5517 struct ec_params_efs_verify { 5518 uint8_t region; /* enum ec_flash_region */ 5519 } __ec_align1; 5520 5521 /* 5522 * Retrieve info from Cros Board Info store. Response is based on the data 5523 * type. Integers return a uint32. Strings return a string, using the response 5524 * size to determine how big it is. 5525 */ 5526 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 5527 /* 5528 * Write info into Cros Board Info on EEPROM. Write fails if the board has 5529 * hardware write-protect enabled. 5530 */ 5531 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 5532 5533 enum cbi_data_tag { 5534 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 5535 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 5536 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 5537 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 5538 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 5539 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 5540 CBI_TAG_COUNT, 5541 }; 5542 5543 /* 5544 * Flags to control read operation 5545 * 5546 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 5547 * write was successful without reboot. 5548 */ 5549 #define CBI_GET_RELOAD BIT(0) 5550 5551 struct ec_params_get_cbi { 5552 uint32_t tag; /* enum cbi_data_tag */ 5553 uint32_t flag; /* CBI_GET_* */ 5554 } __ec_align4; 5555 5556 /* 5557 * Flags to control write behavior. 5558 * 5559 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 5560 * useful when writing multiple fields in a row. 5561 * INIT: Need to be set when creating a new CBI from scratch. All fields 5562 * will be initialized to zero first. 5563 */ 5564 #define CBI_SET_NO_SYNC BIT(0) 5565 #define CBI_SET_INIT BIT(1) 5566 5567 struct ec_params_set_cbi { 5568 uint32_t tag; /* enum cbi_data_tag */ 5569 uint32_t flag; /* CBI_SET_* */ 5570 uint32_t size; /* Data size */ 5571 uint8_t data[]; /* For string and raw data */ 5572 } __ec_align1; 5573 5574 /* 5575 * Information about resets of the AP by the EC and the EC's own uptime. 5576 */ 5577 #define EC_CMD_GET_UPTIME_INFO 0x0121 5578 5579 struct ec_response_uptime_info { 5580 /* 5581 * Number of milliseconds since the last EC boot. Sysjump resets 5582 * typically do not restart the EC's time_since_boot epoch. 5583 * 5584 * WARNING: The EC's sense of time is much less accurate than the AP's 5585 * sense of time, in both phase and frequency. This timebase is similar 5586 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 5587 */ 5588 uint32_t time_since_ec_boot_ms; 5589 5590 /* 5591 * Number of times the AP was reset by the EC since the last EC boot. 5592 * Note that the AP may be held in reset by the EC during the initial 5593 * boot sequence, such that the very first AP boot may count as more 5594 * than one here. 5595 */ 5596 uint32_t ap_resets_since_ec_boot; 5597 5598 /* 5599 * The set of flags which describe the EC's most recent reset. See 5600 * include/system.h RESET_FLAG_* for details. 5601 */ 5602 uint32_t ec_reset_flags; 5603 5604 /* Empty log entries have both the cause and timestamp set to zero. */ 5605 struct ap_reset_log_entry { 5606 /* 5607 * See include/chipset.h: enum chipset_{reset,shutdown}_reason 5608 * for details. 5609 */ 5610 uint16_t reset_cause; 5611 5612 /* Reserved for protocol growth. */ 5613 uint16_t reserved; 5614 5615 /* 5616 * The time of the reset's assertion, in milliseconds since the 5617 * last EC boot, in the same epoch as time_since_ec_boot_ms. 5618 * Set to zero if the log entry is empty. 5619 */ 5620 uint32_t reset_time_ms; 5621 } recent_ap_reset[4]; 5622 } __ec_align4; 5623 5624 /* 5625 * Add entropy to the device secret (stored in the rollback region). 5626 * 5627 * Depending on the chip, the operation may take a long time (e.g. to erase 5628 * flash), so the commands are asynchronous. 5629 */ 5630 #define EC_CMD_ADD_ENTROPY 0x0122 5631 5632 enum add_entropy_action { 5633 /* Add entropy to the current secret. */ 5634 ADD_ENTROPY_ASYNC = 0, 5635 /* 5636 * Add entropy, and also make sure that the previous secret is erased. 5637 * (this can be implemented by adding entropy multiple times until 5638 * all rolback blocks have been overwritten). 5639 */ 5640 ADD_ENTROPY_RESET_ASYNC = 1, 5641 /* Read back result from the previous operation. */ 5642 ADD_ENTROPY_GET_RESULT = 2, 5643 }; 5644 5645 struct ec_params_rollback_add_entropy { 5646 uint8_t action; 5647 } __ec_align1; 5648 5649 /* 5650 * Perform a single read of a given ADC channel. 5651 */ 5652 #define EC_CMD_ADC_READ 0x0123 5653 5654 struct ec_params_adc_read { 5655 uint8_t adc_channel; 5656 } __ec_align1; 5657 5658 struct ec_response_adc_read { 5659 int32_t adc_value; 5660 } __ec_align4; 5661 5662 /* 5663 * Read back rollback info 5664 */ 5665 #define EC_CMD_ROLLBACK_INFO 0x0124 5666 5667 struct ec_response_rollback_info { 5668 int32_t id; /* Incrementing number to indicate which region to use. */ 5669 int32_t rollback_min_version; 5670 int32_t rw_rollback_version; 5671 } __ec_align4; 5672 5673 5674 /* Issue AP reset */ 5675 #define EC_CMD_AP_RESET 0x0125 5676 5677 /* 5678 * Get the number of peripheral charge ports 5679 */ 5680 #define EC_CMD_PCHG_COUNT 0x0134 5681 5682 #define EC_PCHG_MAX_PORTS 8 5683 5684 struct ec_response_pchg_count { 5685 uint8_t port_count; 5686 } __ec_align1; 5687 5688 /* 5689 * Get the status of a peripheral charge port 5690 */ 5691 #define EC_CMD_PCHG 0x0135 5692 5693 struct ec_params_pchg { 5694 uint8_t port; 5695 } __ec_align1; 5696 5697 struct ec_response_pchg { 5698 uint32_t error; /* enum pchg_error */ 5699 uint8_t state; /* enum pchg_state state */ 5700 uint8_t battery_percentage; 5701 uint8_t unused0; 5702 uint8_t unused1; 5703 /* Fields added in version 1 */ 5704 uint32_t fw_version; 5705 uint32_t dropped_event_count; 5706 } __ec_align2; 5707 5708 enum pchg_state { 5709 /* Charger is reset and not initialized. */ 5710 PCHG_STATE_RESET = 0, 5711 /* Charger is initialized or disabled. */ 5712 PCHG_STATE_INITIALIZED, 5713 /* Charger is enabled and ready to detect a device. */ 5714 PCHG_STATE_ENABLED, 5715 /* Device is in proximity. */ 5716 PCHG_STATE_DETECTED, 5717 /* Device is being charged. */ 5718 PCHG_STATE_CHARGING, 5719 /* Device is fully charged. It implies DETECTED (& not charging). */ 5720 PCHG_STATE_FULL, 5721 /* In download (a.k.a. firmware update) mode */ 5722 PCHG_STATE_DOWNLOAD, 5723 /* In download mode. Ready for receiving data. */ 5724 PCHG_STATE_DOWNLOADING, 5725 /* Device is ready for data communication. */ 5726 PCHG_STATE_CONNECTED, 5727 /* Put no more entry below */ 5728 PCHG_STATE_COUNT, 5729 }; 5730 5731 #define EC_PCHG_STATE_TEXT { \ 5732 [PCHG_STATE_RESET] = "RESET", \ 5733 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ 5734 [PCHG_STATE_ENABLED] = "ENABLED", \ 5735 [PCHG_STATE_DETECTED] = "DETECTED", \ 5736 [PCHG_STATE_CHARGING] = "CHARGING", \ 5737 [PCHG_STATE_FULL] = "FULL", \ 5738 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ 5739 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ 5740 [PCHG_STATE_CONNECTED] = "CONNECTED", \ 5741 } 5742 5743 /* 5744 * Update firmware of peripheral chip 5745 */ 5746 #define EC_CMD_PCHG_UPDATE 0x0136 5747 5748 /* Port number is encoded in bit[28:31]. */ 5749 #define EC_MKBP_PCHG_PORT_SHIFT 28 5750 /* Utility macro for converting MKBP event to port number. */ 5751 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf) 5752 /* Utility macro for extracting event bits. */ 5753 #define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \ 5754 & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0)) 5755 5756 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0) 5757 #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1) 5758 #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2) 5759 #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3) 5760 #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4) 5761 5762 enum ec_pchg_update_cmd { 5763 /* Reset chip to normal mode. */ 5764 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0, 5765 /* Reset and put a chip in update (a.k.a. download) mode. */ 5766 EC_PCHG_UPDATE_CMD_OPEN, 5767 /* Write a block of data containing FW image. */ 5768 EC_PCHG_UPDATE_CMD_WRITE, 5769 /* Close update session. */ 5770 EC_PCHG_UPDATE_CMD_CLOSE, 5771 /* End of commands */ 5772 EC_PCHG_UPDATE_CMD_COUNT, 5773 }; 5774 5775 struct ec_params_pchg_update { 5776 /* PCHG port number */ 5777 uint8_t port; 5778 /* enum ec_pchg_update_cmd */ 5779 uint8_t cmd; 5780 /* Padding */ 5781 uint8_t reserved0; 5782 uint8_t reserved1; 5783 /* Version of new firmware */ 5784 uint32_t version; 5785 /* CRC32 of new firmware */ 5786 uint32_t crc32; 5787 /* Address in chip memory where <data> is written to */ 5788 uint32_t addr; 5789 /* Size of <data> */ 5790 uint32_t size; 5791 /* Partial data of new firmware */ 5792 uint8_t data[]; 5793 } __ec_align4; 5794 5795 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT 5796 < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8)); 5797 5798 struct ec_response_pchg_update { 5799 /* Block size */ 5800 uint32_t block_size; 5801 } __ec_align4; 5802 5803 5804 /*****************************************************************************/ 5805 /* Voltage regulator controls */ 5806 5807 /* 5808 * Get basic info of voltage regulator for given index. 5809 * 5810 * Returns the regulator name and supported voltage list in mV. 5811 */ 5812 #define EC_CMD_REGULATOR_GET_INFO 0x012C 5813 5814 /* Maximum length of regulator name */ 5815 #define EC_REGULATOR_NAME_MAX_LEN 16 5816 5817 /* Maximum length of the supported voltage list. */ 5818 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 5819 5820 struct ec_params_regulator_get_info { 5821 uint32_t index; 5822 } __ec_align4; 5823 5824 struct ec_response_regulator_get_info { 5825 char name[EC_REGULATOR_NAME_MAX_LEN]; 5826 uint16_t num_voltages; 5827 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; 5828 } __ec_align2; 5829 5830 /* 5831 * Configure the regulator as enabled / disabled. 5832 */ 5833 #define EC_CMD_REGULATOR_ENABLE 0x012D 5834 5835 struct ec_params_regulator_enable { 5836 uint32_t index; 5837 uint8_t enable; 5838 } __ec_align4; 5839 5840 /* 5841 * Query if the regulator is enabled. 5842 * 5843 * Returns 1 if the regulator is enabled, 0 if not. 5844 */ 5845 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E 5846 5847 struct ec_params_regulator_is_enabled { 5848 uint32_t index; 5849 } __ec_align4; 5850 5851 struct ec_response_regulator_is_enabled { 5852 uint8_t enabled; 5853 } __ec_align1; 5854 5855 /* 5856 * Set voltage for the voltage regulator within the range specified. 5857 * 5858 * The driver should select the voltage in range closest to min_mv. 5859 * 5860 * Also note that this might be called before the regulator is enabled, and the 5861 * setting should be in effect after the regulator is enabled. 5862 */ 5863 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F 5864 5865 struct ec_params_regulator_set_voltage { 5866 uint32_t index; 5867 uint32_t min_mv; 5868 uint32_t max_mv; 5869 } __ec_align4; 5870 5871 /* 5872 * Get the currently configured voltage for the voltage regulator. 5873 * 5874 * Note that this might be called before the regulator is enabled, and this 5875 * should return the configured output voltage if the regulator is enabled. 5876 */ 5877 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 5878 5879 struct ec_params_regulator_get_voltage { 5880 uint32_t index; 5881 } __ec_align4; 5882 5883 struct ec_response_regulator_get_voltage { 5884 uint32_t voltage_mv; 5885 } __ec_align4; 5886 5887 /* 5888 * Gather all discovery information for the given port and partner type. 5889 * 5890 * Note that if discovery has not yet completed, only the currently completed 5891 * responses will be filled in. If the discovery data structures are changed 5892 * in the process of the command running, BUSY will be returned. 5893 * 5894 * VDO field sizes are set to the maximum possible number of VDOs a VDM may 5895 * contain, while the number of SVIDs here is selected to fit within the PROTO2 5896 * maximum parameter size. 5897 */ 5898 #define EC_CMD_TYPEC_DISCOVERY 0x0131 5899 5900 enum typec_partner_type { 5901 TYPEC_PARTNER_SOP = 0, 5902 TYPEC_PARTNER_SOP_PRIME = 1, 5903 }; 5904 5905 struct ec_params_typec_discovery { 5906 uint8_t port; 5907 uint8_t partner_type; /* enum typec_partner_type */ 5908 } __ec_align1; 5909 5910 struct svid_mode_info { 5911 uint16_t svid; 5912 uint16_t mode_count; /* Number of modes partner sent */ 5913 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5914 }; 5915 5916 struct ec_response_typec_discovery { 5917 uint8_t identity_count; /* Number of identity VDOs partner sent */ 5918 uint8_t svid_count; /* Number of SVIDs partner sent */ 5919 uint16_t reserved; 5920 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5921 struct svid_mode_info svids[]; 5922 } __ec_align1; 5923 5924 /* USB Type-C commands for AP-controlled device policy. */ 5925 #define EC_CMD_TYPEC_CONTROL 0x0132 5926 5927 enum typec_control_command { 5928 TYPEC_CONTROL_COMMAND_EXIT_MODES, 5929 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, 5930 TYPEC_CONTROL_COMMAND_ENTER_MODE, 5931 TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY, 5932 TYPEC_CONTROL_COMMAND_USB_MUX_SET, 5933 TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE, 5934 TYPEC_CONTROL_COMMAND_SEND_VDM_REQ, 5935 }; 5936 5937 /* Replies the AP may specify to the TBT EnterMode command as a UFP */ 5938 enum typec_tbt_ufp_reply { 5939 TYPEC_TBT_UFP_REPLY_NAK, 5940 TYPEC_TBT_UFP_REPLY_ACK, 5941 }; 5942 5943 struct typec_usb_mux_set { 5944 uint8_t mux_index; /* Index of the mux to set in the chain */ 5945 uint8_t mux_flags; /* USB_PD_MUX_*-encoded USB mux state to set */ 5946 } __ec_align1; 5947 5948 #define VDO_MAX_SIZE 7 5949 5950 struct typec_vdm_req { 5951 /* VDM data, including VDM header */ 5952 uint32_t vdm_data[VDO_MAX_SIZE]; 5953 /* Number of 32-bit fields filled in */ 5954 uint8_t vdm_data_objects; 5955 /* Partner to address - see enum typec_partner_type */ 5956 uint8_t partner_type; 5957 } __ec_align1; 5958 5959 struct ec_params_typec_control { 5960 uint8_t port; 5961 uint8_t command; /* enum typec_control_command */ 5962 uint16_t reserved; 5963 5964 /* 5965 * This section will be interpreted based on |command|. Define a 5966 * placeholder structure to avoid having to increase the size and bump 5967 * the command version when adding new sub-commands. 5968 */ 5969 union { 5970 uint32_t clear_events_mask; 5971 uint8_t mode_to_enter; /* enum typec_mode */ 5972 uint8_t tbt_ufp_reply; /* enum typec_tbt_ufp_reply */ 5973 struct typec_usb_mux_set mux_params; 5974 /* Used for VMD_REQ */ 5975 struct typec_vdm_req vdm_req_params; 5976 uint8_t placeholder[128]; 5977 }; 5978 } __ec_align1; 5979 5980 /* 5981 * Gather all status information for a port. 5982 * 5983 * Note: this covers many of the return fields from the deprecated 5984 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the 5985 * discovery data. The "enum pd_cc_states" is defined with the deprecated 5986 * EC_CMD_USB_PD_CONTROL command. 5987 * 5988 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. 5989 */ 5990 #define EC_CMD_TYPEC_STATUS 0x0133 5991 5992 /* 5993 * Power role. 5994 * 5995 * Note this is also used for PD header creation, and values align to those in 5996 * the Power Delivery Specification Revision 3.0 (See 5997 * 6.2.1.1.4 Port Power Role). 5998 */ 5999 enum pd_power_role { 6000 PD_ROLE_SINK = 0, 6001 PD_ROLE_SOURCE = 1 6002 }; 6003 6004 /* 6005 * Data role. 6006 * 6007 * Note this is also used for PD header creation, and the first two values 6008 * align to those in the Power Delivery Specification Revision 3.0 (See 6009 * 6.2.1.1.6 Port Data Role). 6010 */ 6011 enum pd_data_role { 6012 PD_ROLE_UFP = 0, 6013 PD_ROLE_DFP = 1, 6014 PD_ROLE_DISCONNECTED = 2, 6015 }; 6016 6017 enum pd_vconn_role { 6018 PD_ROLE_VCONN_OFF = 0, 6019 PD_ROLE_VCONN_SRC = 1, 6020 }; 6021 6022 /* 6023 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, 6024 * regardless of whether a debug accessory is connected. 6025 */ 6026 enum tcpc_cc_polarity { 6027 /* 6028 * _CCx: is used to indicate the polarity while not connected to 6029 * a Debug Accessory. Only one CC line will assert a resistor and 6030 * the other will be open. 6031 */ 6032 POLARITY_CC1 = 0, 6033 POLARITY_CC2 = 1, 6034 6035 /* 6036 * _CCx_DTS is used to indicate the polarity while connected to a 6037 * SRC Debug Accessory. Assert resistors on both lines. 6038 */ 6039 POLARITY_CC1_DTS = 2, 6040 POLARITY_CC2_DTS = 3, 6041 6042 /* 6043 * The current TCPC code relies on these specific POLARITY values. 6044 * Adding in a check to verify if the list grows for any reason 6045 * that this will give a hint that other places need to be 6046 * adjusted. 6047 */ 6048 POLARITY_COUNT 6049 }; 6050 6051 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) 6052 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) 6053 #define PD_STATUS_EVENT_HARD_RESET BIT(2) 6054 #define PD_STATUS_EVENT_DISCONNECTED BIT(3) 6055 #define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4) 6056 #define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5) 6057 #define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6) 6058 #define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7) 6059 #define PD_STATUS_EVENT_VDM_ATTENTION BIT(8) 6060 6061 struct ec_params_typec_status { 6062 uint8_t port; 6063 } __ec_align1; 6064 6065 struct ec_response_typec_status { 6066 uint8_t pd_enabled; /* PD communication enabled - bool */ 6067 uint8_t dev_connected; /* Device connected - bool */ 6068 uint8_t sop_connected; /* Device is SOP PD capable - bool */ 6069 uint8_t source_cap_count; /* Number of Source Cap PDOs */ 6070 6071 uint8_t power_role; /* enum pd_power_role */ 6072 uint8_t data_role; /* enum pd_data_role */ 6073 uint8_t vconn_role; /* enum pd_vconn_role */ 6074 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ 6075 6076 uint8_t polarity; /* enum tcpc_cc_polarity */ 6077 uint8_t cc_state; /* enum pd_cc_states */ 6078 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ 6079 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ 6080 6081 char tc_state[32]; /* TC state name */ 6082 6083 uint32_t events; /* PD_STATUS_EVENT bitmask */ 6084 6085 /* 6086 * BCD PD revisions for partners 6087 * 6088 * The format has the PD major reversion in the upper nibble, and PD 6089 * minor version in the next nibble. Following two nibbles are 6090 * currently 0. 6091 * ex. PD 3.2 would map to 0x3200 6092 * 6093 * PD major/minor will be 0 if no PD device is connected. 6094 */ 6095 uint16_t sop_revision; 6096 uint16_t sop_prime_revision; 6097 6098 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ 6099 6100 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ 6101 } __ec_align1; 6102 6103 /* 6104 * Gather the response to the most recent VDM REQ from the AP, as well 6105 * as popping the oldest VDM:Attention from the DPM queue 6106 */ 6107 #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C 6108 6109 struct ec_params_typec_vdm_response { 6110 uint8_t port; 6111 } __ec_align1; 6112 6113 struct ec_response_typec_vdm_response { 6114 /* Number of 32-bit fields filled in */ 6115 uint8_t vdm_data_objects; 6116 /* Partner to address - see enum typec_partner_type */ 6117 uint8_t partner_type; 6118 /* enum ec_status describing VDM response */ 6119 uint16_t vdm_response_err; 6120 /* VDM data, including VDM header */ 6121 uint32_t vdm_response[VDO_MAX_SIZE]; 6122 /* Number of 32-bit Attention fields filled in */ 6123 uint8_t vdm_attention_objects; 6124 /* Number of remaining messages to consume */ 6125 uint8_t vdm_attention_left; 6126 /* Reserved */ 6127 uint16_t reserved1; 6128 /* VDM:Attention contents */ 6129 uint32_t vdm_attention[2]; 6130 } __ec_align1; 6131 6132 #undef VDO_MAX_SIZE 6133 6134 /* 6135 * UCSI OPM-PPM commands 6136 * 6137 * These commands are used for communication between OPM and PPM. 6138 * Only UCSI3.0 is tested. 6139 */ 6140 6141 #define EC_CMD_UCSI_PPM_SET 0x0140 6142 6143 /* The data size is stored in the host command protocol header. */ 6144 struct ec_params_ucsi_ppm_set { 6145 uint16_t offset; 6146 uint8_t data[]; 6147 } __ec_align2; 6148 6149 #define EC_CMD_UCSI_PPM_GET 0x0141 6150 6151 /* For 'GET' sub-commands, data will be returned as a raw payload. */ 6152 struct ec_params_ucsi_ppm_get { 6153 uint16_t offset; 6154 uint8_t size; 6155 } __ec_align2; 6156 6157 /*****************************************************************************/ 6158 /* The command range 0x200-0x2FF is reserved for Rotor. */ 6159 6160 /*****************************************************************************/ 6161 /* 6162 * Reserve a range of host commands for the CR51 firmware. 6163 */ 6164 #define EC_CMD_CR51_BASE 0x0300 6165 #define EC_CMD_CR51_LAST 0x03FF 6166 6167 /*****************************************************************************/ 6168 /* Fingerprint MCU commands: range 0x0400-0x040x */ 6169 6170 /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 6171 #define EC_CMD_FP_PASSTHRU 0x0400 6172 6173 #define EC_FP_FLAG_NOT_COMPLETE 0x1 6174 6175 struct ec_params_fp_passthru { 6176 uint16_t len; /* Number of bytes to write then read */ 6177 uint16_t flags; /* EC_FP_FLAG_xxx */ 6178 uint8_t data[]; /* Data to send */ 6179 } __ec_align2; 6180 6181 /* Configure the Fingerprint MCU behavior */ 6182 #define EC_CMD_FP_MODE 0x0402 6183 6184 /* Put the sensor in its lowest power mode */ 6185 #define FP_MODE_DEEPSLEEP BIT(0) 6186 /* Wait to see a finger on the sensor */ 6187 #define FP_MODE_FINGER_DOWN BIT(1) 6188 /* Poll until the finger has left the sensor */ 6189 #define FP_MODE_FINGER_UP BIT(2) 6190 /* Capture the current finger image */ 6191 #define FP_MODE_CAPTURE BIT(3) 6192 /* Finger enrollment session on-going */ 6193 #define FP_MODE_ENROLL_SESSION BIT(4) 6194 /* Enroll the current finger image */ 6195 #define FP_MODE_ENROLL_IMAGE BIT(5) 6196 /* Try to match the current finger image */ 6197 #define FP_MODE_MATCH BIT(6) 6198 /* Reset and re-initialize the sensor. */ 6199 #define FP_MODE_RESET_SENSOR BIT(7) 6200 /* special value: don't change anything just read back current mode */ 6201 #define FP_MODE_DONT_CHANGE BIT(31) 6202 6203 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 6204 FP_MODE_FINGER_DOWN | \ 6205 FP_MODE_FINGER_UP | \ 6206 FP_MODE_CAPTURE | \ 6207 FP_MODE_ENROLL_SESSION | \ 6208 FP_MODE_ENROLL_IMAGE | \ 6209 FP_MODE_MATCH | \ 6210 FP_MODE_RESET_SENSOR | \ 6211 FP_MODE_DONT_CHANGE) 6212 6213 /* Capture types defined in bits [30..28] */ 6214 #define FP_MODE_CAPTURE_TYPE_SHIFT 28 6215 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 6216 /* 6217 * This enum must remain ordered, if you add new values you must ensure that 6218 * FP_CAPTURE_TYPE_MAX is still the last one. 6219 */ 6220 enum fp_capture_type { 6221 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 6222 FP_CAPTURE_VENDOR_FORMAT = 0, 6223 /* Simple raw image capture (produces width x height x bpp bits) */ 6224 FP_CAPTURE_SIMPLE_IMAGE = 1, 6225 /* Self test pattern (e.g. checkerboard) */ 6226 FP_CAPTURE_PATTERN0 = 2, 6227 /* Self test pattern (e.g. inverted checkerboard) */ 6228 FP_CAPTURE_PATTERN1 = 3, 6229 /* Capture for Quality test with fixed contrast */ 6230 FP_CAPTURE_QUALITY_TEST = 4, 6231 /* Capture for pixel reset value test */ 6232 FP_CAPTURE_RESET_TEST = 5, 6233 FP_CAPTURE_TYPE_MAX, 6234 }; 6235 /* Extracts the capture type from the sensor 'mode' word */ 6236 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 6237 >> FP_MODE_CAPTURE_TYPE_SHIFT) 6238 6239 struct ec_params_fp_mode { 6240 uint32_t mode; /* as defined by FP_MODE_ constants */ 6241 } __ec_align4; 6242 6243 struct ec_response_fp_mode { 6244 uint32_t mode; /* as defined by FP_MODE_ constants */ 6245 } __ec_align4; 6246 6247 /* Retrieve Fingerprint sensor information */ 6248 #define EC_CMD_FP_INFO 0x0403 6249 6250 /* Number of dead pixels detected on the last maintenance */ 6251 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 6252 /* Unknown number of dead pixels detected on the last maintenance */ 6253 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 6254 /* No interrupt from the sensor */ 6255 #define FP_ERROR_NO_IRQ BIT(12) 6256 /* SPI communication error */ 6257 #define FP_ERROR_SPI_COMM BIT(13) 6258 /* Invalid sensor Hardware ID */ 6259 #define FP_ERROR_BAD_HWID BIT(14) 6260 /* Sensor initialization failed */ 6261 #define FP_ERROR_INIT_FAIL BIT(15) 6262 6263 struct ec_response_fp_info_v0 { 6264 /* Sensor identification */ 6265 uint32_t vendor_id; 6266 uint32_t product_id; 6267 uint32_t model_id; 6268 uint32_t version; 6269 /* Image frame characteristics */ 6270 uint32_t frame_size; 6271 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6272 uint16_t width; 6273 uint16_t height; 6274 uint16_t bpp; 6275 uint16_t errors; /* see FP_ERROR_ flags above */ 6276 } __ec_align4; 6277 6278 struct ec_response_fp_info { 6279 /* Sensor identification */ 6280 uint32_t vendor_id; 6281 uint32_t product_id; 6282 uint32_t model_id; 6283 uint32_t version; 6284 /* Image frame characteristics */ 6285 uint32_t frame_size; 6286 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6287 uint16_t width; 6288 uint16_t height; 6289 uint16_t bpp; 6290 uint16_t errors; /* see FP_ERROR_ flags above */ 6291 /* Template/finger current information */ 6292 uint32_t template_size; /* max template size in bytes */ 6293 uint16_t template_max; /* maximum number of fingers/templates */ 6294 uint16_t template_valid; /* number of valid fingers/templates */ 6295 uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 6296 uint32_t template_version; /* version of the template format */ 6297 } __ec_align4; 6298 6299 /* Get the last captured finger frame or a template content */ 6300 #define EC_CMD_FP_FRAME 0x0404 6301 6302 /* constants defining the 'offset' field which also contains the frame index */ 6303 #define FP_FRAME_INDEX_SHIFT 28 6304 /* Frame buffer where the captured image is stored */ 6305 #define FP_FRAME_INDEX_RAW_IMAGE 0 6306 /* First frame buffer holding a template */ 6307 #define FP_FRAME_INDEX_TEMPLATE 1 6308 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 6309 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 6310 6311 /* Version of the format of the encrypted templates. */ 6312 #define FP_TEMPLATE_FORMAT_VERSION 3 6313 6314 /* Constants for encryption parameters */ 6315 #define FP_CONTEXT_NONCE_BYTES 12 6316 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 6317 #define FP_CONTEXT_TAG_BYTES 16 6318 #define FP_CONTEXT_SALT_BYTES 16 6319 #define FP_CONTEXT_TPM_BYTES 32 6320 6321 struct ec_fp_template_encryption_metadata { 6322 /* 6323 * Version of the structure format (N=3). 6324 */ 6325 uint16_t struct_version; 6326 /* Reserved bytes, set to 0. */ 6327 uint16_t reserved; 6328 /* 6329 * The salt is *only* ever used for key derivation. The nonce is unique, 6330 * a different one is used for every message. 6331 */ 6332 uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 6333 uint8_t salt[FP_CONTEXT_SALT_BYTES]; 6334 uint8_t tag[FP_CONTEXT_TAG_BYTES]; 6335 }; 6336 6337 struct ec_params_fp_frame { 6338 /* 6339 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 6340 * in the high nibble, and the real offset within the frame in 6341 * FP_FRAME_OFFSET_MASK. 6342 */ 6343 uint32_t offset; 6344 uint32_t size; 6345 } __ec_align4; 6346 6347 /* Load a template into the MCU */ 6348 #define EC_CMD_FP_TEMPLATE 0x0405 6349 6350 /* Flag in the 'size' field indicating that the full template has been sent */ 6351 #define FP_TEMPLATE_COMMIT 0x80000000 6352 6353 struct ec_params_fp_template { 6354 uint32_t offset; 6355 uint32_t size; 6356 uint8_t data[]; 6357 } __ec_align4; 6358 6359 /* Clear the current fingerprint user context and set a new one */ 6360 #define EC_CMD_FP_CONTEXT 0x0406 6361 6362 struct ec_params_fp_context { 6363 uint32_t userid[FP_CONTEXT_USERID_WORDS]; 6364 } __ec_align4; 6365 6366 #define EC_CMD_FP_STATS 0x0407 6367 6368 #define FPSTATS_CAPTURE_INV BIT(0) 6369 #define FPSTATS_MATCHING_INV BIT(1) 6370 6371 struct ec_response_fp_stats { 6372 uint32_t capture_time_us; 6373 uint32_t matching_time_us; 6374 uint32_t overall_time_us; 6375 struct { 6376 uint32_t lo; 6377 uint32_t hi; 6378 } overall_t0; 6379 uint8_t timestamps_invalid; 6380 int8_t template_matched; 6381 } __ec_align2; 6382 6383 #define EC_CMD_FP_SEED 0x0408 6384 struct ec_params_fp_seed { 6385 /* 6386 * Version of the structure format (N=3). 6387 */ 6388 uint16_t struct_version; 6389 /* Reserved bytes, set to 0. */ 6390 uint16_t reserved; 6391 /* Seed from the TPM. */ 6392 uint8_t seed[FP_CONTEXT_TPM_BYTES]; 6393 } __ec_align4; 6394 6395 #define EC_CMD_FP_ENC_STATUS 0x0409 6396 6397 /* FP TPM seed has been set or not */ 6398 #define FP_ENC_STATUS_SEED_SET BIT(0) 6399 6400 struct ec_response_fp_encryption_status { 6401 /* Used bits in encryption engine status */ 6402 uint32_t valid_flags; 6403 /* Encryption engine status */ 6404 uint32_t status; 6405 } __ec_align4; 6406 6407 /*****************************************************************************/ 6408 /* Touchpad MCU commands: range 0x0500-0x05FF */ 6409 6410 /* Perform touchpad self test */ 6411 #define EC_CMD_TP_SELF_TEST 0x0500 6412 6413 /* Get number of frame types, and the size of each type */ 6414 #define EC_CMD_TP_FRAME_INFO 0x0501 6415 6416 struct ec_response_tp_frame_info { 6417 uint32_t n_frames; 6418 uint32_t frame_sizes[]; 6419 } __ec_align4; 6420 6421 /* Create a snapshot of current frame readings */ 6422 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 6423 6424 /* Read the frame */ 6425 #define EC_CMD_TP_FRAME_GET 0x0503 6426 6427 struct ec_params_tp_frame_get { 6428 uint32_t frame_index; 6429 uint32_t offset; 6430 uint32_t size; 6431 } __ec_align4; 6432 6433 /*****************************************************************************/ 6434 /* EC-EC communication commands: range 0x0600-0x06FF */ 6435 6436 #define EC_COMM_TEXT_MAX 8 6437 6438 /* 6439 * Get battery static information, i.e. information that never changes, or 6440 * very infrequently. 6441 */ 6442 #define EC_CMD_BATTERY_GET_STATIC 0x0600 6443 6444 /** 6445 * struct ec_params_battery_static_info - Battery static info parameters 6446 * @index: Battery index. 6447 */ 6448 struct ec_params_battery_static_info { 6449 uint8_t index; 6450 } __ec_align_size1; 6451 6452 /** 6453 * struct ec_response_battery_static_info - Battery static info response 6454 * @design_capacity: Battery Design Capacity (mAh) 6455 * @design_voltage: Battery Design Voltage (mV) 6456 * @manufacturer: Battery Manufacturer String 6457 * @model: Battery Model Number String 6458 * @serial: Battery Serial Number String 6459 * @type: Battery Type String 6460 * @cycle_count: Battery Cycle Count 6461 */ 6462 struct ec_response_battery_static_info { 6463 uint16_t design_capacity; 6464 uint16_t design_voltage; 6465 char manufacturer[EC_COMM_TEXT_MAX]; 6466 char model[EC_COMM_TEXT_MAX]; 6467 char serial[EC_COMM_TEXT_MAX]; 6468 char type[EC_COMM_TEXT_MAX]; 6469 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 6470 uint32_t cycle_count; 6471 } __ec_align4; 6472 6473 /* 6474 * Get battery dynamic information, i.e. information that is likely to change 6475 * every time it is read. 6476 */ 6477 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 6478 6479 /** 6480 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 6481 * @index: Battery index. 6482 */ 6483 struct ec_params_battery_dynamic_info { 6484 uint8_t index; 6485 } __ec_align_size1; 6486 6487 /** 6488 * struct ec_response_battery_dynamic_info - Battery dynamic info response 6489 * @actual_voltage: Battery voltage (mV) 6490 * @actual_current: Battery current (mA); negative=discharging 6491 * @remaining_capacity: Remaining capacity (mAh) 6492 * @full_capacity: Capacity (mAh, might change occasionally) 6493 * @flags: Flags, see EC_BATT_FLAG_* 6494 * @desired_voltage: Charging voltage desired by battery (mV) 6495 * @desired_current: Charging current desired by battery (mA) 6496 */ 6497 struct ec_response_battery_dynamic_info { 6498 int16_t actual_voltage; 6499 int16_t actual_current; 6500 int16_t remaining_capacity; 6501 int16_t full_capacity; 6502 int16_t flags; 6503 int16_t desired_voltage; 6504 int16_t desired_current; 6505 } __ec_align2; 6506 6507 /* 6508 * Control charger chip. Used to control charger chip on the slave. 6509 */ 6510 #define EC_CMD_CHARGER_CONTROL 0x0602 6511 6512 /** 6513 * struct ec_params_charger_control - Charger control parameters 6514 * @max_current: Charger current (mA). Positive to allow base to draw up to 6515 * max_current and (possibly) charge battery, negative to request current 6516 * from base (OTG). 6517 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 6518 * >= 0. 6519 * @allow_charging: Allow base battery charging (only makes sense if 6520 * max_current > 0). 6521 */ 6522 struct ec_params_charger_control { 6523 int16_t max_current; 6524 uint16_t otg_voltage; 6525 uint8_t allow_charging; 6526 } __ec_align_size1; 6527 6528 /* Get ACK from the USB-C SS muxes */ 6529 #define EC_CMD_USB_PD_MUX_ACK 0x0603 6530 6531 struct ec_params_usb_pd_mux_ack { 6532 uint8_t port; /* USB-C port number */ 6533 } __ec_align1; 6534 6535 /*****************************************************************************/ 6536 /* 6537 * Reserve a range of host commands for board-specific, experimental, or 6538 * special purpose features. These can be (re)used without updating this file. 6539 * 6540 * CAUTION: Don't go nuts with this. Shipping products should document ALL 6541 * their EC commands for easier development, testing, debugging, and support. 6542 * 6543 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 6544 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 6545 * 6546 * In your experimental code, you may want to do something like this: 6547 * 6548 * #define EC_CMD_MAGIC_FOO 0x0000 6549 * #define EC_CMD_MAGIC_BAR 0x0001 6550 * #define EC_CMD_MAGIC_HEY 0x0002 6551 * 6552 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 6553 * EC_VER_MASK(0); 6554 * 6555 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 6556 * EC_VER_MASK(0); 6557 * 6558 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 6559 * EC_VER_MASK(0); 6560 */ 6561 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 6562 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 6563 6564 /* 6565 * Given the private host command offset, calculate the true private host 6566 * command value. 6567 */ 6568 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 6569 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 6570 6571 /*****************************************************************************/ 6572 /* 6573 * Passthru commands 6574 * 6575 * Some platforms have sub-processors chained to each other. For example. 6576 * 6577 * AP <--> EC <--> PD MCU 6578 * 6579 * The top 2 bits of the command number are used to indicate which device the 6580 * command is intended for. Device 0 is always the device receiving the 6581 * command; other device mapping is board-specific. 6582 * 6583 * When a device receives a command to be passed to a sub-processor, it passes 6584 * it on with the device number set back to 0. This allows the sub-processor 6585 * to remain blissfully unaware of whether the command originated on the next 6586 * device up the chain, or was passed through from the AP. 6587 * 6588 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 6589 * AP sends command 0x4002 to the EC 6590 * EC sends command 0x0002 to the PD MCU 6591 * EC forwards PD MCU response back to the AP 6592 */ 6593 6594 /* Offset and max command number for sub-device n */ 6595 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 6596 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 6597 6598 /*****************************************************************************/ 6599 /* 6600 * Deprecated constants. These constants have been renamed for clarity. The 6601 * meaning and size has not changed. Programs that use the old names should 6602 * switch to the new names soon, as the old names may not be carried forward 6603 * forever. 6604 */ 6605 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 6606 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 6607 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 6608 6609 6610 6611 #endif /* __CROS_EC_COMMANDS_H */ 6612