xref: /illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.h (revision 14b24e2b79293068c8e016a69ef1d872fb5e2fd5)
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, v.1,  (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://opensource.org/licenses/CDDL-1.0.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 
22 /*
23 * Copyright 2014-2017 Cavium, Inc.
24 * The contents of this file are subject to the terms of the Common Development
25 * and Distribution License, v.1,  (the "License").
26 
27 * You may not use this file except in compliance with the License.
28 
29 * You can obtain a copy of the License at available
30 * at http://opensource.org/licenses/CDDL-1.0
31 
32 * See the License for the specific language governing permissions and
33 * limitations under the License.
34 */
35 
36 #ifndef __ECORE_INT_H__
37 #define __ECORE_INT_H__
38 
39 #include "ecore.h"
40 #include "ecore_int_api.h"
41 
42 #define ECORE_CAU_DEF_RX_TIMER_RES 0
43 #define ECORE_CAU_DEF_TX_TIMER_RES 0
44 
45 #define ECORE_SB_ATT_IDX	0x0001
46 #define ECORE_SB_EVENT_MASK	0x0003
47 
48 #define SB_ALIGNED_SIZE(p_hwfn)					\
49 	ALIGNED_TYPE_SIZE(struct status_block, p_hwfn)
50 
51 #define ECORE_SB_INVALID_IDX	0xffff
52 
53 struct ecore_igu_block
54 {
55 	u8	status;
56 #define ECORE_IGU_STATUS_FREE	0x01
57 #define ECORE_IGU_STATUS_VALID	0x02
58 #define ECORE_IGU_STATUS_PF	0x04
59 #define ECORE_IGU_STATUS_DSB	0x08
60 
61 	u8	vector_number;
62 	u8	function_id;
63 	u8      is_pf;
64 
65 	/* Index inside IGU [meant for back reference] */
66 	u16 igu_sb_id;
67 
68 	struct ecore_sb_info *sb_info;
69 };
70 
71 struct ecore_igu_info
72 {
73 	struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH];
74 	u16 igu_dsb_id;
75 
76 	/* The numbers can shift when using APIs to switch SBs between PF and
77 	 * VF.
78 	 */
79 	struct ecore_sb_cnt_info usage;
80 
81 	/* Determine whether we can shift SBs between VFs and PFs */
82 	bool b_allow_pf_vf_change;
83 };
84 
85 /**
86  * @brief - Make sure the IGU CAM reflects the resources provided by MFW
87  *
88  * @param p_hwfn
89  * @param p_ptt
90  */
91 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn,
92 			    struct ecore_ptt *p_ptt);
93 
94 /**
95  * @brief - Make sure IGU CAM reflects the default resources once again,
96  *          starting with a 'dirty' SW database.
97  * @param p_hwfn
98  * @param p_ptt
99  */
100 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn,
101 				    struct ecore_ptt *p_ptt);
102 
103 /**
104  * @brief Translate the weakly-defined client sb-id into an IGU sb-id
105  *
106  * @param p_hwfn
107  * @param sb_id - user provided sb_id
108  *
109  * @return an index inside IGU CAM where the SB resides
110  */
111 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);
112 
113 /**
114  * @brief return a pointer to an unused valid SB
115  *
116  * @param p_hwfn
117  * @param b_is_pf - true iff we want a SB belonging to a PF
118  *
119  * @return point to an igu_block, OSAL_NULL if none is available
120  */
121 struct ecore_igu_block *
122 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf);
123 
124 /* TODO Names of function may change... */
125 void ecore_int_igu_init_pure_rt(struct ecore_hwfn	*p_hwfn,
126 				 struct ecore_ptt	*p_ptt,
127 				 bool			b_set,
128 				 bool			b_slowpath);
129 
130 void ecore_int_igu_init_rt(struct ecore_hwfn		*p_hwfn);
131 
132 /**
133  * @brief ecore_int_igu_read_cam - Reads the IGU CAM.
134  *	This function needs to be called during hardware
135  *	prepare. It reads the info from igu cam to know which
136  *	status block is the default / base status block etc.
137  *
138  * @param p_hwfn
139  * @param p_ptt
140  *
141  * @return enum _ecore_status_t
142  */
143 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn	*p_hwfn,
144 					    struct ecore_ptt	*p_ptt);
145 
146 typedef enum _ecore_status_t(*ecore_int_comp_cb_t)(struct ecore_hwfn *p_hwfn,
147 						   void *cookie);
148 /**
149  * @brief ecore_int_register_cb - Register callback func for
150  *      slowhwfn statusblock.
151  *
152  *	Every protocol that uses the slowhwfn status block
153  *	should register a callback function that will be called
154  *	once there is an update of the sp status block.
155  *
156  * @param p_hwfn
157  * @param comp_cb - function to be called when there is an
158  *                  interrupt on the sp sb
159  *
160  * @param cookie  - passed to the callback function
161  * @param sb_idx  - OUT parameter which gives the chosen index
162  *                  for this protocol.
163  * @param p_fw_cons  - pointer to the actual address of the
164  *                     consumer for this protocol.
165  *
166  * @return enum _ecore_status_t
167  */
168 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn    *p_hwfn,
169 					   ecore_int_comp_cb_t  comp_cb,
170 					   void                 *cookie,
171 					   u8                   *sb_idx,
172 					   __le16               **p_fw_cons);
173 /**
174  * @brief ecore_int_unregister_cb - Unregisters callback
175  *      function from sp sb.
176  *      Partner of ecore_int_register_cb -> should be called
177  *      when no longer required.
178  *
179  * @param p_hwfn
180  * @param pi
181  *
182  * @return enum _ecore_status_t
183  */
184 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn,
185 					     u8 pi);
186 
187 /**
188  * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id.
189  *
190  * @param p_hwfn
191  *
192  * @return u16
193  */
194 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn);
195 
196 /**
197  * @brief Status block cleanup. Should be called for each status
198  *        block that will be used -> both PF / VF
199  *
200  * @param p_hwfn
201  * @param p_ptt
202  * @param sb_id		- igu status block id
203  * @param opaque	- opaque fid of the sb owner.
204  * @param cleanup_set	- set(1) / clear(0)
205  */
206 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn	*p_hwfn,
207 				       struct ecore_ptt		*p_ptt,
208 				       u16			sb_id,
209 				       u16			opaque,
210 				       bool			b_set);
211 
212 /**
213  * @brief ecore_int_cau_conf - configure cau for a given status
214  *        block
215  *
216  * @param p_hwfn
217  * @param ptt
218  * @param sb_phys
219  * @param igu_sb_id
220  * @param vf_number
221  * @param vf_valid
222  */
223 void ecore_int_cau_conf_sb(struct ecore_hwfn	*p_hwfn,
224 			   struct ecore_ptt	*p_ptt,
225 			   dma_addr_t		sb_phys,
226 			   u16			igu_sb_id,
227 			   u16			vf_number,
228 			   u8			vf_valid);
229 
230 /**
231 * @brief ecore_int_alloc
232 *
233 * @param p_hwfn
234  * @param p_ptt
235 *
236 * @return enum _ecore_status_t
237 */
238 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn	*p_hwfn,
239 				     struct ecore_ptt	*p_ptt);
240 
241 /**
242 * @brief ecore_int_free
243 *
244 * @param p_hwfn
245 */
246 void ecore_int_free(struct ecore_hwfn *p_hwfn);
247 
248 /**
249 * @brief ecore_int_setup
250 *
251 * @param p_hwfn
252 * @param p_ptt
253 */
254 void ecore_int_setup(struct ecore_hwfn	*p_hwfn,
255 		     struct ecore_ptt	*p_ptt);
256 
257 /**
258  * @brief - Enable Interrupt & Attention for hw function
259  *
260  * @param p_hwfn
261  * @param p_ptt
262  * @param int_mode
263  *
264 * @return enum _ecore_status_t
265  */
266 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn,
267 					  struct ecore_ptt *p_ptt,
268 					  enum ecore_int_mode int_mode);
269 
270 /**
271  * @brief - Initialize CAU status block entry
272  *
273  * @param p_hwfn
274  * @param p_sb_entry
275  * @param pf_id
276  * @param vf_number
277  * @param vf_valid
278  */
279 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn,
280 			     struct cau_sb_entry *p_sb_entry, u8 pf_id,
281 			     u16 vf_number, u8 vf_valid);
282 
283 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn,
284 					     struct ecore_ptt *p_ptt,
285 					     u8 timer_res, u16 sb_id, bool tx);
286 #ifndef ASIC_ONLY
287 #define ECORE_MAPPING_MEMORY_SIZE(dev) \
288 	((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \
289 	 136 : NUM_OF_SBS(dev))
290 #else
291 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev)
292 #endif
293 
294 #endif /* __ECORE_INT_H__ */
295 
296