1 //===----------------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //
8 // Processor specific interpretation of DWARF unwind info.
9 //
10 //===----------------------------------------------------------------------===//
11
12 #ifndef __DWARF_INSTRUCTIONS_HPP__
13 #define __DWARF_INSTRUCTIONS_HPP__
14
15 #include <stdint.h>
16 #include <stdio.h>
17 #include <stdlib.h>
18
19 #include "DwarfParser.hpp"
20 #include "Registers.hpp"
21 #include "config.h"
22 #include "dwarf2.h"
23 #include "libunwind_ext.h"
24
25
26 namespace libunwind {
27
28
29 /// DwarfInstructions maps abstract DWARF unwind instructions to a particular
30 /// architecture
31 template <typename A, typename R>
32 class DwarfInstructions {
33 public:
34 typedef typename A::pint_t pint_t;
35 typedef typename A::sint_t sint_t;
36
37 static int stepWithDwarf(A &addressSpace, pint_t pc, pint_t fdeStart,
38 R ®isters, bool &isSignalFrame, bool stage2);
39
40 private:
41
42 enum {
43 DW_X86_64_RET_ADDR = 16
44 };
45
46 enum {
47 DW_X86_RET_ADDR = 8
48 };
49
50 typedef typename CFI_Parser<A>::RegisterLocation RegisterLocation;
51 typedef typename CFI_Parser<A>::PrologInfo PrologInfo;
52 typedef typename CFI_Parser<A>::FDE_Info FDE_Info;
53 typedef typename CFI_Parser<A>::CIE_Info CIE_Info;
54
55 static pint_t evaluateExpression(pint_t expression, A &addressSpace,
56 const R ®isters,
57 pint_t initialStackValue);
58 static pint_t getSavedRegister(A &addressSpace, const R ®isters,
59 pint_t cfa, const RegisterLocation &savedReg);
60 static double getSavedFloatRegister(A &addressSpace, const R ®isters,
61 pint_t cfa, const RegisterLocation &savedReg);
62 static v128 getSavedVectorRegister(A &addressSpace, const R ®isters,
63 pint_t cfa, const RegisterLocation &savedReg);
64
getCFA(A & addressSpace,const PrologInfo & prolog,const R & registers)65 static pint_t getCFA(A &addressSpace, const PrologInfo &prolog,
66 const R ®isters) {
67 if (prolog.cfaRegister != 0)
68 return (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) +
69 prolog.cfaRegisterOffset);
70 if (prolog.cfaExpression != 0)
71 return evaluateExpression((pint_t)prolog.cfaExpression, addressSpace,
72 registers, 0);
73 assert(0 && "getCFA(): unknown location");
74 __builtin_unreachable();
75 }
76 #if defined(_LIBUNWIND_TARGET_AARCH64)
77 static bool isReturnAddressSigned(A &addressSpace, R registers, pint_t cfa,
78 PrologInfo &prolog);
79 static bool isReturnAddressSignedWithPC(A &addressSpace, R registers,
80 pint_t cfa, PrologInfo &prolog);
81 #endif
82 };
83
84 template <typename R>
getSparcWCookie(const R & r,int)85 auto getSparcWCookie(const R &r, int) -> decltype(r.getWCookie()) {
86 return r.getWCookie();
87 }
getSparcWCookie(const R &,long)88 template <typename R> uint64_t getSparcWCookie(const R &, long) {
89 return 0;
90 }
91
92 template <typename A, typename R>
getSavedRegister(A & addressSpace,const R & registers,pint_t cfa,const RegisterLocation & savedReg)93 typename A::pint_t DwarfInstructions<A, R>::getSavedRegister(
94 A &addressSpace, const R ®isters, pint_t cfa,
95 const RegisterLocation &savedReg) {
96 switch (savedReg.location) {
97 case CFI_Parser<A>::kRegisterInCFA:
98 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value);
99
100 case CFI_Parser<A>::kRegisterInCFADecrypt: // sparc64 specific
101 return (pint_t)(addressSpace.getP(cfa + (pint_t)savedReg.value) ^
102 getSparcWCookie(registers, 0));
103
104 case CFI_Parser<A>::kRegisterAtExpression:
105 return (pint_t)addressSpace.getRegister(evaluateExpression(
106 (pint_t)savedReg.value, addressSpace, registers, cfa));
107
108 case CFI_Parser<A>::kRegisterIsExpression:
109 return evaluateExpression((pint_t)savedReg.value, addressSpace,
110 registers, cfa);
111
112 case CFI_Parser<A>::kRegisterInRegister:
113 return registers.getRegister((int)savedReg.value);
114
115 case CFI_Parser<A>::kRegisterUnused:
116 case CFI_Parser<A>::kRegisterOffsetFromCFA:
117 // FIX ME
118 break;
119 }
120 _LIBUNWIND_ABORT("unsupported restore location for register");
121 }
122
123 template <typename A, typename R>
getSavedFloatRegister(A & addressSpace,const R & registers,pint_t cfa,const RegisterLocation & savedReg)124 double DwarfInstructions<A, R>::getSavedFloatRegister(
125 A &addressSpace, const R ®isters, pint_t cfa,
126 const RegisterLocation &savedReg) {
127 switch (savedReg.location) {
128 case CFI_Parser<A>::kRegisterInCFA:
129 return addressSpace.getDouble(cfa + (pint_t)savedReg.value);
130
131 case CFI_Parser<A>::kRegisterAtExpression:
132 return addressSpace.getDouble(
133 evaluateExpression((pint_t)savedReg.value, addressSpace,
134 registers, cfa));
135 case CFI_Parser<A>::kRegisterInRegister:
136 #ifndef _LIBUNWIND_TARGET_ARM
137 return registers.getFloatRegister((int)savedReg.value);
138 #endif
139 case CFI_Parser<A>::kRegisterIsExpression:
140 case CFI_Parser<A>::kRegisterUnused:
141 case CFI_Parser<A>::kRegisterOffsetFromCFA:
142 case CFI_Parser<A>::kRegisterInCFADecrypt:
143 // FIX ME
144 break;
145 }
146 _LIBUNWIND_ABORT("unsupported restore location for float register");
147 }
148
149 template <typename A, typename R>
getSavedVectorRegister(A & addressSpace,const R & registers,pint_t cfa,const RegisterLocation & savedReg)150 v128 DwarfInstructions<A, R>::getSavedVectorRegister(
151 A &addressSpace, const R ®isters, pint_t cfa,
152 const RegisterLocation &savedReg) {
153 switch (savedReg.location) {
154 case CFI_Parser<A>::kRegisterInCFA:
155 return addressSpace.getVector(cfa + (pint_t)savedReg.value);
156
157 case CFI_Parser<A>::kRegisterAtExpression:
158 return addressSpace.getVector(
159 evaluateExpression((pint_t)savedReg.value, addressSpace,
160 registers, cfa));
161
162 case CFI_Parser<A>::kRegisterIsExpression:
163 case CFI_Parser<A>::kRegisterUnused:
164 case CFI_Parser<A>::kRegisterOffsetFromCFA:
165 case CFI_Parser<A>::kRegisterInRegister:
166 case CFI_Parser<A>::kRegisterInCFADecrypt:
167 // FIX ME
168 break;
169 }
170 _LIBUNWIND_ABORT("unsupported restore location for vector register");
171 }
172 #if defined(_LIBUNWIND_TARGET_AARCH64)
173 template <typename A, typename R>
isReturnAddressSigned(A & addressSpace,R registers,pint_t cfa,PrologInfo & prolog)174 bool DwarfInstructions<A, R>::isReturnAddressSigned(A &addressSpace,
175 R registers, pint_t cfa,
176 PrologInfo &prolog) {
177 pint_t raSignState;
178 auto regloc = prolog.savedRegisters[UNW_AARCH64_RA_SIGN_STATE];
179 if (regloc.location == CFI_Parser<A>::kRegisterUnused)
180 raSignState = static_cast<pint_t>(regloc.value);
181 else
182 raSignState = getSavedRegister(addressSpace, registers, cfa, regloc);
183
184 // Only bit[0] is meaningful.
185 return raSignState & 0x01;
186 }
187
188 template <typename A, typename R>
isReturnAddressSignedWithPC(A & addressSpace,R registers,pint_t cfa,PrologInfo & prolog)189 bool DwarfInstructions<A, R>::isReturnAddressSignedWithPC(A &addressSpace,
190 R registers,
191 pint_t cfa,
192 PrologInfo &prolog) {
193 pint_t raSignState;
194 auto regloc = prolog.savedRegisters[UNW_AARCH64_RA_SIGN_STATE];
195 if (regloc.location == CFI_Parser<A>::kRegisterUnused)
196 raSignState = static_cast<pint_t>(regloc.value);
197 else
198 raSignState = getSavedRegister(addressSpace, registers, cfa, regloc);
199
200 // Only bit[1] is meaningful.
201 return raSignState & 0x02;
202 }
203 #endif
204
205 template <typename A, typename R>
stepWithDwarf(A & addressSpace,pint_t pc,pint_t fdeStart,R & registers,bool & isSignalFrame,bool stage2)206 int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
207 pint_t fdeStart, R ®isters,
208 bool &isSignalFrame, bool stage2) {
209 FDE_Info fdeInfo;
210 CIE_Info cieInfo;
211 if (CFI_Parser<A>::decodeFDE(addressSpace, fdeStart, &fdeInfo,
212 &cieInfo) == NULL) {
213 PrologInfo prolog;
214 if (CFI_Parser<A>::parseFDEInstructions(addressSpace, fdeInfo, cieInfo, pc,
215 R::getArch(), &prolog)) {
216 // get pointer to cfa (architecture specific)
217 pint_t cfa = getCFA(addressSpace, prolog, registers);
218
219 (void)stage2;
220 // __unw_step_stage2 is not used for cross unwinding, so we use
221 // __aarch64__ rather than LIBUNWIND_TARGET_AARCH64 to make sure we are
222 // building for AArch64 natively.
223 #if defined(__aarch64__)
224 if (stage2 && cieInfo.mteTaggedFrame) {
225 pint_t sp = registers.getSP();
226 pint_t p = sp;
227 // AArch64 doesn't require the value of SP to be 16-byte aligned at
228 // all times, only at memory accesses and public interfaces [1]. Thus,
229 // a signal could arrive at a point where SP is not aligned properly.
230 // In that case, the kernel fixes up [2] the signal frame, but we
231 // still have a misaligned SP in the previous frame. If that signal
232 // handler caused stack unwinding, we would have an unaligned SP.
233 // We do not need to fix up the CFA, as that is the SP at a "public
234 // interface".
235 // [1]:
236 // https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#622the-stack
237 // [2]:
238 // https://github.com/torvalds/linux/blob/1930a6e739c4b4a654a69164dbe39e554d228915/arch/arm64/kernel/signal.c#L718
239 p &= ~0xfULL;
240 // CFA is the bottom of the current stack frame.
241 for (; p < cfa; p += 16) {
242 __asm__ __volatile__(".arch armv8.5-a\n"
243 ".arch_extension memtag\n"
244 "stg %[Ptr], [%[Ptr]]\n"
245 :
246 : [Ptr] "r"(p)
247 : "memory");
248 }
249 }
250 #endif
251 // restore registers that DWARF says were saved
252 R newRegisters = registers;
253
254 // Typically, the CFA is the stack pointer at the call site in
255 // the previous frame. However, there are scenarios in which this is not
256 // true. For example, if we switched to a new stack. In that case, the
257 // value of the previous SP might be indicated by a CFI directive.
258 //
259 // We set the SP here to the CFA, allowing for it to be overridden
260 // by a CFI directive later on.
261 newRegisters.setSP(cfa);
262
263 pint_t returnAddress = 0;
264 constexpr int lastReg = R::lastDwarfRegNum();
265 static_assert(static_cast<int>(CFI_Parser<A>::kMaxRegisterNumber) >=
266 lastReg,
267 "register range too large");
268 assert(lastReg >= (int)cieInfo.returnAddressRegister &&
269 "register range does not contain return address register");
270 for (int i = 0; i <= lastReg; ++i) {
271 if (prolog.savedRegisters[i].location !=
272 CFI_Parser<A>::kRegisterUnused) {
273 if (registers.validFloatRegister(i))
274 newRegisters.setFloatRegister(
275 i, getSavedFloatRegister(addressSpace, registers, cfa,
276 prolog.savedRegisters[i]));
277 else if (registers.validVectorRegister(i))
278 newRegisters.setVectorRegister(
279 i, getSavedVectorRegister(addressSpace, registers, cfa,
280 prolog.savedRegisters[i]));
281 else if (i == (int)cieInfo.returnAddressRegister)
282 returnAddress = getSavedRegister(addressSpace, registers, cfa,
283 prolog.savedRegisters[i]);
284 else if (registers.validRegister(i))
285 newRegisters.setRegister(
286 i, getSavedRegister(addressSpace, registers, cfa,
287 prolog.savedRegisters[i]));
288 else
289 return UNW_EBADREG;
290 }
291 }
292
293 isSignalFrame = cieInfo.isSignalFrame;
294
295 #if defined(_LIBUNWIND_TARGET_AARCH64)
296 // If the target is aarch64 then the return address may have been signed
297 // using the v8.3 pointer authentication extensions. The original
298 // return address needs to be authenticated before the return address is
299 // restored. autia1716 is used instead of autia as autia1716 assembles
300 // to a NOP on pre-v8.3a architectures.
301 if ((R::getArch() == REGISTERS_ARM64) &&
302 isReturnAddressSigned(addressSpace, registers, cfa, prolog) &&
303 returnAddress != 0) {
304 #if !defined(_LIBUNWIND_IS_NATIVE_ONLY)
305 return UNW_ECROSSRASIGNING;
306 #else
307 register unsigned long long x17 __asm("x17") = returnAddress;
308 register unsigned long long x16 __asm("x16") = cfa;
309
310 // We use the hint versions of the authentication instructions below to
311 // ensure they're assembled by the compiler even for targets with no
312 // FEAT_PAuth/FEAT_PAuth_LR support.
313 if (isReturnAddressSignedWithPC(addressSpace, registers, cfa, prolog)) {
314 register unsigned long long x15 __asm("x15") =
315 prolog.ptrAuthDiversifier;
316 if (cieInfo.addressesSignedWithBKey) {
317 asm("hint 0x27\n\t" // pacm
318 "hint 0xe"
319 : "+r"(x17)
320 : "r"(x16), "r"(x15)); // autib1716
321 } else {
322 asm("hint 0x27\n\t" // pacm
323 "hint 0xc"
324 : "+r"(x17)
325 : "r"(x16), "r"(x15)); // autia1716
326 }
327 } else {
328 if (cieInfo.addressesSignedWithBKey)
329 asm("hint 0xe" : "+r"(x17) : "r"(x16)); // autib1716
330 else
331 asm("hint 0xc" : "+r"(x17) : "r"(x16)); // autia1716
332 }
333 returnAddress = x17;
334 #endif
335 }
336 #endif
337
338 #if defined(_LIBUNWIND_IS_NATIVE_ONLY) && defined(_LIBUNWIND_TARGET_ARM) && \
339 defined(__ARM_FEATURE_PAUTH)
340 if ((R::getArch() == REGISTERS_ARM) &&
341 prolog.savedRegisters[UNW_ARM_RA_AUTH_CODE].value) {
342 pint_t pac =
343 getSavedRegister(addressSpace, registers, cfa,
344 prolog.savedRegisters[UNW_ARM_RA_AUTH_CODE]);
345 __asm__ __volatile__("autg %0, %1, %2"
346 :
347 : "r"(pac), "r"(returnAddress), "r"(cfa)
348 :);
349 }
350 #endif
351
352 #if defined(_LIBUNWIND_TARGET_SPARC)
353 if (R::getArch() == REGISTERS_SPARC) {
354 // Skip call site instruction and delay slot
355 returnAddress += 8;
356 // Skip unimp instruction if function returns a struct
357 if ((addressSpace.get32(returnAddress) & 0xC1C00000) == 0)
358 returnAddress += 4;
359 }
360 #endif
361
362 #if defined(_LIBUNWIND_TARGET_SPARC64)
363 // Skip call site instruction and delay slot.
364 if (R::getArch() == REGISTERS_SPARC64)
365 returnAddress += 8;
366 #endif
367
368 #if defined(_LIBUNWIND_TARGET_PPC64)
369 #define PPC64_ELFV1_R2_LOAD_INST_ENCODING 0xe8410028u // ld r2,40(r1)
370 #define PPC64_ELFV1_R2_OFFSET 40
371 #define PPC64_ELFV2_R2_LOAD_INST_ENCODING 0xe8410018u // ld r2,24(r1)
372 #define PPC64_ELFV2_R2_OFFSET 24
373 // If the instruction at return address is a TOC (r2) restore,
374 // then r2 was saved and needs to be restored.
375 // ELFv2 ABI specifies that the TOC Pointer must be saved at SP + 24,
376 // while in ELFv1 ABI it is saved at SP + 40.
377 if (R::getArch() == REGISTERS_PPC64 && returnAddress != 0) {
378 pint_t sp = newRegisters.getRegister(UNW_REG_SP);
379 pint_t r2 = 0;
380 switch (addressSpace.get32(returnAddress)) {
381 case PPC64_ELFV1_R2_LOAD_INST_ENCODING:
382 r2 = addressSpace.get64(sp + PPC64_ELFV1_R2_OFFSET);
383 break;
384 case PPC64_ELFV2_R2_LOAD_INST_ENCODING:
385 r2 = addressSpace.get64(sp + PPC64_ELFV2_R2_OFFSET);
386 break;
387 }
388 if (r2)
389 newRegisters.setRegister(UNW_PPC64_R2, r2);
390 }
391 #endif
392
393 // Return address is address after call site instruction, so setting IP to
394 // that does simulates a return.
395 newRegisters.setIP(returnAddress);
396
397 // Simulate the step by replacing the register set with the new ones.
398 registers = newRegisters;
399
400 return UNW_STEP_SUCCESS;
401 }
402 }
403 return UNW_EBADFRAME;
404 }
405
406 template <typename A, typename R>
407 typename A::pint_t
evaluateExpression(pint_t expression,A & addressSpace,const R & registers,pint_t initialStackValue)408 DwarfInstructions<A, R>::evaluateExpression(pint_t expression, A &addressSpace,
409 const R ®isters,
410 pint_t initialStackValue) {
411 const bool log = false;
412 pint_t p = expression;
413 pint_t expressionEnd = expression + 20; // temp, until len read
414 pint_t length = (pint_t)addressSpace.getULEB128(p, expressionEnd);
415 expressionEnd = p + length;
416 if (log)
417 fprintf(stderr, "evaluateExpression(): length=%" PRIu64 "\n",
418 (uint64_t)length);
419 pint_t stack[100];
420 pint_t *sp = stack;
421 *(++sp) = initialStackValue;
422
423 while (p < expressionEnd) {
424 if (log) {
425 for (pint_t *t = sp; t > stack; --t) {
426 fprintf(stderr, "sp[] = 0x%" PRIx64 "\n", (uint64_t)(*t));
427 }
428 }
429 uint8_t opcode = addressSpace.get8(p++);
430 sint_t svalue, svalue2;
431 pint_t value;
432 uint32_t reg;
433 switch (opcode) {
434 case DW_OP_addr:
435 // push immediate address sized value
436 value = addressSpace.getP(p);
437 p += sizeof(pint_t);
438 *(++sp) = value;
439 if (log)
440 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
441 break;
442
443 case DW_OP_deref:
444 // pop stack, dereference, push result
445 value = *sp--;
446 *(++sp) = addressSpace.getP(value);
447 if (log)
448 fprintf(stderr, "dereference 0x%" PRIx64 "\n", (uint64_t)value);
449 break;
450
451 case DW_OP_const1u:
452 // push immediate 1 byte value
453 value = addressSpace.get8(p);
454 p += 1;
455 *(++sp) = value;
456 if (log)
457 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
458 break;
459
460 case DW_OP_const1s:
461 // push immediate 1 byte signed value
462 svalue = (int8_t) addressSpace.get8(p);
463 p += 1;
464 *(++sp) = (pint_t)svalue;
465 if (log)
466 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
467 break;
468
469 case DW_OP_const2u:
470 // push immediate 2 byte value
471 value = addressSpace.get16(p);
472 p += 2;
473 *(++sp) = value;
474 if (log)
475 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
476 break;
477
478 case DW_OP_const2s:
479 // push immediate 2 byte signed value
480 svalue = (int16_t) addressSpace.get16(p);
481 p += 2;
482 *(++sp) = (pint_t)svalue;
483 if (log)
484 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
485 break;
486
487 case DW_OP_const4u:
488 // push immediate 4 byte value
489 value = addressSpace.get32(p);
490 p += 4;
491 *(++sp) = value;
492 if (log)
493 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
494 break;
495
496 case DW_OP_const4s:
497 // push immediate 4 byte signed value
498 svalue = (int32_t)addressSpace.get32(p);
499 p += 4;
500 *(++sp) = (pint_t)svalue;
501 if (log)
502 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
503 break;
504
505 case DW_OP_const8u:
506 // push immediate 8 byte value
507 value = (pint_t)addressSpace.get64(p);
508 p += 8;
509 *(++sp) = value;
510 if (log)
511 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
512 break;
513
514 case DW_OP_const8s:
515 // push immediate 8 byte signed value
516 value = (pint_t)addressSpace.get64(p);
517 p += 8;
518 *(++sp) = value;
519 if (log)
520 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
521 break;
522
523 case DW_OP_constu:
524 // push immediate ULEB128 value
525 value = (pint_t)addressSpace.getULEB128(p, expressionEnd);
526 *(++sp) = value;
527 if (log)
528 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
529 break;
530
531 case DW_OP_consts:
532 // push immediate SLEB128 value
533 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
534 *(++sp) = (pint_t)svalue;
535 if (log)
536 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
537 break;
538
539 case DW_OP_dup:
540 // push top of stack
541 value = *sp;
542 *(++sp) = value;
543 if (log)
544 fprintf(stderr, "duplicate top of stack\n");
545 break;
546
547 case DW_OP_drop:
548 // pop
549 --sp;
550 if (log)
551 fprintf(stderr, "pop top of stack\n");
552 break;
553
554 case DW_OP_over:
555 // dup second
556 value = sp[-1];
557 *(++sp) = value;
558 if (log)
559 fprintf(stderr, "duplicate second in stack\n");
560 break;
561
562 case DW_OP_pick:
563 // pick from
564 reg = addressSpace.get8(p);
565 p += 1;
566 value = sp[-(int)reg];
567 *(++sp) = value;
568 if (log)
569 fprintf(stderr, "duplicate %d in stack\n", reg);
570 break;
571
572 case DW_OP_swap:
573 // swap top two
574 value = sp[0];
575 sp[0] = sp[-1];
576 sp[-1] = value;
577 if (log)
578 fprintf(stderr, "swap top of stack\n");
579 break;
580
581 case DW_OP_rot:
582 // rotate top three
583 value = sp[0];
584 sp[0] = sp[-1];
585 sp[-1] = sp[-2];
586 sp[-2] = value;
587 if (log)
588 fprintf(stderr, "rotate top three of stack\n");
589 break;
590
591 case DW_OP_xderef:
592 // pop stack, dereference, push result
593 value = *sp--;
594 *sp = *((pint_t*)value);
595 if (log)
596 fprintf(stderr, "x-dereference 0x%" PRIx64 "\n", (uint64_t)value);
597 break;
598
599 case DW_OP_abs:
600 svalue = (sint_t)*sp;
601 if (svalue < 0)
602 *sp = (pint_t)(-svalue);
603 if (log)
604 fprintf(stderr, "abs\n");
605 break;
606
607 case DW_OP_and:
608 value = *sp--;
609 *sp &= value;
610 if (log)
611 fprintf(stderr, "and\n");
612 break;
613
614 case DW_OP_div:
615 svalue = (sint_t)(*sp--);
616 svalue2 = (sint_t)*sp;
617 *sp = (pint_t)(svalue2 / svalue);
618 if (log)
619 fprintf(stderr, "div\n");
620 break;
621
622 case DW_OP_minus:
623 value = *sp--;
624 *sp = *sp - value;
625 if (log)
626 fprintf(stderr, "minus\n");
627 break;
628
629 case DW_OP_mod:
630 svalue = (sint_t)(*sp--);
631 svalue2 = (sint_t)*sp;
632 *sp = (pint_t)(svalue2 % svalue);
633 if (log)
634 fprintf(stderr, "module\n");
635 break;
636
637 case DW_OP_mul:
638 svalue = (sint_t)(*sp--);
639 svalue2 = (sint_t)*sp;
640 *sp = (pint_t)(svalue2 * svalue);
641 if (log)
642 fprintf(stderr, "mul\n");
643 break;
644
645 case DW_OP_neg:
646 *sp = 0 - *sp;
647 if (log)
648 fprintf(stderr, "neg\n");
649 break;
650
651 case DW_OP_not:
652 svalue = (sint_t)(*sp);
653 *sp = (pint_t)(~svalue);
654 if (log)
655 fprintf(stderr, "not\n");
656 break;
657
658 case DW_OP_or:
659 value = *sp--;
660 *sp |= value;
661 if (log)
662 fprintf(stderr, "or\n");
663 break;
664
665 case DW_OP_plus:
666 value = *sp--;
667 *sp += value;
668 if (log)
669 fprintf(stderr, "plus\n");
670 break;
671
672 case DW_OP_plus_uconst:
673 // pop stack, add uelb128 constant, push result
674 *sp += static_cast<pint_t>(addressSpace.getULEB128(p, expressionEnd));
675 if (log)
676 fprintf(stderr, "add constant\n");
677 break;
678
679 case DW_OP_shl:
680 value = *sp--;
681 *sp = *sp << value;
682 if (log)
683 fprintf(stderr, "shift left\n");
684 break;
685
686 case DW_OP_shr:
687 value = *sp--;
688 *sp = *sp >> value;
689 if (log)
690 fprintf(stderr, "shift left\n");
691 break;
692
693 case DW_OP_shra:
694 value = *sp--;
695 svalue = (sint_t)*sp;
696 *sp = (pint_t)(svalue >> value);
697 if (log)
698 fprintf(stderr, "shift left arithmetic\n");
699 break;
700
701 case DW_OP_xor:
702 value = *sp--;
703 *sp ^= value;
704 if (log)
705 fprintf(stderr, "xor\n");
706 break;
707
708 case DW_OP_skip:
709 svalue = (int16_t) addressSpace.get16(p);
710 p += 2;
711 p = (pint_t)((sint_t)p + svalue);
712 if (log)
713 fprintf(stderr, "skip %" PRIu64 "\n", (uint64_t)svalue);
714 break;
715
716 case DW_OP_bra:
717 svalue = (int16_t) addressSpace.get16(p);
718 p += 2;
719 if (*sp--)
720 p = (pint_t)((sint_t)p + svalue);
721 if (log)
722 fprintf(stderr, "bra %" PRIu64 "\n", (uint64_t)svalue);
723 break;
724
725 case DW_OP_eq:
726 value = *sp--;
727 *sp = (*sp == value);
728 if (log)
729 fprintf(stderr, "eq\n");
730 break;
731
732 case DW_OP_ge:
733 value = *sp--;
734 *sp = (*sp >= value);
735 if (log)
736 fprintf(stderr, "ge\n");
737 break;
738
739 case DW_OP_gt:
740 value = *sp--;
741 *sp = (*sp > value);
742 if (log)
743 fprintf(stderr, "gt\n");
744 break;
745
746 case DW_OP_le:
747 value = *sp--;
748 *sp = (*sp <= value);
749 if (log)
750 fprintf(stderr, "le\n");
751 break;
752
753 case DW_OP_lt:
754 value = *sp--;
755 *sp = (*sp < value);
756 if (log)
757 fprintf(stderr, "lt\n");
758 break;
759
760 case DW_OP_ne:
761 value = *sp--;
762 *sp = (*sp != value);
763 if (log)
764 fprintf(stderr, "ne\n");
765 break;
766
767 case DW_OP_lit0:
768 case DW_OP_lit1:
769 case DW_OP_lit2:
770 case DW_OP_lit3:
771 case DW_OP_lit4:
772 case DW_OP_lit5:
773 case DW_OP_lit6:
774 case DW_OP_lit7:
775 case DW_OP_lit8:
776 case DW_OP_lit9:
777 case DW_OP_lit10:
778 case DW_OP_lit11:
779 case DW_OP_lit12:
780 case DW_OP_lit13:
781 case DW_OP_lit14:
782 case DW_OP_lit15:
783 case DW_OP_lit16:
784 case DW_OP_lit17:
785 case DW_OP_lit18:
786 case DW_OP_lit19:
787 case DW_OP_lit20:
788 case DW_OP_lit21:
789 case DW_OP_lit22:
790 case DW_OP_lit23:
791 case DW_OP_lit24:
792 case DW_OP_lit25:
793 case DW_OP_lit26:
794 case DW_OP_lit27:
795 case DW_OP_lit28:
796 case DW_OP_lit29:
797 case DW_OP_lit30:
798 case DW_OP_lit31:
799 value = static_cast<pint_t>(opcode - DW_OP_lit0);
800 *(++sp) = value;
801 if (log)
802 fprintf(stderr, "push literal 0x%" PRIx64 "\n", (uint64_t)value);
803 break;
804
805 case DW_OP_reg0:
806 case DW_OP_reg1:
807 case DW_OP_reg2:
808 case DW_OP_reg3:
809 case DW_OP_reg4:
810 case DW_OP_reg5:
811 case DW_OP_reg6:
812 case DW_OP_reg7:
813 case DW_OP_reg8:
814 case DW_OP_reg9:
815 case DW_OP_reg10:
816 case DW_OP_reg11:
817 case DW_OP_reg12:
818 case DW_OP_reg13:
819 case DW_OP_reg14:
820 case DW_OP_reg15:
821 case DW_OP_reg16:
822 case DW_OP_reg17:
823 case DW_OP_reg18:
824 case DW_OP_reg19:
825 case DW_OP_reg20:
826 case DW_OP_reg21:
827 case DW_OP_reg22:
828 case DW_OP_reg23:
829 case DW_OP_reg24:
830 case DW_OP_reg25:
831 case DW_OP_reg26:
832 case DW_OP_reg27:
833 case DW_OP_reg28:
834 case DW_OP_reg29:
835 case DW_OP_reg30:
836 case DW_OP_reg31:
837 reg = static_cast<uint32_t>(opcode - DW_OP_reg0);
838 *(++sp) = registers.getRegister((int)reg);
839 if (log)
840 fprintf(stderr, "push reg %d\n", reg);
841 break;
842
843 case DW_OP_regx:
844 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
845 *(++sp) = registers.getRegister((int)reg);
846 if (log)
847 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
848 break;
849
850 case DW_OP_breg0:
851 case DW_OP_breg1:
852 case DW_OP_breg2:
853 case DW_OP_breg3:
854 case DW_OP_breg4:
855 case DW_OP_breg5:
856 case DW_OP_breg6:
857 case DW_OP_breg7:
858 case DW_OP_breg8:
859 case DW_OP_breg9:
860 case DW_OP_breg10:
861 case DW_OP_breg11:
862 case DW_OP_breg12:
863 case DW_OP_breg13:
864 case DW_OP_breg14:
865 case DW_OP_breg15:
866 case DW_OP_breg16:
867 case DW_OP_breg17:
868 case DW_OP_breg18:
869 case DW_OP_breg19:
870 case DW_OP_breg20:
871 case DW_OP_breg21:
872 case DW_OP_breg22:
873 case DW_OP_breg23:
874 case DW_OP_breg24:
875 case DW_OP_breg25:
876 case DW_OP_breg26:
877 case DW_OP_breg27:
878 case DW_OP_breg28:
879 case DW_OP_breg29:
880 case DW_OP_breg30:
881 case DW_OP_breg31:
882 reg = static_cast<uint32_t>(opcode - DW_OP_breg0);
883 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
884 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
885 *(++sp) = (pint_t)(svalue);
886 if (log)
887 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
888 break;
889
890 case DW_OP_bregx:
891 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
892 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
893 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
894 *(++sp) = (pint_t)(svalue);
895 if (log)
896 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
897 break;
898
899 case DW_OP_fbreg:
900 _LIBUNWIND_ABORT("DW_OP_fbreg not implemented");
901 break;
902
903 case DW_OP_piece:
904 _LIBUNWIND_ABORT("DW_OP_piece not implemented");
905 break;
906
907 case DW_OP_deref_size:
908 // pop stack, dereference, push result
909 value = *sp--;
910 switch (addressSpace.get8(p++)) {
911 case 1:
912 value = addressSpace.get8(value);
913 break;
914 case 2:
915 value = addressSpace.get16(value);
916 break;
917 case 4:
918 value = addressSpace.get32(value);
919 break;
920 case 8:
921 value = (pint_t)addressSpace.get64(value);
922 break;
923 default:
924 _LIBUNWIND_ABORT("DW_OP_deref_size with bad size");
925 }
926 *(++sp) = value;
927 if (log)
928 fprintf(stderr, "sized dereference 0x%" PRIx64 "\n", (uint64_t)value);
929 break;
930
931 case DW_OP_xderef_size:
932 case DW_OP_nop:
933 case DW_OP_push_object_addres:
934 case DW_OP_call2:
935 case DW_OP_call4:
936 case DW_OP_call_ref:
937 default:
938 _LIBUNWIND_ABORT("DWARF opcode not implemented");
939 }
940
941 }
942 if (log)
943 fprintf(stderr, "expression evaluates to 0x%" PRIx64 "\n", (uint64_t)*sp);
944 return *sp;
945 }
946
947
948
949 } // namespace libunwind
950
951 #endif // __DWARF_INSTRUCTIONS_HPP__
952