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Searched defs:DstReg (Results 1 – 25 of 127) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp61 Register DstReg) { in buildMI()
154 Register DstReg = MI.getOperand(0).getReg(); in expandArith() local
187 Register DstReg = MI.getOperand(0).getReg(); in expandLogic() local
247 Register DstReg = MI.getOperand(0).getReg(); in expandLogicImm() local
307 Register DstReg = MI.getOperand(0).getReg(); in expand() local
361 Register DstReg = MI.getOperand(0).getReg(); in expand() local
426 Register DstReg = MI.getOperand(0).getReg(); in expand() local
458 Register DstReg = MI.getOperand(0).getReg(); in expand() local
497 Register DstReg = MI.getOperand(0).getReg(); in expand() local
530 Register DstReg = MI.getOperand(0).getReg(); in expand() local
[all …]
H A DAVRRegisterInfo.cpp113 Register DstReg) { in foldFrameOffset()
169 Register DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp135 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
155 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
172 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
183 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
205 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ExpandPseudoInsts.cpp129 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
160 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
173 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
192 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
217 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
497 Register DstReg = MI.getOperand(0).getReg(); in expand_DestructiveOp() local
1171 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1297 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1332 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1374 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
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H A DAArch64RedundantCopyElimination.cpp185 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
251 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp278 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADDOp() local
290 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADDOp() local
329 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADDOp() local
368 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADD_UWOp() local
564 Register DstReg = MI.getOperand(0).getReg(); in select() local
576 Register DstReg = MI.getOperand(0).getReg(); in select() local
774 Register DstReg = MI.getOperand(0).getReg(); in preISelLower() local
783 Register DstReg = MI.getOperand(0).getReg(); in preISelLower() local
891 Register DstReg = MI.getOperand(0).getReg(); in selectCopy() local
918 const Register DstReg = MI.getOperand(0).getReg(); in selectImplicitDef() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp279 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
775 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
796 const Register DstReg = I.getOperand(0).getReg(); in selectTruncOrPtrToInt() local
860 const Register DstReg = I.getOperand(0).getReg(); in selectZext() local
925 const Register DstReg = I.getOperand(0).getReg(); in selectAnyext() local
1126 const Register DstReg = I.getOperand(0).getReg(); in selectUAddSub() local
1229 const Register DstReg = I.getOperand(0).getReg(); in selectExtract() local
1280 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg, in emitExtractSubreg()
1318 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg, in emitInsertSubreg()
1361 const Register DstReg = I.getOperand(0).getReg(); in selectInsert() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp133 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
191 const Register DstReg = I.getOperand(0).getReg(); in selectIntToFP() local
218 const Register DstReg = I.getOperand(0).getReg(); in selectFPToInt() local
243 const Register DstReg = I.getOperand(0).getReg(); in selectZExt() local
604 Register DstReg = I.getOperand(0).getReg(); in selectI64Imm() local
662 const Register DstReg = I.getOperand(0).getReg(); in selectConstantPool() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DOptimizePHIs.cpp100 Register DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local
144 Register DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local
H A DTwoAddressInstructionPass.cpp363 Register &DstReg, bool &IsSrcPhys, in isCopyToReg()
460 Register SrcReg, DstReg; in isKilled() local
471 static bool isTwoAddrUse(MachineInstr &MI, Register Reg, Register &DstReg) { in isTwoAddrUse()
488 Register Reg, MachineBasicBlock *MBB, bool &IsCopy, Register &DstReg, in findOnlyInterestingUse()
828 void TwoAddressInstructionImpl::scanUses(Register DstReg) { in scanUses()
886 Register SrcReg, DstReg; in processCopy() local
946 Register DstReg; in rescheduleMIBelowKill() local
1129 Register DstReg; in rescheduleKillAboveMI() local
1527 Register DstReg = DstMO.getReg(); in collectTiedOperands() local
1889 Register DstReg = mi->getOperand(DstIdx).getReg(); in run() local
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H A DExpandPostRAPseudos.cpp66 Register DstReg = MI->getOperand(0).getReg(); in LowerSubregToReg() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVPostRAExpandPseudoInsts.cpp92 Register DstReg = MBBI->getOperand(0).getReg(); in expandMovImm() local
107 Register DstReg = MBBI->getOperand(0).getReg(); in expandMovAddr() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp192 Register DstReg = Copy.getOperand(0).getReg(); in getCopyRegClasses() local
228 Register DstReg = MI.getOperand(0).getReg(); in tryChangeVGPRtoSGPRinCopy() local
270 Register DstReg = MI.getOperand(0).getReg(); in foldVGPRCopyIntoRegSequence() local
842 MachineOperand &MaybeVGPRConstMO, Register DstReg, in tryMoveVGPRConstToSGPR()
869 Register DstReg = MI.getOperand(0).getReg(); in lowerSpecialCase() local
912 Register DstReg = MI->getOperand(0).getReg(); in analyzeVGPRToSGPRCopy() local
1060 Register DstReg = MI->getOperand(0).getReg(); in lowerVGPR2SGPRCopies() local
1105 Register DstReg = MI.getOperand(0).getReg(); in fixSCCCopies() local
H A DR600ExpandSpecialInstrs.cpp126 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
196 Register DstReg = in runOnMachineFunction() local
H A DAMDGPURegisterBankInfo.cpp129 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
157 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
1059 Register DstReg = MI.getOperand(0).getReg(); in applyMappingLoad() local
1456 Register DstReg = MI.getOperand(0).getReg(); in applyMappingBFE() local
1841 bool AMDGPURegisterBankInfo::buildVCopy(MachineIRBuilder &B, Register DstReg, in buildVCopy()
1992 Register DstReg = (NumLanes == 1) ? MI.getOperand(0).getReg() : DstRegs[L]; in foldExtractEltToCmpSelect() local
2128 Register DstReg = MI.getOperand(0).getReg(); in applyMappingSMULU64() local
2185 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
2215 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
2273 Register DstReg = MI.getOperand(BoolDstOp).getReg(); in applyMappingImpl() local
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H A DSILowerI1Copies.cpp477 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesFromI1() local
562 Register DstReg = MI->getOperand(0).getReg(); in lowerPhis() local
669 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesToI1() local
856 Register DstReg, Register PrevReg, in buildMergeLaneMasks()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp192 Register &DstReg, const GlobalValue *GVal, bool IsAma) { in processCandidate()
226 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
330 Register DstReg = MI.getOperand(0).getReg(); in removeLD() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h67 Register DstReg = MI.getOperand(0).getReg(); in tryCombineAnyExt() local
126 Register DstReg = MI.getOperand(0).getReg(); in tryCombineZExt() local
201 Register DstReg = MI.getOperand(0).getReg(); in tryCombineSExt() local
266 Register DstReg = MI.getOperand(0).getReg(); in tryCombineTrunc() local
387 Register DstReg = MI.getOperand(0).getReg(); in tryFoldImplicitDef() local
565 static void replaceRegOrBuildCopy(Register DstReg, Register SrcReg, in replaceRegOrBuildCopy()
1242 Register DstReg = MI.getOperand(Idx).getReg(); in tryCombineUnmergeValues() local
1275 Register DstReg = MI.getOperand(0).getReg(); in tryCombineExtract() local
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.cpp41 const DebugLoc &DL, MCRegister DstReg, in copyPhysReg()
148 Register DstReg, int FI, in loadRegFromStackSlot()
185 const DebugLoc &DL, Register DstReg, in movImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCDuplexInfo.cpp190 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
536 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp716 Register DstReg = I->getOperand(0).getReg(); in expandPseudoMTLoHi() local
733 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
755 Register DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local
797 Register DstReg = I->getOperand(0).getReg(); in expandBuildPairF64() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PreLegalizerCombiner.cpp52 Register DstReg = MI.getOperand(0).getReg(); in matchFConstantToConstant() local
243 Register DstReg = MI.getOperand(0).getReg(); in matchExtAddvToUdotAddv() local
455 Register DstReg = MI.getOperand(0).getReg(); in applyExtUaddvToUaddlv() local
562 Register DstReg, Register SrcReg1, Register SrcReg2) { in matchPushAddSubExt()
587 MachineIRBuilder &B, bool isSExt, Register DstReg, in applyPushAddSubExt()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCopyPhysRegs.cpp79 Register DstReg = MI->getOperand(0).getReg(); in visitMBB() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaFrameLowering.cpp83 Register DstReg = MBBI->getOperand(0).getReg(); in emitPrologue() local
169 Register DstReg = I->getOperand(1).getReg(); in emitEpilogue() local

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