Searched defs:DstR (Results 1 – 8 of 8) sorted by relevance
46 RegisterRef DstR = DFG.makeRegRef(Dst.getReg(), Dst.getSubReg()); in interpretAsCopy() local
203 unsigned DstR = MI->getOperand(0).getReg(); in rewriteIfImm() local
118 auto mapRegs = [&EM] (RegisterRef DstR, RegisterRef SrcR) -> void { in INITIALIZE_PASS_DEPENDENCY()
1723 Register DstR = MI->getOperand(0).getReg(); in expandCopy() local1781 Register DstR = MI->getOperand(0).getReg(); in expandLoadInt() local1848 Register DstR = MI->getOperand(0).getReg(); in expandLoadVecPred() local1946 Register DstR = MI->getOperand(0).getReg(); in expandLoadVec2() local2016 Register DstR = MI->getOperand(0).getReg(); in expandLoadVec() local2459 Register DstR = MI.getOperand(0).getReg(); in optimizeSpillSlots() local
1000 Register DstR = MI->getOperand(0).getReg(); in splitInstr() local
646 unsigned DstR, unsigned DstSR, const MachineOperand &PredOp, in genCondTfrFor()
674 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR, in isValidInsertForm()
703 const Register DstR = Dst.getReg(); processInstructionForSlowLEA() local