| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrFoldTables.h | 25 unsigned DstOp; member
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| H A D | X86MCInstLower.cpp | 1467 const MachineOperand &DstOp = MI->getOperand(0); in printDstRegisterName() local
1901 const MachineOperand &DstOp = MI->getOperand(0); in addConstantComments() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRDFOpt.cpp | 126 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
143 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | 250 auto DstOp = I->getOperand(0); in copyPhysReg() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 79 DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
80 DstOp(Register R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
81 DstOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(DstType::Ty_Reg) {} in DstOp() function
82 DstOp(const LLT T) : LLTTy(T), Ty(DstType::Ty_LLT) {} in DstOp() function
83 DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {} in DstOp() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 88 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 60 auto *DstOp = in EmitMOPS() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 260 const MachineOperand &DstOp = MI.getOperand(0); in isCopyOf() local
290 const MachineOperand &DstOp = *CopyInst->Destination; in isCopyOfBundle() local
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| H A D | MachineVerifier.cpp | 1908 const MachineOperand &DstOp = MI->getOperand(0); in verifyPreISelGenericInstruction() local
2227 const MachineOperand &DstOp = MI->getOperand(0); in visitMachineInstrBefore() local
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| H A D | MachineScheduler.cpp | 2091 const MachineOperand &DstOp = Copy->getOperand(0); in constrainLocalCopy() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 1511 Record *DstOp = Dst.getOperator(); in createInstructionRenderer() local
2014 Record *DstOp = Dst.getOperator(); in runOnPattern() local
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| /freebsd/contrib/llvm-project/llvm/lib/Linker/ |
| H A D | IRMover.cpp | 1297 MDNode *DstOp; in linkModuleFlagsMetadata() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 672 unsigned MachineIRBuilder::getOpcodeForMerge(const DstOp &DstOp, in getOpcodeForMerge()
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| H A D | CombinerHelper.cpp | 229 Register DstOp = MI.getOperand(0).getReg(); in matchFreezeOfSingleMaybePoisonOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 928 ResolvedDbgOp DstOp(Dst); in transferMlocs() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 8499 const MCOperand &DstOp = Inst.getOperand(DstIdx); in cvtVOP3DstOpSelOnly() local
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