xref: /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h (revision 700637cbb5e582861067a11aaca4d053546871d2)
1 //===- llvm/CodeGen/GlobalISel/CallLowering.h - Call lowering ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
15 #define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
16 
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/CallingConvLower.h"
20 #include "llvm/CodeGen/MachineOperand.h"
21 #include "llvm/CodeGen/TargetCallingConv.h"
22 #include "llvm/CodeGenTypes/LowLevelType.h"
23 #include "llvm/CodeGenTypes/MachineValueType.h"
24 #include "llvm/IR/CallingConv.h"
25 #include "llvm/IR/Type.h"
26 #include "llvm/IR/Value.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include <cstdint>
30 #include <functional>
31 
32 namespace llvm {
33 
34 class AttributeList;
35 class CallBase;
36 class DataLayout;
37 class Function;
38 class FunctionLoweringInfo;
39 class MachineIRBuilder;
40 class MachineFunction;
41 struct MachinePointerInfo;
42 class MachineRegisterInfo;
43 class TargetLowering;
44 
45 class LLVM_ABI CallLowering {
46   const TargetLowering *TLI;
47 
48   virtual void anchor();
49 public:
50   struct BaseArgInfo {
51     Type *Ty;
52     SmallVector<ISD::ArgFlagsTy, 4> Flags;
53     bool IsFixed;
54 
55     BaseArgInfo(Type *Ty,
56                 ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
57                 bool IsFixed = true)
TyBaseArgInfo58         : Ty(Ty), Flags(Flags), IsFixed(IsFixed) {}
59 
BaseArgInfoBaseArgInfo60     BaseArgInfo() : Ty(nullptr), IsFixed(false) {}
61   };
62 
63   struct ArgInfo : public BaseArgInfo {
64     SmallVector<Register, 4> Regs;
65     // If the argument had to be split into multiple parts according to the
66     // target calling convention, then this contains the original vregs
67     // if the argument was an incoming arg.
68     SmallVector<Register, 2> OrigRegs;
69 
70     /// Optionally track the original IR value for the argument. This may not be
71     /// meaningful in all contexts. This should only be used on for forwarding
72     /// through to use for aliasing information in MachinePointerInfo for memory
73     /// arguments.
74     const Value *OrigValue = nullptr;
75 
76     /// Index original Function's argument.
77     unsigned OrigArgIndex;
78 
79     /// Sentinel value for implicit machine-level input arguments.
80     static const unsigned NoArgIndex = UINT_MAX;
81 
82     ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex,
83             ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
84             bool IsFixed = true, const Value *OrigValue = nullptr)
BaseArgInfoArgInfo85         : BaseArgInfo(Ty, Flags, IsFixed), Regs(Regs), OrigValue(OrigValue),
86           OrigArgIndex(OrigIndex) {
87       if (!Regs.empty() && Flags.empty())
88         this->Flags.push_back(ISD::ArgFlagsTy());
89       // FIXME: We should have just one way of saying "no register".
90       assert(((Ty->isVoidTy() || Ty->isEmptyTy()) ==
91               (Regs.empty() || Regs[0] == 0)) &&
92              "only void types should have no register");
93     }
94 
95     ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex,
96             ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
97             bool IsFixed = true)
98       : ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {}
99 
100     ArgInfo() = default;
101   };
102 
103   struct PtrAuthInfo {
104     uint64_t Key;
105     Register Discriminator;
106   };
107 
108   struct CallLoweringInfo {
109     /// Calling convention to be used for the call.
110     CallingConv::ID CallConv = CallingConv::C;
111 
112     /// Destination of the call. It should be either a register, globaladdress,
113     /// or externalsymbol.
114     MachineOperand Callee = MachineOperand::CreateImm(0);
115 
116     /// Descriptor for the return type of the function.
117     ArgInfo OrigRet;
118 
119     /// List of descriptors of the arguments passed to the function.
120     SmallVector<ArgInfo, 32> OrigArgs;
121 
122     /// Valid if the call has a swifterror inout parameter, and contains the
123     /// vreg that the swifterror should be copied into after the call.
124     Register SwiftErrorVReg;
125 
126     /// Valid if the call is a controlled convergent operation.
127     Register ConvergenceCtrlToken;
128 
129     /// Original IR callsite corresponding to this call, if available.
130     const CallBase *CB = nullptr;
131 
132     MDNode *KnownCallees = nullptr;
133 
134     /// The auth-call information in the "ptrauth" bundle, if present.
135     std::optional<PtrAuthInfo> PAI;
136 
137     /// True if the call must be tail call optimized.
138     bool IsMustTailCall = false;
139 
140     /// True if the call passes all target-independent checks for tail call
141     /// optimization.
142     bool IsTailCall = false;
143 
144     /// True if the call was lowered as a tail call. This is consumed by the
145     /// legalizer. This allows the legalizer to lower libcalls as tail calls.
146     bool LoweredTailCall = false;
147 
148     /// True if the call is to a vararg function.
149     bool IsVarArg = false;
150 
151     /// True if the function's return value can be lowered to registers.
152     bool CanLowerReturn = true;
153 
154     /// VReg to hold the hidden sret parameter.
155     Register DemoteRegister;
156 
157     /// The stack index for sret demotion.
158     int DemoteStackIndex;
159 
160     /// Expected type identifier for indirect calls with a CFI check.
161     const ConstantInt *CFIType = nullptr;
162 
163     /// True if this call results in convergent operations.
164     bool IsConvergent = true;
165   };
166 
167   /// Argument handling is mostly uniform between the four places that
168   /// make these decisions: function formal arguments, call
169   /// instruction args, call instruction returns and function
170   /// returns. However, once a decision has been made on where an
171   /// argument should go, exactly what happens can vary slightly. This
172   /// class abstracts the differences.
173   ///
174   /// ValueAssigner should not depend on any specific function state, and
175   /// only determine the types and locations for arguments.
176   struct LLVM_ABI ValueAssigner {
177     ValueAssigner(bool IsIncoming, CCAssignFn *AssignFn_,
178                   CCAssignFn *AssignFnVarArg_ = nullptr)
AssignFnValueAssigner179         : AssignFn(AssignFn_), AssignFnVarArg(AssignFnVarArg_),
180           IsIncomingArgumentHandler(IsIncoming) {
181 
182       // Some targets change the handler depending on whether the call is
183       // varargs or not. If
184       if (!AssignFnVarArg)
185         AssignFnVarArg = AssignFn;
186     }
187 
188     virtual ~ValueAssigner() = default;
189 
190     /// Returns true if the handler is dealing with incoming arguments,
191     /// i.e. those that move values from some physical location to vregs.
isIncomingArgumentHandlerValueAssigner192     bool isIncomingArgumentHandler() const {
193       return IsIncomingArgumentHandler;
194     }
195 
196     /// Wrap call to (typically tablegenerated CCAssignFn). This may be
197     /// overridden to track additional state information as arguments are
198     /// assigned or apply target specific hacks around the legacy
199     /// infrastructure.
assignArgValueAssigner200     virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
201                            CCValAssign::LocInfo LocInfo, const ArgInfo &Info,
202                            ISD::ArgFlagsTy Flags, CCState &State) {
203       if (getAssignFn(State.isVarArg())(ValNo, ValVT, LocVT, LocInfo, Flags,
204                                         State))
205         return true;
206       StackSize = State.getStackSize();
207       return false;
208     }
209 
210     /// Assignment function to use for a general call.
211     CCAssignFn *AssignFn;
212 
213     /// Assignment function to use for a variadic call. This is usually the same
214     /// as AssignFn on most targets.
215     CCAssignFn *AssignFnVarArg;
216 
217     /// The size of the currently allocated portion of the stack.
218     uint64_t StackSize = 0;
219 
220     /// Select the appropriate assignment function depending on whether this is
221     /// a variadic call.
getAssignFnValueAssigner222     CCAssignFn *getAssignFn(bool IsVarArg) const {
223       return IsVarArg ? AssignFnVarArg : AssignFn;
224     }
225 
226   private:
227     const bool IsIncomingArgumentHandler;
228     virtual void anchor();
229   };
230 
231   struct IncomingValueAssigner : public ValueAssigner {
232     IncomingValueAssigner(CCAssignFn *AssignFn_,
233                           CCAssignFn *AssignFnVarArg_ = nullptr)
ValueAssignerIncomingValueAssigner234         : ValueAssigner(true, AssignFn_, AssignFnVarArg_) {}
235   };
236 
237   struct OutgoingValueAssigner : public ValueAssigner {
238     OutgoingValueAssigner(CCAssignFn *AssignFn_,
239                           CCAssignFn *AssignFnVarArg_ = nullptr)
ValueAssignerOutgoingValueAssigner240         : ValueAssigner(false, AssignFn_, AssignFnVarArg_) {}
241   };
242 
243   struct LLVM_ABI ValueHandler {
244     MachineIRBuilder &MIRBuilder;
245     MachineRegisterInfo &MRI;
246     const bool IsIncomingArgumentHandler;
247 
ValueHandlerValueHandler248     ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder,
249                  MachineRegisterInfo &MRI)
250         : MIRBuilder(MIRBuilder), MRI(MRI),
251           IsIncomingArgumentHandler(IsIncoming) {}
252 
253     virtual ~ValueHandler() = default;
254 
255     /// Returns true if the handler is dealing with incoming arguments,
256     /// i.e. those that move values from some physical location to vregs.
isIncomingArgumentHandlerValueHandler257     bool isIncomingArgumentHandler() const {
258       return IsIncomingArgumentHandler;
259     }
260 
261     /// Materialize a VReg containing the address of the specified
262     /// stack-based object. This is either based on a FrameIndex or
263     /// direct SP manipulation, depending on the context. \p MPO
264     /// should be initialized to an appropriate description of the
265     /// address created.
266     virtual Register getStackAddress(uint64_t MemSize, int64_t Offset,
267                                      MachinePointerInfo &MPO,
268                                      ISD::ArgFlagsTy Flags) = 0;
269 
270     /// Return the in-memory size to write for the argument at \p VA. This may
271     /// be smaller than the allocated stack slot size.
272     ///
273     /// This is overridable primarily for targets to maintain compatibility with
274     /// hacks around the existing DAG call lowering infrastructure.
275     virtual LLT getStackValueStoreType(const DataLayout &DL,
276                                        const CCValAssign &VA,
277                                        ISD::ArgFlagsTy Flags) const;
278 
279     /// The specified value has been assigned to a physical register,
280     /// handle the appropriate COPY (either to or from) and mark any
281     /// relevant uses/defines as needed.
282     virtual void assignValueToReg(Register ValVReg, Register PhysReg,
283                                   const CCValAssign &VA) = 0;
284 
285     /// The specified value has been assigned to a stack
286     /// location. Load or store it there, with appropriate extension
287     /// if necessary.
288     virtual void assignValueToAddress(Register ValVReg, Register Addr,
289                                       LLT MemTy, const MachinePointerInfo &MPO,
290                                       const CCValAssign &VA) = 0;
291 
292     /// An overload which takes an ArgInfo if additional information about the
293     /// arg is needed. \p ValRegIndex is the index in \p Arg.Regs for the value
294     /// to store.
assignValueToAddressValueHandler295     virtual void assignValueToAddress(const ArgInfo &Arg, unsigned ValRegIndex,
296                                       Register Addr, LLT MemTy,
297                                       const MachinePointerInfo &MPO,
298                                       const CCValAssign &VA) {
299       assignValueToAddress(Arg.Regs[ValRegIndex], Addr, MemTy, MPO, VA);
300     }
301 
302     /// Handle custom values, which may be passed into one or more of \p VAs.
303     /// \p If the handler wants the assignments to be delayed until after
304     /// mem loc assignments, then it sets \p Thunk to the thunk to do the
305     /// assignment.
306     /// \return The number of \p VAs that have been assigned including the
307     ///         first one, and which should therefore be skipped from further
308     ///         processing.
309     virtual unsigned assignCustomValue(ArgInfo &Arg, ArrayRef<CCValAssign> VAs,
310                                        std::function<void()> *Thunk = nullptr) {
311       // This is not a pure virtual method because not all targets need to worry
312       // about custom values.
313       llvm_unreachable("Custom values not supported");
314     }
315 
316     /// Do a memory copy of \p MemSize bytes from \p SrcPtr to \p DstPtr. This
317     /// is necessary for outgoing stack-passed byval arguments.
318     void
319     copyArgumentMemory(const ArgInfo &Arg, Register DstPtr, Register SrcPtr,
320                        const MachinePointerInfo &DstPtrInfo, Align DstAlign,
321                        const MachinePointerInfo &SrcPtrInfo, Align SrcAlign,
322                        uint64_t MemSize, CCValAssign &VA) const;
323 
324     /// Extend a register to the location type given in VA, capped at extending
325     /// to at most MaxSize bits. If MaxSizeBits is 0 then no maximum is set.
326     Register extendRegister(Register ValReg, const CCValAssign &VA,
327                             unsigned MaxSizeBits = 0);
328   };
329 
330   /// Base class for ValueHandlers used for arguments coming into the current
331   /// function, or for return values received from a call.
332   struct LLVM_ABI IncomingValueHandler : public ValueHandler {
IncomingValueHandlerIncomingValueHandler333     IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
334         : ValueHandler(/*IsIncoming*/ true, MIRBuilder, MRI) {}
335 
336     /// Insert G_ASSERT_ZEXT/G_ASSERT_SEXT or other hint instruction based on \p
337     /// VA, returning the new register if a hint was inserted.
338     Register buildExtensionHint(const CCValAssign &VA, Register SrcReg,
339                                 LLT NarrowTy);
340 
341     /// Provides a default implementation for argument handling.
342     void assignValueToReg(Register ValVReg, Register PhysReg,
343                           const CCValAssign &VA) override;
344   };
345 
346   /// Base class for ValueHandlers used for arguments passed to a function call,
347   /// or for return values.
348   struct OutgoingValueHandler : public ValueHandler {
OutgoingValueHandlerOutgoingValueHandler349     OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
350         : ValueHandler(/*IsIncoming*/ false, MIRBuilder, MRI) {}
351   };
352 
353 protected:
354   /// Getter for generic TargetLowering class.
getTLI()355   const TargetLowering *getTLI() const {
356     return TLI;
357   }
358 
359   /// Getter for target specific TargetLowering class.
360   template <class XXXTargetLowering>
getTLI()361     const XXXTargetLowering *getTLI() const {
362     return static_cast<const XXXTargetLowering *>(TLI);
363   }
364 
365   /// \returns Flags corresponding to the attributes on the \p ArgIdx-th
366   /// parameter of \p Call.
367   ISD::ArgFlagsTy getAttributesForArgIdx(const CallBase &Call,
368                                          unsigned ArgIdx) const;
369 
370   /// \returns Flags corresponding to the attributes on the return from \p Call.
371   ISD::ArgFlagsTy getAttributesForReturn(const CallBase &Call) const;
372 
373   /// Adds flags to \p Flags based off of the attributes in \p Attrs.
374   /// \p OpIdx is the index in \p Attrs to add flags from.
375   void addArgFlagsFromAttributes(ISD::ArgFlagsTy &Flags,
376                                  const AttributeList &Attrs,
377                                  unsigned OpIdx) const;
378 
379   template <typename FuncInfoTy>
380   void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL,
381                    const FuncInfoTy &FuncInfo) const;
382 
383   /// Break \p OrigArgInfo into one or more pieces the calling convention can
384   /// process, returned in \p SplitArgs. For example, this should break structs
385   /// down into individual fields.
386   ///
387   /// If \p Offsets is non-null, it points to a vector to be filled in
388   /// with the in-memory offsets of each of the individual values.
389   void splitToValueTypes(const ArgInfo &OrigArgInfo,
390                          SmallVectorImpl<ArgInfo> &SplitArgs,
391                          const DataLayout &DL, CallingConv::ID CallConv,
392                          SmallVectorImpl<uint64_t> *Offsets = nullptr) const;
393 
394   /// Analyze the argument list in \p Args, using \p Assigner to populate \p
395   /// CCInfo. This will determine the types and locations to use for passed or
396   /// returned values. This may resize fields in \p Args if the value is split
397   /// across multiple registers or stack slots.
398   ///
399   /// This is independent of the function state and can be used
400   /// to determine how a call would pass arguments without needing to change the
401   /// function. This can be used to check if arguments are suitable for tail
402   /// call lowering.
403   ///
404   /// \return True if everything has succeeded, false otherwise.
405   bool determineAssignments(ValueAssigner &Assigner,
406                             SmallVectorImpl<ArgInfo> &Args,
407                             CCState &CCInfo) const;
408 
409   /// Invoke ValueAssigner::assignArg on each of the given \p Args and then use
410   /// \p Handler to move them to the assigned locations.
411   ///
412   /// \return True if everything has succeeded, false otherwise.
413   bool
414   determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner,
415                                 SmallVectorImpl<ArgInfo> &Args,
416                                 MachineIRBuilder &MIRBuilder,
417                                 CallingConv::ID CallConv, bool IsVarArg,
418                                 ArrayRef<Register> ThisReturnRegs = {}) const;
419 
420   /// Use \p Handler to insert code to handle the argument/return values
421   /// represented by \p Args. It's expected determineAssignments previously
422   /// processed these arguments to populate \p CCState and \p ArgLocs.
423   bool handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
424                          CCState &CCState,
425                          SmallVectorImpl<CCValAssign> &ArgLocs,
426                          MachineIRBuilder &MIRBuilder,
427                          ArrayRef<Register> ThisReturnRegs = {}) const;
428 
429   /// Check whether parameters to a call that are passed in callee saved
430   /// registers are the same as from the calling function.  This needs to be
431   /// checked for tail call eligibility.
432   bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
433                             const uint32_t *CallerPreservedMask,
434                             const SmallVectorImpl<CCValAssign> &ArgLocs,
435                             const SmallVectorImpl<ArgInfo> &OutVals) const;
436 
437   /// \returns True if the calling convention for a callee and its caller pass
438   /// results in the same way. Typically used for tail call eligibility checks.
439   ///
440   /// \p Info is the CallLoweringInfo for the call.
441   /// \p MF is the MachineFunction for the caller.
442   /// \p InArgs contains the results of the call.
443   /// \p CalleeAssigner specifies the target's handling of the argument types
444   /// for the callee.
445   /// \p CallerAssigner specifies the target's handling of the
446   /// argument types for the caller.
447   bool resultsCompatible(CallLoweringInfo &Info, MachineFunction &MF,
448                          SmallVectorImpl<ArgInfo> &InArgs,
449                          ValueAssigner &CalleeAssigner,
450                          ValueAssigner &CallerAssigner) const;
451 
452 public:
CallLowering(const TargetLowering * TLI)453   CallLowering(const TargetLowering *TLI) : TLI(TLI) {}
454   virtual ~CallLowering() = default;
455 
456   /// \return true if the target is capable of handling swifterror values that
457   /// have been promoted to a specified register. The extended versions of
458   /// lowerReturn and lowerCall should be implemented.
supportSwiftError()459   virtual bool supportSwiftError() const {
460     return false;
461   }
462 
463   /// Load the returned value from the stack into virtual registers in \p VRegs.
464   /// It uses the frame index \p FI and the start offset from \p DemoteReg.
465   /// The loaded data size will be determined from \p RetTy.
466   void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy,
467                        ArrayRef<Register> VRegs, Register DemoteReg,
468                        int FI) const;
469 
470   /// Store the return value given by \p VRegs into stack starting at the offset
471   /// specified in \p DemoteReg.
472   void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy,
473                         ArrayRef<Register> VRegs, Register DemoteReg) const;
474 
475   /// Insert the hidden sret ArgInfo to the beginning of \p SplitArgs.
476   /// This function should be called from the target specific
477   /// lowerFormalArguments when \p F requires the sret demotion.
478   void insertSRetIncomingArgument(const Function &F,
479                                   SmallVectorImpl<ArgInfo> &SplitArgs,
480                                   Register &DemoteReg, MachineRegisterInfo &MRI,
481                                   const DataLayout &DL) const;
482 
483   /// For the call-base described by \p CB, insert the hidden sret ArgInfo to
484   /// the OrigArgs field of \p Info.
485   void insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder,
486                                   const CallBase &CB,
487                                   CallLoweringInfo &Info) const;
488 
489   /// \return True if the return type described by \p Outs can be returned
490   /// without performing sret demotion.
491   bool checkReturn(CCState &CCInfo, SmallVectorImpl<BaseArgInfo> &Outs,
492                    CCAssignFn *Fn) const;
493 
494   /// Get the type and the ArgFlags for the split components of \p RetTy as
495   /// returned by \c ComputeValueVTs.
496   void getReturnInfo(CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs,
497                      SmallVectorImpl<BaseArgInfo> &Outs,
498                      const DataLayout &DL) const;
499 
500   /// Toplevel function to check the return type based on the target calling
501   /// convention. \return True if the return value of \p MF can be returned
502   /// without performing sret demotion.
503   bool checkReturnTypeForCallConv(MachineFunction &MF) const;
504 
505   /// This hook must be implemented to check whether the return values
506   /// described by \p Outs can fit into the return registers. If false
507   /// is returned, an sret-demotion is performed.
canLowerReturn(MachineFunction & MF,CallingConv::ID CallConv,SmallVectorImpl<BaseArgInfo> & Outs,bool IsVarArg)508   virtual bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,
509                               SmallVectorImpl<BaseArgInfo> &Outs,
510                               bool IsVarArg) const {
511     return true;
512   }
513 
514   /// This hook must be implemented to lower outgoing return values, described
515   /// by \p Val, into the specified virtual registers \p VRegs.
516   /// This hook is used by GlobalISel.
517   ///
518   /// \p FLI is required for sret demotion.
519   ///
520   /// \p SwiftErrorVReg is non-zero if the function has a swifterror parameter
521   /// that needs to be implicitly returned.
522   ///
523   /// \return True if the lowering succeeds, false otherwise.
lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI,Register SwiftErrorVReg)524   virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
525                            ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
526                            Register SwiftErrorVReg) const {
527     if (!supportSwiftError()) {
528       assert(SwiftErrorVReg == 0 && "attempt to use unsupported swifterror");
529       return lowerReturn(MIRBuilder, Val, VRegs, FLI);
530     }
531     return false;
532   }
533 
534   /// This hook behaves as the extended lowerReturn function, but for targets
535   /// that do not support swifterror value promotion.
lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI)536   virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
537                            ArrayRef<Register> VRegs,
538                            FunctionLoweringInfo &FLI) const {
539     return false;
540   }
541 
fallBackToDAGISel(const MachineFunction & MF)542   virtual bool fallBackToDAGISel(const MachineFunction &MF) const {
543     return false;
544   }
545 
546   /// This hook must be implemented to lower the incoming (formal)
547   /// arguments, described by \p VRegs, for GlobalISel. Each argument
548   /// must end up in the related virtual registers described by \p VRegs.
549   /// In other words, the first argument should end up in \c VRegs[0],
550   /// the second in \c VRegs[1], and so on. For each argument, there will be one
551   /// register for each non-aggregate type, as returned by \c computeValueLLTs.
552   /// \p MIRBuilder is set to the proper insertion for the argument
553   /// lowering. \p FLI is required for sret demotion.
554   ///
555   /// \return True if the lowering succeeded, false otherwise.
lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI)556   virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder,
557                                     const Function &F,
558                                     ArrayRef<ArrayRef<Register>> VRegs,
559                                     FunctionLoweringInfo &FLI) const {
560     return false;
561   }
562 
563   /// This hook must be implemented to lower the given call instruction,
564   /// including argument and return value marshalling.
565   ///
566   ///
567   /// \return true if the lowering succeeded, false otherwise.
lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info)568   virtual bool lowerCall(MachineIRBuilder &MIRBuilder,
569                          CallLoweringInfo &Info) const {
570     return false;
571   }
572 
573   /// Lower the given call instruction, including argument and return value
574   /// marshalling.
575   ///
576   /// \p CI is the call/invoke instruction.
577   ///
578   /// \p ResRegs are the registers where the call's return value should be
579   /// stored (or 0 if there is no return value). There will be one register for
580   /// each non-aggregate type, as returned by \c computeValueLLTs.
581   ///
582   /// \p ArgRegs is a list of lists of virtual registers containing each
583   /// argument that needs to be passed (argument \c i should be placed in \c
584   /// ArgRegs[i]). For each argument, there will be one register for each
585   /// non-aggregate type, as returned by \c computeValueLLTs.
586   ///
587   /// \p SwiftErrorVReg is non-zero if the call has a swifterror inout
588   /// parameter, and contains the vreg that the swifterror should be copied into
589   /// after the call.
590   ///
591   /// \p GetCalleeReg is a callback to materialize a register for the callee if
592   /// the target determines it cannot jump to the destination based purely on \p
593   /// CI. This might be because \p CI is indirect, or because of the limited
594   /// range of an immediate jump.
595   ///
596   /// \return true if the lowering succeeded, false otherwise.
597   bool lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &Call,
598                  ArrayRef<Register> ResRegs,
599                  ArrayRef<ArrayRef<Register>> ArgRegs, Register SwiftErrorVReg,
600                  std::optional<PtrAuthInfo> PAI, Register ConvergenceCtrlToken,
601                  std::function<Register()> GetCalleeReg) const;
602 
603   /// For targets which want to use big-endian can enable it with
604   /// enableBigEndian() hook
enableBigEndian()605   virtual bool enableBigEndian() const { return false; }
606 
607   /// For targets which support the "returned" parameter attribute, returns
608   /// true if the given type is a valid one to use with "returned".
isTypeIsValidForThisReturn(EVT Ty)609   virtual bool isTypeIsValidForThisReturn(EVT Ty) const { return false; }
610 };
611 
612 extern template LLVM_ABI void
613 CallLowering::setArgFlags<Function>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
614                                     const DataLayout &DL,
615                                     const Function &FuncInfo) const;
616 
617 extern template LLVM_ABI void
618 CallLowering::setArgFlags<CallBase>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
619                                     const DataLayout &DL,
620                                     const CallBase &FuncInfo) const;
621 } // end namespace llvm
622 
623 #endif // LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
624