/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFormMemoryClauses.cpp | 150 bool SIFormMemoryClauses::canBundle(const MachineInstr &MI, const RegUse &Defs, in canBundle() 217 RegUse &Defs, RegUse &Uses) const { in collectRegUses() 245 RegUse &Defs, RegUse &Uses, in processRegUses() 301 RegUse Defs, Uses; in runOnMachineFunction() local
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H A D | SIPostRABundler.cpp | 49 SmallSet<Register, 16> Defs; member in __anon5d3e08d40111::SIPostRABundler
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H A D | SIFixSGPRCopies.cpp | 470 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local 562 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local 575 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local
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H A D | SIFoldOperands.cpp | 658 SmallVectorImpl<std::pair<MachineOperand *, unsigned>> &Defs, in getRegSeqInit() 728 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in tryToFoldACImm() local 908 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in foldOperand() local 1782 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in tryFoldRegSequence() local
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/freebsd/contrib/llvm-project/clang/utils/TableGen/ |
H A D | ClangDataCollectorsEmitter.cpp | 8 const auto &Defs = RK.getClasses(); in EmitClangDataCollectors() local
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H A D | SveEmitter.cpp | 1242 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createCoreHeaderIntrinsics() local 1446 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createBuiltins() local 1488 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createCodeGenMap() local 1521 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createRangeChecks() local 1651 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createSMEBuiltins() local 1679 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createSMECodeGenMap() local 1713 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createSMERangeChecks() local 1749 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createBuiltinZAState() local 1789 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createStreamingAttrs() local
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H A D | NeonEmitter.cpp | 2006 SmallVectorImpl<Intrinsic *> &Defs) { in genBuiltinsDef() 2040 raw_ostream &OS, SmallVectorImpl<Intrinsic *> &Defs) { in genStreamingSVECompatibleList() 2066 SmallVectorImpl<Intrinsic *> &Defs) { in genOverloadTypeCheckCode() 2146 SmallVectorImpl<Intrinsic *> &Defs) { in genIntrinsicRangeCheckCode() 2236 SmallVector<Intrinsic *, 128> Defs; in runHeader() local 2395 SmallVector<Intrinsic *, 128> Defs; in run() local 2503 SmallVector<Intrinsic *, 128> Defs; in runFP16() local 2612 SmallVector<Intrinsic *, 128> Defs; in runBF16() local
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H A D | RISCVVEmitter.cpp | 417 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createBuiltins() local 448 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createCodeGen() local 746 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createSema() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | Thumb2ITBlockPass.cpp | 137 RegisterSet &Defs, RegisterSet &Uses) { in MoveCopyOutOfITBlock() 195 RegisterSet Defs, Uses; in InsertITInstructions() local
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H A D | A15SDOptimizer.cpp | 398 SmallVector<unsigned, 8> Defs; in getReadDPRs() local 591 SmallVector<unsigned, 8> Defs = getReadDPRs(MI); in runOnInstruction() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | LiveVariables.cpp | 463 SmallVectorImpl<unsigned> &Defs) { in HandlePhysRegDef() 502 SmallVectorImpl<unsigned> &Defs) { in UpdatePhysRegDefs() 513 SmallVectorImpl<unsigned> &Defs, in runOnInstr() 577 SmallVector<unsigned, 4> Defs; in runOnBlock() local 855 DenseSet<unsigned> Defs, Kills; in addNewBlock() local
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H A D | RDFLiveness.cpp | 168 SmallSet<NodeId, 32> Defs; in getAllReachingDefs() local 305 NodeSet &Visited, const NodeSet &Defs) { in getAllReachingDefsRec() 311 NodeSet &Visited, const NodeSet &Defs, in getAllReachingDefsRecImpl()
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H A D | MachineInstrBundle.cpp | 145 SmallVector<MachineOperand*, 4> Defs; in finalizeBundle() local
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H A D | ReachingDefAnalysis.cpp | 418 MCRegister PhysReg, InstSet &Defs, in getLiveOuts() 560 SmallSet<int, 2> Defs; in isSafeToMove() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenMux.cpp | 100 BitVector Defs, Uses; member 158 void HexagonGenMux::getDefsUses(const MachineInstr *MI, BitVector &Defs, in getDefsUses() 182 BitVector Defs(NR), Uses(NR); in buildMaps() local
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H A D | HexagonExpandCondsets.cpp | 395 MachineBasicBlock *Dest) -> bool { in updateDeadsInRange() 417 SetVector<MachineBasicBlock*> Defs; in updateDeadsInRange() local 818 bool HexagonExpandCondsets::canMoveOver(MachineInstr &MI, ReferenceMap &Defs, in canMoveOver() 992 ReferenceMap Uses, Defs; in predicate() local
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H A D | HexagonBitSimplify.cpp | 299 RegisterSet Defs; in INITIALIZE_PASS_DEPENDENCY() local 318 RegisterSet &Defs) { in getInstrDefs() 1498 RegisterSet Defs; in processBlock() local 1626 RegisterSet Defs; in processBlock() local 2739 RegisterSet Defs; in processBlock() local 2996 RegisterSet Defs; in getDefReg() local 3192 RegisterSet Defs; in processLoop() local 3258 RegisterSet Defs; in processLoop() local
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H A D | HexagonRDFOpt.cpp | 261 NodeList Defs; in rewrite() local
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | MemorySSAUpdater.cpp | 148 auto *Defs = MSSA->getWritableBlockDefs(MA->getBlock()); in getPreviousDefInBlock() local 175 auto *Defs = MSSA->getWritableBlockDefs(BB); in getPreviousDefFromEnd() local 257 auto *Defs = MSSA->getBlockDefs(MU->getBlock()); in insertUse() local 267 if (auto *Defs = MSSA->getWritableBlockDefs(StartBlock)) { in insertUse() local 470 auto *Defs = MSSA->getWritableBlockDefs(NewDef->getBlock()); in fixupDefs() local 497 if (auto *Defs = MSSA->getWritableBlockDefs(FixupBlock)) { in fixupDefs() local 847 MemorySSA::DefsList *Defs = MSSA->getWritableBlockDefs(BB); in applyInsertUpdates() local 1216 auto *Defs = MSSA->getWritableBlockDefs(From); in moveAllAccesses() local
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H A D | MemorySSA.cpp | 534 auto *Defs = MSSA.getBlockDefs(Node->getBlock()); in getWalkTarget() local 1539 DefsList *Defs = nullptr; in buildMemorySSA() local 1627 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local 1634 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local 1643 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local 1656 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsBefore() local 1872 std::unique_ptr<DefsList> &Defs = DefsIt->second; in removeFromLists() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCBoolRetToInt.cpp | 74 SmallPtrSet<Value *, 8> Defs; in findAllDefs() local 221 auto Defs = findAllDefs(U); in runOnUse() local
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CTagsEmitter.cpp | 73 const auto &Defs = Records.getDefs(); in run() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCChecker.h | 49 DenseMap<unsigned, PredSet> Defs; global() variable
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Basic/ |
H A D | CodeGenIntrinsics.cpp | 37 std::vector<Record *> Defs = RC.getAllDerivedDefinitions("Intrinsic"); in CodeGenIntrinsicTable() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsDelaySlotFiller.cpp | 136 BitVector Defs, Uses; member in __anon27a8e2d60111::RegDefsUses 202 SmallPtrSet<ValueType, 4> Uses, Defs; member in __anon27a8e2d60111::MemDefsUses
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