xref: /linux/drivers/net/wireless/intel/iwlwifi/fw/regulatory.h (revision 9410645520e9b820069761f3450ef6661418e279)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2023-2024 Intel Corporation
4  */
5 
6 #ifndef __fw_regulatory_h__
7 #define __fw_regulatory_h__
8 
9 #include "fw/img.h"
10 #include "fw/api/commands.h"
11 #include "fw/api/power.h"
12 #include "fw/api/phy.h"
13 #include "fw/api/config.h"
14 #include "fw/api/nvm-reg.h"
15 #include "fw/img.h"
16 #include "iwl-trans.h"
17 
18 #define BIOS_SAR_MAX_PROFILE_NUM	4
19 /*
20  * Each SAR profile has (up to, depends on the table revision) 4 chains:
21  * chain A, chain B, chain A when in CDB, chain B when in CDB
22  */
23 #define BIOS_SAR_MAX_CHAINS_PER_PROFILE 4
24 #define BIOS_SAR_NUM_CHAINS             2
25 #define BIOS_SAR_MAX_SUB_BANDS_NUM      11
26 
27 #define BIOS_GEO_NUM_CHAINS		2
28 #define BIOS_GEO_MAX_NUM_BANDS		3
29 #define BIOS_GEO_MAX_PROFILE_NUM	8
30 #define BIOS_GEO_MIN_PROFILE_NUM	3
31 
32 #define IWL_SAR_ENABLE_MSK		BIT(0)
33 
34 /* PPAG gain value bounds in 1/8 dBm */
35 #define IWL_PPAG_MIN_LB	-16
36 #define IWL_PPAG_MAX_LB 24
37 #define IWL_PPAG_MIN_HB -16
38 #define IWL_PPAG_MAX_HB 40
39 
40 #define IWL_PPAG_ETSI_CHINA_MASK	3
41 #define IWL_PPAG_REV3_MASK		0x7FF
42 
43 #define IWL_WTAS_ENABLED_MSK		0x1
44 #define IWL_WTAS_OVERRIDE_IEC_MSK	0x2
45 #define IWL_WTAS_ENABLE_IEC_MSK	0x4
46 #define IWL_WTAS_USA_UHB_MSK		BIT(16)
47 
48 #define BIOS_MCC_CHINA 0x434e
49 
50 /*
51  * The profile for revision 2 is a superset of revision 1, which is in
52  * turn a superset of revision 0.  So we can store all revisions
53  * inside revision 2, which is what we represent here.
54  */
55 
56 /*
57  * struct iwl_sar_profile_chain - per-chain values of a SAR profile
58  * @subbands: the SAR value for each subband
59  */
60 struct iwl_sar_profile_chain {
61 	u8 subbands[BIOS_SAR_MAX_SUB_BANDS_NUM];
62 };
63 
64 /*
65  * struct iwl_sar_profile - SAR profile from SAR tables
66  * @enabled: whether the profile is enabled or not
67  * @chains: per-chain SAR values
68  */
69 struct iwl_sar_profile {
70 	bool enabled;
71 	struct iwl_sar_profile_chain chains[BIOS_SAR_MAX_CHAINS_PER_PROFILE];
72 };
73 
74 /* Same thing as with SAR, all revisions fit in revision 2 */
75 
76 /*
77  * struct iwl_geo_profile_band - per-band geo SAR offsets
78  * @max: the max tx power allowed for the band
79  * @chains: SAR offsets values for each chain
80  */
81 struct iwl_geo_profile_band {
82 	u8 max;
83 	u8 chains[BIOS_GEO_NUM_CHAINS];
84 };
85 
86 /*
87  * struct iwl_geo_profile - geo profile
88  * @bands: per-band table of the SAR offsets
89  */
90 struct iwl_geo_profile {
91 	struct iwl_geo_profile_band bands[BIOS_GEO_MAX_NUM_BANDS];
92 };
93 
94 /* Same thing as with SAR, all revisions fit in revision 2 */
95 struct iwl_ppag_chain {
96 	s8 subbands[BIOS_SAR_MAX_SUB_BANDS_NUM];
97 };
98 
99 struct iwl_tas_data {
100 	__le32 block_list_size;
101 	__le32 block_list_array[IWL_WTAS_BLACK_LIST_MAX];
102 	u8 override_tas_iec;
103 	u8 enable_tas_iec;
104 	u8 usa_tas_uhb_allowed;
105 };
106 
107 /* For DSM revision 0 and 4 */
108 enum iwl_dsm_funcs {
109 	DSM_FUNC_QUERY = 0,
110 	DSM_FUNC_DISABLE_SRD = 1,
111 	DSM_FUNC_ENABLE_INDONESIA_5G2 = 2,
112 	DSM_FUNC_ENABLE_6E = 3,
113 	DSM_FUNC_REGULATORY_CONFIG = 4,
114 	DSM_FUNC_11AX_ENABLEMENT = 6,
115 	DSM_FUNC_ENABLE_UNII4_CHAN = 7,
116 	DSM_FUNC_ACTIVATE_CHANNEL = 8,
117 	DSM_FUNC_FORCE_DISABLE_CHANNELS = 9,
118 	DSM_FUNC_ENERGY_DETECTION_THRESHOLD = 10,
119 	DSM_FUNC_RFI_CONFIG = 11,
120 	DSM_FUNC_ENABLE_11BE = 12,
121 	DSM_FUNC_NUM_FUNCS = 13,
122 };
123 
124 enum iwl_dsm_values_srd {
125 	DSM_VALUE_SRD_ACTIVE,
126 	DSM_VALUE_SRD_PASSIVE,
127 	DSM_VALUE_SRD_DISABLE,
128 	DSM_VALUE_SRD_MAX
129 };
130 
131 enum iwl_dsm_values_indonesia {
132 	DSM_VALUE_INDONESIA_DISABLE,
133 	DSM_VALUE_INDONESIA_ENABLE,
134 	DSM_VALUE_INDONESIA_RESERVED,
135 	DSM_VALUE_INDONESIA_MAX
136 };
137 
138 enum iwl_dsm_unii4_bitmap {
139 	DSM_VALUE_UNII4_US_OVERRIDE_MSK		= BIT(0),
140 	DSM_VALUE_UNII4_US_EN_MSK		= BIT(1),
141 	DSM_VALUE_UNII4_ETSI_OVERRIDE_MSK	= BIT(2),
142 	DSM_VALUE_UNII4_ETSI_EN_MSK		= BIT(3),
143 	DSM_VALUE_UNII4_CANADA_OVERRIDE_MSK	= BIT(4),
144 	DSM_VALUE_UNII4_CANADA_EN_MSK		= BIT(5),
145 };
146 
147 #define DSM_UNII4_ALLOW_BITMAP_CMD_V8 (DSM_VALUE_UNII4_US_OVERRIDE_MSK | \
148 				       DSM_VALUE_UNII4_US_EN_MSK | \
149 				       DSM_VALUE_UNII4_ETSI_OVERRIDE_MSK | \
150 				       DSM_VALUE_UNII4_ETSI_EN_MSK)
151 #define DSM_UNII4_ALLOW_BITMAP (DSM_UNII4_ALLOW_BITMAP_CMD_V8 | \
152 				DSM_VALUE_UNII4_CANADA_OVERRIDE_MSK | \
153 				DSM_VALUE_UNII4_CANADA_EN_MSK)
154 
155 enum iwl_dsm_values_rfi {
156 	DSM_VALUE_RFI_DLVR_DISABLE	= BIT(0),
157 	DSM_VALUE_RFI_DDR_DISABLE	= BIT(1),
158 };
159 
160 #define DSM_VALUE_RFI_DISABLE	(DSM_VALUE_RFI_DLVR_DISABLE |\
161 				 DSM_VALUE_RFI_DDR_DISABLE)
162 
163 enum iwl_dsm_masks_reg {
164 	DSM_MASK_CHINA_22_REG = BIT(2)
165 };
166 
167 struct iwl_fw_runtime;
168 
169 bool iwl_sar_geo_support(struct iwl_fw_runtime *fwrt);
170 
171 int iwl_sar_geo_fill_table(struct iwl_fw_runtime *fwrt,
172 			   struct iwl_per_chain_offset *table,
173 			   u32 n_bands, u32 n_profiles);
174 
175 int iwl_sar_fill_profile(struct iwl_fw_runtime *fwrt,
176 			 __le16 *per_chain, u32 n_tables, u32 n_subbands,
177 			 int prof_a, int prof_b);
178 
179 int iwl_fill_ppag_table(struct iwl_fw_runtime *fwrt,
180 			union iwl_ppag_table_cmd *cmd,
181 			int *cmd_size);
182 
183 bool iwl_is_ppag_approved(struct iwl_fw_runtime *fwrt);
184 
185 bool iwl_is_tas_approved(void);
186 
187 int iwl_parse_tas_selection(struct iwl_fw_runtime *fwrt,
188 			    struct iwl_tas_data *tas_data,
189 			    const u32 tas_selection);
190 
191 int iwl_bios_get_wrds_table(struct iwl_fw_runtime *fwrt);
192 
193 int iwl_bios_get_ewrd_table(struct iwl_fw_runtime *fwrt);
194 
195 int iwl_bios_get_wgds_table(struct iwl_fw_runtime *fwrt);
196 
197 int iwl_bios_get_ppag_table(struct iwl_fw_runtime *fwrt);
198 
199 int iwl_bios_get_tas_table(struct iwl_fw_runtime *fwrt,
200 			   struct iwl_tas_data *data);
201 
202 int iwl_bios_get_pwr_limit(struct iwl_fw_runtime *fwrt,
203 			   u64 *dflt_pwr_limit);
204 
205 int iwl_bios_get_mcc(struct iwl_fw_runtime *fwrt, char *mcc);
206 int iwl_bios_get_eckv(struct iwl_fw_runtime *fwrt, u32 *ext_clk);
207 int iwl_bios_get_wbem(struct iwl_fw_runtime *fwrt, u32 *value);
208 
209 int iwl_fill_lari_config(struct iwl_fw_runtime *fwrt,
210 			 struct iwl_lari_config_change_cmd *cmd,
211 			 size_t *cmd_size);
212 
213 int iwl_bios_get_dsm(struct iwl_fw_runtime *fwrt, enum iwl_dsm_funcs func,
214 		     u32 *value);
215 
iwl_bios_get_ppag_flags(const u32 ppag_modes,const u8 ppag_ver)216 static inline u32 iwl_bios_get_ppag_flags(const u32 ppag_modes,
217 					  const u8 ppag_ver)
218 {
219 	return ppag_modes & (ppag_ver < 3 ? IWL_PPAG_ETSI_CHINA_MASK :
220 					    IWL_PPAG_REV3_MASK);
221 }
222 
223 bool iwl_puncturing_is_allowed_in_bios(u32 puncturing, u16 mcc);
224 #endif /* __fw_regulatory_h__ */
225