1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef _DMUB_SRV_H_ 27 #define _DMUB_SRV_H_ 28 29 /** 30 * DOC: DMUB interface and operation 31 * 32 * DMUB is the interface to the display DMCUB microcontroller on DCN hardware. 33 * It delegates hardware initialization and command submission to the 34 * microcontroller. DMUB is the shortname for DMCUB. 35 * 36 * This interface is not thread-safe. Ensure that all access to the interface 37 * is properly synchronized by the caller. 38 * 39 * Initialization and usage of the DMUB service should be done in the 40 * steps given below: 41 * 42 * 1. dmub_srv_create() 43 * 2. dmub_srv_has_hw_support() 44 * 3. dmub_srv_calc_region_info() 45 * 4. dmub_srv_hw_init() 46 * 47 * The call to dmub_srv_create() is required to use the server. 48 * 49 * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info() 50 * are helpers to query cache window size and allocate framebuffer(s) 51 * for the cache windows. 52 * 53 * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare 54 * for command submission. Commands can be queued via dmub_srv_cmd_queue() 55 * and executed via dmub_srv_cmd_execute(). 56 * 57 * If the queue is full the dmub_srv_wait_for_idle() call can be used to 58 * wait until the queue has been cleared. 59 * 60 * Destroying the DMUB service can be done by calling dmub_srv_destroy(). 61 * This does not clear DMUB hardware state, only software state. 62 * 63 * The interface is intended to be standalone and should not depend on any 64 * other component within DAL. 65 */ 66 67 #include "inc/dmub_cmd.h" 68 #include "dc/dc_types.h" 69 70 #define DMUB_PC_SNAPSHOT_COUNT 10 71 72 /* Forward declarations */ 73 struct dmub_srv; 74 struct dmub_srv_common_regs; 75 struct dmub_srv_dcn31_regs; 76 77 struct dmcub_trace_buf_entry; 78 79 /* enum dmub_window_memory_type - memory location type specification for windows */ 80 enum dmub_window_memory_type { 81 DMUB_WINDOW_MEMORY_TYPE_FB = 0, 82 DMUB_WINDOW_MEMORY_TYPE_GART 83 }; 84 85 /* enum dmub_status - return code for dmcub functions */ 86 enum dmub_status { 87 DMUB_STATUS_OK = 0, 88 DMUB_STATUS_NO_CTX, 89 DMUB_STATUS_QUEUE_FULL, 90 DMUB_STATUS_TIMEOUT, 91 DMUB_STATUS_INVALID, 92 DMUB_STATUS_HW_FAILURE, 93 DMUB_STATUS_POWER_STATE_D3 94 }; 95 96 /* enum dmub_asic - dmub asic identifier */ 97 enum dmub_asic { 98 DMUB_ASIC_NONE = 0, 99 DMUB_ASIC_DCN20, 100 DMUB_ASIC_DCN21, 101 DMUB_ASIC_DCN30, 102 DMUB_ASIC_DCN301, 103 DMUB_ASIC_DCN302, 104 DMUB_ASIC_DCN303, 105 DMUB_ASIC_DCN31, 106 DMUB_ASIC_DCN31B, 107 DMUB_ASIC_DCN314, 108 DMUB_ASIC_DCN315, 109 DMUB_ASIC_DCN316, 110 DMUB_ASIC_DCN32, 111 DMUB_ASIC_DCN321, 112 DMUB_ASIC_DCN35, 113 DMUB_ASIC_DCN351, 114 DMUB_ASIC_DCN401, 115 DMUB_ASIC_MAX, 116 }; 117 118 /* enum dmub_window_id - dmub window identifier */ 119 enum dmub_window_id { 120 DMUB_WINDOW_0_INST_CONST = 0, 121 DMUB_WINDOW_1_STACK, 122 DMUB_WINDOW_2_BSS_DATA, 123 DMUB_WINDOW_3_VBIOS, 124 DMUB_WINDOW_4_MAILBOX, 125 DMUB_WINDOW_5_TRACEBUFF, 126 DMUB_WINDOW_6_FW_STATE, 127 DMUB_WINDOW_7_SCRATCH_MEM, 128 DMUB_WINDOW_SHARED_STATE, 129 DMUB_WINDOW_TOTAL, 130 }; 131 132 /* enum dmub_notification_type - dmub outbox notification identifier */ 133 enum dmub_notification_type { 134 DMUB_NOTIFICATION_NO_DATA = 0, 135 DMUB_NOTIFICATION_AUX_REPLY, 136 DMUB_NOTIFICATION_HPD, 137 DMUB_NOTIFICATION_HPD_IRQ, 138 DMUB_NOTIFICATION_SET_CONFIG_REPLY, 139 DMUB_NOTIFICATION_DPIA_NOTIFICATION, 140 DMUB_NOTIFICATION_HPD_SENSE_NOTIFY, 141 DMUB_NOTIFICATION_MAX 142 }; 143 144 /** 145 * DPIA NOTIFICATION Response Type 146 */ 147 enum dpia_notify_bw_alloc_status { 148 149 DPIA_BW_REQ_FAILED = 0, 150 DPIA_BW_REQ_SUCCESS, 151 DPIA_EST_BW_CHANGED, 152 DPIA_BW_ALLOC_CAPS_CHANGED 153 }; 154 155 /* enum dmub_memory_access_type - memory access method */ 156 enum dmub_memory_access_type { 157 DMUB_MEMORY_ACCESS_DEFAULT, 158 DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT, 159 DMUB_MEMORY_ACCESS_DMA 160 }; 161 162 /* enum dmub_power_state type - to track DC power state in dmub_srv */ 163 enum dmub_srv_power_state_type { 164 DMUB_POWER_STATE_UNDEFINED = 0, 165 DMUB_POWER_STATE_D0 = 1, 166 DMUB_POWER_STATE_D3 = 8 167 }; 168 169 /** 170 * struct dmub_region - dmub hw memory region 171 * @base: base address for region, must be 256 byte aligned 172 * @top: top address for region 173 */ 174 struct dmub_region { 175 uint32_t base; 176 uint32_t top; 177 }; 178 179 /** 180 * struct dmub_window - dmub hw cache window 181 * @off: offset to the fb memory in gpu address space 182 * @r: region in uc address space for cache window 183 */ 184 struct dmub_window { 185 union dmub_addr offset; 186 struct dmub_region region; 187 }; 188 189 /** 190 * struct dmub_fb - defines a dmub framebuffer memory region 191 * @cpu_addr: cpu virtual address for the region, NULL if invalid 192 * @gpu_addr: gpu virtual address for the region, NULL if invalid 193 * @size: size of the region in bytes, zero if invalid 194 */ 195 struct dmub_fb { 196 void *cpu_addr; 197 uint64_t gpu_addr; 198 uint32_t size; 199 }; 200 201 /** 202 * struct dmub_srv_region_params - params used for calculating dmub regions 203 * @inst_const_size: size of the fw inst const section 204 * @bss_data_size: size of the fw bss data section 205 * @vbios_size: size of the vbios data 206 * @fw_bss_data: raw firmware bss data section 207 */ 208 struct dmub_srv_region_params { 209 uint32_t inst_const_size; 210 uint32_t bss_data_size; 211 uint32_t vbios_size; 212 const uint8_t *fw_inst_const; 213 const uint8_t *fw_bss_data; 214 const enum dmub_window_memory_type *window_memory_type; 215 }; 216 217 /** 218 * struct dmub_srv_region_info - output region info from the dmub service 219 * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes 220 * @num_regions: number of regions used by the dmub service 221 * @regions: region info 222 * 223 * The regions are aligned such that they can be all placed within the 224 * same framebuffer but they can also be placed into different framebuffers. 225 * 226 * The size of each region can be calculated by the caller: 227 * size = reg.top - reg.base 228 * 229 * Care must be taken when performing custom allocations to ensure that each 230 * region base address is 256 byte aligned. 231 */ 232 struct dmub_srv_region_info { 233 uint32_t fb_size; 234 uint32_t gart_size; 235 uint8_t num_regions; 236 struct dmub_region regions[DMUB_WINDOW_TOTAL]; 237 }; 238 239 /** 240 * struct dmub_srv_memory_params - parameters used for driver fb setup 241 * @region_info: region info calculated by dmub service 242 * @cpu_fb_addr: base cpu address for the framebuffer 243 * @cpu_inbox_addr: base cpu address for the gart 244 * @gpu_fb_addr: base gpu virtual address for the framebuffer 245 * @gpu_inbox_addr: base gpu virtual address for the gart 246 */ 247 struct dmub_srv_memory_params { 248 const struct dmub_srv_region_info *region_info; 249 void *cpu_fb_addr; 250 void *cpu_gart_addr; 251 uint64_t gpu_fb_addr; 252 uint64_t gpu_gart_addr; 253 const enum dmub_window_memory_type *window_memory_type; 254 }; 255 256 /** 257 * struct dmub_srv_fb_info - output fb info from the dmub service 258 * @num_fbs: number of required dmub framebuffers 259 * @fbs: fb data for each region 260 * 261 * Output from the dmub service helper that can be used by the 262 * driver to prepare dmub_fb that can be passed into the dmub 263 * hw init service. 264 * 265 * Assumes that all regions are within the same framebuffer 266 * and have been setup according to the region_info generated 267 * by the dmub service. 268 */ 269 struct dmub_srv_fb_info { 270 uint8_t num_fb; 271 struct dmub_fb fb[DMUB_WINDOW_TOTAL]; 272 }; 273 274 /* 275 * struct dmub_srv_hw_params - params for dmub hardware initialization 276 * @fb: framebuffer info for each region 277 * @fb_base: base of the framebuffer aperture 278 * @fb_offset: offset of the framebuffer aperture 279 * @psp_version: psp version to pass for DMCU init 280 * @load_inst_const: true if DMUB should load inst const fw 281 */ 282 struct dmub_srv_hw_params { 283 struct dmub_fb *fb[DMUB_WINDOW_TOTAL]; 284 uint64_t fb_base; 285 uint64_t fb_offset; 286 uint32_t psp_version; 287 bool load_inst_const; 288 bool skip_panel_power_sequence; 289 bool disable_z10; 290 bool power_optimization; 291 bool dpia_supported; 292 bool disable_dpia; 293 bool usb4_cm_version; 294 bool fw_in_system_memory; 295 bool dpia_hpd_int_enable_supported; 296 bool disable_clock_gate; 297 bool disallow_dispclk_dppclk_ds; 298 bool ips_sequential_ono; 299 enum dmub_memory_access_type mem_access_type; 300 enum dmub_ips_disable_type disable_ips; 301 bool disallow_phy_access; 302 bool disable_sldo_opt; 303 bool enable_non_transparent_setconfig; 304 bool lower_hbr3_phy_ssc; 305 }; 306 307 /** 308 * struct dmub_srv_debug - Debug info for dmub_srv 309 * @timeout_occured: Indicates a timeout occured on any message from driver to dmub 310 * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored 311 */ 312 struct dmub_srv_debug { 313 bool timeout_occured; 314 union dmub_rb_cmd timeout_cmd; 315 unsigned long long timestamp; 316 }; 317 318 /** 319 * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for 320 * debugging purposes, including logging, crash analysis, etc. 321 */ 322 struct dmub_diagnostic_data { 323 uint32_t dmcub_version; 324 uint32_t scratch[17]; 325 uint32_t pc[DMUB_PC_SNAPSHOT_COUNT]; 326 uint32_t undefined_address_fault_addr; 327 uint32_t inst_fetch_fault_addr; 328 uint32_t data_write_fault_addr; 329 uint32_t inbox1_rptr; 330 uint32_t inbox1_wptr; 331 uint32_t inbox1_size; 332 uint32_t inbox0_rptr; 333 uint32_t inbox0_wptr; 334 uint32_t inbox0_size; 335 uint32_t outbox1_rptr; 336 uint32_t outbox1_wptr; 337 uint32_t outbox1_size; 338 uint32_t gpint_datain0; 339 struct dmub_srv_debug timeout_info; 340 uint8_t is_dmcub_enabled : 1; 341 uint8_t is_dmcub_soft_reset : 1; 342 uint8_t is_dmcub_secure_reset : 1; 343 uint8_t is_traceport_en : 1; 344 uint8_t is_cw0_enabled : 1; 345 uint8_t is_cw6_enabled : 1; 346 }; 347 348 /** 349 * struct dmub_srv_base_funcs - Driver specific base callbacks 350 */ 351 struct dmub_srv_base_funcs { 352 /** 353 * @reg_read: 354 * 355 * Hook for reading a register. 356 * 357 * Return: The 32-bit register value from the given address. 358 */ 359 uint32_t (*reg_read)(void *ctx, uint32_t address); 360 361 /** 362 * @reg_write: 363 * 364 * Hook for writing a value to the register specified by address. 365 */ 366 void (*reg_write)(void *ctx, uint32_t address, uint32_t value); 367 }; 368 369 /** 370 * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub 371 */ 372 struct dmub_srv_hw_funcs { 373 /* private: internal use only */ 374 375 void (*init)(struct dmub_srv *dmub); 376 377 void (*reset)(struct dmub_srv *dmub); 378 379 void (*reset_release)(struct dmub_srv *dmub); 380 381 void (*backdoor_load)(struct dmub_srv *dmub, 382 const struct dmub_window *cw0, 383 const struct dmub_window *cw1); 384 385 void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub, 386 const struct dmub_window *cw0, 387 const struct dmub_window *cw1); 388 void (*setup_windows)(struct dmub_srv *dmub, 389 const struct dmub_window *cw2, 390 const struct dmub_window *cw3, 391 const struct dmub_window *cw4, 392 const struct dmub_window *cw5, 393 const struct dmub_window *cw6, 394 const struct dmub_window *region6); 395 396 void (*setup_mailbox)(struct dmub_srv *dmub, 397 const struct dmub_region *inbox1); 398 399 uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub); 400 401 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub); 402 403 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 404 405 void (*setup_out_mailbox)(struct dmub_srv *dmub, 406 const struct dmub_region *outbox1); 407 408 uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub); 409 410 void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 411 412 void (*setup_outbox0)(struct dmub_srv *dmub, 413 const struct dmub_region *outbox0); 414 415 uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub); 416 417 void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 418 419 uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub); 420 421 void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 422 423 bool (*is_supported)(struct dmub_srv *dmub); 424 425 bool (*is_psrsu_supported)(struct dmub_srv *dmub); 426 427 bool (*is_hw_init)(struct dmub_srv *dmub); 428 bool (*is_hw_powered_up)(struct dmub_srv *dmub); 429 430 void (*enable_dmub_boot_options)(struct dmub_srv *dmub, 431 const struct dmub_srv_hw_params *params); 432 433 void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip); 434 435 union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub); 436 437 union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub); 438 439 void (*set_gpint)(struct dmub_srv *dmub, 440 union dmub_gpint_data_register reg); 441 442 bool (*is_gpint_acked)(struct dmub_srv *dmub, 443 union dmub_gpint_data_register reg); 444 445 uint32_t (*get_gpint_response)(struct dmub_srv *dmub); 446 447 uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub); 448 449 void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub); 450 void (*clear_inbox0_ack_register)(struct dmub_srv *dmub); 451 uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub); 452 void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 453 uint32_t (*get_current_time)(struct dmub_srv *dmub); 454 455 void (*get_diagnostic_data)(struct dmub_srv *dmub, struct dmub_diagnostic_data *dmub_oca); 456 457 bool (*should_detect)(struct dmub_srv *dmub); 458 void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx); 459 460 void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 461 void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub, 462 union dmub_rb_cmd *cmd); 463 uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub); 464 void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub, 465 union dmub_rb_cmd *cmd); 466 void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub); 467 uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub); 468 void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub); 469 void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg); 470 void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp); 471 uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub); 472 void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable); 473 void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable); 474 }; 475 476 /** 477 * struct dmub_srv_create_params - params for dmub service creation 478 * @base_funcs: driver supplied base routines 479 * @hw_funcs: optional overrides for hw funcs 480 * @user_ctx: context data for callback funcs 481 * @asic: driver supplied asic 482 * @fw_version: the current firmware version, if any 483 * @is_virtual: false for hw support only 484 */ 485 struct dmub_srv_create_params { 486 struct dmub_srv_base_funcs funcs; 487 struct dmub_srv_hw_funcs *hw_funcs; 488 void *user_ctx; 489 enum dmub_asic asic; 490 uint32_t fw_version; 491 bool is_virtual; 492 }; 493 494 /** 495 * struct dmub_srv - software state for dmcub 496 * @asic: dmub asic identifier 497 * @user_ctx: user provided context for the dmub_srv 498 * @fw_version: the current firmware version, if any 499 * @is_virtual: false if hardware support only 500 * @shared_state: dmub shared state between firmware and driver 501 * @fw_state: dmub firmware state pointer 502 */ 503 struct dmub_srv { 504 enum dmub_asic asic; 505 void *user_ctx; 506 uint32_t fw_version; 507 bool is_virtual; 508 struct dmub_fb scratch_mem_fb; 509 volatile struct dmub_shared_state_feature_block *shared_state; 510 volatile const struct dmub_fw_state *fw_state; 511 512 /* private: internal use only */ 513 const struct dmub_srv_common_regs *regs; 514 const struct dmub_srv_dcn31_regs *regs_dcn31; 515 struct dmub_srv_dcn32_regs *regs_dcn32; 516 struct dmub_srv_dcn35_regs *regs_dcn35; 517 const struct dmub_srv_dcn401_regs *regs_dcn401; 518 519 struct dmub_srv_base_funcs funcs; 520 struct dmub_srv_hw_funcs hw_funcs; 521 struct dmub_rb inbox1_rb; 522 uint32_t inbox1_last_wptr; 523 /** 524 * outbox1_rb is accessed without locks (dal & dc) 525 * and to be used only in dmub_srv_stat_get_notification() 526 */ 527 struct dmub_rb outbox1_rb; 528 529 struct dmub_rb outbox0_rb; 530 531 bool sw_init; 532 bool hw_init; 533 534 uint64_t fb_base; 535 uint64_t fb_offset; 536 uint32_t psp_version; 537 538 /* Feature capabilities reported by fw */ 539 struct dmub_fw_meta_info meta_info; 540 struct dmub_feature_caps feature_caps; 541 struct dmub_visual_confirm_color visual_confirm_color; 542 543 enum dmub_srv_power_state_type power_state; 544 struct dmub_srv_debug debug; 545 }; 546 547 /** 548 * struct dmub_notification - dmub notification data 549 * @type: dmub notification type 550 * @link_index: link index to identify aux connection 551 * @result: USB4 status returned from dmub 552 * @pending_notification: Indicates there are other pending notifications 553 * @aux_reply: aux reply 554 * @hpd_status: hpd status 555 * @bw_alloc_reply: BW Allocation reply from CM/DPIA 556 */ 557 struct dmub_notification { 558 enum dmub_notification_type type; 559 uint8_t link_index; 560 uint8_t result; 561 bool pending_notification; 562 union { 563 struct aux_reply_data aux_reply; 564 enum dp_hpd_status hpd_status; 565 enum set_config_status sc_status; 566 /** 567 * DPIA notification command. 568 */ 569 struct dmub_rb_cmd_dpia_notification dpia_notification; 570 struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify; 571 }; 572 }; 573 574 /* enum dmub_ips_mode - IPS mode identifier */ 575 enum dmub_ips_mode { 576 DMUB_IPS_MODE_IPS1_MAX = 0, 577 DMUB_IPS_MODE_IPS2, 578 DMUB_IPS_MODE_IPS1_RCG, 579 DMUB_IPS_MODE_IPS1_ONO2_ON 580 }; 581 582 /** 583 * DMUB firmware version helper macro - useful for checking if the version 584 * of a firmware to know if feature or functionality is supported or present. 585 */ 586 #define DMUB_FW_VERSION(major, minor, revision) \ 587 ((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8)) 588 589 /** 590 * dmub_srv_create() - creates the DMUB service. 591 * @dmub: the dmub service 592 * @params: creation parameters for the service 593 * 594 * Return: 595 * DMUB_STATUS_OK - success 596 * DMUB_STATUS_INVALID - unspecified error 597 */ 598 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, 599 const struct dmub_srv_create_params *params); 600 601 /** 602 * dmub_srv_destroy() - destroys the DMUB service. 603 * @dmub: the dmub service 604 */ 605 void dmub_srv_destroy(struct dmub_srv *dmub); 606 607 /** 608 * dmub_srv_calc_region_info() - retreives region info from the dmub service 609 * @dmub: the dmub service 610 * @params: parameters used to calculate region locations 611 * @info_out: the output region info from dmub 612 * 613 * Calculates the base and top address for all relevant dmub regions 614 * using the parameters given (if any). 615 * 616 * Return: 617 * DMUB_STATUS_OK - success 618 * DMUB_STATUS_INVALID - unspecified error 619 */ 620 enum dmub_status 621 dmub_srv_calc_region_info(struct dmub_srv *dmub, 622 const struct dmub_srv_region_params *params, 623 struct dmub_srv_region_info *out); 624 625 /** 626 * dmub_srv_calc_region_info() - retreives fb info from the dmub service 627 * @dmub: the dmub service 628 * @params: parameters used to calculate fb locations 629 * @info_out: the output fb info from dmub 630 * 631 * Calculates the base and top address for all relevant dmub regions 632 * using the parameters given (if any). 633 * 634 * Return: 635 * DMUB_STATUS_OK - success 636 * DMUB_STATUS_INVALID - unspecified error 637 */ 638 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub, 639 const struct dmub_srv_memory_params *params, 640 struct dmub_srv_fb_info *out); 641 642 /** 643 * dmub_srv_has_hw_support() - returns hw support state for dmcub 644 * @dmub: the dmub service 645 * @is_supported: hw support state 646 * 647 * Queries the hardware for DMCUB support and returns the result. 648 * 649 * Can be called before dmub_srv_hw_init(). 650 * 651 * Return: 652 * DMUB_STATUS_OK - success 653 * DMUB_STATUS_INVALID - unspecified error 654 */ 655 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, 656 bool *is_supported); 657 658 /** 659 * dmub_srv_is_hw_init() - returns hardware init state 660 * 661 * Return: 662 * DMUB_STATUS_OK - success 663 * DMUB_STATUS_INVALID - unspecified error 664 */ 665 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init); 666 667 /** 668 * dmub_srv_hw_init() - initializes the underlying DMUB hardware 669 * @dmub: the dmub service 670 * @params: params for hardware initialization 671 * 672 * Resets the DMUB hardware and performs backdoor loading of the 673 * required cache regions based on the input framebuffer regions. 674 * 675 * Return: 676 * DMUB_STATUS_OK - success 677 * DMUB_STATUS_NO_CTX - dmcub context not initialized 678 * DMUB_STATUS_INVALID - unspecified error 679 */ 680 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 681 const struct dmub_srv_hw_params *params); 682 683 /** 684 * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized 685 * @dmub: the dmub service 686 * 687 * Before destroying the DMUB service or releasing the backing framebuffer 688 * memory we'll need to put the DMCUB into reset first. 689 * 690 * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB. 691 * 692 * Return: 693 * DMUB_STATUS_OK - success 694 * DMUB_STATUS_INVALID - unspecified error 695 */ 696 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub); 697 698 /** 699 * dmub_srv_sync_inbox1() - sync sw state with hw state 700 * @dmub: the dmub service 701 * 702 * Sync sw state with hw state when resume from S0i3 703 * 704 * Return: 705 * DMUB_STATUS_OK - success 706 * DMUB_STATUS_INVALID - unspecified error 707 */ 708 enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub); 709 710 /** 711 * dmub_srv_cmd_queue() - queues a command to the DMUB 712 * @dmub: the dmub service 713 * @cmd: the command to queue 714 * 715 * Queues a command to the DMUB service but does not begin execution 716 * immediately. 717 * 718 * Return: 719 * DMUB_STATUS_OK - success 720 * DMUB_STATUS_QUEUE_FULL - no remaining room in queue 721 * DMUB_STATUS_INVALID - unspecified error 722 */ 723 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub, 724 const union dmub_rb_cmd *cmd); 725 726 /** 727 * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub 728 * @dmub: the dmub service 729 * 730 * Begins execution of queued commands on the dmub. 731 * 732 * Return: 733 * DMUB_STATUS_OK - success 734 * DMUB_STATUS_INVALID - unspecified error 735 */ 736 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub); 737 738 /** 739 * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed 740 * @dmub: the dmub service 741 * @timeout_us: the maximum number of microseconds to wait 742 * 743 * Waits until firmware hardware is powered up. The maximum 744 * wait time is given in microseconds to prevent spinning forever. 745 * 746 * Return: 747 * DMUB_STATUS_OK - success 748 * DMUB_STATUS_TIMEOUT - timed out 749 * DMUB_STATUS_INVALID - unspecified error 750 */ 751 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub, 752 uint32_t timeout_us); 753 754 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub); 755 756 /** 757 * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete 758 * @dmub: the dmub service 759 * @timeout_us: the maximum number of microseconds to wait 760 * 761 * Waits until firmware has been autoloaded by the DMCUB. The maximum 762 * wait time is given in microseconds to prevent spinning forever. 763 * 764 * On ASICs without firmware autoload support this function will return 765 * immediately. 766 * 767 * Return: 768 * DMUB_STATUS_OK - success 769 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 770 * DMUB_STATUS_INVALID - unspecified error 771 */ 772 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub, 773 uint32_t timeout_us); 774 775 /** 776 * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete 777 * @dmub: the dmub service 778 * @timeout_us: the maximum number of microseconds to wait 779 * 780 * Waits until the PHY has been initialized by the DMUB. The maximum 781 * wait time is given in microseconds to prevent spinning forever. 782 * 783 * On ASICs without PHY init support this function will return 784 * immediately. 785 * 786 * Return: 787 * DMUB_STATUS_OK - success 788 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 789 * DMUB_STATUS_INVALID - unspecified error 790 */ 791 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub, 792 uint32_t timeout_us); 793 794 /** 795 * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle 796 * @dmub: the dmub service 797 * @timeout_us: the maximum number of microseconds to wait 798 * 799 * Waits until the DMUB buffer is empty and all commands have 800 * finished processing. The maximum wait time is given in 801 * microseconds to prevent spinning forever. 802 * 803 * Return: 804 * DMUB_STATUS_OK - success 805 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 806 * DMUB_STATUS_INVALID - unspecified error 807 */ 808 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub, 809 uint32_t timeout_us); 810 811 /** 812 * dmub_srv_send_gpint_command() - Sends a GPINT based command. 813 * @dmub: the dmub service 814 * @command_code: the command code to send 815 * @param: the command parameter to send 816 * @timeout_us: the maximum number of microseconds to wait 817 * 818 * Sends a command via the general purpose interrupt (GPINT). 819 * Waits for the number of microseconds specified by timeout_us 820 * for the command ACK before returning. 821 * 822 * Can be called after software initialization. 823 * 824 * Return: 825 * DMUB_STATUS_OK - success 826 * DMUB_STATUS_TIMEOUT - wait for ACK timed out 827 * DMUB_STATUS_INVALID - unspecified error 828 */ 829 enum dmub_status 830 dmub_srv_send_gpint_command(struct dmub_srv *dmub, 831 enum dmub_gpint_command command_code, 832 uint16_t param, uint32_t timeout_us); 833 834 /** 835 * dmub_srv_get_gpint_response() - Queries the GPINT response. 836 * @dmub: the dmub service 837 * @response: the response for the last GPINT 838 * 839 * Returns the response code for the last GPINT interrupt. 840 * 841 * Can be called after software initialization. 842 * 843 * Return: 844 * DMUB_STATUS_OK - success 845 * DMUB_STATUS_INVALID - unspecified error 846 */ 847 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub, 848 uint32_t *response); 849 850 /** 851 * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT. 852 * @dmub: the dmub service 853 * @dataout: the data for the GPINT DATAOUT 854 * 855 * Returns the response code for the last GPINT DATAOUT interrupt. 856 * 857 * Can be called after software initialization. 858 * 859 * Return: 860 * DMUB_STATUS_OK - success 861 * DMUB_STATUS_INVALID - unspecified error 862 */ 863 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub, 864 uint32_t *dataout); 865 866 /** 867 * dmub_flush_buffer_mem() - Read back entire frame buffer region. 868 * This ensures that the write from x86 has been flushed and will not 869 * hang the DMCUB. 870 * @fb: frame buffer to flush 871 * 872 * Can be called after software initialization. 873 */ 874 void dmub_flush_buffer_mem(const struct dmub_fb *fb); 875 876 /** 877 * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits. 878 * 879 * @dmub: the dmub service 880 * @status: out pointer for firmware status 881 * 882 * Return: 883 * DMUB_STATUS_OK - success 884 * DMUB_STATUS_INVALID - unspecified error, unsupported 885 */ 886 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub, 887 union dmub_fw_boot_status *status); 888 889 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub, 890 union dmub_fw_boot_options *option); 891 892 enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub, 893 union dmub_rb_cmd *cmd); 894 895 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub, 896 bool skip); 897 898 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry); 899 900 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data); 901 902 bool dmub_srv_should_detect(struct dmub_srv *dmub); 903 904 /** 905 * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0 906 * @dmub: the dmub service 907 * @data: the data to be sent in the INBOX0 command 908 * 909 * Send command by writing directly to INBOX0 WPTR 910 * 911 * Return: 912 * DMUB_STATUS_OK - success 913 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 914 */ 915 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 916 917 /** 918 * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command 919 * @dmub: the dmub service 920 * @timeout_us: the maximum number of microseconds to wait 921 * 922 * Wait for DMUB to ACK the INBOX0 message 923 * 924 * Return: 925 * DMUB_STATUS_OK - success 926 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 927 * DMUB_STATUS_TIMEOUT - wait for ack timed out 928 */ 929 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us); 930 931 /** 932 * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0 933 * @dmub: the dmub service 934 * 935 * Clear ACK register for INBOX0 936 * 937 * Return: 938 * DMUB_STATUS_OK - success 939 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 940 */ 941 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub); 942 943 /** 944 * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip 945 * @dmub: The dmub service 946 * @addr: The surface address to be programmed on the current flip 947 * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for 948 * 949 * Function to save the surface flip addr into scratch registers. This is to fix a race condition 950 * between FW and driver reading / writing to the surface address at the same time. This is 951 * required because there is no EARLIEST_IN_USE_META. 952 * 953 * Return: 954 * void 955 */ 956 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 957 958 /** 959 * dmub_srv_send_reg_inbox0_cmd() - send a dmub command and wait for the command 960 * being processed by DMUB. 961 * @dmub: The dmub service 962 * @cmd: The dmub command being sent. If with_replay is true, the function will 963 * update cmd with replied data. 964 * @with_reply: true if DMUB reply needs to be copied back to cmd. false if the 965 * cmd doesn't need to be replied. 966 * @timeout_us: timeout in microseconds. 967 * 968 * Return: 969 * DMUB_STATUS_OK - success 970 * DMUB_STATUS_TIMEOUT - DMUB fails to process the command within the timeout 971 * interval. 972 */ 973 enum dmub_status dmub_srv_send_reg_inbox0_cmd( 974 struct dmub_srv *dmub, 975 union dmub_rb_cmd *cmd, 976 bool with_reply, uint32_t timeout_us); 977 978 /** 979 * dmub_srv_set_power_state() - Track DC power state in dmub_srv 980 * @dmub: The dmub service 981 * @power_state: DC power state setting 982 * 983 * Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB 984 * 985 * Return: 986 * void 987 */ 988 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state); 989 990 #endif /* _DMUB_SRV_H_ */ 991