xref: /illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h (revision 14b24e2b79293068c8e016a69ef1d872fb5e2fd5)
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, v.1,  (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://opensource.org/licenses/CDDL-1.0.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 
22 /*
23 * Copyright 2014-2017 Cavium, Inc.
24 * The contents of this file are subject to the terms of the Common Development
25 * and Distribution License, v.1,  (the "License").
26 
27 * You may not use this file except in compliance with the License.
28 
29 * You can obtain a copy of the License at available
30 * at http://opensource.org/licenses/CDDL-1.0
31 
32 * See the License for the specific language governing permissions and
33 * limitations under the License.
34 */
35 
36 #ifndef __ECORE_HW_H__
37 #define __ECORE_HW_H__
38 
39 #include "ecore.h"
40 #include "ecore_dev_api.h"
41 
42 /* Forward decleration */
43 struct ecore_ptt;
44 
45 enum reserved_ptts {
46 	RESERVED_PTT_EDIAG,
47 	RESERVED_PTT_USER_SPACE,
48 	RESERVED_PTT_MAIN,
49 	RESERVED_PTT_DPC,
50 	RESERVED_PTT_MAX
51 };
52 
53 /* @@@TMP - in earlier versions of the emulation, the HW lock started from 1
54  * instead of 0, this should be fixed in later HW versions.
55  */
56 #ifndef MISC_REG_DRIVER_CONTROL_0
57 #define MISC_REG_DRIVER_CONTROL_0	MISC_REG_DRIVER_CONTROL_1
58 #endif
59 #ifndef MISC_REG_DRIVER_CONTROL_0_SIZE
60 #define MISC_REG_DRIVER_CONTROL_0_SIZE	MISC_REG_DRIVER_CONTROL_1_SIZE
61 #endif
62 
63 enum _dmae_cmd_dst_mask {
64 	DMAE_CMD_DST_MASK_NONE = 0,
65 	DMAE_CMD_DST_MASK_PCIE = 1,
66 	DMAE_CMD_DST_MASK_GRC = 2
67 };
68 
69 enum _dmae_cmd_src_mask {
70 	DMAE_CMD_SRC_MASK_PCIE = 0,
71 	DMAE_CMD_SRC_MASK_GRC = 1
72 };
73 
74 enum _dmae_cmd_crc_mask {
75 	DMAE_CMD_COMP_CRC_EN_MASK_NONE = 0,
76 	DMAE_CMD_COMP_CRC_EN_MASK_SET = 1
77 };
78 
79 /* definitions for DMA constants */
80 #define DMAE_GO_VALUE	0x1
81 
82 #ifdef __BIG_ENDIAN
83 #define DMAE_COMPLETION_VAL	0xAED10000
84 #define DMAE_CMD_ENDIANITY	0x3
85 #else
86 #define DMAE_COMPLETION_VAL	0xD1AE
87 #define DMAE_CMD_ENDIANITY	0x2
88 #endif
89 
90 #define DMAE_CMD_SIZE	14
91 /* size of DMAE command structure to fill.. DMAE_CMD_SIZE-5 */
92 #define DMAE_CMD_SIZE_TO_FILL	(DMAE_CMD_SIZE - 5)
93 /* Minimum wait for dmae opertaion to complete 2 milliseconds */
94 #define DMAE_MIN_WAIT_TIME	0x2
95 #define DMAE_MAX_CLIENTS	32
96 
97 /**
98 * @brief ecore_gtt_init - Initialize GTT windows
99 *
100 * @param p_hwfn
101 */
102 void ecore_gtt_init(struct ecore_hwfn *p_hwfn);
103 
104 /**
105  * @brief ecore_ptt_invalidate - Forces all ptt entries to be re-configured
106  *
107  * @param p_hwfn
108  */
109 void ecore_ptt_invalidate(struct ecore_hwfn *p_hwfn);
110 
111 /**
112  * @brief ecore_ptt_pool_alloc - Allocate and initialize PTT pool
113  *
114  * @param p_hwfn
115  *
116  * @return _ecore_status_t - success (0), negative - error.
117  */
118 enum _ecore_status_t ecore_ptt_pool_alloc(struct ecore_hwfn *p_hwfn);
119 
120 /**
121  * @brief ecore_ptt_pool_free -
122  *
123  * @param p_hwfn
124  */
125 void ecore_ptt_pool_free(struct ecore_hwfn *p_hwfn);
126 
127 /**
128  * @brief ecore_ptt_get_hw_addr - Get PTT's GRC/HW address
129  *
130  * @param p_hwfn
131  * @param p_ptt
132  *
133  * @return u32
134  */
135 u32 ecore_ptt_get_hw_addr(struct ecore_hwfn	*p_hwfn,
136 			  struct ecore_ptt	*p_ptt);
137 
138 /**
139  * @brief ecore_ptt_get_bar_addr - Get PPT's external BAR address
140  *
141  * @param p_hwfn
142  * @param p_ptt
143  *
144  * @return u32
145  */
146 u32 ecore_ptt_get_bar_addr(struct ecore_ptt	*p_ptt);
147 
148 /**
149  * @brief ecore_ptt_set_win - Set PTT Window's GRC BAR address
150  *
151  * @param p_hwfn
152  * @param new_hw_addr
153  * @param p_ptt
154  */
155 void ecore_ptt_set_win(struct ecore_hwfn	*p_hwfn,
156 		       struct ecore_ptt		*p_ptt,
157 		       u32			new_hw_addr);
158 
159 /**
160  * @brief ecore_get_reserved_ptt - Get a specific reserved PTT
161  *
162  * @param p_hwfn
163  * @param ptt_idx
164  *
165  * @return struct ecore_ptt *
166  */
167 struct ecore_ptt *ecore_get_reserved_ptt(struct ecore_hwfn	*p_hwfn,
168 					 enum reserved_ptts	ptt_idx);
169 
170 /**
171  * @brief ecore_wr - Write value to BAR using the given ptt
172  *
173  * @param p_hwfn
174  * @param p_ptt
175  * @param val
176  * @param hw_addr
177  */
178 void ecore_wr(struct ecore_hwfn	*p_hwfn,
179 	      struct ecore_ptt	*p_ptt,
180 	      u32		hw_addr,
181 	      u32		val);
182 
183 /**
184  * @brief ecore_rd - Read value from BAR using the given ptt
185  *
186  * @param p_hwfn
187  * @param p_ptt
188  * @param val
189  * @param hw_addr
190  */
191 u32 ecore_rd(struct ecore_hwfn	*p_hwfn,
192 	     struct ecore_ptt	*p_ptt,
193 	     u32		hw_addr);
194 
195 /**
196  * @brief ecore_memcpy_from - copy n bytes from BAR using the given
197  *        ptt
198  *
199  * @param p_hwfn
200  * @param p_ptt
201  * @param dest
202  * @param hw_addr
203  * @param n
204  */
205 void ecore_memcpy_from(struct ecore_hwfn	*p_hwfn,
206 		       struct ecore_ptt		*p_ptt,
207 		       void			*dest,
208 		       u32			hw_addr,
209 		       osal_size_t		n);
210 
211 /**
212  * @brief ecore_memcpy_to - copy n bytes to BAR using the given
213  *        ptt
214  *
215  * @param p_hwfn
216  * @param p_ptt
217  * @param hw_addr
218  * @param src
219  * @param n
220  */
221 void ecore_memcpy_to(struct ecore_hwfn	*p_hwfn,
222 		     struct ecore_ptt	*p_ptt,
223 		     u32		hw_addr,
224 		     void		*src,
225 		     osal_size_t	n);
226 /**
227  * @brief ecore_fid_pretend - pretend to another function when
228  *        accessing the ptt window. There is no way to unpretend
229  *        a function. The only way to cancel a pretend is to
230  *        pretend back to the original function.
231  *
232  * @param p_hwfn
233  * @param p_ptt
234  * @param fid - fid field of pxp_pretend structure. Can contain
235  *            either pf / vf, port/path fields are don't care.
236  */
237 void ecore_fid_pretend(struct ecore_hwfn	*p_hwfn,
238 		       struct ecore_ptt		*p_ptt,
239 		       u16			fid);
240 
241 /**
242  * @brief ecore_port_pretend - pretend to another port when
243  *        accessing the ptt window
244  *
245  * @param p_hwfn
246  * @param p_ptt
247  * @param port_id - the port to pretend to
248  */
249 void ecore_port_pretend(struct ecore_hwfn	*p_hwfn,
250 			struct ecore_ptt	*p_ptt,
251 			u8			port_id);
252 
253 /**
254  * @brief ecore_port_unpretend - cancel any previously set port
255  *        pretend
256  *
257  * @param p_hwfn
258  * @param p_ptt
259  */
260 void ecore_port_unpretend(struct ecore_hwfn	*p_hwfn,
261 			  struct ecore_ptt	*p_ptt);
262 
263 /**
264  * @brief ecore_vfid_to_concrete - build a concrete FID for a
265  *        given VF ID
266  *
267  * @param p_hwfn
268  * @param p_ptt
269  * @param vfid
270  */
271 u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid);
272 
273 /**
274 * @brief ecore_dmae_info_alloc - Init the dmae_info structure
275 * which is part of p_hwfn.
276 * @param p_hwfn
277 */
278 enum _ecore_status_t ecore_dmae_info_alloc(struct ecore_hwfn	*p_hwfn);
279 
280 /**
281 * @brief ecore_dmae_info_free - Free the dmae_info structure
282 * which is part of p_hwfn
283 *
284 * @param p_hwfn
285 */
286 void ecore_dmae_info_free(struct ecore_hwfn	*p_hwfn);
287 
288 union ecore_qm_pq_params {
289 	struct {
290 		u8 q_idx;
291 	} iscsi;
292 
293 	struct {
294 		u8 tc;
295 	} core;
296 
297 	struct {
298 		u8 is_vf;
299 		u8 vf_id;
300 		u8 tc;
301 	} eth;
302 
303 	struct {
304 		u8 dcqcn;
305 		u8 qpid; /* roce relative */
306 	} roce;
307 
308 	struct {
309 		u8 qidx;
310 	} iwarp;
311 };
312 
313 u16 ecore_get_qm_pq(struct ecore_hwfn	*p_hwfn,
314 		    enum protocol_type	proto,
315 		    union ecore_qm_pq_params *params);
316 
317 enum _ecore_status_t ecore_init_fw_data(struct ecore_dev *p_dev,
318 					const u8 *fw_data);
319 
320 void ecore_hw_err_notify(struct ecore_hwfn *p_hwfn,
321 			 enum ecore_hw_err_type err_type);
322 
323 #endif /* __ECORE_HW_H__ */
324