xref: /illumos-gate/usr/src/uts/common/sys/dditypes.h (revision d5ebc4938a50bb2fb1914062e396761dc9161a51)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  * Copyright 2022 Tintri by DDN, Inc. All rights reserved.
26  * Copyright 2023 Oxide Computer Company
27  */
28 
29 #ifndef	_SYS_DDITYPES_H
30 #define	_SYS_DDITYPES_H
31 
32 #include <sys/isa_defs.h>
33 #ifndef	_ASM
34 #include <sys/types.h>
35 #endif
36 
37 #ifdef	__cplusplus
38 extern "C" {
39 #endif
40 
41 #ifndef	_ASM
42 /*
43  * DMA types
44  *
45  * A DMA handle represent a "DMA object".  A DMA object is an abstraction
46  * that represents the potential source or destination of DMA transfers to
47  * or from a device.  The DMA object is the highest level description of
48  * the source or destination and is not suitable for the actual transfer.
49  *
50  * Note, that we avoid the specific references to "mapping". The fact that
51  * a transfer requires mapping is an artifact of the specific architectural
52  * implementation.
53  */
54 typedef	struct __ddi_dma_handle *ddi_dma_handle_t;
55 
56 /*
57  * A dma window type represents a "DMA window".  A DMA window is a portion
58  * of a dma object or might be the entire object. A DMA window has had system
59  * resources allocated to it and is prepared to be transferred into or
60  * out of. Examples of system resources are DVMA mapping resources and
61  * intermediate transfer buffer resources.
62  *
63  */
64 typedef	struct __ddi_dma_win *ddi_dma_win_t;
65 
66 
67 /*
68  * A dma segment type represents a "DMA segment".  A dma segment is a
69  * contiguous portion of a DMA window which is entirely addressable by the
70  * device for a transfer operation.  One example where DMA segments are
71  * required is where the system does not contain DVMA capability and
72  * the object or window may be non-contiguous.  In this example the
73  * object or window will be broken into smaller contiguous segments.
74  * Another example is where a device or some intermediary bus adapter has
75  * some upper limit on its transfer size (i.e. an 8-bit address register).
76  * In this example the object or window will be broken into smaller
77  * addressable segments.
78  */
79 typedef	struct __ddi_dma_seg *ddi_dma_seg_t;
80 
81 /*
82  * A DMA cookie contains DMA address information required to
83  * program a DMA engine
84  */
85 typedef struct {
86 	union {
87 		uint64_t	_dmac_ll;	/* 64 bit DMA address */
88 		uint32_t	_dmac_la[2];	/* 2 x 32 bit address */
89 	} _dmu;
90 	size_t		dmac_size;	/* DMA cookie size */
91 	uint_t		dmac_type;	/* bus specific type bits */
92 } ddi_dma_cookie_t;
93 
94 #define	dmac_laddress	_dmu._dmac_ll
95 #ifdef _LONG_LONG_HTOL
96 #define	dmac_notused    _dmu._dmac_la[0]
97 #define	dmac_address    _dmu._dmac_la[1]
98 #else
99 #define	dmac_address	_dmu._dmac_la[0]
100 #define	dmac_notused	_dmu._dmac_la[1]
101 #endif
102 
103 /*
104  * Interrupt types
105  */
106 
107 /*
108  * Both ddi_iblock_cookie_t and ddi_idevice_cookie_t are
109  * obsolete data structures.
110  *
111  * lock initialization type
112  */
113 typedef struct __ddi_iblock_cookie *ddi_iblock_cookie_t;
114 typedef union {
115 	struct {
116 		ushort_t	_idev_vector;	/* vector - bus dependent */
117 		ushort_t	_idev_priority;	/* priority - bus dependent */
118 	} idu;
119 	uint_t	idev_softint;	/* Soft interrupt register bit(s) */
120 } ddi_idevice_cookie_t;
121 #define	idev_vector	idu._idev_vector
122 #define	idev_priority	idu._idev_priority
123 
124 /*
125  * register specification
126  */
127 typedef struct __ddi_regspec *ddi_regspec_t;
128 
129 /*
130  * interrupt specification
131  */
132 typedef struct __ddi_intrspec *ddi_intrspec_t;
133 
134 /*
135  * ddi_softintr_t is an obsolete data structure.
136  *
137  * soft interrupt id
138  */
139 typedef struct __ddi_softintr *ddi_softintr_t;
140 
141 /*
142  * opaque device info handle
143  */
144 typedef struct __dev_info *dev_info_t;
145 
146 /*
147  * Mapping cookie for devmap(9E)
148  */
149 typedef struct __ddi_devmap_data *ddi_devmap_data_t;
150 
151 /*
152  * Opaque Device id
153  */
154 typedef struct __ddi_devid *ddi_devid_t;
155 
156 /*
157  * Device id types
158  */
159 #define	DEVID_NONE		0
160 #define	DEVID_SCSI3_WWN		1
161 #define	DEVID_SCSI_SERIAL	2
162 #define	DEVID_FAB		3
163 #define	DEVID_ENCAP		4
164 #define	DEVID_ATA_SERIAL	5
165 #define	DEVID_SCSI3_VPD_T10	6
166 #define	DEVID_SCSI3_VPD_EUI	7
167 #define	DEVID_SCSI3_VPD_NAA	8
168 #define	DEVID_NVME_NSID		9
169 #define	DEVID_NVME_EUI64	10
170 #define	DEVID_NVME_NGUID	11
171 #define	DEVID_MAXTYPE		11
172 
173 /*
174  * Device id scsi encode versions (version of encode interface, not devid)
175  */
176 #define	DEVID_SCSI_ENCODE_VERSION1		0
177 #define	DEVID_SCSI_ENCODE_VERSION2		1
178 #define	DEVID_SCSI_ENCODE_VERSION_LATEST	DEVID_SCSI_ENCODE_VERSION2
179 
180 /*
181  * Device id smp encode versions (version of encode interface, not devid)
182  */
183 #define	DEVID_SMP_ENCODE_VERSION1		0
184 #define	DEVID_SMP_ENCODE_VERSION_LATEST		DEVID_SMP_ENCODE_VERSION1
185 
186 /* minor name values for devid lookup interfaces */
187 #define	DEVID_MINOR_NAME_ALL		((char *)0)
188 #define	DEVID_MINOR_NAME_ALL_CHR	((char *)1)
189 #define	DEVID_MINOR_NAME_ALL_BLK	((char *)2)
190 
191 /*
192  * Define ddi_devmap_cmd types. This should probably be elsewhere.
193  */
194 typedef enum {
195 	DDI_DEVMAP_VALIDATE = 0		/* Check mapping, but do nothing */
196 } ddi_devmap_cmd_t;
197 
198 /*
199  * Definitions for node state.
200  *
201  * NOTE: DS_ATTACHED and DS_READY should only be used by the devcfg.c state
202  * model code itself, other code should use i_ddi_devi_attached() to avoid
203  * logic errors associated with transient DS_READY->DS_ATTACHED->DS_READY
204  * state changes while the node is attached.
205  */
206 typedef enum {
207 	DS_INVAL = -1,
208 	DS_PROTO = 0,
209 	DS_LINKED,	/* in orphan list */
210 	DS_BOUND,	/* in per-driver list */
211 	DS_INITIALIZED, /* bus address assigned */
212 	DS_PROBED,	/* device known to exist */
213 	DS_ATTACHED,	/* don't use, see NOTE above: driver attached */
214 	DS_READY	/* don't use, see NOTE above: post attach complete */
215 } ddi_node_state_t;
216 
217 /*
218  * NDI Event Service
219  */
220 typedef enum {EPL_KERNEL, EPL_INTERRUPT, EPL_HIGHLEVEL} ddi_plevel_t;
221 typedef struct ddi_event_cookie *ddi_eventcookie_t;
222 typedef struct ddi_event_callbacks *ddi_callback_id_t;
223 typedef void (*ddi_event_cb_f)(dev_info_t *, ddi_eventcookie_t,
224     void *arg, void *impldata);
225 
226 #endif	/* !_ASM */
227 
228 #ifdef	_KERNEL
229 #ifndef _ASM
230 
231 /*
232  * Device Access Attributes
233  */
234 
235 typedef struct ddi_device_acc_attr {
236 	ushort_t devacc_attr_version;
237 	uchar_t devacc_attr_endian_flags;
238 	uchar_t devacc_attr_dataorder;
239 	uchar_t devacc_attr_access;		/* access error protection */
240 } ddi_device_acc_attr_t;
241 
242 #define	DDI_DEVICE_ATTR_V0	0x0001
243 #define	DDI_DEVICE_ATTR_V1	0x0002
244 
245 /*
246  * endian-ness flags
247  */
248 #define	 DDI_NEVERSWAP_ACC	0x00
249 #define	 DDI_STRUCTURE_LE_ACC	0x01
250 #define	 DDI_STRUCTURE_BE_ACC	0x02
251 
252 /*
253  * Data ordering values
254  */
255 #define	DDI_STRICTORDER_ACC	0x00
256 #define	DDI_UNORDERED_OK_ACC    0x01
257 #define	DDI_MERGING_OK_ACC	0x02
258 #define	DDI_LOADCACHING_OK_ACC  0x03
259 #define	DDI_STORECACHING_OK_ACC 0x04
260 
261 /*
262  * Data size
263  */
264 #define	DDI_DATA_SZ01_ACC	1
265 #define	DDI_DATA_SZ02_ACC	2
266 #define	DDI_DATA_SZ04_ACC	4
267 #define	DDI_DATA_SZ08_ACC	8
268 
269 /*
270  * Data Access Handle
271  */
272 #define	VERS_ACCHDL			0x0001
273 
274 typedef struct __ddi_acc_handle *ddi_acc_handle_t;
275 
276 typedef struct ddi_acc_hdl {
277 	int	ah_vers;		/* version number */
278 	void	*ah_bus_private;	/* bus private pointer */
279 	void	*ah_platform_private;	/* platform private pointer */
280 	dev_info_t *ah_dip;		/* requesting device */
281 
282 	uint_t	ah_rnumber;		/* register number */
283 	caddr_t	ah_addr;		/* address of mapping */
284 
285 	off_t	ah_offset;		/* offset of mapping */
286 	off_t	ah_len;			/* length of mapping */
287 	uint_t	ah_hat_flags;		/* hat flags used to map object */
288 	pfn_t	ah_pfn;			/* physical page frame number */
289 	uint_t	ah_pnum;		/* number of contiguous pages */
290 	ulong_t	ah_xfermodes;		/* data transfer modes, etc */
291 	ddi_device_acc_attr_t ah_acc;	/* device access attributes */
292 } ddi_acc_hdl_t;
293 
294 /*
295  * Used by DDI_CTLOPS_POKE and DDI_CTLOPS_PEEK for peek/poke and cautious acc
296  */
297 typedef struct {
298 	size_t			size;
299 	uintptr_t		dev_addr;
300 	uintptr_t		host_addr;
301 	ddi_acc_handle_t	handle;
302 	size_t			repcount;
303 	uint_t			flags;
304 } peekpoke_ctlops_t;
305 
306 /*
307  * Used by the high resolution timeout functions
308  */
309 typedef struct __ddi_periodic *ddi_periodic_t;
310 
311 #endif	/* !_ASM */
312 
313 /*
314  * devacc_attr_access error protection types
315  */
316 #define	DDI_DEFAULT_ACC		0x01	/* take default action */
317 #define	DDI_FLAGERR_ACC		0x02	/* protected against access faults */
318 #define	DDI_CAUTIOUS_ACC	0x03	/* high protection against faults */
319 
320 #endif	/* _KERNEL */
321 
322 #ifdef	__cplusplus
323 }
324 #endif
325 
326 #endif	/* _SYS_DDITYPES_H */
327