| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 127 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC()
187 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeVectorFCMPPredToAArch64CC()
|
| H A D | AArch64InstructionSelector.cpp | 1381 AArch64CC::CondCode &CondCode, in changeFPCCToORAArch64CC()
1438 AArch64CC::CondCode &CondCode, in changeFPCCToANDAArch64CC()
5097 AArch64CC::CondCode CondCode; in tryOptSelect() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiCondCode.h | 10 enum CondCode { enum
|
| H A D | LanaiInstrInfo.cpp | 522 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/MCTargetDesc/ |
| H A D | ARCInfo.h | 24 enum CondCode { enum
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.h | 34 enum CondCode { enum
|
| H A D | M68kISelLowering.cpp | 2284 unsigned CondCode = Cond.getConstantOperandVal(0); in LowerSELECT() local
2381 unsigned CondCode = CC->getAsZExtVal(); in LowerSELECT() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SpeculationHardening.cpp | 221 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode()
242 AArch64CC::CondCode CondCode; in instrumentControlFlow() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsInstPrinter.h | 32 enum CondCode { enum
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 37 enum CondCode { enum
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VE.h | 43 enum CondCode { enum
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.cpp | 33 enum CondCode { enum
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 1056 LPCC::CondCode CondCode = in splitMnemonic() local
1076 LPCC::CondCode CondCode = LPCC::suffixToLanaiCondCode(Mnemonic); in splitMnemonic() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 334 unsigned CondCode; in parseJccInstruction() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 254 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 77 enum CondCode { enum
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 869 VECC::CondCode CondCode = in parseCC() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 1650 ISD::CondCode CondCode = (ISD::CondCode)Cond.getImm(); in EmitInstrWithCustomInserter() local
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1685 enum CondCode { enum
|
| H A D | TargetLowering.h | 5778 virtual bool isXAndYEqZeroPreferableToXAndYEqY(ISD::CondCode, EVT) const { in isXAndYEqZeroPreferableToXAndYEqY()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2051 static void FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode, in FPCCToARMCC()
4938 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); in getARMCmp() local
5258 static void checkVSELConstraints(ISD::CondCode CC, ARMCC::CondCodes &CondCode, in checkVSELConstraints()
5625 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); in LowerSELECT_CC() local
5641 ARMCC::CondCodes CondCode, CondCode2; in LowerSELECT_CC() local
5782 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); in OptimizeVFPBrcond() local
5815 ARMCC::CondCodes CondCode = in LowerBRCOND() local
5866 ARMCC::CondCodes CondCode = in LowerBR_CC() local
5889 ARMCC::CondCodes CondCode, CondCode2; in LowerBR_CC() local
10594 ARMCC::CondCodes CondCode, CondCode2; in LowerFSETCC() local
|
| H A D | ARMBaseInstrInfo.cpp | 2219 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 366 SDValue NVPTXDAGToDAGISel::getPTXCmpMode(const CondCodeSDNode &CondCode) { in getPTXCmpMode()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2909 unsigned BaseOpc, CondCode; in fastLowerIntrinsicCall() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 6077 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl); in Select() local
|