1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2022 Ruslan Bukin <br@bsdpad.com> 5 * Copyright (c) 2023 Arm Ltd 6 * 7 * This work was supported by Innovate UK project 105694, "Digital Security 8 * by Design (DSbD) Technology Platform Prototype". 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #ifndef _ARM64_SCMI_SCMI_CLK_H_ 33 #define _ARM64_SCMI_SCMI_CLK_H_ 34 35 /* 36 * SCMI Clock Protocol 37 */ 38 39 struct scmi_clk_protocol_attrs_out { 40 uint32_t attributes; 41 #define CLK_ATTRS_NCLOCKS_S 0 42 #define CLK_ATTRS_NCLOCKS_M (0xffff << CLK_ATTRS_NCLOCKS_S) 43 }; 44 45 struct scmi_clk_attrs_in { 46 uint32_t clock_id; 47 }; 48 49 struct scmi_clk_attrs_out { 50 uint32_t attributes; 51 #define CLK_ATTRS_RATE_CHANGE_NOTIFY_SUPP (1 << 31) 52 #define CLK_ATTRS_RATE_REQ_CHANGE_NOTIFY_SUPP (1 << 30) 53 #define CLK_ATTRS_EXT_CLK_NAME (1 << 29) 54 #define CLK_ATTRS_ENABLED (1 << 0) 55 uint8_t clock_name[16]; /* only if attrs bit 29 unset */ 56 uint32_t clock_enable_delay; /* worst case */ 57 }; 58 59 struct scmi_clk_name_get_in { 60 uint32_t clock_id; 61 }; 62 63 struct scmi_clk_name_get_out { 64 uint32_t flags; 65 uint8_t name[64]; 66 }; 67 68 enum scmi_clock_message_id { 69 SCMI_CLOCK_ATTRIBUTES = 0x3, 70 SCMI_CLOCK_RATE_SET = 0x5, 71 SCMI_CLOCK_RATE_GET = 0x6, 72 SCMI_CLOCK_CONFIG_SET = 0x7, 73 SCMI_CLOCK_NAME_GET = 0x8, 74 }; 75 76 #define SCMI_CLK_RATE_ASYNC_NOTIFY (1 << 0) 77 #define SCMI_CLK_RATE_ASYNC_NORESP (1 << 0 | 1 << 1) 78 #define SCMI_CLK_RATE_ROUND_DOWN 0 79 #define SCMI_CLK_RATE_ROUND_UP (1 << 2) 80 #define SCMI_CLK_RATE_ROUND_CLOSEST (1 << 3) 81 82 struct scmi_clk_state_in { 83 uint32_t clock_id; 84 uint32_t attributes; 85 }; 86 87 struct scmi_clk_rate_get_in { 88 uint32_t clock_id; 89 }; 90 91 struct scmi_clk_rate_get_out { 92 uint32_t rate_lsb; 93 uint32_t rate_msb; 94 }; 95 96 struct scmi_clk_rate_set_in { 97 uint32_t flags; 98 uint32_t clock_id; 99 uint32_t rate_lsb; 100 uint32_t rate_msb; 101 }; 102 103 #endif /* !_ARM64_SCMI_SCMI_CLK_H_ */ 104