1 //===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise X86 hardware features. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_TARGETPARSER_X86TARGETPARSER_H 14 #define LLVM_TARGETPARSER_X86TARGETPARSER_H 15 16 #include "llvm/ADT/ArrayRef.h" 17 #include "llvm/ADT/StringMap.h" 18 #include "llvm/Support/Compiler.h" 19 #include <array> 20 21 namespace llvm { 22 template <typename T> class SmallVectorImpl; 23 class StringRef; 24 25 namespace X86 { 26 27 // This should be kept in sync with libcc/compiler-rt as its included by clang 28 // as a proxy for what's in libgcc/compiler-rt. 29 enum ProcessorVendors : unsigned { 30 VENDOR_DUMMY, 31 #define X86_VENDOR(ENUM, STRING) \ 32 ENUM, 33 #include "llvm/TargetParser/X86TargetParser.def" 34 VENDOR_OTHER 35 }; 36 37 // This should be kept in sync with libcc/compiler-rt as its included by clang 38 // as a proxy for what's in libgcc/compiler-rt. 39 enum ProcessorTypes : unsigned { 40 CPU_TYPE_DUMMY, 41 #define X86_CPU_TYPE(ENUM, STRING) \ 42 ENUM, 43 #include "llvm/TargetParser/X86TargetParser.def" 44 CPU_TYPE_MAX 45 }; 46 47 // This should be kept in sync with libcc/compiler-rt as its included by clang 48 // as a proxy for what's in libgcc/compiler-rt. 49 enum ProcessorSubtypes : unsigned { 50 CPU_SUBTYPE_DUMMY, 51 #define X86_CPU_SUBTYPE(ENUM, STRING) \ 52 ENUM, 53 #include "llvm/TargetParser/X86TargetParser.def" 54 CPU_SUBTYPE_MAX 55 }; 56 57 // This should be kept in sync with libcc/compiler-rt as it should be used 58 // by clang as a proxy for what's in libgcc/compiler-rt. 59 enum ProcessorFeatures { 60 #define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM, 61 #include "llvm/TargetParser/X86TargetParser.def" 62 CPU_FEATURE_MAX, 63 64 #define X86_MICROARCH_LEVEL(ENUM, STRING, PRIORITY) FEATURE_##ENUM = PRIORITY, 65 #include "llvm/TargetParser/X86TargetParser.def" 66 }; 67 68 enum CPUKind { 69 CK_None, 70 CK_i386, 71 CK_i486, 72 CK_WinChipC6, 73 CK_WinChip2, 74 CK_C3, 75 CK_i586, 76 CK_Pentium, 77 CK_PentiumMMX, 78 CK_PentiumPro, 79 CK_i686, 80 CK_Pentium2, 81 CK_Pentium3, 82 CK_PentiumM, 83 CK_C3_2, 84 CK_Yonah, 85 CK_Pentium4, 86 CK_Prescott, 87 CK_Nocona, 88 CK_Core2, 89 CK_Penryn, 90 CK_Bonnell, 91 CK_Silvermont, 92 CK_Goldmont, 93 CK_GoldmontPlus, 94 CK_Tremont, 95 CK_Gracemont, 96 CK_Nehalem, 97 CK_Westmere, 98 CK_SandyBridge, 99 CK_IvyBridge, 100 CK_Haswell, 101 CK_Broadwell, 102 CK_SkylakeClient, 103 CK_SkylakeServer, 104 CK_Cascadelake, 105 CK_Cooperlake, 106 CK_Cannonlake, 107 CK_IcelakeClient, 108 CK_Rocketlake, 109 CK_IcelakeServer, 110 CK_Tigerlake, 111 CK_SapphireRapids, 112 CK_Alderlake, 113 CK_Raptorlake, 114 CK_Meteorlake, 115 CK_Arrowlake, 116 CK_ArrowlakeS, 117 CK_Lunarlake, 118 CK_Pantherlake, 119 CK_Sierraforest, 120 CK_Grandridge, 121 CK_Graniterapids, 122 CK_GraniterapidsD, 123 CK_Emeraldrapids, 124 CK_Clearwaterforest, 125 CK_Diamondrapids, 126 CK_KNL, 127 CK_KNM, 128 CK_Lakemont, 129 CK_K6, 130 CK_K6_2, 131 CK_K6_3, 132 CK_Athlon, 133 CK_AthlonXP, 134 CK_K8, 135 CK_K8SSE3, 136 CK_AMDFAM10, 137 CK_BTVER1, 138 CK_BTVER2, 139 CK_BDVER1, 140 CK_BDVER2, 141 CK_BDVER3, 142 CK_BDVER4, 143 CK_ZNVER1, 144 CK_ZNVER2, 145 CK_ZNVER3, 146 CK_ZNVER4, 147 CK_ZNVER5, 148 CK_x86_64, 149 CK_x86_64_v2, 150 CK_x86_64_v3, 151 CK_x86_64_v4, 152 CK_Geode, 153 }; 154 155 /// Parse \p CPU string into a CPUKind. Will only accept 64-bit capable CPUs if 156 /// \p Only64Bit is true. 157 LLVM_ABI CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false); 158 LLVM_ABI CPUKind parseTuneCPU(StringRef CPU, bool Only64Bit = false); 159 160 /// Provide a list of valid CPU names. If \p Only64Bit is true, the list will 161 /// only contain 64-bit capable CPUs. 162 LLVM_ABI void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, 163 bool Only64Bit = false); 164 /// Provide a list of valid -mtune names. 165 LLVM_ABI void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values, 166 bool Only64Bit = false); 167 168 /// Get the key feature prioritizing target multiversioning. 169 LLVM_ABI ProcessorFeatures getKeyFeature(CPUKind Kind); 170 171 /// Fill in the features that \p CPU supports into \p Features. 172 /// "+" will be append in front of each feature if NeedPlus is true. 173 LLVM_ABI void getFeaturesForCPU(StringRef CPU, 174 SmallVectorImpl<StringRef> &Features, 175 bool NeedPlus = false); 176 177 /// Set or clear entries in \p Features that are implied to be enabled/disabled 178 /// by the provided \p Feature. 179 LLVM_ABI void updateImpliedFeatures(StringRef Feature, bool Enabled, 180 StringMap<bool> &Features); 181 182 LLVM_ABI char getCPUDispatchMangling(StringRef Name); 183 LLVM_ABI bool validateCPUSpecificCPUDispatch(StringRef Name); 184 LLVM_ABI std::array<uint32_t, 4> 185 getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs); 186 LLVM_ABI unsigned getFeaturePriority(ProcessorFeatures Feat); 187 188 } // namespace X86 189 } // namespace llvm 190 191 #endif 192