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Searched defs:BaseOpc (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DMatchContext.h86 auto BaseOpc = ISD::getBaseOpcodeForVP(OpVal->getOpcode(), in match() local
H A DLegalizeVectorTypes.cpp1028 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(N->getOpcode()); ScalarizeVecOp_VECREDUCE_SEQ() local
7176 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Opc); WidenVecOp_VECREDUCE() local
7214 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Opc); WidenVecOp_VECREDUCE_SEQ() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp427 int getMTBUFOpcode(unsigned BaseOpc, unsigned Elements) { in getMTBUFOpcode()
457 int getMUBUFOpcode(unsigned BaseOpc, unsigned Elements) { in getMUBUFOpcode()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp704 int BaseOpc = isThumb2 ? (BaseKill && Base == ARM::SP ? ARM::t2ADDspImm in CreateLoadStoreMulti() local
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp2873 unsigned BaseOpc, CondCode; in fastLowerIntrinsicCall() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3219 unsigned BaseOpc = BO.first.getOpcode(); in LowerUnalignedLoad() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp9740 unsigned BaseOpc; lowerVectorMaskVecReduction() local
9836 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Op.getOpcode()); lowerVECREDUCE() local