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Searched defs:Base1 (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MachineScheduler.cpp39 const MachineOperand &Base1 = AArch64InstrInfo::getLdStBaseOp(MI1); in mayOverlapWrite() local
/freebsd/contrib/llvm-project/clang/lib/AST/
H A DASTStructuralEquivalence.cpp1726 for (CXXRecordDecl::base_class_iterator Base1 = D1CXX->bases_begin(), in IsStructurallyEquivalent() local
1809 const CXXBaseSpecifier *Base1 = D1CXX->bases_begin(); in IsStructurallyEquivalent() local
H A DASTImporter.cpp2288 for (const auto &Base1 : FromCXX->bases()) { in ImportDefinition() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp2668 auto Base1 = MO1->getValue(); memOpsHaveSameBasePtr() local
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DConstants.cpp2151 auto *Base1 = getAddrDiscriminator()->stripAndAccumulateConstantOffsets( in isKnownCompatibleWith() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2932 const MachineOperand *Base1 = nullptr, *Base2 = nullptr; in shouldClusterMemOps() local
H A DPPCISelLowering.cpp13834 SDValue Base1 = Loc, Base2 = BaseLoc; in isConsecutiveLSLoc() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3234 SDValue Base1 = DAG.getMemBasePlusOffset( in LowerUnalignedLoad() local
H A DHexagonISelLoweringHVX.cpp2978 SDValue Base1 = DAG.getMemBasePlusOffset(Base0, TypeSize::Fixed(HwLen), dl); SplitHvxMemOp() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp536 auto Base1 = MO1->getValue(); in memOpsHaveSameBasePtr() local