xref: /freebsd/sys/dev/bnxt/bnxt_re/bnxt_re-abi.h (revision acd884dec99adcf8c4cdd0aa8a50be79c216f8e8)
1 /*
2  * Copyright (c) 2015-2024, Broadcom. All rights reserved.  The term
3  * Broadcom refers to Broadcom Limited and/or its subsidiaries.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in
13  *    the documentation and/or other materials provided with the
14  *    distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * Description: Uverbs ABI header file
29  */
30 
31 #ifndef __BNXT_RE_UVERBS_ABI_H__
32 #define __BNXT_RE_UVERBS_ABI_H__
33 
34 #include <asm/types.h>
35 #include <linux/types.h>
36 
37 #define BNXT_RE_ABI_VERSION	6
38 
39 enum {
40 	BNXT_RE_COMP_MASK_UCNTX_WC_DPI_ENABLED = 0x01,
41 	BNXT_RE_COMP_MASK_UCNTX_POW2_DISABLED = 0x02,
42 	BNXT_RE_COMP_MASK_UCNTX_RSVD_WQE_DISABLED = 0x04,
43 	BNXT_RE_COMP_MASK_UCNTX_MQP_EX_SUPPORTED = 0x08,
44 	BNXT_RE_COMP_MASK_UCNTX_DBR_PACING_ENABLED = 0x10,
45 	BNXT_RE_COMP_MASK_UCNTX_DBR_RECOVERY_ENABLED = 0x20,
46 	BNXT_RE_COMP_MASK_UCNTX_HW_RETX_ENABLED = 0x40
47 };
48 
49 enum {
50 	BNXT_RE_COMP_MASK_REQ_UCNTX_POW2_SUPPORT = 0x01,
51 	BNXT_RE_COMP_MASK_REQ_UCNTX_RSVD_WQE = 0x02
52 };
53 
54 struct bnxt_re_uctx_req {
55 	__aligned_u64 comp_mask;
56 };
57 
58 #define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT		0x00
59 #define BNXT_RE_CHIP_ID0_CHIP_REV_SFT		0x10
60 #define BNXT_RE_CHIP_ID0_CHIP_MET_SFT		0x18
61 struct bnxt_re_uctx_resp {
62 	__u32 dev_id;
63 	__u32 max_qp;
64 	__u32 pg_size;
65 	__u32 cqe_sz;
66 	__u32 max_cqd;
67 	__u32 chip_id0;
68 	__u32 chip_id1;
69 	__u32 modes;
70 	__aligned_u64 comp_mask;
71 } __attribute__((packed));
72 
73 enum {
74 	BNXT_RE_COMP_MASK_PD_HAS_WC_DPI = 0x01,
75 	BNXT_RE_COMP_MASK_PD_HAS_DBR_BAR_ADDR = 0x02,
76 };
77 
78 struct bnxt_re_pd_resp {
79 	__u32 pdid;
80 	__u32 dpi;
81 	__u64 dbr;
82 	__u64 comp_mask;
83 	__u32 wcdpi;
84 	__u64 dbr_bar_addr;
85 } __attribute__((packed));
86 
87 enum {
88 	BNXT_RE_COMP_MASK_CQ_HAS_DB_INFO = 0x01,
89 	BNXT_RE_COMP_MASK_CQ_HAS_WC_DPI = 0x02,
90 	BNXT_RE_COMP_MASK_CQ_HAS_CQ_PAGE = 0x04,
91 };
92 
93 enum {
94 	BNXT_RE_COMP_MASK_CQ_REQ_HAS_CAP_MASK = 0x1
95 };
96 
97 enum {
98 	BNXT_RE_COMP_MASK_CQ_REQ_CAP_DBR_RECOVERY = 0x1,
99 	BNXT_RE_COMP_MASK_CQ_REQ_CAP_DBR_PACING_NOTIFY = 0x2
100 };
101 
102 #define BNXT_RE_IS_DBR_PACING_NOTIFY_CQ(_req)				\
103 	(_req.comp_mask & BNXT_RE_COMP_MASK_CQ_REQ_HAS_CAP_MASK &&	\
104 	 _req.cq_capability & BNXT_RE_COMP_MASK_CQ_REQ_CAP_DBR_PACING_NOTIFY)
105 
106 #define BNXT_RE_IS_DBR_RECOV_CQ(_req)					\
107 	(_req.comp_mask & BNXT_RE_COMP_MASK_CQ_REQ_HAS_CAP_MASK &&	\
108 	 _req.cq_capability & BNXT_RE_COMP_MASK_CQ_REQ_CAP_DBR_RECOVERY)
109 
110 struct bnxt_re_cq_req {
111 	__u64 cq_va;
112 	__u64 cq_handle;
113 	__aligned_u64 comp_mask;
114 	__u16 cq_capability;
115 } __attribute__((packed));
116 
117 struct bnxt_re_cq_resp {
118 	__u32 cqid;
119 	__u32 tail;
120 	__u32 phase;
121 	__u32 rsvd;
122 	__aligned_u64 comp_mask;
123 	__u32 dpi;
124 	__u64 dbr;
125 	__u32 wcdpi;
126 	__u64 uctx_cq_page;
127 } __attribute__((packed));
128 
129 struct bnxt_re_resize_cq_req {
130 	__u64 cq_va;
131 } __attribute__((packed));
132 
133 struct bnxt_re_qp_req {
134 	__u64 qpsva;
135 	__u64 qprva;
136 	__u64 qp_handle;
137 } __attribute__((packed));
138 
139 struct bnxt_re_qp_resp {
140 	__u32 qpid;
141 } __attribute__((packed));
142 
143 struct bnxt_re_srq_req {
144 	__u64 srqva;
145 	__u64 srq_handle;
146 } __attribute__((packed));
147 
148 struct bnxt_re_srq_resp {
149 	__u32 srqid;
150 } __attribute__((packed));
151 
152 /* Modify QP */
153 enum {
154 	BNXT_RE_COMP_MASK_MQP_EX_PPP_REQ_EN_MASK = 0x1,
155 	BNXT_RE_COMP_MASK_MQP_EX_PPP_REQ_EN	 = 0x1,
156 	BNXT_RE_COMP_MASK_MQP_EX_PATH_MTU_MASK	 = 0x2
157 };
158 
159 struct bnxt_re_modify_qp_ex_req {
160 	__aligned_u64 comp_mask;
161 	__u32 dpi;
162 	__u32 rsvd;
163 } __packed;
164 
165 struct bnxt_re_modify_qp_ex_resp {
166 	__aligned_u64 comp_mask;
167 	__u32 ppp_st_idx;
168 	__u32 path_mtu;
169 } __packed;
170 
171 enum bnxt_re_shpg_offt {
172 	BNXT_RE_BEG_RESV_OFFT	= 0x00,
173 	BNXT_RE_AVID_OFFT	= 0x10,
174 	BNXT_RE_AVID_SIZE	= 0x04,
175 	BNXT_RE_END_RESV_OFFT	= 0xFF0
176 };
177 #endif
178