1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2021 Broadcom Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation. 8 */ 9 10 #ifndef BNXT_PTP_H 11 #define BNXT_PTP_H 12 13 #include <linux/ptp_clock_kernel.h> 14 #include <linux/timecounter.h> 15 16 #define BNXT_PTP_GRC_WIN 6 17 #define BNXT_PTP_GRC_WIN_BASE 0x6000 18 19 #define BNXT_MAX_PHC_DRIFT 31000000 20 #define BNXT_CYCLES_SHIFT 23 21 #define BNXT_DEVCLK_FREQ 1000000 22 #define BNXT_LO_TIMER_MASK 0x0000ffffffffUL 23 #define BNXT_HI_TIMER_MASK 0xffff00000000UL 24 25 #define BNXT_PTP_DFLT_TX_TMO 1000 /* ms */ 26 #define BNXT_PTP_QTS_TIMEOUT 1000 27 #define BNXT_PTP_QTS_MAX_TMO_US 65535U 28 #define BNXT_PTP_QTS_TX_ENABLES (PORT_TS_QUERY_REQ_ENABLES_PTP_SEQ_ID | \ 29 PORT_TS_QUERY_REQ_ENABLES_TS_REQ_TIMEOUT | \ 30 PORT_TS_QUERY_REQ_ENABLES_PTP_HDR_OFFSET) 31 32 struct pps_pin { 33 u8 event; 34 u8 usage; 35 u8 state; 36 }; 37 38 #define TSIO_PIN_VALID(pin) ((pin) >= 0 && (pin) < (BNXT_MAX_TSIO_PINS)) 39 40 #define EVENT_DATA2_PPS_EVENT_TYPE(data2) \ 41 ((data2) & ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE) 42 43 #define EVENT_DATA2_PPS_PIN_NUM(data2) \ 44 (((data2) & \ 45 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_MASK) >>\ 46 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_SFT) 47 48 #define BNXT_DATA2_UPPER_MSK \ 49 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_MASK 50 51 #define BNXT_DATA2_UPPER_SFT \ 52 (32 - \ 53 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_SFT) 54 55 #define BNXT_DATA1_LOWER_MSK \ 56 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_MASK 57 58 #define BNXT_DATA1_LOWER_SFT \ 59 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_SFT 60 61 #define EVENT_PPS_TS(data2, data1) \ 62 (((u64)((data2) & BNXT_DATA2_UPPER_MSK) << BNXT_DATA2_UPPER_SFT) |\ 63 (((data1) & BNXT_DATA1_LOWER_MSK) >> BNXT_DATA1_LOWER_SFT)) 64 65 #define BNXT_PPS_PIN_DISABLE 0 66 #define BNXT_PPS_PIN_ENABLE 1 67 #define BNXT_PPS_PIN_NONE 0 68 #define BNXT_PPS_PIN_PPS_IN 1 69 #define BNXT_PPS_PIN_PPS_OUT 2 70 #define BNXT_PPS_PIN_SYNC_IN 3 71 #define BNXT_PPS_PIN_SYNC_OUT 4 72 73 #define BNXT_PPS_EVENT_INTERNAL 1 74 #define BNXT_PPS_EVENT_EXTERNAL 2 75 76 struct bnxt_pps { 77 u8 num_pins; 78 #define BNXT_MAX_TSIO_PINS 4 79 struct pps_pin pins[BNXT_MAX_TSIO_PINS]; 80 }; 81 82 struct bnxt_ptp_stats { 83 u64 ts_pkts; 84 u64 ts_lost; 85 atomic64_t ts_err; 86 }; 87 88 #define BNXT_MAX_TX_TS 4 89 #define NEXT_TXTS(idx) (((idx) + 1) & (BNXT_MAX_TX_TS - 1)) 90 91 struct bnxt_ptp_tx_req { 92 struct sk_buff *tx_skb; 93 u16 tx_seqid; 94 u16 tx_hdr_off; 95 unsigned long abs_txts_tmo; 96 }; 97 98 struct bnxt_ptp_cfg { 99 struct ptp_clock_info ptp_info; 100 struct ptp_clock *ptp_clock; 101 struct cyclecounter cc; 102 struct timecounter tc; 103 struct bnxt_pps pps_info; 104 /* serialize timecounter access */ 105 spinlock_t ptp_lock; 106 /* serialize ts tx request queuing */ 107 spinlock_t ptp_tx_lock; 108 u64 current_time; 109 u64 old_time; 110 unsigned long next_period; 111 unsigned long next_overflow_check; 112 u32 cmult; 113 /* a 23b shift cyclecounter will overflow in ~36 mins. Check overflow every 18 mins. */ 114 #define BNXT_PHC_OVERFLOW_PERIOD (18 * 60 * HZ) 115 116 struct bnxt_ptp_tx_req txts_req[BNXT_MAX_TX_TS]; 117 118 struct bnxt *bp; 119 u32 tx_avail; 120 u16 rxctl; 121 #define BNXT_PTP_MSG_SYNC (1 << 0) 122 #define BNXT_PTP_MSG_DELAY_REQ (1 << 1) 123 #define BNXT_PTP_MSG_PDELAY_REQ (1 << 2) 124 #define BNXT_PTP_MSG_PDELAY_RESP (1 << 3) 125 #define BNXT_PTP_MSG_FOLLOW_UP (1 << 8) 126 #define BNXT_PTP_MSG_DELAY_RESP (1 << 9) 127 #define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP (1 << 10) 128 #define BNXT_PTP_MSG_ANNOUNCE (1 << 11) 129 #define BNXT_PTP_MSG_SIGNALING (1 << 12) 130 #define BNXT_PTP_MSG_MANAGEMENT (1 << 13) 131 #define BNXT_PTP_MSG_EVENTS (BNXT_PTP_MSG_SYNC | \ 132 BNXT_PTP_MSG_DELAY_REQ | \ 133 BNXT_PTP_MSG_PDELAY_REQ | \ 134 BNXT_PTP_MSG_PDELAY_RESP) 135 u8 tx_tstamp_en:1; 136 int rx_filter; 137 u32 tstamp_filters; 138 139 u32 refclk_regs[2]; 140 u32 refclk_mapped_regs[2]; 141 u32 txts_tmo; 142 u16 txts_prod; 143 u16 txts_cons; 144 145 struct bnxt_ptp_stats stats; 146 }; 147 148 #if BITS_PER_LONG == 32 149 #define BNXT_READ_TIME64(ptp, dst, src) \ 150 do { \ 151 unsigned long flags; \ 152 \ 153 spin_lock_irqsave(&(ptp)->ptp_lock, flags); \ 154 (dst) = (src); \ 155 spin_unlock_irqrestore(&(ptp)->ptp_lock, flags); \ 156 } while (0) 157 #else 158 #define BNXT_READ_TIME64(ptp, dst, src) \ 159 ((dst) = READ_ONCE(src)) 160 #endif 161 162 #define BNXT_PTP_INC_TX_AVAIL(ptp) \ 163 do { \ 164 spin_lock_bh(&(ptp)->ptp_tx_lock); \ 165 (ptp)->tx_avail++; \ 166 spin_unlock_bh(&(ptp)->ptp_tx_lock); \ 167 } while (0) 168 169 int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id, u16 *hdr_off); 170 void bnxt_ptp_update_current_time(struct bnxt *bp); 171 void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2); 172 int bnxt_ptp_cfg_tstamp_filters(struct bnxt *bp); 173 void bnxt_ptp_reapply_pps(struct bnxt *bp); 174 int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr); 175 int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr); 176 int bnxt_ptp_get_txts_prod(struct bnxt_ptp_cfg *ptp, u16 *prod); 177 void bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb, u16 prod); 178 int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts); 179 void bnxt_tx_ts_cmp(struct bnxt *bp, struct bnxt_napi *bnapi, 180 struct tx_ts_cmp *tscmp); 181 void bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg *ptp, u64 ns); 182 int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg); 183 int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg); 184 void bnxt_ptp_clear(struct bnxt *bp); 185 #endif 186