1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 2017 The FreeBSD Foundation
6 * All rights reserved.
7 *
8 * Portions of this software were developed by Landon Fuller
9 * under sponsorship from the FreeBSD Foundation.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer,
16 * without modification.
17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
18 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
19 * redistribution must be conditioned upon including a substantially
20 * similar Disclaimer requirement for further binary redistribution.
21 *
22 * NO WARRANTY
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
26 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
27 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
28 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
31 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGES.
34 *
35 */
36
37 #ifndef _BHND_BHND_TYPES_H_
38 #define _BHND_BHND_TYPES_H_
39
40 #include <sys/types.h>
41
42 #include "nvram/bhnd_nvram.h"
43
44 /** bhnd(4) device classes. */
45 typedef enum {
46 BHND_DEVCLASS_CC, /**< chipcommon i/o controller */
47 BHND_DEVCLASS_CC_B, /**< chipcommon auxiliary controller */
48 BHND_DEVCLASS_PMU, /**< pmu controller */
49 BHND_DEVCLASS_PCI, /**< pci host/device bridge */
50 BHND_DEVCLASS_PCIE, /**< pcie host/device bridge */
51 BHND_DEVCLASS_PCCARD, /**< pcmcia host/device bridge */
52 BHND_DEVCLASS_RAM, /**< internal RAM/SRAM */
53 BHND_DEVCLASS_MEMC, /**< memory controller */
54 BHND_DEVCLASS_ENET, /**< 802.3 MAC/PHY */
55 BHND_DEVCLASS_ENET_MAC, /**< 802.3 MAC */
56 BHND_DEVCLASS_ENET_PHY, /**< 802.3 PHY */
57 BHND_DEVCLASS_WLAN, /**< 802.11 MAC/PHY/Radio */
58 BHND_DEVCLASS_WLAN_MAC, /**< 802.11 MAC */
59 BHND_DEVCLASS_WLAN_PHY, /**< 802.11 PHY */
60 BHND_DEVCLASS_CPU, /**< cpu core */
61 BHND_DEVCLASS_SOC_ROUTER, /**< interconnect router */
62 BHND_DEVCLASS_SOC_BRIDGE, /**< interconnect host bridge */
63 BHND_DEVCLASS_EROM, /**< bus device enumeration ROM */
64 BHND_DEVCLASS_NVRAM, /**< nvram/flash controller */
65 BHND_DEVCLASS_USB_HOST, /**< USB host controller */
66 BHND_DEVCLASS_USB_DEV, /**< USB device controller */
67 BHND_DEVCLASS_USB_DUAL, /**< USB host/device controller */
68 BHND_DEVCLASS_SOFTMODEM, /**< analog/PSTN softmodem codec */
69
70 BHND_DEVCLASS_OTHER = 1000, /**< other / unknown */
71 BHND_DEVCLASS_INVALID /**< no/invalid class */
72 } bhnd_devclass_t;
73
74 /** bhnd(4) platform services. */
75 typedef enum {
76 BHND_SERVICE_CHIPC, /**< chipcommon service; implements the bhnd_chipc interface */
77 BHND_SERVICE_PWRCTL, /**< legacy pwrctl service; implements the bhnd_pwrctl interface */
78 BHND_SERVICE_PMU, /**< pmu service; implements the bhnd_pmu interface */
79 BHND_SERVICE_NVRAM, /**< nvram service; implements the bhnd_nvram interface */
80 BHND_SERVICE_GPIO, /**< gpio service; implements the standard gpio interface */
81
82 BHND_SERVICE_ANY = 1000, /**< match on any service type */
83 } bhnd_service_t;
84
85 /**
86 * bhnd(4) port types.
87 *
88 * Only BHND_PORT_DEVICE is guaranteed to be supported by all bhnd(4) bus
89 * implementations.
90 */
91 typedef enum {
92 BHND_PORT_DEVICE = 0, /**< device memory */
93 BHND_PORT_BRIDGE = 1, /**< bridge memory */
94 BHND_PORT_AGENT = 2, /**< interconnect agent/wrapper */
95 } bhnd_port_type;
96
97 /**
98 * bhnd(4) attachment types.
99 */
100 typedef enum {
101 BHND_ATTACH_ADAPTER = 0, /**< A bridged card, such as a PCI WiFi chipset */
102 BHND_ATTACH_NATIVE = 1 /**< A bus resident on the native host, such as
103 * the primary or secondary bus of an embedded
104 * SoC */
105 } bhnd_attach_type;
106
107 /**
108 * bhnd(4) clock types.
109 */
110 typedef enum {
111 /**
112 * Dynamically select an appropriate clock source based on all
113 * outstanding clock requests.
114 */
115 BHND_CLOCK_DYN = (1 << 0),
116
117 /**
118 * Idle Low-Power (ILP).
119 *
120 * No register access is required, or long request latency is
121 * acceptable.
122 */
123 BHND_CLOCK_ILP = (1 << 1),
124
125 /**
126 * Active Low-Power (ALP).
127 *
128 * Low-latency register access and low-rate DMA.
129 */
130 BHND_CLOCK_ALP = (1 << 2),
131
132 /**
133 * High Throughput (HT).
134 *
135 * High bus throughput and lowest-latency register access.
136 */
137 BHND_CLOCK_HT = (1 << 3)
138 } bhnd_clock;
139
140 /**
141 * Given two clock types, return the type with the highest precedence.
142 */
143 static inline bhnd_clock
bhnd_clock_max(bhnd_clock a,bhnd_clock b)144 bhnd_clock_max(bhnd_clock a, bhnd_clock b) {
145 return (a > b ? a : b);
146 }
147
148 /**
149 * bhnd(4) clock sources.
150 */
151 typedef enum {
152 /**
153 * Clock is provided by the PCI bus clock
154 */
155 BHND_CLKSRC_PCI = 0,
156
157 /** Clock is provided by a crystal. */
158 BHND_CLKSRC_XTAL = 1,
159
160 /** Clock is provided by a low power oscillator. */
161 BHND_CLKSRC_LPO = 2,
162
163 /** Clock source is unknown */
164 BHND_CLKSRC_UNKNOWN = 3
165 } bhnd_clksrc;
166
167 /** Evaluates to true if @p cls is a device class that can be configured
168 * as a host bridge device. */
169 #define BHND_DEVCLASS_SUPPORTS_HOSTB(cls) \
170 ((cls) == BHND_DEVCLASS_PCI || (cls) == BHND_DEVCLASS_PCIE || \
171 (cls) == BHND_DEVCLASS_PCCARD)
172
173 /**
174 * BHND bus address.
175 *
176 * @note While the interconnect may support 64-bit addressing, not
177 * all bridges and SoC CPUs will.
178 */
179 typedef uint64_t bhnd_addr_t;
180 #define BHND_ADDR_MAX UINT64_MAX /**< Maximum bhnd_addr_t value */
181
182 /** BHND bus size. */
183 typedef uint64_t bhnd_size_t;
184 #define BHND_SIZE_MAX UINT64_MAX /**< Maximum bhnd_size_t value */
185
186 #endif /* _BHND_BHND_TYPES_H_ */
187