1 /*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 */ 30 31 #ifndef _BHND_BHNDB_H_ 32 #define _BHND_BHNDB_H_ 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 37 #include <machine/bus.h> 38 #include <sys/rman.h> 39 #include <machine/resource.h> 40 41 #include <dev/bhnd/bhnd.h> 42 43 #include "bhndb_bus_if.h" 44 45 DECLARE_CLASS(bhnd_bhndb_driver); 46 47 int bhndb_attach_bridge(device_t parent, device_t *bhndb, int unit); 48 49 /** 50 * bhndb register window types. 51 */ 52 typedef enum { 53 BHNDB_REGWIN_T_CORE, /**< Fixed mapping of a core port region. */ 54 BHNDB_REGWIN_T_SPROM, /**< Fixed mapping of device SPROM */ 55 BHNDB_REGWIN_T_DYN, /**< A dynamically configurable window */ 56 BHNDB_REGWIN_T_INVALID /**< Invalid type */ 57 } bhndb_regwin_type_t; 58 59 /** 60 * Evaluates to true if @p _rt defines a static mapping. 61 * 62 * @param _rt A bhndb_regwin_type_t value. 63 */ 64 #define BHNDB_REGWIN_T_IS_STATIC(_rt) \ 65 ((_rt) == BHNDB_REGWIN_T_CORE || \ 66 (_rt) == BHNDB_REGWIN_T_SPROM) 67 68 /** 69 * bhndb register window definition. 70 */ 71 struct bhndb_regwin { 72 bhndb_regwin_type_t win_type; /**< window type */ 73 bus_size_t win_offset; /**< offset of the window within the resource */ 74 bus_size_t win_size; /**< size of the window */ 75 76 /** Resource identification */ 77 struct { 78 int type; /**< resource type */ 79 int rid; /**< resource id */ 80 } res; 81 82 union { 83 /** Core-specific register window (BHNDB_REGWIN_T_CORE). */ 84 struct { 85 bhnd_devclass_t class; /**< mapped core's class */ 86 u_int unit; /**< mapped core's unit */ 87 bhnd_port_type port_type; /**< mapped port type */ 88 u_int port; /**< mapped port number */ 89 u_int region; /**< mapped region number */ 90 bhnd_size_t offset; /**< mapped offset within the region */ 91 } core; 92 93 /** SPROM register window (BHNDB_REGWIN_T_SPROM). */ 94 struct {} sprom; 95 96 /** Dynamic register window (BHNDB_REGWIN_T_DYN). */ 97 struct { 98 bus_size_t cfg_offset; /**< window address config offset. */ 99 } dyn; 100 } d; 101 }; 102 #define BHNDB_REGWIN_TABLE_END { BHNDB_REGWIN_T_INVALID, 0, 0, { 0, 0 } } 103 104 /** 105 * Bridge hardware configuration. 106 * 107 * Provides the bridge's DMA address translation descriptions, register/address 108 * mappings, and the resources via which those mappings may be accessed. 109 */ 110 struct bhndb_hwcfg { 111 const struct resource_spec *resource_specs; /**< resources required by our register windows */ 112 const struct bhndb_regwin *register_windows; /**< register window table */ 113 const struct bhnd_dma_translation *dma_translations; /**< DMA address translation table, or NULL if DMA is not supported */ 114 }; 115 116 /** 117 * Hardware specification entry. 118 * 119 * Defines a set of match criteria that may be used to determine the 120 * register map and resource configuration for a bhndb bridge device. 121 */ 122 struct bhndb_hw { 123 const char *name; /**< configuration name */ 124 const struct bhnd_core_match *hw_reqs; /**< match requirements */ 125 u_int num_hw_reqs; /**< number of match requirements */ 126 const struct bhndb_hwcfg *cfg; /**< associated hardware configuration */ 127 }; 128 129 /** 130 * bhndb resource allocation priorities. 131 */ 132 typedef enum { 133 /** No direct resources should ever be allocated for this device. */ 134 BHNDB_PRIORITY_NONE = 0, 135 136 /** Allocate a direct resource if available after serving all other 137 * higher-priority requests. */ 138 BHNDB_PRIORITY_LOW = 1, 139 140 /** Direct resource allocation is preferred, but not necessary 141 * for reasonable runtime performance. */ 142 BHNDB_PRIORITY_DEFAULT = 2, 143 144 /** Indirect resource allocation would incur high runtime overhead. */ 145 BHNDB_PRIORITY_HIGH = 3 146 } bhndb_priority_t; 147 148 /** 149 * bhndb resource allocation flags. 150 */ 151 enum bhndb_alloc_flags { 152 /** 153 * If resource overcommit prevents fulfilling a request for this 154 * resource, an in-use resource should be borrowed to fulfill the 155 * request. 156 * 157 * The only known use case is to support accessing the ChipCommon core 158 * during Wi-Fi driver operation on early PCI Wi-Fi devices 159 * (PCI_V0, SSB) that do not provide a dedicated ChipCommon register 160 * window mapping; on such devices, device and firmware semantics 161 * guarantee the safety of -- after disabling interrupts -- borrowing 162 * the single dynamic register window that's been assigned to the D11 163 * core to perform the few ChipCommon operations required by the driver. 164 */ 165 BHNDB_ALLOC_FULFILL_ON_OVERCOMMIT = (1<<0), 166 }; 167 168 /** 169 * Port resource priority descriptor. 170 */ 171 struct bhndb_port_priority { 172 bhnd_port_type type; /**< port type. */ 173 u_int port; /**< port */ 174 u_int region; /**< region */ 175 bhndb_priority_t priority; /**< port priority */ 176 uint32_t alloc_flags; /**< port allocation flags (@see bhndb_alloc_flags) */ 177 }; 178 179 /** 180 * Core resource priority descriptor. 181 */ 182 struct bhndb_hw_priority { 183 struct bhnd_core_match match; /**< core match descriptor */ 184 bhndb_priority_t priority; /**< core-level priority */ 185 const struct bhndb_port_priority *ports; /**< port priorities */ 186 u_int num_ports; /**< number of port priority records. */ 187 }; 188 #define BHNDB_HW_PRIORITY_TABLE_END { {}, BHNDB_PRIORITY_NONE, NULL, 0 } 189 190 #endif /* _BHND_BHNDB_H_ */ 191