1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Functions and registers to access AXP20X power management chip.
4 *
5 * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
6 */
7
8 #ifndef __LINUX_MFD_AXP20X_H
9 #define __LINUX_MFD_AXP20X_H
10
11 #include <linux/regmap.h>
12
13 enum axp20x_variants {
14 AXP152_ID = 0,
15 AXP192_ID,
16 AXP202_ID,
17 AXP209_ID,
18 AXP221_ID,
19 AXP223_ID,
20 AXP288_ID,
21 AXP313A_ID,
22 AXP323_ID,
23 AXP717_ID,
24 AXP803_ID,
25 AXP806_ID,
26 AXP809_ID,
27 AXP813_ID,
28 AXP15060_ID,
29 NR_AXP20X_VARIANTS,
30 };
31
32 #define AXP192_DATACACHE(m) (0x06 + (m))
33 #define AXP20X_DATACACHE(m) (0x04 + (m))
34
35 /* Power supply */
36 #define AXP152_PWR_OP_MODE 0x01
37 #define AXP152_LDO3456_DC1234_CTRL 0x12
38 #define AXP152_ALDO_OP_MODE 0x13
39 #define AXP152_LDO0_CTRL 0x15
40 #define AXP152_DCDC2_V_OUT 0x23
41 #define AXP152_DCDC2_V_RAMP 0x25
42 #define AXP152_DCDC1_V_OUT 0x26
43 #define AXP152_DCDC3_V_OUT 0x27
44 #define AXP152_ALDO12_V_OUT 0x28
45 #define AXP152_DLDO1_V_OUT 0x29
46 #define AXP152_DLDO2_V_OUT 0x2a
47 #define AXP152_DCDC4_V_OUT 0x2b
48 #define AXP152_V_OFF 0x31
49 #define AXP152_OFF_CTRL 0x32
50 #define AXP152_PEK_KEY 0x36
51 #define AXP152_DCDC_FREQ 0x37
52 #define AXP152_DCDC_MODE 0x80
53
54 #define AXP192_USB_OTG_STATUS 0x04
55 #define AXP192_PWR_OUT_CTRL 0x12
56 #define AXP192_DCDC2_V_OUT 0x23
57 #define AXP192_DCDC1_V_OUT 0x26
58 #define AXP192_DCDC3_V_OUT 0x27
59 #define AXP192_LDO2_3_V_OUT 0x28
60
61 #define AXP20X_PWR_INPUT_STATUS 0x00
62 #define AXP20X_PWR_OP_MODE 0x01
63 #define AXP20X_USB_OTG_STATUS 0x02
64 #define AXP20X_PWR_OUT_CTRL 0x12
65 #define AXP20X_DCDC2_V_OUT 0x23
66 #define AXP20X_DCDC2_LDO3_V_RAMP 0x25
67 #define AXP20X_DCDC3_V_OUT 0x27
68 #define AXP20X_LDO24_V_OUT 0x28
69 #define AXP20X_LDO3_V_OUT 0x29
70 #define AXP20X_VBUS_IPSOUT_MGMT 0x30
71 #define AXP20X_V_OFF 0x31
72 #define AXP20X_OFF_CTRL 0x32
73 #define AXP20X_CHRG_CTRL1 0x33
74 #define AXP20X_CHRG_CTRL2 0x34
75 #define AXP20X_CHRG_BAK_CTRL 0x35
76 #define AXP20X_PEK_KEY 0x36
77 #define AXP20X_DCDC_FREQ 0x37
78 #define AXP20X_V_LTF_CHRG 0x38
79 #define AXP20X_V_HTF_CHRG 0x39
80 #define AXP20X_APS_WARN_L1 0x3a
81 #define AXP20X_APS_WARN_L2 0x3b
82 #define AXP20X_V_LTF_DISCHRG 0x3c
83 #define AXP20X_V_HTF_DISCHRG 0x3d
84
85 #define AXP22X_PWR_OUT_CTRL1 0x10
86 #define AXP22X_PWR_OUT_CTRL2 0x12
87 #define AXP22X_PWR_OUT_CTRL3 0x13
88 #define AXP22X_DLDO1_V_OUT 0x15
89 #define AXP22X_DLDO2_V_OUT 0x16
90 #define AXP22X_DLDO3_V_OUT 0x17
91 #define AXP22X_DLDO4_V_OUT 0x18
92 #define AXP22X_ELDO1_V_OUT 0x19
93 #define AXP22X_ELDO2_V_OUT 0x1a
94 #define AXP22X_ELDO3_V_OUT 0x1b
95 #define AXP22X_DC5LDO_V_OUT 0x1c
96 #define AXP22X_DCDC1_V_OUT 0x21
97 #define AXP22X_DCDC2_V_OUT 0x22
98 #define AXP22X_DCDC3_V_OUT 0x23
99 #define AXP22X_DCDC4_V_OUT 0x24
100 #define AXP22X_DCDC5_V_OUT 0x25
101 #define AXP22X_DCDC23_V_RAMP_CTRL 0x27
102 #define AXP22X_ALDO1_V_OUT 0x28
103 #define AXP22X_ALDO2_V_OUT 0x29
104 #define AXP22X_ALDO3_V_OUT 0x2a
105 #define AXP22X_CHRG_CTRL3 0x35
106
107 #define AXP313A_ON_INDICATE 0x00
108 #define AXP313A_OUTPUT_CONTROL 0x10
109 #define AXP313A_DCDC1_CONTROL 0x13
110 #define AXP313A_DCDC2_CONTROL 0x14
111 #define AXP313A_DCDC3_CONTROL 0x15
112 #define AXP313A_ALDO1_CONTROL 0x16
113 #define AXP313A_DLDO1_CONTROL 0x17
114 #define AXP313A_SHUTDOWN_CTRL 0x1a
115 #define AXP313A_IRQ_EN 0x20
116 #define AXP313A_IRQ_STATE 0x21
117 #define AXP323_DCDC_MODE_CTRL2 0x22
118
119 #define AXP717_ON_INDICATE 0x00
120 #define AXP717_PMU_STATUS_2 0x01
121 #define AXP717_BC_DETECT 0x05
122 #define AXP717_PMU_FAULT 0x08
123 #define AXP717_MODULE_EN_CONTROL_1 0x0b
124 #define AXP717_MIN_SYS_V_CONTROL 0x15
125 #define AXP717_INPUT_VOL_LIMIT_CTRL 0x16
126 #define AXP717_INPUT_CUR_LIMIT_CTRL 0x17
127 #define AXP717_MODULE_EN_CONTROL_2 0x19
128 #define AXP717_BOOST_CONTROL 0x1e
129 #define AXP717_VSYS_V_POWEROFF 0x24
130 #define AXP717_IRQ0_EN 0x40
131 #define AXP717_IRQ1_EN 0x41
132 #define AXP717_IRQ2_EN 0x42
133 #define AXP717_IRQ3_EN 0x43
134 #define AXP717_IRQ4_EN 0x44
135 #define AXP717_IRQ0_STATE 0x48
136 #define AXP717_IRQ1_STATE 0x49
137 #define AXP717_IRQ2_STATE 0x4a
138 #define AXP717_IRQ3_STATE 0x4b
139 #define AXP717_IRQ4_STATE 0x4c
140 #define AXP717_ICC_CHG_SET 0x62
141 #define AXP717_ITERM_CHG_SET 0x63
142 #define AXP717_CV_CHG_SET 0x64
143 #define AXP717_DCDC_OUTPUT_CONTROL 0x80
144 #define AXP717_DCDC1_CONTROL 0x83
145 #define AXP717_DCDC2_CONTROL 0x84
146 #define AXP717_DCDC3_CONTROL 0x85
147 #define AXP717_DCDC4_CONTROL 0x86
148 #define AXP717_LDO0_OUTPUT_CONTROL 0x90
149 #define AXP717_LDO1_OUTPUT_CONTROL 0x91
150 #define AXP717_ALDO1_CONTROL 0x93
151 #define AXP717_ALDO2_CONTROL 0x94
152 #define AXP717_ALDO3_CONTROL 0x95
153 #define AXP717_ALDO4_CONTROL 0x96
154 #define AXP717_BLDO1_CONTROL 0x97
155 #define AXP717_BLDO2_CONTROL 0x98
156 #define AXP717_BLDO3_CONTROL 0x99
157 #define AXP717_BLDO4_CONTROL 0x9a
158 #define AXP717_CLDO1_CONTROL 0x9b
159 #define AXP717_CLDO2_CONTROL 0x9c
160 #define AXP717_CLDO3_CONTROL 0x9d
161 #define AXP717_CLDO4_CONTROL 0x9e
162 #define AXP717_CPUSLDO_CONTROL 0x9f
163 #define AXP717_BATT_PERCENT_DATA 0xa4
164 #define AXP717_ADC_CH_EN_CONTROL 0xc0
165 #define AXP717_BATT_V_H 0xc4
166 #define AXP717_BATT_V_L 0xc5
167 #define AXP717_VBUS_V_H 0xc6
168 #define AXP717_VBUS_V_L 0xc7
169 #define AXP717_VSYS_V_H 0xc8
170 #define AXP717_VSYS_V_L 0xc9
171 #define AXP717_BATT_CHRG_I_H 0xca
172 #define AXP717_BATT_CHRG_I_L 0xcb
173 #define AXP717_ADC_DATA_SEL 0xcd
174 #define AXP717_ADC_DATA_H 0xce
175 #define AXP717_ADC_DATA_L 0xcf
176
177 #define AXP806_STARTUP_SRC 0x00
178 #define AXP806_CHIP_ID 0x03
179 #define AXP806_PWR_OUT_CTRL1 0x10
180 #define AXP806_PWR_OUT_CTRL2 0x11
181 #define AXP806_DCDCA_V_CTRL 0x12
182 #define AXP806_DCDCB_V_CTRL 0x13
183 #define AXP806_DCDCC_V_CTRL 0x14
184 #define AXP806_DCDCD_V_CTRL 0x15
185 #define AXP806_DCDCE_V_CTRL 0x16
186 #define AXP806_ALDO1_V_CTRL 0x17
187 #define AXP806_ALDO2_V_CTRL 0x18
188 #define AXP806_ALDO3_V_CTRL 0x19
189 #define AXP806_DCDC_MODE_CTRL1 0x1a
190 #define AXP806_DCDC_MODE_CTRL2 0x1b
191 #define AXP806_DCDC_FREQ_CTRL 0x1c
192 #define AXP806_BLDO1_V_CTRL 0x20
193 #define AXP806_BLDO2_V_CTRL 0x21
194 #define AXP806_BLDO3_V_CTRL 0x22
195 #define AXP806_BLDO4_V_CTRL 0x23
196 #define AXP806_CLDO1_V_CTRL 0x24
197 #define AXP806_CLDO2_V_CTRL 0x25
198 #define AXP806_CLDO3_V_CTRL 0x26
199 #define AXP806_VREF_TEMP_WARN_L 0xf3
200 #define AXP806_BUS_ADDR_EXT 0xfe
201 #define AXP806_REG_ADDR_EXT 0xff
202
203 #define AXP803_POLYPHASE_CTRL 0x14
204 #define AXP803_FLDO1_V_OUT 0x1c
205 #define AXP803_FLDO2_V_OUT 0x1d
206 #define AXP803_DCDC1_V_OUT 0x20
207 #define AXP803_DCDC2_V_OUT 0x21
208 #define AXP803_DCDC3_V_OUT 0x22
209 #define AXP803_DCDC4_V_OUT 0x23
210 #define AXP803_DCDC5_V_OUT 0x24
211 #define AXP803_DCDC6_V_OUT 0x25
212 #define AXP803_DCDC_FREQ_CTRL 0x3b
213
214 /* Other DCDC regulator control registers are the same as AXP803 */
215 #define AXP813_DCDC7_V_OUT 0x26
216
217 #define AXP15060_STARTUP_SRC 0x00
218 #define AXP15060_PWR_OUT_CTRL1 0x10
219 #define AXP15060_PWR_OUT_CTRL2 0x11
220 #define AXP15060_PWR_OUT_CTRL3 0x12
221 #define AXP15060_DCDC1_V_CTRL 0x13
222 #define AXP15060_DCDC2_V_CTRL 0x14
223 #define AXP15060_DCDC3_V_CTRL 0x15
224 #define AXP15060_DCDC4_V_CTRL 0x16
225 #define AXP15060_DCDC5_V_CTRL 0x17
226 #define AXP15060_DCDC6_V_CTRL 0x18
227 #define AXP15060_ALDO1_V_CTRL 0x19
228 #define AXP15060_DCDC_MODE_CTRL1 0x1a
229 #define AXP15060_DCDC_MODE_CTRL2 0x1b
230 #define AXP15060_OUTPUT_MONITOR_DISCHARGE 0x1e
231 #define AXP15060_IRQ_PWROK_VOFF 0x1f
232 #define AXP15060_ALDO2_V_CTRL 0x20
233 #define AXP15060_ALDO3_V_CTRL 0x21
234 #define AXP15060_ALDO4_V_CTRL 0x22
235 #define AXP15060_ALDO5_V_CTRL 0x23
236 #define AXP15060_BLDO1_V_CTRL 0x24
237 #define AXP15060_BLDO2_V_CTRL 0x25
238 #define AXP15060_BLDO3_V_CTRL 0x26
239 #define AXP15060_BLDO4_V_CTRL 0x27
240 #define AXP15060_BLDO5_V_CTRL 0x28
241 #define AXP15060_CLDO1_V_CTRL 0x29
242 #define AXP15060_CLDO2_V_CTRL 0x2a
243 #define AXP15060_CLDO3_V_CTRL 0x2b
244 #define AXP15060_CLDO4_V_CTRL 0x2d
245 #define AXP15060_CPUSLDO_V_CTRL 0x2e
246 #define AXP15060_PWR_WAKEUP_CTRL 0x31
247 #define AXP15060_PWR_DISABLE_DOWN_SEQ 0x32
248 #define AXP15060_PEK_KEY 0x36
249
250 /* Interrupt */
251 #define AXP152_IRQ1_EN 0x40
252 #define AXP152_IRQ2_EN 0x41
253 #define AXP152_IRQ3_EN 0x42
254 #define AXP152_IRQ1_STATE 0x48
255 #define AXP152_IRQ2_STATE 0x49
256 #define AXP152_IRQ3_STATE 0x4a
257
258 #define AXP192_IRQ1_EN 0x40
259 #define AXP192_IRQ2_EN 0x41
260 #define AXP192_IRQ3_EN 0x42
261 #define AXP192_IRQ4_EN 0x43
262 #define AXP192_IRQ1_STATE 0x44
263 #define AXP192_IRQ2_STATE 0x45
264 #define AXP192_IRQ3_STATE 0x46
265 #define AXP192_IRQ4_STATE 0x47
266 #define AXP192_IRQ5_EN 0x4a
267 #define AXP192_IRQ5_STATE 0x4d
268
269 #define AXP20X_IRQ1_EN 0x40
270 #define AXP20X_IRQ2_EN 0x41
271 #define AXP20X_IRQ3_EN 0x42
272 #define AXP20X_IRQ4_EN 0x43
273 #define AXP20X_IRQ5_EN 0x44
274 #define AXP20X_IRQ6_EN 0x45
275 #define AXP20X_IRQ1_STATE 0x48
276 #define AXP20X_IRQ2_STATE 0x49
277 #define AXP20X_IRQ3_STATE 0x4a
278 #define AXP20X_IRQ4_STATE 0x4b
279 #define AXP20X_IRQ5_STATE 0x4c
280 #define AXP20X_IRQ6_STATE 0x4d
281
282 #define AXP15060_IRQ1_EN 0x40
283 #define AXP15060_IRQ2_EN 0x41
284 #define AXP15060_IRQ1_STATE 0x48
285 #define AXP15060_IRQ2_STATE 0x49
286
287 /* ADC */
288 #define AXP192_GPIO2_V_ADC_H 0x68
289 #define AXP192_GPIO2_V_ADC_L 0x69
290 #define AXP192_GPIO3_V_ADC_H 0x6a
291 #define AXP192_GPIO3_V_ADC_L 0x6b
292
293 #define AXP20X_ACIN_V_ADC_H 0x56
294 #define AXP20X_ACIN_V_ADC_L 0x57
295 #define AXP20X_ACIN_I_ADC_H 0x58
296 #define AXP20X_ACIN_I_ADC_L 0x59
297 #define AXP20X_VBUS_V_ADC_H 0x5a
298 #define AXP20X_VBUS_V_ADC_L 0x5b
299 #define AXP20X_VBUS_I_ADC_H 0x5c
300 #define AXP20X_VBUS_I_ADC_L 0x5d
301 #define AXP20X_TEMP_ADC_H 0x5e
302 #define AXP20X_TEMP_ADC_L 0x5f
303 #define AXP20X_TS_IN_H 0x62
304 #define AXP20X_TS_IN_L 0x63
305 #define AXP20X_GPIO0_V_ADC_H 0x64
306 #define AXP20X_GPIO0_V_ADC_L 0x65
307 #define AXP20X_GPIO1_V_ADC_H 0x66
308 #define AXP20X_GPIO1_V_ADC_L 0x67
309 #define AXP20X_PWR_BATT_H 0x70
310 #define AXP20X_PWR_BATT_M 0x71
311 #define AXP20X_PWR_BATT_L 0x72
312 #define AXP20X_BATT_V_H 0x78
313 #define AXP20X_BATT_V_L 0x79
314 #define AXP20X_BATT_CHRG_I_H 0x7a
315 #define AXP20X_BATT_CHRG_I_L 0x7b
316 #define AXP20X_BATT_DISCHRG_I_H 0x7c
317 #define AXP20X_BATT_DISCHRG_I_L 0x7d
318 #define AXP20X_IPSOUT_V_HIGH_H 0x7e
319 #define AXP20X_IPSOUT_V_HIGH_L 0x7f
320
321 /* Power supply */
322 #define AXP192_GPIO30_IN_RANGE 0x85
323
324 #define AXP20X_DCDC_MODE 0x80
325 #define AXP20X_ADC_EN1 0x82
326 #define AXP20X_ADC_EN2 0x83
327 #define AXP20X_ADC_RATE 0x84
328 #define AXP20X_GPIO10_IN_RANGE 0x85
329 #define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
330 #define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
331 #define AXP20X_TIMER_CTRL 0x8a
332 #define AXP20X_VBUS_MON 0x8b
333 #define AXP20X_OVER_TMP 0x8f
334
335 #define AXP22X_PWREN_CTRL1 0x8c
336 #define AXP22X_PWREN_CTRL2 0x8d
337
338 /* GPIO */
339 #define AXP152_GPIO0_CTRL 0x90
340 #define AXP152_GPIO1_CTRL 0x91
341 #define AXP152_GPIO2_CTRL 0x92
342 #define AXP152_GPIO3_CTRL 0x93
343 #define AXP152_LDOGPIO2_V_OUT 0x96
344 #define AXP152_GPIO_INPUT 0x97
345 #define AXP152_PWM0_FREQ_X 0x98
346 #define AXP152_PWM0_FREQ_Y 0x99
347 #define AXP152_PWM0_DUTY_CYCLE 0x9a
348 #define AXP152_PWM1_FREQ_X 0x9b
349 #define AXP152_PWM1_FREQ_Y 0x9c
350 #define AXP152_PWM1_DUTY_CYCLE 0x9d
351
352 #define AXP192_GPIO0_CTRL 0x90
353 #define AXP192_LDO_IO0_V_OUT 0x91
354 #define AXP192_GPIO1_CTRL 0x92
355 #define AXP192_GPIO2_CTRL 0x93
356 #define AXP192_GPIO2_0_STATE 0x94
357 #define AXP192_GPIO4_3_CTRL 0x95
358 #define AXP192_GPIO4_3_STATE 0x96
359 #define AXP192_GPIO2_0_PULL 0x97
360 #define AXP192_N_RSTO_CTRL 0x9e
361
362 #define AXP20X_GPIO0_CTRL 0x90
363 #define AXP20X_LDO5_V_OUT 0x91
364 #define AXP20X_GPIO1_CTRL 0x92
365 #define AXP20X_GPIO2_CTRL 0x93
366 #define AXP20X_GPIO20_SS 0x94
367 #define AXP20X_GPIO3_CTRL 0x95
368
369 #define AXP22X_LDO_IO0_V_OUT 0x91
370 #define AXP22X_LDO_IO1_V_OUT 0x93
371 #define AXP22X_GPIO_STATE 0x94
372 #define AXP22X_GPIO_PULL_DOWN 0x95
373
374 #define AXP15060_CLDO4_GPIO2_MODESET 0x2c
375
376 /* Battery */
377 #define AXP20X_CHRG_CC_31_24 0xb0
378 #define AXP20X_CHRG_CC_23_16 0xb1
379 #define AXP20X_CHRG_CC_15_8 0xb2
380 #define AXP20X_CHRG_CC_7_0 0xb3
381 #define AXP20X_DISCHRG_CC_31_24 0xb4
382 #define AXP20X_DISCHRG_CC_23_16 0xb5
383 #define AXP20X_DISCHRG_CC_15_8 0xb6
384 #define AXP20X_DISCHRG_CC_7_0 0xb7
385 #define AXP20X_CC_CTRL 0xb8
386 #define AXP20X_FG_RES 0xb9
387
388 /* OCV */
389 #define AXP20X_RDC_H 0xba
390 #define AXP20X_RDC_L 0xbb
391 #define AXP20X_OCV(m) (0xc0 + (m))
392 #define AXP20X_OCV_MAX 0xf
393
394 /* AXP22X specific registers */
395 #define AXP22X_PMIC_TEMP_H 0x56
396 #define AXP22X_PMIC_TEMP_L 0x57
397 #define AXP22X_TS_ADC_H 0x58
398 #define AXP22X_TS_ADC_L 0x59
399 #define AXP22X_BATLOW_THRES1 0xe6
400
401 /* AXP288/AXP803 specific registers */
402 #define AXP288_POWER_REASON 0x02
403 #define AXP288_BC_GLOBAL 0x2c
404 #define AXP288_BC_VBUS_CNTL 0x2d
405 #define AXP288_BC_USB_STAT 0x2e
406 #define AXP288_BC_DET_STAT 0x2f
407 #define AXP288_PMIC_ADC_H 0x56
408 #define AXP288_PMIC_ADC_L 0x57
409 #define AXP288_TS_ADC_H 0x58
410 #define AXP288_TS_ADC_L 0x59
411 #define AXP288_GP_ADC_H 0x5a
412 #define AXP288_GP_ADC_L 0x5b
413 #define AXP288_ADC_TS_PIN_CTRL 0x84
414 #define AXP288_RT_BATT_V_H 0xa0
415 #define AXP288_RT_BATT_V_L 0xa1
416
417 #define AXP813_ACIN_PATH_CTRL 0x3a
418 #define AXP813_ADC_RATE 0x85
419
420 /* Fuel Gauge */
421 #define AXP288_FG_RDC1_REG 0xba
422 #define AXP288_FG_RDC0_REG 0xbb
423 #define AXP288_FG_OCVH_REG 0xbc
424 #define AXP288_FG_OCVL_REG 0xbd
425 #define AXP288_FG_OCV_CURVE_REG 0xc0
426 #define AXP288_FG_DES_CAP1_REG 0xe0
427 #define AXP288_FG_DES_CAP0_REG 0xe1
428 #define AXP288_FG_CC_MTR1_REG 0xe2
429 #define AXP288_FG_CC_MTR0_REG 0xe3
430 #define AXP288_FG_OCV_CAP_REG 0xe4
431 #define AXP288_FG_CC_CAP_REG 0xe5
432 #define AXP288_FG_LOW_CAP_REG 0xe6
433 #define AXP288_FG_TUNE0 0xe8
434 #define AXP288_FG_TUNE1 0xe9
435 #define AXP288_FG_TUNE2 0xea
436 #define AXP288_FG_TUNE3 0xeb
437 #define AXP288_FG_TUNE4 0xec
438 #define AXP288_FG_TUNE5 0xed
439
440 /* Regulators IDs */
441 enum {
442 AXP192_DCDC1 = 0,
443 AXP192_DCDC2,
444 AXP192_DCDC3,
445 AXP192_LDO1,
446 AXP192_LDO2,
447 AXP192_LDO3,
448 AXP192_LDO_IO0,
449 AXP192_REG_ID_MAX
450 };
451
452 enum {
453 AXP20X_LDO1 = 0,
454 AXP20X_LDO2,
455 AXP20X_LDO3,
456 AXP20X_LDO4,
457 AXP20X_LDO5,
458 AXP20X_DCDC2,
459 AXP20X_DCDC3,
460 AXP20X_REG_ID_MAX,
461 };
462
463 enum {
464 AXP22X_DCDC1 = 0,
465 AXP22X_DCDC2,
466 AXP22X_DCDC3,
467 AXP22X_DCDC4,
468 AXP22X_DCDC5,
469 AXP22X_DC1SW,
470 AXP22X_DC5LDO,
471 AXP22X_ALDO1,
472 AXP22X_ALDO2,
473 AXP22X_ALDO3,
474 AXP22X_ELDO1,
475 AXP22X_ELDO2,
476 AXP22X_ELDO3,
477 AXP22X_DLDO1,
478 AXP22X_DLDO2,
479 AXP22X_DLDO3,
480 AXP22X_DLDO4,
481 AXP22X_RTC_LDO,
482 AXP22X_LDO_IO0,
483 AXP22X_LDO_IO1,
484 AXP22X_REG_ID_MAX,
485 };
486
487 enum {
488 AXP313A_DCDC1 = 0,
489 AXP313A_DCDC2,
490 AXP313A_DCDC3,
491 AXP313A_ALDO1,
492 AXP313A_DLDO1,
493 AXP313A_RTC_LDO,
494 AXP313A_REG_ID_MAX,
495 };
496
497 enum {
498 AXP717_DCDC1 = 0,
499 AXP717_DCDC2,
500 AXP717_DCDC3,
501 AXP717_DCDC4,
502 AXP717_ALDO1,
503 AXP717_ALDO2,
504 AXP717_ALDO3,
505 AXP717_ALDO4,
506 AXP717_BLDO1,
507 AXP717_BLDO2,
508 AXP717_BLDO3,
509 AXP717_BLDO4,
510 AXP717_CLDO1,
511 AXP717_CLDO2,
512 AXP717_CLDO3,
513 AXP717_CLDO4,
514 AXP717_CPUSLDO,
515 AXP717_BOOST,
516 AXP717_REG_ID_MAX,
517 };
518
519 enum {
520 AXP806_DCDCA = 0,
521 AXP806_DCDCB,
522 AXP806_DCDCC,
523 AXP806_DCDCD,
524 AXP806_DCDCE,
525 AXP806_ALDO1,
526 AXP806_ALDO2,
527 AXP806_ALDO3,
528 AXP806_BLDO1,
529 AXP806_BLDO2,
530 AXP806_BLDO3,
531 AXP806_BLDO4,
532 AXP806_CLDO1,
533 AXP806_CLDO2,
534 AXP806_CLDO3,
535 AXP806_SW,
536 AXP806_REG_ID_MAX,
537 };
538
539 enum {
540 AXP809_DCDC1 = 0,
541 AXP809_DCDC2,
542 AXP809_DCDC3,
543 AXP809_DCDC4,
544 AXP809_DCDC5,
545 AXP809_DC1SW,
546 AXP809_DC5LDO,
547 AXP809_ALDO1,
548 AXP809_ALDO2,
549 AXP809_ALDO3,
550 AXP809_ELDO1,
551 AXP809_ELDO2,
552 AXP809_ELDO3,
553 AXP809_DLDO1,
554 AXP809_DLDO2,
555 AXP809_RTC_LDO,
556 AXP809_LDO_IO0,
557 AXP809_LDO_IO1,
558 AXP809_SW,
559 AXP809_REG_ID_MAX,
560 };
561
562 enum {
563 AXP803_DCDC1 = 0,
564 AXP803_DCDC2,
565 AXP803_DCDC3,
566 AXP803_DCDC4,
567 AXP803_DCDC5,
568 AXP803_DCDC6,
569 AXP803_DC1SW,
570 AXP803_ALDO1,
571 AXP803_ALDO2,
572 AXP803_ALDO3,
573 AXP803_DLDO1,
574 AXP803_DLDO2,
575 AXP803_DLDO3,
576 AXP803_DLDO4,
577 AXP803_ELDO1,
578 AXP803_ELDO2,
579 AXP803_ELDO3,
580 AXP803_FLDO1,
581 AXP803_FLDO2,
582 AXP803_RTC_LDO,
583 AXP803_LDO_IO0,
584 AXP803_LDO_IO1,
585 AXP803_REG_ID_MAX,
586 };
587
588 enum {
589 AXP813_DCDC1 = 0,
590 AXP813_DCDC2,
591 AXP813_DCDC3,
592 AXP813_DCDC4,
593 AXP813_DCDC5,
594 AXP813_DCDC6,
595 AXP813_DCDC7,
596 AXP813_ALDO1,
597 AXP813_ALDO2,
598 AXP813_ALDO3,
599 AXP813_DLDO1,
600 AXP813_DLDO2,
601 AXP813_DLDO3,
602 AXP813_DLDO4,
603 AXP813_ELDO1,
604 AXP813_ELDO2,
605 AXP813_ELDO3,
606 AXP813_FLDO1,
607 AXP813_FLDO2,
608 AXP813_FLDO3,
609 AXP813_RTC_LDO,
610 AXP813_LDO_IO0,
611 AXP813_LDO_IO1,
612 AXP813_SW,
613 AXP813_REG_ID_MAX,
614 };
615
616 enum {
617 AXP15060_DCDC1 = 0,
618 AXP15060_DCDC2,
619 AXP15060_DCDC3,
620 AXP15060_DCDC4,
621 AXP15060_DCDC5,
622 AXP15060_DCDC6,
623 AXP15060_ALDO1,
624 AXP15060_ALDO2,
625 AXP15060_ALDO3,
626 AXP15060_ALDO4,
627 AXP15060_ALDO5,
628 AXP15060_BLDO1,
629 AXP15060_BLDO2,
630 AXP15060_BLDO3,
631 AXP15060_BLDO4,
632 AXP15060_BLDO5,
633 AXP15060_CLDO1,
634 AXP15060_CLDO2,
635 AXP15060_CLDO3,
636 AXP15060_CLDO4,
637 AXP15060_CPUSLDO,
638 AXP15060_SW,
639 AXP15060_RTC_LDO,
640 AXP15060_REG_ID_MAX,
641 };
642
643 /* IRQs */
644 enum {
645 AXP152_IRQ_LDO0IN_CONNECT = 1,
646 AXP152_IRQ_LDO0IN_REMOVAL,
647 AXP152_IRQ_ALDO0IN_CONNECT,
648 AXP152_IRQ_ALDO0IN_REMOVAL,
649 AXP152_IRQ_DCDC1_V_LOW,
650 AXP152_IRQ_DCDC2_V_LOW,
651 AXP152_IRQ_DCDC3_V_LOW,
652 AXP152_IRQ_DCDC4_V_LOW,
653 AXP152_IRQ_PEK_SHORT,
654 AXP152_IRQ_PEK_LONG,
655 AXP152_IRQ_TIMER,
656 /* out of bit order to make sure the press event is handled first */
657 AXP152_IRQ_PEK_FAL_EDGE,
658 AXP152_IRQ_PEK_RIS_EDGE,
659 AXP152_IRQ_GPIO3_INPUT,
660 AXP152_IRQ_GPIO2_INPUT,
661 AXP152_IRQ_GPIO1_INPUT,
662 AXP152_IRQ_GPIO0_INPUT,
663 };
664
665 enum axp192_irqs {
666 AXP192_IRQ_ACIN_OVER_V = 1,
667 AXP192_IRQ_ACIN_PLUGIN,
668 AXP192_IRQ_ACIN_REMOVAL,
669 AXP192_IRQ_VBUS_OVER_V,
670 AXP192_IRQ_VBUS_PLUGIN,
671 AXP192_IRQ_VBUS_REMOVAL,
672 AXP192_IRQ_VBUS_V_LOW,
673 AXP192_IRQ_BATT_PLUGIN,
674 AXP192_IRQ_BATT_REMOVAL,
675 AXP192_IRQ_BATT_ENT_ACT_MODE,
676 AXP192_IRQ_BATT_EXIT_ACT_MODE,
677 AXP192_IRQ_CHARG,
678 AXP192_IRQ_CHARG_DONE,
679 AXP192_IRQ_BATT_TEMP_HIGH,
680 AXP192_IRQ_BATT_TEMP_LOW,
681 AXP192_IRQ_DIE_TEMP_HIGH,
682 AXP192_IRQ_CHARG_I_LOW,
683 AXP192_IRQ_DCDC1_V_LONG,
684 AXP192_IRQ_DCDC2_V_LONG,
685 AXP192_IRQ_DCDC3_V_LONG,
686 AXP192_IRQ_PEK_SHORT = 22,
687 AXP192_IRQ_PEK_LONG,
688 AXP192_IRQ_N_OE_PWR_ON,
689 AXP192_IRQ_N_OE_PWR_OFF,
690 AXP192_IRQ_VBUS_VALID,
691 AXP192_IRQ_VBUS_NOT_VALID,
692 AXP192_IRQ_VBUS_SESS_VALID,
693 AXP192_IRQ_VBUS_SESS_END,
694 AXP192_IRQ_LOW_PWR_LVL = 31,
695 AXP192_IRQ_TIMER,
696 AXP192_IRQ_GPIO2_INPUT = 37,
697 AXP192_IRQ_GPIO1_INPUT,
698 AXP192_IRQ_GPIO0_INPUT,
699 };
700
701 enum {
702 AXP20X_IRQ_ACIN_OVER_V = 1,
703 AXP20X_IRQ_ACIN_PLUGIN,
704 AXP20X_IRQ_ACIN_REMOVAL,
705 AXP20X_IRQ_VBUS_OVER_V,
706 AXP20X_IRQ_VBUS_PLUGIN,
707 AXP20X_IRQ_VBUS_REMOVAL,
708 AXP20X_IRQ_VBUS_V_LOW,
709 AXP20X_IRQ_BATT_PLUGIN,
710 AXP20X_IRQ_BATT_REMOVAL,
711 AXP20X_IRQ_BATT_ENT_ACT_MODE,
712 AXP20X_IRQ_BATT_EXIT_ACT_MODE,
713 AXP20X_IRQ_CHARG,
714 AXP20X_IRQ_CHARG_DONE,
715 AXP20X_IRQ_BATT_TEMP_HIGH,
716 AXP20X_IRQ_BATT_TEMP_LOW,
717 AXP20X_IRQ_DIE_TEMP_HIGH,
718 AXP20X_IRQ_CHARG_I_LOW,
719 AXP20X_IRQ_DCDC1_V_LONG,
720 AXP20X_IRQ_DCDC2_V_LONG,
721 AXP20X_IRQ_DCDC3_V_LONG,
722 AXP20X_IRQ_PEK_SHORT = 22,
723 AXP20X_IRQ_PEK_LONG,
724 AXP20X_IRQ_N_OE_PWR_ON,
725 AXP20X_IRQ_N_OE_PWR_OFF,
726 AXP20X_IRQ_VBUS_VALID,
727 AXP20X_IRQ_VBUS_NOT_VALID,
728 AXP20X_IRQ_VBUS_SESS_VALID,
729 AXP20X_IRQ_VBUS_SESS_END,
730 AXP20X_IRQ_LOW_PWR_LVL1,
731 AXP20X_IRQ_LOW_PWR_LVL2,
732 AXP20X_IRQ_TIMER,
733 /* out of bit order to make sure the press event is handled first */
734 AXP20X_IRQ_PEK_FAL_EDGE,
735 AXP20X_IRQ_PEK_RIS_EDGE,
736 AXP20X_IRQ_GPIO3_INPUT,
737 AXP20X_IRQ_GPIO2_INPUT,
738 AXP20X_IRQ_GPIO1_INPUT,
739 AXP20X_IRQ_GPIO0_INPUT,
740 };
741
742 enum axp22x_irqs {
743 AXP22X_IRQ_ACIN_OVER_V = 1,
744 AXP22X_IRQ_ACIN_PLUGIN,
745 AXP22X_IRQ_ACIN_REMOVAL,
746 AXP22X_IRQ_VBUS_OVER_V,
747 AXP22X_IRQ_VBUS_PLUGIN,
748 AXP22X_IRQ_VBUS_REMOVAL,
749 AXP22X_IRQ_VBUS_V_LOW,
750 AXP22X_IRQ_BATT_PLUGIN,
751 AXP22X_IRQ_BATT_REMOVAL,
752 AXP22X_IRQ_BATT_ENT_ACT_MODE,
753 AXP22X_IRQ_BATT_EXIT_ACT_MODE,
754 AXP22X_IRQ_CHARG,
755 AXP22X_IRQ_CHARG_DONE,
756 AXP22X_IRQ_BATT_TEMP_HIGH,
757 AXP22X_IRQ_BATT_TEMP_LOW,
758 AXP22X_IRQ_DIE_TEMP_HIGH,
759 AXP22X_IRQ_PEK_SHORT,
760 AXP22X_IRQ_PEK_LONG,
761 AXP22X_IRQ_LOW_PWR_LVL1,
762 AXP22X_IRQ_LOW_PWR_LVL2,
763 AXP22X_IRQ_TIMER,
764 /* out of bit order to make sure the press event is handled first */
765 AXP22X_IRQ_PEK_FAL_EDGE,
766 AXP22X_IRQ_PEK_RIS_EDGE,
767 AXP22X_IRQ_GPIO1_INPUT,
768 AXP22X_IRQ_GPIO0_INPUT,
769 };
770
771 enum axp288_irqs {
772 AXP288_IRQ_VBUS_FALL = 2,
773 AXP288_IRQ_VBUS_RISE,
774 AXP288_IRQ_OV,
775 AXP288_IRQ_FALLING_ALT,
776 AXP288_IRQ_RISING_ALT,
777 AXP288_IRQ_OV_ALT,
778 AXP288_IRQ_DONE = 10,
779 AXP288_IRQ_CHARGING,
780 AXP288_IRQ_SAFE_QUIT,
781 AXP288_IRQ_SAFE_ENTER,
782 AXP288_IRQ_ABSENT,
783 AXP288_IRQ_APPEND,
784 AXP288_IRQ_QWBTU,
785 AXP288_IRQ_WBTU,
786 AXP288_IRQ_QWBTO,
787 AXP288_IRQ_WBTO,
788 AXP288_IRQ_QCBTU,
789 AXP288_IRQ_CBTU,
790 AXP288_IRQ_QCBTO,
791 AXP288_IRQ_CBTO,
792 AXP288_IRQ_WL2,
793 AXP288_IRQ_WL1,
794 AXP288_IRQ_GPADC,
795 AXP288_IRQ_OT = 31,
796 AXP288_IRQ_GPIO0,
797 AXP288_IRQ_GPIO1,
798 AXP288_IRQ_POKO,
799 AXP288_IRQ_POKL,
800 AXP288_IRQ_POKS,
801 AXP288_IRQ_POKN,
802 AXP288_IRQ_POKP,
803 AXP288_IRQ_TIMER,
804 AXP288_IRQ_MV_CHNG,
805 AXP288_IRQ_BC_USB_CHNG,
806 };
807
808 enum axp313a_irqs {
809 AXP313A_IRQ_DIE_TEMP_HIGH,
810 AXP313A_IRQ_DCDC2_V_LOW = 2,
811 AXP313A_IRQ_DCDC3_V_LOW,
812 AXP313A_IRQ_PEK_LONG,
813 AXP313A_IRQ_PEK_SHORT,
814 AXP313A_IRQ_PEK_FAL_EDGE,
815 AXP313A_IRQ_PEK_RIS_EDGE,
816 };
817
818 enum axp717_irqs {
819 AXP717_IRQ_VBUS_FAULT,
820 AXP717_IRQ_VBUS_OVER_V,
821 AXP717_IRQ_BOOST_OVER_V,
822 AXP717_IRQ_GAUGE_NEW_SOC = 4,
823 AXP717_IRQ_SOC_DROP_LVL1 = 6,
824 AXP717_IRQ_SOC_DROP_LVL2,
825 AXP717_IRQ_PEK_RIS_EDGE,
826 AXP717_IRQ_PEK_FAL_EDGE,
827 AXP717_IRQ_PEK_LONG,
828 AXP717_IRQ_PEK_SHORT,
829 AXP717_IRQ_BATT_REMOVAL,
830 AXP717_IRQ_BATT_PLUGIN,
831 AXP717_IRQ_VBUS_REMOVAL,
832 AXP717_IRQ_VBUS_PLUGIN,
833 AXP717_IRQ_BATT_OVER_V,
834 AXP717_IRQ_CHARG_TIMER,
835 AXP717_IRQ_DIE_TEMP_HIGH,
836 AXP717_IRQ_CHARG,
837 AXP717_IRQ_CHARG_DONE,
838 AXP717_IRQ_BATT_OVER_CURR,
839 AXP717_IRQ_LDO_OVER_CURR,
840 AXP717_IRQ_WDOG_EXPIRE,
841 AXP717_IRQ_BATT_ACT_TEMP_LOW,
842 AXP717_IRQ_BATT_ACT_TEMP_HIGH,
843 AXP717_IRQ_BATT_CHG_TEMP_LOW,
844 AXP717_IRQ_BATT_CHG_TEMP_HIGH,
845 AXP717_IRQ_BATT_QUIT_TEMP_HIGH,
846 AXP717_IRQ_BC_USB_CHNG = 30,
847 AXP717_IRQ_BC_USB_DONE,
848 AXP717_IRQ_TYPEC_PLUGIN = 37,
849 AXP717_IRQ_TYPEC_REMOVE,
850 };
851
852 enum axp803_irqs {
853 AXP803_IRQ_ACIN_OVER_V = 1,
854 AXP803_IRQ_ACIN_PLUGIN,
855 AXP803_IRQ_ACIN_REMOVAL,
856 AXP803_IRQ_VBUS_OVER_V,
857 AXP803_IRQ_VBUS_PLUGIN,
858 AXP803_IRQ_VBUS_REMOVAL,
859 AXP803_IRQ_BATT_PLUGIN,
860 AXP803_IRQ_BATT_REMOVAL,
861 AXP803_IRQ_BATT_ENT_ACT_MODE,
862 AXP803_IRQ_BATT_EXIT_ACT_MODE,
863 AXP803_IRQ_CHARG,
864 AXP803_IRQ_CHARG_DONE,
865 AXP803_IRQ_BATT_CHG_TEMP_HIGH,
866 AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
867 AXP803_IRQ_BATT_CHG_TEMP_LOW,
868 AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
869 AXP803_IRQ_BATT_ACT_TEMP_HIGH,
870 AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
871 AXP803_IRQ_BATT_ACT_TEMP_LOW,
872 AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
873 AXP803_IRQ_DIE_TEMP_HIGH,
874 AXP803_IRQ_GPADC,
875 AXP803_IRQ_LOW_PWR_LVL1,
876 AXP803_IRQ_LOW_PWR_LVL2,
877 AXP803_IRQ_TIMER,
878 /* out of bit order to make sure the press event is handled first */
879 AXP803_IRQ_PEK_FAL_EDGE,
880 AXP803_IRQ_PEK_RIS_EDGE,
881 AXP803_IRQ_PEK_SHORT,
882 AXP803_IRQ_PEK_LONG,
883 AXP803_IRQ_PEK_OVER_OFF,
884 AXP803_IRQ_GPIO1_INPUT,
885 AXP803_IRQ_GPIO0_INPUT,
886 AXP803_IRQ_BC_USB_CHNG,
887 AXP803_IRQ_MV_CHNG,
888 };
889
890 enum axp806_irqs {
891 AXP806_IRQ_DIE_TEMP_HIGH_LV1,
892 AXP806_IRQ_DIE_TEMP_HIGH_LV2,
893 AXP806_IRQ_DCDCA_V_LOW,
894 AXP806_IRQ_DCDCB_V_LOW,
895 AXP806_IRQ_DCDCC_V_LOW,
896 AXP806_IRQ_DCDCD_V_LOW,
897 AXP806_IRQ_DCDCE_V_LOW,
898 AXP806_IRQ_POK_LONG,
899 AXP806_IRQ_POK_SHORT,
900 AXP806_IRQ_WAKEUP,
901 AXP806_IRQ_POK_FALL,
902 AXP806_IRQ_POK_RISE,
903 };
904
905 enum axp809_irqs {
906 AXP809_IRQ_ACIN_OVER_V = 1,
907 AXP809_IRQ_ACIN_PLUGIN,
908 AXP809_IRQ_ACIN_REMOVAL,
909 AXP809_IRQ_VBUS_OVER_V,
910 AXP809_IRQ_VBUS_PLUGIN,
911 AXP809_IRQ_VBUS_REMOVAL,
912 AXP809_IRQ_VBUS_V_LOW,
913 AXP809_IRQ_BATT_PLUGIN,
914 AXP809_IRQ_BATT_REMOVAL,
915 AXP809_IRQ_BATT_ENT_ACT_MODE,
916 AXP809_IRQ_BATT_EXIT_ACT_MODE,
917 AXP809_IRQ_CHARG,
918 AXP809_IRQ_CHARG_DONE,
919 AXP809_IRQ_BATT_CHG_TEMP_HIGH,
920 AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
921 AXP809_IRQ_BATT_CHG_TEMP_LOW,
922 AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
923 AXP809_IRQ_BATT_ACT_TEMP_HIGH,
924 AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
925 AXP809_IRQ_BATT_ACT_TEMP_LOW,
926 AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
927 AXP809_IRQ_DIE_TEMP_HIGH,
928 AXP809_IRQ_LOW_PWR_LVL1,
929 AXP809_IRQ_LOW_PWR_LVL2,
930 AXP809_IRQ_TIMER,
931 /* out of bit order to make sure the press event is handled first */
932 AXP809_IRQ_PEK_FAL_EDGE,
933 AXP809_IRQ_PEK_RIS_EDGE,
934 AXP809_IRQ_PEK_SHORT,
935 AXP809_IRQ_PEK_LONG,
936 AXP809_IRQ_PEK_OVER_OFF,
937 AXP809_IRQ_GPIO1_INPUT,
938 AXP809_IRQ_GPIO0_INPUT,
939 };
940
941 enum axp15060_irqs {
942 AXP15060_IRQ_DIE_TEMP_HIGH_LV1 = 1,
943 AXP15060_IRQ_DIE_TEMP_HIGH_LV2,
944 AXP15060_IRQ_DCDC1_V_LOW,
945 AXP15060_IRQ_DCDC2_V_LOW,
946 AXP15060_IRQ_DCDC3_V_LOW,
947 AXP15060_IRQ_DCDC4_V_LOW,
948 AXP15060_IRQ_DCDC5_V_LOW,
949 AXP15060_IRQ_DCDC6_V_LOW,
950 AXP15060_IRQ_PEK_LONG,
951 AXP15060_IRQ_PEK_SHORT,
952 AXP15060_IRQ_GPIO1_INPUT,
953 AXP15060_IRQ_PEK_FAL_EDGE,
954 AXP15060_IRQ_PEK_RIS_EDGE,
955 AXP15060_IRQ_GPIO2_INPUT,
956 };
957
958 struct axp20x_dev {
959 struct device *dev;
960 int irq;
961 unsigned long irq_flags;
962 struct regmap *regmap;
963 struct regmap_irq_chip_data *regmap_irqc;
964 enum axp20x_variants variant;
965 int nr_cells;
966 const struct mfd_cell *cells;
967 const struct regmap_config *regmap_cfg;
968 const struct regmap_irq_chip *regmap_irq_chip;
969 };
970
971 /* generic helper function for reading 9-16 bit wide regs */
axp20x_read_variable_width(struct regmap * regmap,unsigned int reg,unsigned int width)972 static inline int axp20x_read_variable_width(struct regmap *regmap,
973 unsigned int reg, unsigned int width)
974 {
975 unsigned int reg_val, result;
976 int err;
977
978 err = regmap_read(regmap, reg, ®_val);
979 if (err)
980 return err;
981
982 result = reg_val << (width - 8);
983
984 err = regmap_read(regmap, reg + 1, ®_val);
985 if (err)
986 return err;
987
988 result |= reg_val;
989
990 return result;
991 }
992
993 /**
994 * axp20x_match_device(): Setup axp20x variant related fields
995 *
996 * @axp20x: axp20x device to setup (.dev field must be set)
997 * @dev: device associated with this axp20x device
998 *
999 * This lets the axp20x core configure the mfd cells and register maps
1000 * for later use.
1001 */
1002 int axp20x_match_device(struct axp20x_dev *axp20x);
1003
1004 /**
1005 * axp20x_device_probe(): Probe a configured axp20x device
1006 *
1007 * @axp20x: axp20x device to probe (must be configured)
1008 *
1009 * This function lets the axp20x core register the axp20x mfd devices
1010 * and irqchip. The axp20x device passed in must be fully configured
1011 * with axp20x_match_device, its irq set, and regmap created.
1012 */
1013 int axp20x_device_probe(struct axp20x_dev *axp20x);
1014
1015 /**
1016 * axp20x_device_remove(): Remove a axp20x device
1017 *
1018 * @axp20x: axp20x device to remove
1019 *
1020 * This tells the axp20x core to remove the associated mfd devices
1021 */
1022 void axp20x_device_remove(struct axp20x_dev *axp20x);
1023
1024 #endif /* __LINUX_MFD_AXP20X_H */
1025