1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1997, 1998, 1999, 2000
5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
6 *
7 * Copyright (c) 2006
8 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Bill Paul.
21 * 4. Neither the name of the author nor the names of any co-contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
35 * THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver.
40 * Datasheet is available from http://www.admtek.com.tw.
41 *
42 * Written by Bill Paul <wpaul@ee.columbia.edu>
43 * Electrical Engineering Department
44 * Columbia University, New York City
45 *
46 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>.
47 * RED Inc.
48 */
49
50 /*
51 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet
52 * support: the control endpoint for reading/writing registers, burst
53 * read endpoint for packet reception, burst write for packet transmission
54 * and one for "interrupts." The chip uses the same RX filter scheme
55 * as the other ADMtek ethernet parts: one perfect filter entry for the
56 * the station address and a 64-bit multicast hash table. The chip supports
57 * both MII and HomePNA attachments.
58 *
59 * Since the maximum data transfer speed of USB is supposed to be 12Mbps,
60 * you're never really going to get 100Mbps speeds from this device. I
61 * think the idea is to allow the device to connect to 10 or 100Mbps
62 * networks, not necessarily to provide 100Mbps performance. Also, since
63 * the controller uses an external PHY chip, it's possible that board
64 * designers might simply choose a 10Mbps PHY.
65 *
66 * Registers are accessed using uether_do_request(). Packet
67 * transfers are done using usbd_transfer() and friends.
68 */
69
70 #include <sys/stdint.h>
71 #include <sys/stddef.h>
72 #include <sys/param.h>
73 #include <sys/queue.h>
74 #include <sys/types.h>
75 #include <sys/systm.h>
76 #include <sys/socket.h>
77 #include <sys/kernel.h>
78 #include <sys/bus.h>
79 #include <sys/module.h>
80 #include <sys/lock.h>
81 #include <sys/mutex.h>
82 #include <sys/condvar.h>
83 #include <sys/sysctl.h>
84 #include <sys/sx.h>
85 #include <sys/unistd.h>
86 #include <sys/callout.h>
87 #include <sys/malloc.h>
88 #include <sys/priv.h>
89
90 #include <net/if.h>
91 #include <net/if_var.h>
92 #include <net/if_media.h>
93
94 #include <dev/mii/mii.h>
95 #include <dev/mii/miivar.h>
96
97 #include <dev/usb/usb.h>
98 #include <dev/usb/usbdi.h>
99 #include <dev/usb/usbdi_util.h>
100 #include "usbdevs.h"
101
102 #define USB_DEBUG_VAR aue_debug
103 #include <dev/usb/usb_debug.h>
104 #include <dev/usb/usb_process.h>
105
106 #include <dev/usb/net/usb_ethernet.h>
107 #include <dev/usb/net/if_auereg.h>
108
109 #include "miibus_if.h"
110
111 #ifdef USB_DEBUG
112 static int aue_debug = 0;
113
114 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
115 "USB aue");
116 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RWTUN, &aue_debug, 0,
117 "Debug level");
118 #endif
119
120 /*
121 * Various supported device vendors/products.
122 */
123 static const STRUCT_USB_HOST_ID aue_devs[] = {
124 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
125 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII),
126 AUE_DEV(ABOCOM, DSB650TX_PNA, 0),
127 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS),
128 AUE_DEV(ABOCOM, XX10, 0),
129 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII),
130 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII),
131 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA),
132 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA),
133 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII),
134 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII),
135 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII),
136 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA),
137 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII),
138 AUE_DEV(ACCTON, USB320_EC, 0),
139 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII),
140 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII),
141 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII),
142 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII),
143 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY),
144 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII),
145 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII),
146 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII),
147 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII),
148 AUE_DEV(BILLIONTON, USB100, 0),
149 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII),
150 AUE_DEV(BILLIONTON, USBEL100, 0),
151 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA),
152 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII),
153 AUE_DEV(COREGA, FETHER_USB_TX, 0),
154 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS),
155 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
156 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII),
157 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII),
158 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA),
159 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS),
160 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS),
161 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII),
162 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII),
163 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII),
164 AUE_DEV(ELECOM, LDUSBTX0, 0),
165 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS),
166 AUE_DEV(ELECOM, LDUSBTX2, 0),
167 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS),
168 AUE_DEV(ELSA, USB2ETHERNET, 0),
169 AUE_DEV(GIGABYTE, GNBR402W, 0),
170 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII),
171 AUE_DEV(HP, HN210E, AUE_FLAG_PII),
172 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII),
173 AUE_DEV(IODATA, USBETTX, 0),
174 AUE_DEV(KINGSTON, KNU101TX, 0),
175 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA),
176 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS),
177 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS),
178 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII),
179 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
180 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS),
181 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII),
182 AUE_DEV(MELCO, LUATX1, 0),
183 AUE_DEV(MELCO, LUATX5, 0),
184 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII),
185 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII),
186 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII),
187 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII),
188 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII),
189 AUE_DEV(SMC, 2202USB, 0),
190 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII),
191 AUE_DEV(SOHOWARE, NUB100, 0),
192 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII),
193 #undef AUE_DEV
194 };
195
196 /* prototypes */
197
198 static device_probe_t aue_probe;
199 static device_attach_t aue_attach;
200 static device_detach_t aue_detach;
201 static miibus_readreg_t aue_miibus_readreg;
202 static miibus_writereg_t aue_miibus_writereg;
203 static miibus_statchg_t aue_miibus_statchg;
204
205 static usb_callback_t aue_intr_callback;
206 static usb_callback_t aue_bulk_read_callback;
207 static usb_callback_t aue_bulk_write_callback;
208
209 static uether_fn_t aue_attach_post;
210 static uether_fn_t aue_init;
211 static uether_fn_t aue_stop;
212 static uether_fn_t aue_start;
213 static uether_fn_t aue_tick;
214 static uether_fn_t aue_setmulti;
215 static uether_fn_t aue_setpromisc;
216
217 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t);
218 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t);
219 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t);
220 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t);
221 static uint16_t aue_eeprom_getword(struct aue_softc *, int);
222 static void aue_reset(struct aue_softc *);
223 static void aue_reset_pegasus_II(struct aue_softc *);
224
225 static int aue_ifmedia_upd(if_t);
226 static void aue_ifmedia_sts(if_t, struct ifmediareq *);
227
228 static const struct usb_config aue_config[AUE_N_TRANSFER] = {
229 [AUE_BULK_DT_WR] = {
230 .type = UE_BULK,
231 .endpoint = UE_ADDR_ANY,
232 .direction = UE_DIR_OUT,
233 .bufsize = (MCLBYTES + 2),
234 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
235 .callback = aue_bulk_write_callback,
236 .timeout = 10000, /* 10 seconds */
237 },
238
239 [AUE_BULK_DT_RD] = {
240 .type = UE_BULK,
241 .endpoint = UE_ADDR_ANY,
242 .direction = UE_DIR_IN,
243 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN),
244 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
245 .callback = aue_bulk_read_callback,
246 },
247
248 [AUE_INTR_DT_RD] = {
249 .type = UE_INTERRUPT,
250 .endpoint = UE_ADDR_ANY,
251 .direction = UE_DIR_IN,
252 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
253 .bufsize = 0, /* use wMaxPacketSize */
254 .callback = aue_intr_callback,
255 },
256 };
257
258 static device_method_t aue_methods[] = {
259 /* Device interface */
260 DEVMETHOD(device_probe, aue_probe),
261 DEVMETHOD(device_attach, aue_attach),
262 DEVMETHOD(device_detach, aue_detach),
263
264 /* MII interface */
265 DEVMETHOD(miibus_readreg, aue_miibus_readreg),
266 DEVMETHOD(miibus_writereg, aue_miibus_writereg),
267 DEVMETHOD(miibus_statchg, aue_miibus_statchg),
268
269 DEVMETHOD_END
270 };
271
272 static driver_t aue_driver = {
273 .name = "aue",
274 .methods = aue_methods,
275 .size = sizeof(struct aue_softc)
276 };
277
278 DRIVER_MODULE(aue, uhub, aue_driver, NULL, NULL);
279 DRIVER_MODULE(miibus, aue, miibus_driver, 0, 0);
280 MODULE_DEPEND(aue, uether, 1, 1, 1);
281 MODULE_DEPEND(aue, usb, 1, 1, 1);
282 MODULE_DEPEND(aue, ether, 1, 1, 1);
283 MODULE_DEPEND(aue, miibus, 1, 1, 1);
284 MODULE_VERSION(aue, 1);
285 USB_PNP_HOST_INFO(aue_devs);
286
287 static const struct usb_ether_methods aue_ue_methods = {
288 .ue_attach_post = aue_attach_post,
289 .ue_start = aue_start,
290 .ue_init = aue_init,
291 .ue_stop = aue_stop,
292 .ue_tick = aue_tick,
293 .ue_setmulti = aue_setmulti,
294 .ue_setpromisc = aue_setpromisc,
295 .ue_mii_upd = aue_ifmedia_upd,
296 .ue_mii_sts = aue_ifmedia_sts,
297 };
298
299 #define AUE_SETBIT(sc, reg, x) \
300 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x))
301
302 #define AUE_CLRBIT(sc, reg, x) \
303 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x))
304
305 static uint8_t
aue_csr_read_1(struct aue_softc * sc,uint16_t reg)306 aue_csr_read_1(struct aue_softc *sc, uint16_t reg)
307 {
308 struct usb_device_request req;
309 usb_error_t err;
310 uint8_t val;
311
312 req.bmRequestType = UT_READ_VENDOR_DEVICE;
313 req.bRequest = AUE_UR_READREG;
314 USETW(req.wValue, 0);
315 USETW(req.wIndex, reg);
316 USETW(req.wLength, 1);
317
318 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
319 if (err)
320 return (0);
321 return (val);
322 }
323
324 static uint16_t
aue_csr_read_2(struct aue_softc * sc,uint16_t reg)325 aue_csr_read_2(struct aue_softc *sc, uint16_t reg)
326 {
327 struct usb_device_request req;
328 usb_error_t err;
329 uint16_t val;
330
331 req.bmRequestType = UT_READ_VENDOR_DEVICE;
332 req.bRequest = AUE_UR_READREG;
333 USETW(req.wValue, 0);
334 USETW(req.wIndex, reg);
335 USETW(req.wLength, 2);
336
337 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
338 if (err)
339 return (0);
340 return (le16toh(val));
341 }
342
343 static void
aue_csr_write_1(struct aue_softc * sc,uint16_t reg,uint8_t val)344 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val)
345 {
346 struct usb_device_request req;
347
348 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
349 req.bRequest = AUE_UR_WRITEREG;
350 req.wValue[0] = val;
351 req.wValue[1] = 0;
352 USETW(req.wIndex, reg);
353 USETW(req.wLength, 1);
354
355 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
356 /* error ignored */
357 }
358 }
359
360 static void
aue_csr_write_2(struct aue_softc * sc,uint16_t reg,uint16_t val)361 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val)
362 {
363 struct usb_device_request req;
364
365 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
366 req.bRequest = AUE_UR_WRITEREG;
367 USETW(req.wValue, val);
368 USETW(req.wIndex, reg);
369 USETW(req.wLength, 2);
370
371 val = htole16(val);
372
373 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
374 /* error ignored */
375 }
376 }
377
378 /*
379 * Read a word of data stored in the EEPROM at address 'addr.'
380 */
381 static uint16_t
aue_eeprom_getword(struct aue_softc * sc,int addr)382 aue_eeprom_getword(struct aue_softc *sc, int addr)
383 {
384 int i;
385
386 aue_csr_write_1(sc, AUE_EE_REG, addr);
387 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ);
388
389 for (i = 0; i != AUE_TIMEOUT; i++) {
390 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE)
391 break;
392 if (uether_pause(&sc->sc_ue, hz / 100))
393 break;
394 }
395
396 if (i == AUE_TIMEOUT)
397 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n");
398
399 return (aue_csr_read_2(sc, AUE_EE_DATA));
400 }
401
402 /*
403 * Read station address(offset 0) from the EEPROM.
404 */
405 static void
aue_read_mac(struct aue_softc * sc,uint8_t * eaddr)406 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr)
407 {
408 int i, offset;
409 uint16_t word;
410
411 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) {
412 word = aue_eeprom_getword(sc, offset + i);
413 eaddr[i * 2] = (uint8_t)word;
414 eaddr[i * 2 + 1] = (uint8_t)(word >> 8);
415 }
416 }
417
418 static int
aue_miibus_readreg(device_t dev,int phy,int reg)419 aue_miibus_readreg(device_t dev, int phy, int reg)
420 {
421 struct aue_softc *sc = device_get_softc(dev);
422 int i, locked;
423 uint16_t val = 0;
424
425 locked = mtx_owned(&sc->sc_mtx);
426 if (!locked)
427 AUE_LOCK(sc);
428
429 /*
430 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps
431 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY
432 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is
433 * actually connected to anything, so we ignore the 10Mbps one. It
434 * happens to be configured for MII address 3, so we filter that out.
435 */
436 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) {
437 if (phy == 3)
438 goto done;
439 #if 0
440 if (phy != 1)
441 goto done;
442 #endif
443 }
444 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
445 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ);
446
447 for (i = 0; i != AUE_TIMEOUT; i++) {
448 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
449 break;
450 if (uether_pause(&sc->sc_ue, hz / 100))
451 break;
452 }
453
454 if (i == AUE_TIMEOUT)
455 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n");
456
457 val = aue_csr_read_2(sc, AUE_PHY_DATA);
458
459 done:
460 if (!locked)
461 AUE_UNLOCK(sc);
462 return (val);
463 }
464
465 static int
aue_miibus_writereg(device_t dev,int phy,int reg,int data)466 aue_miibus_writereg(device_t dev, int phy, int reg, int data)
467 {
468 struct aue_softc *sc = device_get_softc(dev);
469 int i;
470 int locked;
471
472 if (phy == 3)
473 return (0);
474
475 locked = mtx_owned(&sc->sc_mtx);
476 if (!locked)
477 AUE_LOCK(sc);
478
479 aue_csr_write_2(sc, AUE_PHY_DATA, data);
480 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
481 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE);
482
483 for (i = 0; i != AUE_TIMEOUT; i++) {
484 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
485 break;
486 if (uether_pause(&sc->sc_ue, hz / 100))
487 break;
488 }
489
490 if (i == AUE_TIMEOUT)
491 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n");
492
493 if (!locked)
494 AUE_UNLOCK(sc);
495 return (0);
496 }
497
498 static void
aue_miibus_statchg(device_t dev)499 aue_miibus_statchg(device_t dev)
500 {
501 struct aue_softc *sc = device_get_softc(dev);
502 struct mii_data *mii = GET_MII(sc);
503 int locked;
504
505 locked = mtx_owned(&sc->sc_mtx);
506 if (!locked)
507 AUE_LOCK(sc);
508
509 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
510 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX)
511 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
512 else
513 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
514
515 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
516 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
517 else
518 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
519
520 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
521
522 /*
523 * Set the LED modes on the LinkSys adapter.
524 * This turns on the 'dual link LED' bin in the auxmode
525 * register of the Broadcom PHY.
526 */
527 if (sc->sc_flags & AUE_FLAG_LSYS) {
528 uint16_t auxmode;
529
530 auxmode = aue_miibus_readreg(dev, 0, 0x1b);
531 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04);
532 }
533 if (!locked)
534 AUE_UNLOCK(sc);
535 }
536
537 #define AUE_BITS 6
538 static u_int
aue_hash_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)539 aue_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
540 {
541 uint8_t *hashtbl = arg;
542 uint32_t h;
543
544 h = ether_crc32_le(LLADDR(sdl), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1);
545 hashtbl[(h >> 3)] |= 1 << (h & 0x7);
546
547 return (1);
548 }
549
550 static void
aue_setmulti(struct usb_ether * ue)551 aue_setmulti(struct usb_ether *ue)
552 {
553 struct aue_softc *sc = uether_getsc(ue);
554 if_t ifp = uether_getifp(ue);
555 uint32_t i;
556 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
557
558 AUE_LOCK_ASSERT(sc, MA_OWNED);
559
560 if (if_getflags(ifp) & IFF_ALLMULTI || if_getflags(ifp) & IFF_PROMISC) {
561 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
562 return;
563 }
564
565 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
566
567 /* now program new ones */
568 if_foreach_llmaddr(ifp, aue_hash_maddr, hashtbl);
569
570 /* write the hashtable */
571 for (i = 0; i != 8; i++)
572 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]);
573 }
574
575 static void
aue_reset_pegasus_II(struct aue_softc * sc)576 aue_reset_pegasus_II(struct aue_softc *sc)
577 {
578 /* Magic constants taken from Linux driver. */
579 aue_csr_write_1(sc, AUE_REG_1D, 0);
580 aue_csr_write_1(sc, AUE_REG_7B, 2);
581 #if 0
582 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode)
583 aue_csr_write_1(sc, AUE_REG_81, 6);
584 else
585 #endif
586 aue_csr_write_1(sc, AUE_REG_81, 2);
587 }
588
589 static void
aue_reset(struct aue_softc * sc)590 aue_reset(struct aue_softc *sc)
591 {
592 int i;
593
594 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC);
595
596 for (i = 0; i != AUE_TIMEOUT; i++) {
597 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC))
598 break;
599 if (uether_pause(&sc->sc_ue, hz / 100))
600 break;
601 }
602
603 if (i == AUE_TIMEOUT)
604 device_printf(sc->sc_ue.ue_dev, "reset failed\n");
605
606 /*
607 * The PHY(s) attached to the Pegasus chip may be held
608 * in reset until we flip on the GPIO outputs. Make sure
609 * to set the GPIO pins high so that the PHY(s) will
610 * be enabled.
611 *
612 * NOTE: We used to force all of the GPIO pins low first and then
613 * enable the ones we want. This has been changed to better
614 * match the ADMtek's reference design to avoid setting the
615 * power-down configuration line of the PHY at the same time
616 * it is reset.
617 */
618 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
619 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
620
621 if (sc->sc_flags & AUE_FLAG_LSYS) {
622 /* Grrr. LinkSys has to be different from everyone else. */
623 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
624 aue_csr_write_1(sc, AUE_GPIO0,
625 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
626 }
627 if (sc->sc_flags & AUE_FLAG_PII)
628 aue_reset_pegasus_II(sc);
629
630 /* Wait a little while for the chip to get its brains in order: */
631 uether_pause(&sc->sc_ue, hz / 100);
632 }
633
634 static void
aue_attach_post(struct usb_ether * ue)635 aue_attach_post(struct usb_ether *ue)
636 {
637 struct aue_softc *sc = uether_getsc(ue);
638
639 /* reset the adapter */
640 aue_reset(sc);
641
642 /* get station address from the EEPROM */
643 aue_read_mac(sc, ue->ue_eaddr);
644 }
645
646 /*
647 * Probe for a Pegasus chip.
648 */
649 static int
aue_probe(device_t dev)650 aue_probe(device_t dev)
651 {
652 struct usb_attach_arg *uaa = device_get_ivars(dev);
653
654 if (uaa->usb_mode != USB_MODE_HOST)
655 return (ENXIO);
656 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX)
657 return (ENXIO);
658 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX)
659 return (ENXIO);
660 /*
661 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict
662 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of
663 * the devices that look like Bluetooth adapters.
664 */
665 if (uaa->info.idVendor == USB_VENDOR_BELKIN &&
666 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 &&
667 uaa->info.bcdDevice == 0x0413)
668 return (ENXIO);
669
670 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa));
671 }
672
673 /*
674 * Attach the interface. Allocate softc structures, do ifmedia
675 * setup and ethernet/BPF attach.
676 */
677 static int
aue_attach(device_t dev)678 aue_attach(device_t dev)
679 {
680 struct usb_attach_arg *uaa = device_get_ivars(dev);
681 struct aue_softc *sc = device_get_softc(dev);
682 struct usb_ether *ue = &sc->sc_ue;
683 uint8_t iface_index;
684 int error;
685
686 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
687
688 if (uaa->info.bcdDevice >= 0x0201) {
689 /* XXX currently undocumented */
690 sc->sc_flags |= AUE_FLAG_VER_2;
691 }
692
693 device_set_usb_desc(dev);
694 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
695
696 iface_index = AUE_IFACE_IDX;
697 error = usbd_transfer_setup(uaa->device, &iface_index,
698 sc->sc_xfer, aue_config, AUE_N_TRANSFER,
699 sc, &sc->sc_mtx);
700 if (error) {
701 device_printf(dev, "allocating USB transfers failed\n");
702 goto detach;
703 }
704
705 ue->ue_sc = sc;
706 ue->ue_dev = dev;
707 ue->ue_udev = uaa->device;
708 ue->ue_mtx = &sc->sc_mtx;
709 ue->ue_methods = &aue_ue_methods;
710
711 error = uether_ifattach(ue);
712 if (error) {
713 device_printf(dev, "could not attach interface\n");
714 goto detach;
715 }
716 return (0); /* success */
717
718 detach:
719 aue_detach(dev);
720 return (ENXIO); /* failure */
721 }
722
723 static int
aue_detach(device_t dev)724 aue_detach(device_t dev)
725 {
726 struct aue_softc *sc = device_get_softc(dev);
727 struct usb_ether *ue = &sc->sc_ue;
728
729 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER);
730 uether_ifdetach(ue);
731 mtx_destroy(&sc->sc_mtx);
732
733 return (0);
734 }
735
736 static void
aue_intr_callback(struct usb_xfer * xfer,usb_error_t error)737 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error)
738 {
739 struct aue_softc *sc = usbd_xfer_softc(xfer);
740 if_t ifp = uether_getifp(&sc->sc_ue);
741 struct aue_intrpkt pkt;
742 struct usb_page_cache *pc;
743 int actlen;
744
745 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
746
747 switch (USB_GET_STATE(xfer)) {
748 case USB_ST_TRANSFERRED:
749
750 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) &&
751 actlen >= (int)sizeof(pkt)) {
752 pc = usbd_xfer_get_frame(xfer, 0);
753 usbd_copy_out(pc, 0, &pkt, sizeof(pkt));
754
755 if (pkt.aue_txstat0)
756 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
757 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL |
758 AUE_TXSTAT0_EXCESSCOLL))
759 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
760 }
761 /* FALLTHROUGH */
762 case USB_ST_SETUP:
763 tr_setup:
764 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
765 usbd_transfer_submit(xfer);
766 return;
767
768 default: /* Error */
769 if (error != USB_ERR_CANCELLED) {
770 /* try to clear stall first */
771 usbd_xfer_set_stall(xfer);
772 goto tr_setup;
773 }
774 return;
775 }
776 }
777
778 static void
aue_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)779 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
780 {
781 struct aue_softc *sc = usbd_xfer_softc(xfer);
782 struct usb_ether *ue = &sc->sc_ue;
783 if_t ifp = uether_getifp(ue);
784 struct aue_rxpkt stat;
785 struct usb_page_cache *pc;
786 int actlen;
787
788 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
789 pc = usbd_xfer_get_frame(xfer, 0);
790
791 switch (USB_GET_STATE(xfer)) {
792 case USB_ST_TRANSFERRED:
793 DPRINTFN(11, "received %d bytes\n", actlen);
794
795 if (sc->sc_flags & AUE_FLAG_VER_2) {
796 if (actlen == 0) {
797 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
798 goto tr_setup;
799 }
800 } else {
801 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) {
802 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
803 goto tr_setup;
804 }
805 usbd_copy_out(pc, actlen - sizeof(stat), &stat,
806 sizeof(stat));
807
808 /*
809 * turn off all the non-error bits in the rx status
810 * word:
811 */
812 stat.aue_rxstat &= AUE_RXSTAT_MASK;
813 if (stat.aue_rxstat) {
814 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
815 goto tr_setup;
816 }
817 /* No errors; receive the packet. */
818 actlen -= (sizeof(stat) + ETHER_CRC_LEN);
819 }
820 uether_rxbuf(ue, pc, 0, actlen);
821
822 /* FALLTHROUGH */
823 case USB_ST_SETUP:
824 tr_setup:
825 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
826 usbd_transfer_submit(xfer);
827 uether_rxflush(ue);
828 return;
829
830 default: /* Error */
831 DPRINTF("bulk read error, %s\n",
832 usbd_errstr(error));
833
834 if (error != USB_ERR_CANCELLED) {
835 /* try to clear stall first */
836 usbd_xfer_set_stall(xfer);
837 goto tr_setup;
838 }
839 return;
840 }
841 }
842
843 static void
aue_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)844 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
845 {
846 struct aue_softc *sc = usbd_xfer_softc(xfer);
847 if_t ifp = uether_getifp(&sc->sc_ue);
848 struct usb_page_cache *pc;
849 struct mbuf *m;
850 uint8_t buf[2];
851 int actlen;
852
853 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
854 pc = usbd_xfer_get_frame(xfer, 0);
855
856 switch (USB_GET_STATE(xfer)) {
857 case USB_ST_TRANSFERRED:
858 DPRINTFN(11, "transfer of %d bytes complete\n", actlen);
859 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
860
861 /* FALLTHROUGH */
862 case USB_ST_SETUP:
863 tr_setup:
864 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) {
865 /*
866 * don't send anything if there is no link !
867 */
868 return;
869 }
870 m = if_dequeue(ifp);
871
872 if (m == NULL)
873 return;
874 if (m->m_pkthdr.len > MCLBYTES)
875 m->m_pkthdr.len = MCLBYTES;
876 if (sc->sc_flags & AUE_FLAG_VER_2) {
877 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len);
878
879 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len);
880
881 } else {
882 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2));
883
884 /*
885 * The ADMtek documentation says that the
886 * packet length is supposed to be specified
887 * in the first two bytes of the transfer,
888 * however it actually seems to ignore this
889 * info and base the frame size on the bulk
890 * transfer length.
891 */
892 buf[0] = (uint8_t)(m->m_pkthdr.len);
893 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8);
894
895 usbd_copy_in(pc, 0, buf, 2);
896 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len);
897 }
898
899 /*
900 * if there's a BPF listener, bounce a copy
901 * of this frame to him:
902 */
903 BPF_MTAP(ifp, m);
904
905 m_freem(m);
906
907 usbd_transfer_submit(xfer);
908 return;
909
910 default: /* Error */
911 DPRINTFN(11, "transfer error, %s\n",
912 usbd_errstr(error));
913
914 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
915
916 if (error != USB_ERR_CANCELLED) {
917 /* try to clear stall first */
918 usbd_xfer_set_stall(xfer);
919 goto tr_setup;
920 }
921 return;
922 }
923 }
924
925 static void
aue_tick(struct usb_ether * ue)926 aue_tick(struct usb_ether *ue)
927 {
928 struct aue_softc *sc = uether_getsc(ue);
929 struct mii_data *mii = GET_MII(sc);
930
931 AUE_LOCK_ASSERT(sc, MA_OWNED);
932
933 mii_tick(mii);
934 if ((sc->sc_flags & AUE_FLAG_LINK) == 0
935 && mii->mii_media_status & IFM_ACTIVE &&
936 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
937 sc->sc_flags |= AUE_FLAG_LINK;
938 aue_start(ue);
939 }
940 }
941
942 static void
aue_start(struct usb_ether * ue)943 aue_start(struct usb_ether *ue)
944 {
945 struct aue_softc *sc = uether_getsc(ue);
946
947 /*
948 * start the USB transfers, if not already started:
949 */
950 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]);
951 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]);
952 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]);
953 }
954
955 static void
aue_init(struct usb_ether * ue)956 aue_init(struct usb_ether *ue)
957 {
958 struct aue_softc *sc = uether_getsc(ue);
959 if_t ifp = uether_getifp(ue);
960 int i;
961
962 AUE_LOCK_ASSERT(sc, MA_OWNED);
963
964 /*
965 * Cancel pending I/O
966 */
967 aue_reset(sc);
968
969 /* Set MAC address */
970 for (i = 0; i != ETHER_ADDR_LEN; i++)
971 aue_csr_write_1(sc, AUE_PAR0 + i, if_getlladdr(ifp)[i]);
972
973 /* update promiscuous setting */
974 aue_setpromisc(ue);
975
976 /* Load the multicast filter. */
977 aue_setmulti(ue);
978
979 /* Enable RX and TX */
980 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB);
981 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB);
982 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR);
983
984 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]);
985
986 if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0);
987 aue_start(ue);
988 }
989
990 static void
aue_setpromisc(struct usb_ether * ue)991 aue_setpromisc(struct usb_ether *ue)
992 {
993 struct aue_softc *sc = uether_getsc(ue);
994 if_t ifp = uether_getifp(ue);
995
996 AUE_LOCK_ASSERT(sc, MA_OWNED);
997
998 /* if we want promiscuous mode, set the allframes bit: */
999 if (if_getflags(ifp) & IFF_PROMISC)
1000 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
1001 else
1002 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
1003 }
1004
1005 /*
1006 * Set media options.
1007 */
1008 static int
aue_ifmedia_upd(if_t ifp)1009 aue_ifmedia_upd(if_t ifp)
1010 {
1011 struct aue_softc *sc = if_getsoftc(ifp);
1012 struct mii_data *mii = GET_MII(sc);
1013 struct mii_softc *miisc;
1014 int error;
1015
1016 AUE_LOCK_ASSERT(sc, MA_OWNED);
1017
1018 sc->sc_flags &= ~AUE_FLAG_LINK;
1019 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1020 PHY_RESET(miisc);
1021 error = mii_mediachg(mii);
1022 return (error);
1023 }
1024
1025 /*
1026 * Report current media status.
1027 */
1028 static void
aue_ifmedia_sts(if_t ifp,struct ifmediareq * ifmr)1029 aue_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
1030 {
1031 struct aue_softc *sc = if_getsoftc(ifp);
1032 struct mii_data *mii = GET_MII(sc);
1033
1034 AUE_LOCK(sc);
1035 mii_pollstat(mii);
1036 ifmr->ifm_active = mii->mii_media_active;
1037 ifmr->ifm_status = mii->mii_media_status;
1038 AUE_UNLOCK(sc);
1039 }
1040
1041 /*
1042 * Stop the adapter and free any mbufs allocated to the
1043 * RX and TX lists.
1044 */
1045 static void
aue_stop(struct usb_ether * ue)1046 aue_stop(struct usb_ether *ue)
1047 {
1048 struct aue_softc *sc = uether_getsc(ue);
1049 if_t ifp = uether_getifp(ue);
1050
1051 AUE_LOCK_ASSERT(sc, MA_OWNED);
1052
1053 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
1054 sc->sc_flags &= ~AUE_FLAG_LINK;
1055
1056 /*
1057 * stop all the transfers, if not already stopped:
1058 */
1059 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]);
1060 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]);
1061 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]);
1062
1063 aue_csr_write_1(sc, AUE_CTL0, 0);
1064 aue_csr_write_1(sc, AUE_CTL1, 0);
1065 aue_reset(sc);
1066 }
1067