1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH12K_CORE_H
8 #define ATH12K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/firmware.h>
17 #include <linux/panic_notifier.h>
18 #include <linux/average.h>
19 #include "qmi.h"
20 #include "htc.h"
21 #include "wmi.h"
22 #include "hal.h"
23 #include "dp.h"
24 #include "ce.h"
25 #include "mac.h"
26 #include "hw.h"
27 #include "hal_rx.h"
28 #include "reg.h"
29 #include "dbring.h"
30 #include "fw.h"
31 #include "acpi.h"
32 #include "wow.h"
33 #include "debugfs_htt_stats.h"
34 #include "coredump.h"
35
36 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
37
38 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512
39
40 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
41
42 /* Pending management packets threshold for dropping probe responses */
43 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
44
45 /* SMBIOS type containing Board Data File Name Extension */
46 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8
47
48 /* SMBIOS type structure length (excluding strings-set) */
49 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9
50
51 /* The magic used by QCA spec */
52 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_"
53
54 #define ATH12K_INVALID_HW_MAC_ID 0xFF
55 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ)
56
57 #define ATH12K_MON_TIMER_INTERVAL 10
58 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ)
59 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3
60 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5
61 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
62 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
63 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
64
65 #define ATH12K_MAX_SOCS 3
66 #define ATH12K_GROUP_MAX_RADIO (ATH12K_MAX_SOCS * MAX_RADIOS)
67 #define ATH12K_INVALID_GROUP_ID 0xFF
68 #define ATH12K_INVALID_DEVICE_ID 0xFF
69
70 #define ATH12K_MAX_MLO_PEERS 256
71 #define ATH12K_MLO_PEER_ID_INVALID 0xFFFF
72
73 enum ath12k_bdf_search {
74 ATH12K_BDF_SEARCH_DEFAULT,
75 ATH12K_BDF_SEARCH_BUS_AND_BOARD,
76 };
77
78 enum wme_ac {
79 WME_AC_BE,
80 WME_AC_BK,
81 WME_AC_VI,
82 WME_AC_VO,
83 WME_NUM_AC
84 };
85
86 #define ATH12K_HT_MCS_MAX 7
87 #define ATH12K_VHT_MCS_MAX 9
88 #define ATH12K_HE_MCS_MAX 11
89 #define ATH12K_EHT_MCS_MAX 15
90
91 enum ath12k_crypt_mode {
92 /* Only use hardware crypto engine */
93 ATH12K_CRYPT_MODE_HW,
94 /* Only use software crypto */
95 ATH12K_CRYPT_MODE_SW,
96 };
97
ath12k_tid_to_ac(u32 tid)98 static inline enum wme_ac ath12k_tid_to_ac(u32 tid)
99 {
100 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
101 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
102 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
103 WME_AC_VO);
104 }
105
ath12k_le32hilo_to_u64(__le32 hi,__le32 lo)106 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo)
107 {
108 u64 hi64 = le32_to_cpu(hi);
109 u64 lo64 = le32_to_cpu(lo);
110
111 return (hi64 << 32) | lo64;
112 }
113
114 enum ath12k_skb_flags {
115 ATH12K_SKB_HW_80211_ENCAP = BIT(0),
116 ATH12K_SKB_CIPHER_SET = BIT(1),
117 };
118
119 struct ath12k_skb_cb {
120 dma_addr_t paddr;
121 struct ath12k *ar;
122 struct ieee80211_vif *vif;
123 dma_addr_t paddr_ext_desc;
124 u32 cipher;
125 u8 flags;
126 u8 link_id;
127 };
128
129 struct ath12k_skb_rxcb {
130 dma_addr_t paddr;
131 bool is_first_msdu;
132 bool is_last_msdu;
133 bool is_continuation;
134 bool is_mcbc;
135 bool is_eapol;
136 struct hal_rx_desc *rx_desc;
137 u8 err_rel_src;
138 u8 err_code;
139 u8 hw_link_id;
140 u8 unmapped;
141 u8 is_frag;
142 u8 tid;
143 u16 peer_id;
144 bool is_end_of_ppdu;
145 };
146
147 enum ath12k_hw_rev {
148 ATH12K_HW_QCN9274_HW10,
149 ATH12K_HW_QCN9274_HW20,
150 ATH12K_HW_WCN7850_HW20
151 };
152
153 enum ath12k_firmware_mode {
154 /* the default mode, standard 802.11 functionality */
155 ATH12K_FIRMWARE_MODE_NORMAL,
156
157 /* factory tests etc */
158 ATH12K_FIRMWARE_MODE_FTM,
159 };
160
161 #define ATH12K_IRQ_NUM_MAX 57
162 #define ATH12K_EXT_IRQ_NUM_MAX 16
163
164 struct ath12k_ext_irq_grp {
165 struct ath12k_base *ab;
166 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX];
167 u32 num_irq;
168 u32 grp_id;
169 u64 timestamp;
170 bool napi_enabled;
171 struct napi_struct napi;
172 struct net_device *napi_ndev;
173 };
174
175 struct ath12k_smbios_bdf {
176 struct dmi_header hdr;
177 u32 padding;
178 u8 bdf_enabled;
179 u8 bdf_ext[];
180 } __packed;
181
182 #define HEHANDLE_CAP_PHYINFO_SIZE 3
183 #define HECAP_PHYINFO_SIZE 9
184 #define HECAP_MACINFO_SIZE 5
185 #define HECAP_TXRX_MCS_NSS_SIZE 2
186 #define HECAP_PPET16_PPET8_MAX_SIZE 25
187
188 #define HE_PPET16_PPET8_SIZE 8
189
190 /* 802.11ax PPE (PPDU packet Extension) threshold */
191 struct he_ppe_threshold {
192 u32 numss_m1;
193 u32 ru_mask;
194 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
195 };
196
197 struct ath12k_he {
198 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
199 u32 hecap_rxmcsnssmap;
200 u32 hecap_txmcsnssmap;
201 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
202 struct he_ppe_threshold hecap_ppet;
203 u32 heop_param;
204 };
205
206 enum {
207 WMI_HOST_TP_SCALE_MAX = 0,
208 WMI_HOST_TP_SCALE_50 = 1,
209 WMI_HOST_TP_SCALE_25 = 2,
210 WMI_HOST_TP_SCALE_12 = 3,
211 WMI_HOST_TP_SCALE_MIN = 4,
212 WMI_HOST_TP_SCALE_SIZE = 5,
213 };
214
215 enum ath12k_scan_state {
216 ATH12K_SCAN_IDLE,
217 ATH12K_SCAN_STARTING,
218 ATH12K_SCAN_RUNNING,
219 ATH12K_SCAN_ABORTING,
220 };
221
222 enum ath12k_hw_group_flags {
223 ATH12K_GROUP_FLAG_REGISTERED,
224 ATH12K_GROUP_FLAG_UNREGISTER,
225 };
226
227 enum ath12k_dev_flags {
228 ATH12K_FLAG_CAC_RUNNING,
229 ATH12K_FLAG_CRASH_FLUSH,
230 ATH12K_FLAG_RAW_MODE,
231 ATH12K_FLAG_HW_CRYPTO_DISABLED,
232 ATH12K_FLAG_RECOVERY,
233 ATH12K_FLAG_UNREGISTERING,
234 ATH12K_FLAG_REGISTERED,
235 ATH12K_FLAG_QMI_FAIL,
236 ATH12K_FLAG_HTC_SUSPEND_COMPLETE,
237 ATH12K_FLAG_CE_IRQ_ENABLED,
238 ATH12K_FLAG_EXT_IRQ_ENABLED,
239 ATH12K_FLAG_QMI_FW_READY_COMPLETE,
240 ATH12K_FLAG_FTM_SEGMENTED,
241 };
242
243 struct ath12k_tx_conf {
244 bool changed;
245 u16 ac;
246 struct ieee80211_tx_queue_params tx_queue_params;
247 };
248
249 struct ath12k_key_conf {
250 enum set_key_cmd cmd;
251 struct list_head list;
252 struct ieee80211_sta *sta;
253 struct ieee80211_key_conf *key;
254 };
255
256 struct ath12k_vif_cache {
257 struct ath12k_tx_conf tx_conf;
258 struct ath12k_key_conf key_conf;
259 u32 bss_conf_changed;
260 };
261
262 struct ath12k_rekey_data {
263 u8 kck[NL80211_KCK_LEN];
264 u8 kek[NL80211_KCK_LEN];
265 u64 replay_ctr;
266 bool enable_offload;
267 };
268
269 struct ath12k_link_vif {
270 u32 vdev_id;
271 u32 beacon_interval;
272 u32 dtim_period;
273 u16 ast_hash;
274 u16 ast_idx;
275 u16 tcl_metadata;
276 u8 hal_addr_search_flags;
277 u8 search_type;
278
279 struct ath12k *ar;
280
281 int bank_id;
282 u8 vdev_id_check_en;
283
284 struct wmi_wmm_params_all_arg wmm_params;
285 struct list_head list;
286
287 bool is_created;
288 bool is_started;
289 bool is_up;
290 u8 bssid[ETH_ALEN];
291 struct cfg80211_bitrate_mask bitrate_mask;
292 struct delayed_work connection_loss_work;
293 int num_legacy_stations;
294 int rtscts_prot_mode;
295 int txpower;
296 bool rsnie_present;
297 bool wpaie_present;
298 struct ieee80211_chanctx_conf chanctx;
299 u8 vdev_stats_id;
300 u32 punct_bitmap;
301 u8 link_id;
302 struct ath12k_vif *ahvif;
303 struct ath12k_rekey_data rekey_data;
304
305 u8 current_cntdown_counter;
306 };
307
308 struct ath12k_vif {
309 enum wmi_vdev_type vdev_type;
310 enum wmi_vdev_subtype vdev_subtype;
311 struct ieee80211_vif *vif;
312 struct ath12k_hw *ah;
313
314 union {
315 struct {
316 u32 uapsd;
317 } sta;
318 struct {
319 /* 127 stations; wmi limit */
320 u8 tim_bitmap[16];
321 u8 tim_len;
322 u32 ssid_len;
323 u8 ssid[IEEE80211_MAX_SSID_LEN];
324 bool hidden_ssid;
325 /* P2P_IE with NoA attribute for P2P_GO case */
326 u32 noa_len;
327 u8 *noa_data;
328 } ap;
329 } u;
330
331 u32 aid;
332 u32 key_cipher;
333 u8 tx_encap_type;
334 bool ps;
335 atomic_t mcbc_gsn;
336
337 struct ath12k_link_vif deflink;
338 struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS];
339 struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS];
340 /* indicates bitmap of link vif created in FW */
341 u16 links_map;
342 u8 last_scan_link;
343
344 /* Must be last - ends in a flexible-array member.
345 *
346 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
347 * especially because it has a flexible array. Find a better way.
348 */
349 struct ieee80211_chanctx_conf chanctx;
350 };
351
352 struct ath12k_vif_iter {
353 u32 vdev_id;
354 struct ath12k *ar;
355 struct ath12k_link_vif *arvif;
356 };
357
358 #define HAL_AST_IDX_INVALID 0xFFFF
359 #define HAL_RX_MAX_MCS 12
360 #define HAL_RX_MAX_MCS_HT 31
361 #define HAL_RX_MAX_MCS_VHT 9
362 #define HAL_RX_MAX_MCS_HE 11
363 #define HAL_RX_MAX_MCS_BE 15
364 #define HAL_RX_MAX_NSS 8
365 #define HAL_RX_MAX_NUM_LEGACY_RATES 12
366
367 struct ath12k_rx_peer_rate_stats {
368 u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1];
369 u64 vht_mcs_count[HAL_RX_MAX_MCS_VHT + 1];
370 u64 he_mcs_count[HAL_RX_MAX_MCS_HE + 1];
371 u64 be_mcs_count[HAL_RX_MAX_MCS_BE + 1];
372 u64 nss_count[HAL_RX_MAX_NSS];
373 u64 bw_count[HAL_RX_BW_MAX];
374 u64 gi_count[HAL_RX_GI_MAX];
375 u64 legacy_count[HAL_RX_MAX_NUM_LEGACY_RATES];
376 u64 rx_rate[HAL_RX_BW_MAX][HAL_RX_GI_MAX][HAL_RX_MAX_NSS][HAL_RX_MAX_MCS_HT + 1];
377 };
378
379 struct ath12k_rx_peer_stats {
380 u64 num_msdu;
381 u64 num_mpdu_fcs_ok;
382 u64 num_mpdu_fcs_err;
383 u64 tcp_msdu_count;
384 u64 udp_msdu_count;
385 u64 other_msdu_count;
386 u64 ampdu_msdu_count;
387 u64 non_ampdu_msdu_count;
388 u64 stbc_count;
389 u64 beamformed_count;
390 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
391 u64 tid_count[IEEE80211_NUM_TIDS + 1];
392 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
393 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
394 u64 rx_duration;
395 u64 dcm_count;
396 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
397 struct ath12k_rx_peer_rate_stats pkt_stats;
398 struct ath12k_rx_peer_rate_stats byte_stats;
399 };
400
401 #define ATH12K_HE_MCS_NUM 12
402 #define ATH12K_VHT_MCS_NUM 10
403 #define ATH12K_BW_NUM 5
404 #define ATH12K_NSS_NUM 4
405 #define ATH12K_LEGACY_NUM 12
406 #define ATH12K_GI_NUM 4
407 #define ATH12K_HT_MCS_NUM 32
408
409 enum ath12k_pkt_rx_err {
410 ATH12K_PKT_RX_ERR_FCS,
411 ATH12K_PKT_RX_ERR_TKIP,
412 ATH12K_PKT_RX_ERR_CRYPT,
413 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL,
414 ATH12K_PKT_RX_ERR_MAX,
415 };
416
417 enum ath12k_ampdu_subfrm_num {
418 ATH12K_AMPDU_SUBFRM_NUM_10,
419 ATH12K_AMPDU_SUBFRM_NUM_20,
420 ATH12K_AMPDU_SUBFRM_NUM_30,
421 ATH12K_AMPDU_SUBFRM_NUM_40,
422 ATH12K_AMPDU_SUBFRM_NUM_50,
423 ATH12K_AMPDU_SUBFRM_NUM_60,
424 ATH12K_AMPDU_SUBFRM_NUM_MORE,
425 ATH12K_AMPDU_SUBFRM_NUM_MAX,
426 };
427
428 enum ath12k_amsdu_subfrm_num {
429 ATH12K_AMSDU_SUBFRM_NUM_1,
430 ATH12K_AMSDU_SUBFRM_NUM_2,
431 ATH12K_AMSDU_SUBFRM_NUM_3,
432 ATH12K_AMSDU_SUBFRM_NUM_4,
433 ATH12K_AMSDU_SUBFRM_NUM_MORE,
434 ATH12K_AMSDU_SUBFRM_NUM_MAX,
435 };
436
437 enum ath12k_counter_type {
438 ATH12K_COUNTER_TYPE_BYTES,
439 ATH12K_COUNTER_TYPE_PKTS,
440 ATH12K_COUNTER_TYPE_MAX,
441 };
442
443 enum ath12k_stats_type {
444 ATH12K_STATS_TYPE_SUCC,
445 ATH12K_STATS_TYPE_FAIL,
446 ATH12K_STATS_TYPE_RETRY,
447 ATH12K_STATS_TYPE_AMPDU,
448 ATH12K_STATS_TYPE_MAX,
449 };
450
451 struct ath12k_htt_data_stats {
452 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM];
453 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM];
454 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM];
455 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM];
456 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM];
457 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM];
458 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM];
459 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX];
460 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX];
461 };
462
463 struct ath12k_htt_tx_stats {
464 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX];
465 u64 tx_duration;
466 u64 ba_fails;
467 u64 ack_fails;
468 u16 ru_start;
469 u16 ru_tones;
470 u32 mu_group[MAX_MU_GROUP_ID];
471 };
472
473 struct ath12k_per_ppdu_tx_stats {
474 u16 succ_pkts;
475 u16 failed_pkts;
476 u16 retry_pkts;
477 u32 succ_bytes;
478 u32 failed_bytes;
479 u32 retry_bytes;
480 };
481
482 struct ath12k_wbm_tx_stats {
483 u64 wbm_tx_comp_stats[HAL_WBM_REL_HTT_TX_COMP_STATUS_MAX];
484 };
485
486 DECLARE_EWMA(avg_rssi, 10, 8)
487
488 struct ath12k_link_sta {
489 struct ath12k_link_vif *arvif;
490 struct ath12k_sta *ahsta;
491
492 /* link address similar to ieee80211_link_sta */
493 u8 addr[ETH_ALEN];
494
495 /* the following are protected by ar->data_lock */
496 u32 changed; /* IEEE80211_RC_* */
497 u32 bw;
498 u32 nss;
499 u32 smps;
500
501 struct wiphy_work update_wk;
502 struct rate_info txrate;
503 struct rate_info last_txrate;
504 u64 rx_duration;
505 u64 tx_duration;
506 u8 rssi_comb;
507 struct ewma_avg_rssi avg_rssi;
508 u8 link_id;
509 struct ath12k_rx_peer_stats *rx_stats;
510 struct ath12k_wbm_tx_stats *wbm_tx_stats;
511 u32 bw_prev;
512 u32 peer_nss;
513 s8 rssi_beacon;
514
515 /* For now the assoc link will be considered primary */
516 bool is_assoc_link;
517
518 /* for firmware use only */
519 u8 link_idx;
520 };
521
522 struct ath12k_sta {
523 struct ath12k_vif *ahvif;
524 enum hal_pn_type pn_type;
525 struct ath12k_link_sta deflink;
526 struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
527 /* indicates bitmap of link sta created in FW */
528 u16 links_map;
529 u8 assoc_link_id;
530 u16 ml_peer_id;
531 u8 num_peer;
532
533 enum ieee80211_sta_state state;
534 };
535
536 #define ATH12K_MIN_5G_FREQ 4150
537 #define ATH12K_MIN_6G_FREQ 5925
538 #define ATH12K_MAX_6G_FREQ 7115
539 #define ATH12K_NUM_CHANS 101
540 #define ATH12K_MAX_5G_CHAN 173
541
542 enum ath12k_hw_state {
543 ATH12K_HW_STATE_OFF,
544 ATH12K_HW_STATE_ON,
545 ATH12K_HW_STATE_RESTARTING,
546 ATH12K_HW_STATE_RESTARTED,
547 ATH12K_HW_STATE_WEDGED,
548 ATH12K_HW_STATE_TM,
549 /* Add other states as required */
550 };
551
552 /* Antenna noise floor */
553 #define ATH12K_DEFAULT_NOISE_FLOOR -95
554
555 struct ath12k_ftm_event_obj {
556 u32 data_pos;
557 u32 expected_seq;
558 u8 *eventdata;
559 };
560
561 struct ath12k_fw_stats {
562 u32 pdev_id;
563 u32 stats_id;
564 struct list_head pdevs;
565 struct list_head vdevs;
566 struct list_head bcn;
567 bool fw_stats_done;
568 };
569
570 struct ath12k_dbg_htt_stats {
571 enum ath12k_dbg_htt_ext_stats_type type;
572 u32 cfg_param[4];
573 u8 reset;
574 struct debug_htt_stats_req *stats_req;
575 };
576
577 struct ath12k_debug {
578 struct dentry *debugfs_pdev;
579 struct dentry *debugfs_pdev_symlink;
580 struct ath12k_dbg_htt_stats htt_stats;
581 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type;
582 bool tpc_request;
583 struct completion tpc_complete;
584 struct wmi_tpc_stats_arg *tpc_stats;
585 u32 rx_filter;
586 bool extd_rx_stats;
587 };
588
589 struct ath12k_per_peer_tx_stats {
590 u32 succ_bytes;
591 u32 retry_bytes;
592 u32 failed_bytes;
593 u32 duration;
594 u16 succ_pkts;
595 u16 retry_pkts;
596 u16 failed_pkts;
597 u16 ru_start;
598 u16 ru_tones;
599 u8 ba_fails;
600 u8 ppdu_type;
601 u32 mu_grpid;
602 u32 mu_pos;
603 bool is_ampdu;
604 };
605
606 #define ATH12K_FLUSH_TIMEOUT (5 * HZ)
607 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
608
609 struct ath12k {
610 struct ath12k_base *ab;
611 struct ath12k_pdev *pdev;
612 struct ath12k_hw *ah;
613 struct ath12k_wmi_pdev *wmi;
614 struct ath12k_pdev_dp dp;
615 u8 mac_addr[ETH_ALEN];
616 u32 ht_cap_info;
617 u32 vht_cap_info;
618 struct ath12k_he ar_he;
619 bool supports_6ghz;
620 struct {
621 struct completion started;
622 struct completion completed;
623 struct completion on_channel;
624 struct delayed_work timeout;
625 enum ath12k_scan_state state;
626 bool is_roc;
627 int roc_freq;
628 bool roc_notify;
629 struct wiphy_work vdev_clean_wk;
630 struct ath12k_link_vif *arvif;
631 } scan;
632
633 struct {
634 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
635 struct ieee80211_sband_iftype_data
636 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
637 } mac;
638
639 unsigned long dev_flags;
640 unsigned int filter_flags;
641 u32 min_tx_power;
642 u32 max_tx_power;
643 u32 txpower_limit_2g;
644 u32 txpower_limit_5g;
645 u32 txpower_scale;
646 u32 power_scale;
647 u32 chan_tx_pwr;
648 u32 num_stations;
649 u32 max_num_stations;
650
651 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
652 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info,
653 * channel context data, survey info, test mode data.
654 */
655 spinlock_t data_lock;
656
657 struct list_head arvifs;
658 /* should never be NULL; needed for regular htt rx */
659 struct ieee80211_channel *rx_channel;
660
661 /* valid during scan; needed for mgmt rx during scan */
662 struct ieee80211_channel *scan_channel;
663
664 u8 cfg_tx_chainmask;
665 u8 cfg_rx_chainmask;
666 u8 num_rx_chains;
667 u8 num_tx_chains;
668 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
669 u8 pdev_idx;
670 u8 lmac_id;
671 u8 hw_link_id;
672
673 struct completion peer_assoc_done;
674 struct completion peer_delete_done;
675
676 int install_key_status;
677 struct completion install_key_done;
678
679 int last_wmi_vdev_start_status;
680 struct completion vdev_setup_done;
681 struct completion vdev_delete_done;
682
683 int num_peers;
684 int max_num_peers;
685 u32 num_started_vdevs;
686 u32 num_created_vdevs;
687 unsigned long long allocated_vdev_map;
688
689 struct idr txmgmt_idr;
690 /* protects txmgmt_idr data */
691 spinlock_t txmgmt_idr_lock;
692 atomic_t num_pending_mgmt_tx;
693 wait_queue_head_t txmgmt_empty_waitq;
694
695 /* cycle count is reported twice for each visited channel during scan.
696 * access protected by data_lock
697 */
698 u32 survey_last_rx_clear_count;
699 u32 survey_last_cycle_count;
700
701 /* Channel info events are expected to come in pairs without and with
702 * COMPLETE flag set respectively for each channel visit during scan.
703 *
704 * However there are deviations from this rule. This flag is used to
705 * avoid reporting garbage data.
706 */
707 bool ch_info_can_report_survey;
708 struct survey_info survey[ATH12K_NUM_CHANS];
709 struct completion bss_survey_done;
710
711 struct work_struct regd_update_work;
712
713 struct wiphy_work wmi_mgmt_tx_work;
714 struct sk_buff_head wmi_mgmt_tx_queue;
715
716 struct ath12k_wow wow;
717 struct completion target_suspend;
718 bool target_suspend_ack;
719 struct ath12k_per_peer_tx_stats peer_tx_stats;
720 struct list_head ppdu_stats_info;
721 u32 ppdu_stat_list_depth;
722
723 struct ath12k_per_peer_tx_stats cached_stats;
724 u32 last_ppdu_id;
725 u32 cached_ppdu_id;
726 #ifdef CONFIG_ATH12K_DEBUGFS
727 struct ath12k_debug debug;
728 #endif
729
730 bool dfs_block_radar_events;
731 bool monitor_conf_enabled;
732 bool monitor_vdev_created;
733 bool monitor_started;
734 int monitor_vdev_id;
735
736 struct wiphy_radio_freq_range freq_range;
737
738 bool nlo_enabled;
739
740 struct completion fw_stats_complete;
741
742 struct completion mlo_setup_done;
743 u32 mlo_setup_status;
744 u8 ftm_msgref;
745 struct ath12k_fw_stats fw_stats;
746 };
747
748 struct ath12k_hw {
749 struct ieee80211_hw *hw;
750 struct device *dev;
751
752 /* Protect the write operation of the hardware state ath12k_hw::state
753 * between hardware start<=>reconfigure<=>stop transitions.
754 */
755 struct mutex hw_mutex;
756 enum ath12k_hw_state state;
757 bool regd_updated;
758 bool use_6ghz_regd;
759
760 u8 num_radio;
761
762 DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS);
763
764 /* protected by wiphy_lock() */
765 struct list_head ml_peers;
766
767 /* Keep last */
768 struct ath12k radio[] __aligned(sizeof(void *));
769 };
770
771 struct ath12k_band_cap {
772 u32 phy_id;
773 u32 max_bw_supported;
774 u32 ht_cap_info;
775 u32 he_cap_info[2];
776 u32 he_mcs;
777 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
778 struct ath12k_wmi_ppe_threshold_arg he_ppet;
779 u16 he_6ghz_capa;
780 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
781 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE];
782 u32 eht_mcs_20_only;
783 u32 eht_mcs_80;
784 u32 eht_mcs_160;
785 u32 eht_mcs_320;
786 struct ath12k_wmi_ppe_threshold_arg eht_ppet;
787 u32 eht_cap_info_internal;
788 };
789
790 struct ath12k_pdev_cap {
791 u32 supported_bands;
792 u32 ampdu_density;
793 u32 vht_cap;
794 u32 vht_mcs;
795 u32 he_mcs;
796 u32 tx_chain_mask;
797 u32 rx_chain_mask;
798 u32 tx_chain_mask_shift;
799 u32 rx_chain_mask_shift;
800 struct ath12k_band_cap band[NUM_NL80211_BANDS];
801 u32 eml_cap;
802 u32 mld_cap;
803 };
804
805 struct mlo_timestamp {
806 u32 info;
807 u32 sync_timestamp_lo_us;
808 u32 sync_timestamp_hi_us;
809 u32 mlo_offset_lo;
810 u32 mlo_offset_hi;
811 u32 mlo_offset_clks;
812 u32 mlo_comp_clks;
813 u32 mlo_comp_timer;
814 };
815
816 struct ath12k_pdev {
817 struct ath12k *ar;
818 u32 pdev_id;
819 u32 hw_link_id;
820 struct ath12k_pdev_cap cap;
821 u8 mac_addr[ETH_ALEN];
822 struct mlo_timestamp timestamp;
823 };
824
825 struct ath12k_fw_pdev {
826 u32 pdev_id;
827 u32 phy_id;
828 u32 supported_bands;
829 };
830
831 struct ath12k_board_data {
832 const struct firmware *fw;
833 const void *data;
834 size_t len;
835 };
836
837 struct ath12k_soc_dp_tx_err_stats {
838 /* TCL Ring Descriptor unavailable */
839 u32 desc_na[DP_TCL_NUM_RING_MAX];
840 /* Other failures during dp_tx due to mem allocation failure
841 * idr unavailable etc.
842 */
843 atomic_t misc_fail;
844 };
845
846 struct ath12k_soc_dp_stats {
847 u32 err_ring_pkts;
848 u32 invalid_rbm;
849 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
850 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
851 u32 hal_reo_error[DP_REO_DST_RING_MAX];
852 struct ath12k_soc_dp_tx_err_stats tx_err;
853 };
854
855 struct ath12k_mlo_memory {
856 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];
857 int mlo_mem_size;
858 bool init_done;
859 };
860
861 struct ath12k_hw_link {
862 u8 device_id;
863 u8 pdev_idx;
864 };
865
866 /* Holds info on the group of devices that are registered as a single
867 * wiphy, protected with struct ath12k_hw_group::mutex.
868 */
869 struct ath12k_hw_group {
870 struct list_head list;
871 u8 id;
872 u8 num_devices;
873 u8 num_probed;
874 u8 num_started;
875 unsigned long flags;
876 struct ath12k_base *ab[ATH12K_MAX_SOCS];
877
878 /* protects access to this struct */
879 struct mutex mutex;
880
881 /* Holds information of wiphy (hw) registration.
882 *
883 * In Multi/Single Link Operation case, all pdevs are registered as
884 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is
885 * registered as separate wiphys.
886 */
887 struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO];
888 u8 num_hw;
889 bool mlo_capable;
890 struct device_node *wsi_node[ATH12K_MAX_SOCS];
891 struct ath12k_mlo_memory mlo_mem;
892 struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO];
893 bool hw_link_id_init_done;
894 };
895
896 /* Holds WSI info specific to each device, excluding WSI group info */
897 struct ath12k_wsi_info {
898 u32 index;
899 u32 hw_link_id_base;
900 };
901
902 /* Master structure to hold the hw data which may be used in core module */
903 struct ath12k_base {
904 enum ath12k_hw_rev hw_rev;
905 struct platform_device *pdev;
906 struct device *dev;
907 struct ath12k_qmi qmi;
908 struct ath12k_wmi_base wmi_ab;
909 struct completion fw_ready;
910 u8 device_id;
911 int num_radios;
912 /* HW channel counters frequency value in hertz common to all MACs */
913 u32 cc_freq_hz;
914
915 struct ath12k_dump_file_data *dump_data;
916 size_t ath12k_coredump_len;
917 struct work_struct dump_work;
918
919 struct ath12k_htc htc;
920
921 struct ath12k_dp dp;
922
923 void __iomem *mem;
924 unsigned long mem_len;
925
926 struct {
927 enum ath12k_bus bus;
928 const struct ath12k_hif_ops *ops;
929 } hif;
930
931 struct {
932 struct completion wakeup_completed;
933 u32 wmi_conf_rx_decap_mode;
934 } wow;
935
936 struct ath12k_ce ce;
937 struct timer_list rx_replenish_retry;
938 struct ath12k_hal hal;
939 /* To synchronize core_start/core_stop */
940 struct mutex core_lock;
941 /* Protects data like peers */
942 spinlock_t base_lock;
943
944 /* Single pdev device (struct ath12k_hw_params::single_pdev_only):
945 *
946 * Firmware maintains data for all bands but advertises a single
947 * phy to the host which is stored as a single element in this
948 * array.
949 *
950 * Other devices:
951 *
952 * This array will contain as many elements as the number of
953 * radios.
954 */
955 struct ath12k_pdev pdevs[MAX_RADIOS];
956
957 /* struct ath12k_hw_params::single_pdev_only devices use this to
958 * store phy specific data
959 */
960 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS];
961 u8 fw_pdev_count;
962
963 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS];
964
965 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS];
966 unsigned long long free_vdev_map;
967 unsigned long long free_vdev_stats_id_map;
968 struct list_head peers;
969 wait_queue_head_t peer_mapping_wq;
970 u8 mac_addr[ETH_ALEN];
971 bool wmi_ready;
972 u32 wlan_init_status;
973 int irq_num[ATH12K_IRQ_NUM_MAX];
974 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX];
975 struct napi_struct *napi;
976 struct ath12k_wmi_target_cap_arg target_caps;
977 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
978 bool pdevs_macaddr_valid;
979
980 const struct ath12k_hw_params *hw_params;
981
982 const struct firmware *cal_file;
983
984 /* Below regd's are protected by ab->data_lock */
985 /* This is the regd set for every radio
986 * by the firmware during initialization
987 */
988 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
989 /* This regd is set during dynamic country setting
990 * This may or may not be used during the runtime
991 */
992 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
993
994 /* Current DFS Regulatory */
995 enum ath12k_dfs_region dfs_region;
996 struct ath12k_soc_dp_stats soc_stats;
997 #ifdef CONFIG_ATH12K_DEBUGFS
998 struct dentry *debugfs_soc;
999 #endif
1000
1001 unsigned long dev_flags;
1002 struct completion driver_recovery;
1003 struct workqueue_struct *workqueue;
1004 struct work_struct restart_work;
1005 struct workqueue_struct *workqueue_aux;
1006 struct work_struct reset_work;
1007 atomic_t reset_count;
1008 atomic_t recovery_count;
1009 bool is_reset;
1010 struct completion reset_complete;
1011 /* continuous recovery fail count */
1012 atomic_t fail_cont_count;
1013 unsigned long reset_fail_timeout;
1014 struct {
1015 /* protected by data_lock */
1016 u32 fw_crash_counter;
1017 } stats;
1018 u32 pktlog_defs_checksum;
1019
1020 struct ath12k_dbring_cap *db_caps;
1021 u32 num_db_cap;
1022
1023 struct timer_list mon_reap_timer;
1024
1025 struct completion htc_suspend;
1026
1027 u64 fw_soc_drop_count;
1028 bool static_window_map;
1029
1030 struct work_struct rfkill_work;
1031 /* true means radio is on */
1032 bool rfkill_radio_on;
1033
1034 struct {
1035 enum ath12k_bdf_search bdf_search;
1036 u32 vendor;
1037 u32 device;
1038 u32 subsystem_vendor;
1039 u32 subsystem_device;
1040 } id;
1041
1042 struct {
1043 u32 api_version;
1044
1045 const struct firmware *fw;
1046 const u8 *amss_data;
1047 size_t amss_len;
1048 const u8 *amss_dualmac_data;
1049 size_t amss_dualmac_len;
1050 const u8 *m3_data;
1051 size_t m3_len;
1052
1053 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT);
1054 } fw;
1055
1056 const struct hal_rx_ops *hal_rx_ops;
1057
1058 struct completion restart_completed;
1059
1060 #ifdef CONFIG_ACPI
1061
1062 struct {
1063 bool started;
1064 u32 func_bit;
1065 bool acpi_tas_enable;
1066 bool acpi_bios_sar_enable;
1067 bool acpi_disable_11be;
1068 bool acpi_disable_rfkill;
1069 bool acpi_cca_enable;
1070 bool acpi_band_edge_enable;
1071 bool acpi_enable_bdf;
1072 u32 bit_flag;
1073 char bdf_string[ATH12K_ACPI_BDF_MAX_LEN];
1074 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE];
1075 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE];
1076 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE];
1077 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE];
1078 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE];
1079 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE];
1080 } acpi;
1081
1082 #endif /* CONFIG_ACPI */
1083
1084 struct notifier_block panic_nb;
1085
1086 struct ath12k_hw_group *ag;
1087 struct ath12k_wsi_info wsi_info;
1088 enum ath12k_firmware_mode fw_mode;
1089 struct ath12k_ftm_event_obj ftm_event_obj;
1090
1091 /* must be last */
1092 u8 drv_priv[] __aligned(sizeof(void *));
1093 };
1094
1095 struct ath12k_pdev_map {
1096 struct ath12k_base *ab;
1097 u8 pdev_idx;
1098 };
1099
1100 struct ath12k_fw_stats_vdev {
1101 struct list_head list;
1102
1103 u32 vdev_id;
1104 u32 beacon_snr;
1105 u32 data_snr;
1106 u32 num_tx_frames[WLAN_MAX_AC];
1107 u32 num_rx_frames;
1108 u32 num_tx_frames_retries[WLAN_MAX_AC];
1109 u32 num_tx_frames_failures[WLAN_MAX_AC];
1110 u32 num_rts_fail;
1111 u32 num_rts_success;
1112 u32 num_rx_err;
1113 u32 num_rx_discard;
1114 u32 num_tx_not_acked;
1115 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1116 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1117 };
1118
1119 struct ath12k_fw_stats_bcn {
1120 struct list_head list;
1121
1122 u32 vdev_id;
1123 u32 tx_bcn_succ_cnt;
1124 u32 tx_bcn_outage_cnt;
1125 };
1126
1127 struct ath12k_fw_stats_pdev {
1128 struct list_head list;
1129
1130 /* PDEV stats */
1131 s32 ch_noise_floor;
1132 u32 tx_frame_count;
1133 u32 rx_frame_count;
1134 u32 rx_clear_count;
1135 u32 cycle_count;
1136 u32 phy_err_count;
1137 u32 chan_tx_power;
1138 u32 ack_rx_bad;
1139 u32 rts_bad;
1140 u32 rts_good;
1141 u32 fcs_bad;
1142 u32 no_beacons;
1143 u32 mib_int_count;
1144
1145 /* PDEV TX stats */
1146 s32 comp_queued;
1147 s32 comp_delivered;
1148 s32 msdu_enqued;
1149 s32 mpdu_enqued;
1150 s32 wmm_drop;
1151 s32 local_enqued;
1152 s32 local_freed;
1153 s32 hw_queued;
1154 s32 hw_reaped;
1155 s32 underrun;
1156 s32 tx_abort;
1157 s32 mpdus_requed;
1158 u32 tx_ko;
1159 u32 data_rc;
1160 u32 self_triggers;
1161 u32 sw_retry_failure;
1162 u32 illgl_rate_phy_err;
1163 u32 pdev_cont_xretry;
1164 u32 pdev_tx_timeout;
1165 u32 pdev_resets;
1166 u32 stateless_tid_alloc_failure;
1167 u32 phy_underrun;
1168 u32 txop_ovf;
1169
1170 /* PDEV RX stats */
1171 s32 mid_ppdu_route_change;
1172 s32 status_rcvd;
1173 s32 r0_frags;
1174 s32 r1_frags;
1175 s32 r2_frags;
1176 s32 r3_frags;
1177 s32 htt_msdus;
1178 s32 htt_mpdus;
1179 s32 loc_msdus;
1180 s32 loc_mpdus;
1181 s32 oversize_amsdu;
1182 s32 phy_errs;
1183 s32 phy_err_drop;
1184 s32 mpdu_errs;
1185 };
1186
1187 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab);
1188 int ath12k_core_pre_init(struct ath12k_base *ab);
1189 int ath12k_core_init(struct ath12k_base *ath12k);
1190 void ath12k_core_deinit(struct ath12k_base *ath12k);
1191 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,
1192 enum ath12k_bus bus);
1193 void ath12k_core_free(struct ath12k_base *ath12k);
1194 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab,
1195 struct ath12k_board_data *bd,
1196 char *filename);
1197 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k,
1198 struct ath12k_board_data *bd);
1199 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd);
1200 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd);
1201 int ath12k_core_check_dt(struct ath12k_base *ath12k);
1202 int ath12k_core_check_smbios(struct ath12k_base *ab);
1203 void ath12k_core_halt(struct ath12k *ar);
1204 int ath12k_core_resume_early(struct ath12k_base *ab);
1205 int ath12k_core_resume(struct ath12k_base *ab);
1206 int ath12k_core_suspend(struct ath12k_base *ab);
1207 int ath12k_core_suspend_late(struct ath12k_base *ab);
1208 void ath12k_core_hw_group_unassign(struct ath12k_base *ab);
1209 u8 ath12k_get_num_partner_link(struct ath12k *ar);
1210
1211 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,
1212 const char *filename);
1213 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab);
1214 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);
1215 u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab);
1216
1217 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag);
1218
ath12k_scan_state_str(enum ath12k_scan_state state)1219 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
1220 {
1221 switch (state) {
1222 case ATH12K_SCAN_IDLE:
1223 return "idle";
1224 case ATH12K_SCAN_STARTING:
1225 return "starting";
1226 case ATH12K_SCAN_RUNNING:
1227 return "running";
1228 case ATH12K_SCAN_ABORTING:
1229 return "aborting";
1230 }
1231
1232 return "unknown";
1233 }
1234
ATH12K_SKB_CB(struct sk_buff * skb)1235 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb)
1236 {
1237 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) >
1238 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1239 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1240 }
1241
ATH12K_SKB_RXCB(struct sk_buff * skb)1242 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb)
1243 {
1244 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb));
1245 return (struct ath12k_skb_rxcb *)skb->cb;
1246 }
1247
ath12k_vif_to_ahvif(struct ieee80211_vif * vif)1248 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif)
1249 {
1250 return (struct ath12k_vif *)vif->drv_priv;
1251 }
1252
ath12k_sta_to_ahsta(struct ieee80211_sta * sta)1253 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta)
1254 {
1255 return (struct ath12k_sta *)sta->drv_priv;
1256 }
1257
ath12k_ahsta_to_sta(struct ath12k_sta * ahsta)1258 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta)
1259 {
1260 return container_of((void *)ahsta, struct ieee80211_sta, drv_priv);
1261 }
1262
ath12k_ahvif_to_vif(struct ath12k_vif * ahvif)1263 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif)
1264 {
1265 return container_of((void *)ahvif, struct ieee80211_vif, drv_priv);
1266 }
1267
ath12k_ab_to_ar(struct ath12k_base * ab,int mac_id)1268 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab,
1269 int mac_id)
1270 {
1271 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar;
1272 }
1273
ath12k_core_create_firmware_path(struct ath12k_base * ab,const char * filename,void * buf,size_t buf_len)1274 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab,
1275 const char *filename,
1276 void *buf, size_t buf_len)
1277 {
1278 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR,
1279 ab->hw_params->fw.dir, filename);
1280 }
1281
ath12k_bus_str(enum ath12k_bus bus)1282 static inline const char *ath12k_bus_str(enum ath12k_bus bus)
1283 {
1284 switch (bus) {
1285 case ATH12K_BUS_PCI:
1286 return "pci";
1287 }
1288
1289 return "unknown";
1290 }
1291
ath12k_hw_to_ah(struct ieee80211_hw * hw)1292 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw)
1293 {
1294 return hw->priv;
1295 }
1296
ath12k_ah_to_ar(struct ath12k_hw * ah,u8 hw_link_id)1297 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 hw_link_id)
1298 {
1299 if (WARN(hw_link_id >= ah->num_radio,
1300 "bad hw link id %d, so switch to default link\n", hw_link_id))
1301 hw_link_id = 0;
1302
1303 return &ah->radio[hw_link_id];
1304 }
1305
ath12k_ar_to_ah(struct ath12k * ar)1306 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar)
1307 {
1308 return ar->ah;
1309 }
1310
ath12k_ar_to_hw(struct ath12k * ar)1311 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar)
1312 {
1313 return ar->ah->hw;
1314 }
1315
1316 #define for_each_ar(ah, ar, index) \
1317 for ((index) = 0; ((index) < (ah)->num_radio && \
1318 ((ar) = &(ah)->radio[(index)])); (index)++)
1319
ath12k_ag_to_ah(struct ath12k_hw_group * ag,int idx)1320 static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx)
1321 {
1322 return ag->ah[idx];
1323 }
1324
ath12k_ag_set_ah(struct ath12k_hw_group * ag,int idx,struct ath12k_hw * ah)1325 static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx,
1326 struct ath12k_hw *ah)
1327 {
1328 ag->ah[idx] = ah;
1329 }
1330
ath12k_ab_to_ag(struct ath12k_base * ab)1331 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab)
1332 {
1333 return ab->ag;
1334 }
1335
ath12k_core_started(struct ath12k_base * ab)1336 static inline void ath12k_core_started(struct ath12k_base *ab)
1337 {
1338 lockdep_assert_held(&ab->ag->mutex);
1339
1340 ab->ag->num_started++;
1341 }
1342
ath12k_core_stopped(struct ath12k_base * ab)1343 static inline void ath12k_core_stopped(struct ath12k_base *ab)
1344 {
1345 lockdep_assert_held(&ab->ag->mutex);
1346
1347 ab->ag->num_started--;
1348 }
1349
ath12k_ag_to_ab(struct ath12k_hw_group * ag,u8 device_id)1350 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag,
1351 u8 device_id)
1352 {
1353 return ag->ab[device_id];
1354 }
1355
1356 #endif /* _CORE_H_ */
1357