xref: /illumos-gate/usr/src/uts/intel/io/dktp/controller/ata/ata_fsm.h (revision 2d6eb4a5e0a47d30189497241345dc5466bb68ab)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 1997 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _ATA_FSM_H
28 #define	_ATA_FSM_H
29 
30 #ifdef	__cplusplus
31 extern "C" {
32 #endif
33 
34 
35 /*
36  *
37  * The interrupt reason can be interpreted from other bits as follows:
38  *
39  *  IO  CoD  DRQ
40  *  --  ---  ---
41  *   0    0    1  == 1 Data to device
42  *   0    1    0  == 2 Idle
43  *   0    1    1  == 3 Send ATAPI CDB to device
44  *   1    0    1  == 5 Data from device
45  *   1    1    0  == 6 Status ready
46  *   1    1    1  == 7 Future use
47  *
48  */
49 
50 /*
51  * This macro encodes the interrupt reason into a one byte
52  * event code which is used to index the FSM tables
53  */
54 #define	ATAPI_EVENT(drq, intr)	\
55 	(((unsigned char)((drq) & ATS_DRQ) >> 3) \
56 	| (((intr) & (ATI_IO | ATI_COD)) << 1))
57 
58 /*
59  * These are the names for the encoded ATAPI events
60  */
61 #define	ATAPI_EVENT_0		0
62 #define	ATAPI_EVENT_IDLE	ATAPI_EVENT(0, ATI_COD)
63 #define	ATAPI_EVENT_2		2
64 #define	ATAPI_EVENT_STATUS	ATAPI_EVENT(0, ATI_IO | ATI_COD)
65 #define	ATAPI_EVENT_PIO_OUT	ATAPI_EVENT(ATS_DRQ, 0)
66 #define	ATAPI_EVENT_CDB		ATAPI_EVENT(ATS_DRQ, ATI_COD)
67 #define	ATAPI_EVENT_PIO_IN	ATAPI_EVENT(ATS_DRQ, ATI_IO)
68 #define	ATAPI_EVENT_UNKNOWN	ATAPI_EVENT(ATS_DRQ, (ATI_IO | ATI_COD))
69 
70 #define	ATAPI_NEVENTS		8
71 
72 /*
73  * Actions for the ATAPI PIO FSM
74  *
75  */
76 
77 enum {
78 	A_UNK,		/* invalid event detected */
79 	A_NADA,		/* do nothing */
80 	A_CDB,		/* send the CDB */
81 	A_IN,		/* transfer data out to the device */
82 	A_OUT,		/* transfer data in from the device */
83 	A_IDLE,		/* unexpected idle phase */
84 	A_RE,		/* read the error code register */
85 	A_REX		/* alternate read the error code register */
86 };
87 
88 /*
89  * States for the ATAPI PIO FSM
90  */
91 
92 enum {
93 	S_IDLE,		/* idle or fatal error state */
94 	S_CMD,		/* command byte sent */
95 	S_CDB,		/* CDB sent */
96 	S_IN,		/* transferring data in from device */
97 	S_OUT,		/* transferring data out to device */
98 	S_DMA,		/* dma transfer active */
99 
100 	ATAPI_NSTATES
101 };
102 
103 #define	S_X	S_IDLE	/* alias for idle */
104 
105 /*
106  * controller and device functions
107  */
108 enum {
109 	ATA_FSM_START0,
110 	ATA_FSM_START1,
111 	ATA_FSM_INTR,
112 	ATA_FSM_FINI,
113 	ATA_FSM_RESET,
114 
115 	ATA_CTLR_NFUNCS
116 };
117 
118 
119 /*
120  * FSM return codes
121  */
122 enum {
123 	ATA_FSM_RC_OKAY,
124 	ATA_FSM_RC_BUSY,
125 	ATA_FSM_RC_INTR,
126 	ATA_FSM_RC_FINI
127 };
128 
129 /*
130  * states for the controller FSM
131  */
132 enum {
133 	AS_IDLE,
134 	AS_ACTIVE0,
135 	AS_ACTIVE1,
136 
137 	ATA_CTLR_NSTATES
138 };
139 
140 /*
141  * actions for the controller FSM
142  */
143 enum {
144 	AC_NADA,
145 	AC_START,
146 	AC_INTR,
147 	AC_FINI,
148 	AC_BUSY,
149 	AC_RESET_I,
150 	AC_RESET_A
151 };
152 
153 #ifdef	__cplusplus
154 }
155 #endif
156 
157 #endif /* _ATA_FSM_H */
158