1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
23 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */
24 /* All Rights Reserved */
25
26 /*
27 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Milan Jurik. All rights reserved.
29 * Copyright (c) 2016 by Delphix. All rights reserved.
30 * Copyright 2026 Oxide Computer Company
31 * Copyright 2024 Hans Rosenfeld
32 */
33
34
35 /*
36 * Serial I/O driver for 8250/16450/16550A/16650/16750/16950 chips.
37 */
38
39 #include <sys/param.h>
40 #include <sys/types.h>
41 #include <sys/signal.h>
42 #include <sys/stream.h>
43 #include <sys/termio.h>
44 #include <sys/errno.h>
45 #include <sys/file.h>
46 #include <sys/cmn_err.h>
47 #include <sys/stropts.h>
48 #include <sys/strsubr.h>
49 #include <sys/strtty.h>
50 #include <sys/debug.h>
51 #include <sys/kbio.h>
52 #include <sys/cred.h>
53 #include <sys/stat.h>
54 #include <sys/consdev.h>
55 #include <sys/mkdev.h>
56 #include <sys/kmem.h>
57 #include <sys/cred.h>
58 #include <sys/strsun.h>
59 #ifdef DEBUG
60 #include <sys/promif.h>
61 #endif
62 #include <sys/modctl.h>
63 #include <sys/ddi.h>
64 #include <sys/sunddi.h>
65 #include <sys/pci.h>
66 #include <sys/asy.h>
67 #include <sys/policy.h>
68 #include <sys/sysmacros.h>
69
70 /*
71 * set the RX FIFO trigger_level to half the RX FIFO size for now
72 * we may want to make this configurable later.
73 */
74 static int asy_trig_level = ASY_FCR_RHR_TRIG_8;
75
76 int asy_drain_check = 15000000; /* tunable: exit drain check time */
77 int asy_min_dtr_low = 500000; /* tunable: minimum DTR down time */
78 int asy_min_utbrk = 100000; /* tunable: minumum untimed brk time */
79
80 int asymaxchip = ASY_MAXCHIP; /* tunable: limit chip support we look for */
81
82 /*
83 * Just in case someone has a chip with broken loopback mode, we provide a
84 * means to disable the loopback test. By default, we only loopback test
85 * UARTs which look like they have FIFOs bigger than 16 bytes.
86 * Set to 0 to suppress test, or to 2 to enable test on any size FIFO.
87 */
88 int asy_fifo_test = 1; /* tunable: set to 0, 1, or 2 */
89
90 /*
91 * Allow ability to switch off testing of the scratch register.
92 * Some UART emulators might not have it. This will also disable the test
93 * for Exar/Startech ST16C650, as that requires use of the SCR register.
94 */
95 int asy_scr_test = 1; /* tunable: set to 0 to disable SCR reg test */
96
97 /*
98 * As we don't yet support on-chip flow control, it's a bad idea to put a
99 * large number of characters in the TX FIFO, since if other end tells us
100 * to stop transmitting, we can only stop filling the TX FIFO, but it will
101 * still carry on draining by itself, so remote end still gets what's left
102 * in the FIFO.
103 */
104 int asy_max_tx_fifo = 16; /* tunable: max fill of TX FIFO */
105
106 #define async_stopc async_ttycommon.t_stopc
107 #define async_startc async_ttycommon.t_startc
108
109 #define ASY_INIT 1
110 #define ASY_NOINIT 0
111
112 /* enum value for sw and hw flow control action */
113 typedef enum {
114 FLOW_CHECK,
115 FLOW_STOP,
116 FLOW_START
117 } async_flowc_action;
118
119 #ifdef DEBUG
120
121 typedef enum {
122 ASY_DEBUG_INIT = 1 << 0, /* Output during driver initialization. */
123 ASY_DEBUG_INPUT = 1 << 1, /* Report characters received during int. */
124 ASY_DEBUG_EOT = 1 << 2, /* Output when wait for xmit to finish. */
125 ASY_DEBUG_CLOSE = 1 << 3, /* Output when driver open/close called */
126 ASY_DEBUG_HFLOW = 1 << 4, /* Output when H/W flowcontrol is active */
127 ASY_DEBUG_PROCS = 1 << 5, /* Output each proc name as it is entered. */
128 ASY_DEBUG_STATE = 1 << 6, /* Output value of Interrupt Service Reg. */
129 ASY_DEBUG_INTR = 1 << 7, /* Output value of Interrupt Service Reg. */
130 ASY_DEBUG_OUT = 1 << 8, /* Output about output events. */
131 ASY_DEBUG_BUSY = 1 << 9, /* Output when xmit is enabled/disabled */
132 ASY_DEBUG_MODEM = 1 << 10, /* Output about modem status & control. */
133 ASY_DEBUG_MODM2 = 1 << 11, /* Output about modem status & control. */
134 ASY_DEBUG_IOCTL = 1 << 12, /* Output about ioctl messages. */
135 ASY_DEBUG_CHIP = 1 << 13, /* Output about chip identification. */
136 ASY_DEBUG_SFLOW = 1 << 14, /* Output when S/W flowcontrol is active */
137 } asy_debug_t;
138
139 static asy_debug_t debug = 0;
140
141 #define ASY_DEBUG(asy, x) (asy->asy_debug & (x))
142 #define ASY_DPRINTF(asy, fac, format, ...) \
143 if (ASY_DEBUG(asy, fac)) \
144 asyerror(asy, CE_CONT, "!%s: " format, __func__, ##__VA_ARGS__)
145 #else
146 #define ASY_DEBUG(asy, x) B_FALSE
147 #define ASY_DPRINTF(asy, fac, format, ...)
148 #endif
149
150 /*
151 * PPS (Pulse Per Second) support.
152 */
153 void ddi_hardpps(struct timeval *, int);
154 /*
155 * This is protected by the asy_excl_hi of the port on which PPS event
156 * handling is enabled. Note that only one port should have this enabled at
157 * any one time. Enabling PPS handling on multiple ports will result in
158 * unpredictable (but benign) results.
159 */
160 static struct ppsclockev asy_ppsev;
161
162 #ifdef PPSCLOCKLED
163 /* XXX Use these to observe PPS latencies and jitter on a scope */
164 #define LED_ON
165 #define LED_OFF
166 #else
167 #define LED_ON
168 #define LED_OFF
169 #endif
170
171 static void asy_put_idx(const struct asycom *, asy_reg_t, uint8_t);
172 static uint8_t asy_get_idx(const struct asycom *, asy_reg_t);
173
174 static void asy_put_add(const struct asycom *, asy_reg_t, uint8_t);
175 static uint8_t asy_get_add(const struct asycom *, asy_reg_t);
176
177 static void asy_put_ext(const struct asycom *, asy_reg_t, uint8_t);
178 static uint8_t asy_get_ext(const struct asycom *, asy_reg_t);
179
180 static void asy_put_reg(const struct asycom *, asy_reg_t, uint8_t);
181 static uint8_t asy_get_reg(const struct asycom *, asy_reg_t);
182
183 static void asy_put(const struct asycom *, asy_reg_t, uint8_t);
184 static uint8_t asy_get(const struct asycom *, asy_reg_t);
185
186 static void asy_set(const struct asycom *, asy_reg_t, uint8_t);
187 static void asy_clr(const struct asycom *, asy_reg_t, uint8_t);
188
189 static void asy_enable_interrupts(const struct asycom *, uint8_t);
190 static void asy_disable_interrupts(const struct asycom *, uint8_t);
191 static void asy_set_baudrate(const struct asycom *, int);
192 static void asy_wait_baudrate(struct asycom *);
193
194 #define BAUDINDEX(cflg) (((cflg) & CBAUDEXT) ? \
195 (((cflg) & CBAUD) + CBAUD + 1) : ((cflg) & CBAUD))
196
197 static void asysetsoft(struct asycom *);
198 static uint_t asysoftintr(caddr_t, caddr_t);
199 static uint_t asyintr(caddr_t, caddr_t);
200
201 static boolean_t abort_charseq_recognize(uchar_t ch);
202
203 /* The async interrupt entry points */
204 static void async_txint(struct asycom *asy);
205 static void async_rxint(struct asycom *asy, uchar_t lsr);
206 static void async_msint(struct asycom *asy);
207 static void async_softint(struct asycom *asy);
208
209 static void async_ioctl(struct asyncline *async, queue_t *q, mblk_t *mp);
210 static void async_reioctl(void *unit);
211 static void async_iocdata(queue_t *q, mblk_t *mp);
212 static void async_restart(void *arg);
213 static void async_start(struct asyncline *async);
214 static void async_resume(struct asyncline *async);
215 static void asy_program(struct asycom *asy, int mode);
216 static void asyinit(struct asycom *asy);
217 static void asy_waiteot(struct asycom *asy);
218 static void asyputchar(cons_polledio_arg_t, uchar_t c);
219 static int asygetchar(cons_polledio_arg_t);
220 static boolean_t asyischar(cons_polledio_arg_t);
221
222 static int asymctl(struct asycom *, int, int);
223 static int asytodm(int, int);
224 static int dmtoasy(struct asycom *, int);
225 static void asyerror(const struct asycom *, int, const char *, ...)
226 __KPRINTFLIKE(3);
227 static void asy_parse_mode(dev_info_t *devi, struct asycom *asy);
228 static void asy_soft_state_free(struct asycom *);
229 static char *asy_hw_name(struct asycom *asy);
230 static void async_hold_utbrk(void *arg);
231 static void async_resume_utbrk(struct asyncline *async);
232 static void async_dtr_free(struct asyncline *async);
233 static int asy_identify_chip(dev_info_t *devi, struct asycom *asy);
234 static void asy_reset_fifo(struct asycom *asy, uchar_t flags);
235 static void asy_carrier_check(struct asycom *);
236 static int asy_getproperty(dev_info_t *devi, struct asycom *asy,
237 const char *property);
238 static boolean_t async_flowcontrol_sw_input(struct asycom *asy,
239 async_flowc_action onoff, int type);
240 static void async_flowcontrol_sw_output(struct asycom *asy,
241 async_flowc_action onoff);
242 static void async_flowcontrol_hw_input(struct asycom *asy,
243 async_flowc_action onoff, int type);
244 static void async_flowcontrol_hw_output(struct asycom *asy,
245 async_flowc_action onoff);
246
247 #define GET_PROP(devi, pname, pflag, pval, plen) \
248 (ddi_prop_op(DDI_DEV_T_ANY, (devi), PROP_LEN_AND_VAL_BUF, \
249 (pflag), (pname), (caddr_t)(pval), (plen)))
250
251 kmutex_t asy_glob_lock; /* lock protecting global data manipulation */
252 void *asy_soft_state;
253
254 /* Standard COM port I/O addresses */
255 static const int standard_com_ports[] = {
256 COM1_IOADDR, COM2_IOADDR, COM3_IOADDR, COM4_IOADDR
257 };
258
259 static int *com_ports;
260 static uint_t num_com_ports;
261
262 #ifdef DEBUG
263 /*
264 * Set this to true to make the driver pretend to do a suspend. Useful
265 * for debugging suspend/resume code with a serial debugger.
266 */
267 boolean_t asy_nosuspend = B_FALSE;
268 #endif
269
270
271 /*
272 * Baud rate table. Indexed by #defines found in sys/termios.h
273 *
274 * The default crystal frequency is 1.8432 MHz. The 8250A used a fixed /16
275 * prescaler and a 16bit divisor, split in two registers (DLH and DLL).
276 *
277 * The 16950 adds TCR and CKS registers. The TCR can be used to set the
278 * prescaler from /4 to /16. The CKS can be used, among other things, to
279 * select a isochronous 1x mode, effectively disabling the prescaler.
280 * This would theoretically allow a baud rate of 1843200 driven directly
281 * by the default crystal frequency, although the highest termios.h-defined
282 * baud rate we can support is half of that, 921600 baud.
283 */
284 #define UNSUPPORTED 0x00, 0x00, 0x00
285 static struct {
286 uint8_t asy_dlh;
287 uint8_t asy_dll;
288 uint8_t asy_tcr;
289 } asy_baud_tab[] = {
290 [B0] = { UNSUPPORTED }, /* 0 baud */
291 [B50] = { 0x09, 0x00, 0x00 }, /* 50 baud */
292 [B75] = { 0x06, 0x00, 0x00 }, /* 75 baud */
293 [B110] = { 0x04, 0x17, 0x00 }, /* 110 baud (0.026% error) */
294 [B134] = { 0x03, 0x59, 0x00 }, /* 134 baud (0.058% error) */
295 [B150] = { 0x03, 0x00, 0x00 }, /* 150 baud */
296 [B200] = { 0x02, 0x40, 0x00 }, /* 200 baud */
297 [B300] = { 0x01, 0x80, 0x00 }, /* 300 baud */
298 [B600] = { 0x00, 0xc0, 0x00 }, /* 600 baud */
299 [B1200] = { 0x00, 0x60, 0x00 }, /* 1200 baud */
300 [B1800] = { 0x00, 0x40, 0x00 }, /* 1800 baud */
301 [B2400] = { 0x00, 0x30, 0x00 }, /* 2400 baud */
302 [B4800] = { 0x00, 0x18, 0x00 }, /* 4800 baud */
303 [B9600] = { 0x00, 0x0c, 0x00 }, /* 9600 baud */
304 [B19200] = { 0x00, 0x06, 0x00 }, /* 19200 baud */
305 [B38400] = { 0x00, 0x03, 0x00 }, /* 38400 baud */
306 [B57600] = { 0x00, 0x02, 0x00 }, /* 57600 baud */
307 [B76800] = { 0x00, 0x06, 0x04 }, /* 76800 baud (16950) */
308 [B115200] = { 0x00, 0x01, 0x00 }, /* 115200 baud */
309 [B153600] = { 0x00, 0x03, 0x04 }, /* 153600 baud (16950) */
310 [B230400] = { 0x00, 0x02, 0x04 }, /* 230400 baud (16950) */
311 [B307200] = { 0x00, 0x01, 0x06 }, /* 307200 baud (16950) */
312 [B460800] = { 0x00, 0x01, 0x04 }, /* 460800 baud (16950) */
313 [B921600] = { 0x00, 0x02, 0x01 }, /* 921600 baud (16950) */
314 [B1000000] = { UNSUPPORTED }, /* 1000000 baud */
315 [B1152000] = { UNSUPPORTED }, /* 1152000 baud */
316 [B1500000] = { UNSUPPORTED }, /* 1500000 baud */
317 [B2000000] = { UNSUPPORTED }, /* 2000000 baud */
318 [B2500000] = { UNSUPPORTED }, /* 2500000 baud */
319 [B3000000] = { UNSUPPORTED }, /* 3000000 baud */
320 [B3500000] = { UNSUPPORTED }, /* 3500000 baud */
321 [B4000000] = { UNSUPPORTED }, /* 4000000 baud */
322 };
323
324 /*
325 * Register table. For each logical register, we define the minimum hwtype, the
326 * register offset, and function pointers for reading and writing the register.
327 * A NULL pointer indicates the register cannot be read from or written to,
328 * respectively.
329 */
330 static struct {
331 int asy_min_hwtype;
332 int8_t asy_reg_off;
333 uint8_t (*asy_get_reg)(const struct asycom *, asy_reg_t);
334 void (*asy_put_reg)(const struct asycom *, asy_reg_t, uint8_t);
335 } asy_reg_table[] = {
336 [ASY_ILLEGAL] = { 0, -1, NULL, NULL },
337 /* 8250 / 16450 / 16550 registers */
338 [ASY_THR] = { ASY_8250A, 0, NULL, asy_put_reg },
339 [ASY_RHR] = { ASY_8250A, 0, asy_get_reg, NULL },
340 [ASY_IER] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
341 [ASY_FCR] = { ASY_16550, 2, NULL, asy_put_reg },
342 [ASY_ISR] = { ASY_8250A, 2, asy_get_reg, NULL },
343 [ASY_LCR] = { ASY_8250A, 3, asy_get_reg, asy_put_reg },
344 [ASY_MCR] = { ASY_8250A, 4, asy_get_reg, asy_put_reg },
345 [ASY_LSR] = { ASY_8250A, 5, asy_get_reg, NULL },
346 [ASY_MSR] = { ASY_8250A, 6, asy_get_reg, NULL },
347 [ASY_SPR] = { ASY_8250A, 7, asy_get_reg, asy_put_reg },
348 [ASY_DLL] = { ASY_8250A, 0, asy_get_reg, asy_put_reg },
349 [ASY_DLH] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
350 /* 16750 extended register */
351 [ASY_EFR] = { ASY_16750, 2, asy_get_ext, asy_put_ext },
352 /* 16650 extended registers */
353 [ASY_XON1] = { ASY_16650, 4, asy_get_ext, asy_put_ext },
354 [ASY_XON2] = { ASY_16650, 5, asy_get_ext, asy_put_ext },
355 [ASY_XOFF1] = { ASY_16650, 6, asy_get_ext, asy_put_ext },
356 [ASY_XOFF2] = { ASY_16650, 7, asy_get_ext, asy_put_ext },
357 /* 16950 additional registers */
358 [ASY_ASR] = { ASY_16950, 1, asy_get_add, asy_put_add },
359 [ASY_RFL] = { ASY_16950, 3, asy_get_add, NULL },
360 [ASY_TFL] = { ASY_16950, 4, asy_get_add, NULL },
361 [ASY_ICR] = { ASY_16950, 5, asy_get_reg, asy_put_reg },
362 /* 16950 indexed registers */
363 [ASY_ACR] = { ASY_16950, 0, asy_get_idx, asy_put_idx },
364 [ASY_CPR] = { ASY_16950, 1, asy_get_idx, asy_put_idx },
365 [ASY_TCR] = { ASY_16950, 2, asy_get_idx, asy_put_idx },
366 [ASY_CKS] = { ASY_16950, 3, asy_get_idx, asy_put_idx },
367 [ASY_TTL] = { ASY_16950, 4, asy_get_idx, asy_put_idx },
368 [ASY_RTL] = { ASY_16950, 5, asy_get_idx, asy_put_idx },
369 [ASY_FCL] = { ASY_16950, 6, asy_get_idx, asy_put_idx },
370 [ASY_FCH] = { ASY_16950, 7, asy_get_idx, asy_put_idx },
371 [ASY_ID1] = { ASY_16950, 8, asy_get_idx, NULL },
372 [ASY_ID2] = { ASY_16950, 9, asy_get_idx, NULL },
373 [ASY_ID3] = { ASY_16950, 10, asy_get_idx, NULL },
374 [ASY_REV] = { ASY_16950, 11, asy_get_idx, NULL },
375 [ASY_CSR] = { ASY_16950, 12, NULL, asy_put_idx },
376 [ASY_NMR] = { ASY_16950, 13, asy_get_idx, asy_put_idx },
377 };
378
379
380 static int asyrsrv(queue_t *q);
381 static int asyopen(queue_t *rq, dev_t *dev, int flag, int sflag, cred_t *cr);
382 static int asyclose(queue_t *q, int flag, cred_t *credp);
383 static int asywputdo(queue_t *q, mblk_t *mp, boolean_t);
384 static int asywput(queue_t *q, mblk_t *mp);
385
386 struct module_info asy_info = {
387 0,
388 "asy",
389 0,
390 INFPSZ,
391 4096,
392 128
393 };
394
395 static struct qinit asy_rint = {
396 putq,
397 asyrsrv,
398 asyopen,
399 asyclose,
400 NULL,
401 &asy_info,
402 NULL
403 };
404
405 static struct qinit asy_wint = {
406 asywput,
407 NULL,
408 NULL,
409 NULL,
410 NULL,
411 &asy_info,
412 NULL
413 };
414
415 struct streamtab asy_str_info = {
416 &asy_rint,
417 &asy_wint,
418 NULL,
419 NULL
420 };
421
422 static void asy_intr_free(struct asycom *);
423 static int asy_intr_setup(struct asycom *, int);
424
425 static void asy_softintr_free(struct asycom *);
426 static int asy_softintr_setup(struct asycom *);
427
428 static int asy_suspend(struct asycom *);
429 static int asy_resume(dev_info_t *);
430
431 static int asyinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg,
432 void **result);
433 static int asyprobe(dev_info_t *);
434 static int asyattach(dev_info_t *, ddi_attach_cmd_t);
435 static int asydetach(dev_info_t *, ddi_detach_cmd_t);
436 static int asyquiesce(dev_info_t *);
437
438 static struct cb_ops cb_asy_ops = {
439 nodev, /* cb_open */
440 nodev, /* cb_close */
441 nodev, /* cb_strategy */
442 nodev, /* cb_print */
443 nodev, /* cb_dump */
444 nodev, /* cb_read */
445 nodev, /* cb_write */
446 nodev, /* cb_ioctl */
447 nodev, /* cb_devmap */
448 nodev, /* cb_mmap */
449 nodev, /* cb_segmap */
450 nochpoll, /* cb_chpoll */
451 ddi_prop_op, /* cb_prop_op */
452 &asy_str_info, /* cb_stream */
453 D_MP /* cb_flag */
454 };
455
456 struct dev_ops asy_ops = {
457 DEVO_REV, /* devo_rev */
458 0, /* devo_refcnt */
459 asyinfo, /* devo_getinfo */
460 nulldev, /* devo_identify */
461 asyprobe, /* devo_probe */
462 asyattach, /* devo_attach */
463 asydetach, /* devo_detach */
464 nodev, /* devo_reset */
465 &cb_asy_ops, /* devo_cb_ops */
466 NULL, /* devo_bus_ops */
467 NULL, /* power */
468 asyquiesce, /* quiesce */
469 };
470
471 static struct modldrv modldrv = {
472 &mod_driverops, /* Type of module. This one is a driver */
473 "ASY driver",
474 &asy_ops, /* driver ops */
475 };
476
477 static struct modlinkage modlinkage = {
478 MODREV_1,
479 (void *)&modldrv,
480 NULL
481 };
482
483 int
_init(void)484 _init(void)
485 {
486 int i;
487
488 i = ddi_soft_state_init(&asy_soft_state, sizeof (struct asycom), 2);
489 if (i == 0) {
490 mutex_init(&asy_glob_lock, NULL, MUTEX_DRIVER, NULL);
491 if ((i = mod_install(&modlinkage)) != 0) {
492 mutex_destroy(&asy_glob_lock);
493 ddi_soft_state_fini(&asy_soft_state);
494 #ifdef DEBUG
495 } else {
496 if (debug & ASY_DEBUG_INIT)
497 cmn_err(CE_NOTE, "!%s, debug = %x",
498 modldrv.drv_linkinfo, debug);
499 #endif
500 }
501 }
502 return (i);
503 }
504
505 int
_fini(void)506 _fini(void)
507 {
508 int i;
509
510 if ((i = mod_remove(&modlinkage)) == 0) {
511 #ifdef DEBUG
512 if (debug & ASY_DEBUG_INIT)
513 cmn_err(CE_NOTE, "!%s unloading",
514 modldrv.drv_linkinfo);
515 #endif
516 mutex_destroy(&asy_glob_lock);
517 /* free "motherboard-serial-ports" property if allocated */
518 if (com_ports != NULL && com_ports != (int *)standard_com_ports)
519 ddi_prop_free(com_ports);
520 com_ports = NULL;
521 ddi_soft_state_fini(&asy_soft_state);
522 }
523 return (i);
524 }
525
526 int
_info(struct modinfo * modinfop)527 _info(struct modinfo *modinfop)
528 {
529 return (mod_info(&modlinkage, modinfop));
530 }
531
532 static void
asy_put_idx(const struct asycom * asy,asy_reg_t reg,uint8_t val)533 asy_put_idx(const struct asycom *asy, asy_reg_t reg, uint8_t val)
534 {
535 ASSERT(asy->asy_hwtype >= ASY_16950);
536
537 ASSERT(reg >= ASY_ACR);
538 ASSERT(reg <= ASY_NREG);
539
540 /*
541 * The last value written to LCR must not have been the magic value for
542 * EFR access. Every time the driver writes that magic value to access
543 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
544 * value of LCR, so we should be good here.
545 *
546 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
547 */
548
549 /* Write indexed register offset to SPR. */
550 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
551
552 /* Write value to ICR. */
553 asy_put(asy, ASY_ICR, val);
554 }
555
556 static uint8_t
asy_get_idx(const struct asycom * asy,asy_reg_t reg)557 asy_get_idx(const struct asycom *asy, asy_reg_t reg)
558 {
559 uint8_t val;
560
561 ASSERT(asy->asy_hwtype >= ASY_16950);
562
563 ASSERT(reg >= ASY_ACR);
564 ASSERT(reg <= ASY_NREG);
565
566 /* Enable access to ICR in ACR. */
567 asy_put(asy, ASY_ACR, ASY_ACR_ICR | asy->asy_acr);
568
569 /* Write indexed register offset to SPR. */
570 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
571
572 /* Read value from ICR. */
573 val = asy_get(asy, ASY_ICR);
574
575 /* Restore ACR. */
576 asy_put(asy, ASY_ACR, asy->asy_acr);
577
578 return (val);
579 }
580
581 static void
asy_put_add(const struct asycom * asy,asy_reg_t reg,uint8_t val)582 asy_put_add(const struct asycom *asy, asy_reg_t reg, uint8_t val)
583 {
584 ASSERT(asy->asy_hwtype >= ASY_16950);
585
586 /* Only ASR is writable, RFL and TFL are read-only. */
587 ASSERT(reg == ASY_ASR);
588
589 /*
590 * Only ASR[0] (Transmitter Disabled) and ASR[1] (Remote Transmitter
591 * Disabled) are writable.
592 */
593 ASSERT((val & ~(ASY_ASR_TD | ASY_ASR_RTD)) == 0);
594
595 /* Enable access to ASR in ACR. */
596 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
597
598 /* Write value to ASR. */
599 asy_put_reg(asy, reg, val);
600
601 /* Restore ACR. */
602 asy_put(asy, ASY_ACR, asy->asy_acr);
603 }
604
605 static uint8_t
asy_get_add(const struct asycom * asy,asy_reg_t reg)606 asy_get_add(const struct asycom *asy, asy_reg_t reg)
607 {
608 uint8_t val;
609
610 ASSERT(asy->asy_hwtype >= ASY_16950);
611
612 ASSERT(reg >= ASY_ASR);
613 ASSERT(reg <= ASY_TFL);
614
615 /*
616 * The last value written to LCR must not have been the magic value for
617 * EFR access. Every time the driver writes that magic value to access
618 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
619 * value of LCR, so we should be good here.
620 *
621 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
622 */
623
624 /* Enable access to ASR in ACR. */
625 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
626
627 /* Read value from register. */
628 val = asy_get_reg(asy, reg);
629
630 /* Restore ACR. */
631 asy_put(asy, ASY_ACR, 0 | asy->asy_acr);
632
633 return (val);
634 }
635
636 static void
asy_put_ext(const struct asycom * asy,asy_reg_t reg,uint8_t val)637 asy_put_ext(const struct asycom *asy, asy_reg_t reg, uint8_t val)
638 {
639 uint8_t lcr;
640
641 /*
642 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
643 * Only two bits are assigned for auto RTS/CTS, which we don't support
644 * yet.
645 *
646 * So insist we have a 16650 or up.
647 */
648 ASSERT(asy->asy_hwtype >= ASY_16650);
649
650 ASSERT(reg >= ASY_EFR);
651 ASSERT(reg <= ASY_XOFF2);
652
653 /* Save LCR contents. */
654 lcr = asy_get(asy, ASY_LCR);
655
656 /* Enable extended register access. */
657 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
658
659 /* Write extended register */
660 asy_put_reg(asy, reg, val);
661
662 /* Restore previous LCR contents, disabling extended register access. */
663 asy_put(asy, ASY_LCR, lcr);
664 }
665
666 static uint8_t
asy_get_ext(const struct asycom * asy,asy_reg_t reg)667 asy_get_ext(const struct asycom *asy, asy_reg_t reg)
668 {
669 uint8_t lcr, val;
670
671 /*
672 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
673 * Only two bits are assigned for auto RTS/CTS, which we don't support
674 * yet.
675 *
676 * So insist we have a 16650 or up.
677 */
678 ASSERT(asy->asy_hwtype >= ASY_16650);
679
680 ASSERT(reg >= ASY_EFR);
681 ASSERT(reg <= ASY_XOFF2);
682
683 /* Save LCR contents. */
684 lcr = asy_get(asy, ASY_LCR);
685
686 /* Enable extended register access. */
687 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
688
689 /* Read extended register */
690 val = asy_get_reg(asy, reg);
691
692 /* Restore previous LCR contents, disabling extended register access. */
693 asy_put(asy, ASY_LCR, lcr);
694
695 return (val);
696 }
697
698 static void
asy_put_reg(const struct asycom * asy,asy_reg_t reg,uint8_t val)699 asy_put_reg(const struct asycom *asy, asy_reg_t reg, uint8_t val)
700 {
701 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
702
703 ddi_put8(asy->asy_iohandle,
704 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off, val);
705 }
706
707 static uint8_t
asy_get_reg(const struct asycom * asy,asy_reg_t reg)708 asy_get_reg(const struct asycom *asy, asy_reg_t reg)
709 {
710 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
711
712 return (ddi_get8(asy->asy_iohandle,
713 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off));
714 }
715
716 static void
asy_put(const struct asycom * asy,asy_reg_t reg,uint8_t val)717 asy_put(const struct asycom *asy, asy_reg_t reg, uint8_t val)
718 {
719 ASSERT(mutex_owned(&asy->asy_excl_hi));
720
721 ASSERT(reg > ASY_ILLEGAL);
722 ASSERT(reg < ASY_NREG);
723
724 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
725 ASSERT(asy_reg_table[reg].asy_put_reg != NULL);
726
727 asy_reg_table[reg].asy_put_reg(asy, reg, val);
728 }
729
730 static uint8_t
asy_get(const struct asycom * asy,asy_reg_t reg)731 asy_get(const struct asycom *asy, asy_reg_t reg)
732 {
733 uint8_t val;
734
735 ASSERT(mutex_owned(&asy->asy_excl_hi));
736
737 ASSERT(reg > ASY_ILLEGAL);
738 ASSERT(reg < ASY_NREG);
739
740 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
741 ASSERT(asy_reg_table[reg].asy_get_reg != NULL);
742
743 val = asy_reg_table[reg].asy_get_reg(asy, reg);
744
745 return (val);
746 }
747
748 static void
asy_set(const struct asycom * asy,asy_reg_t reg,uint8_t bits)749 asy_set(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
750 {
751 uint8_t val = asy_get(asy, reg);
752
753 asy_put(asy, reg, val | bits);
754 }
755
756 static void
asy_clr(const struct asycom * asy,asy_reg_t reg,uint8_t bits)757 asy_clr(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
758 {
759 uint8_t val = asy_get(asy, reg);
760
761 asy_put(asy, reg, val & ~bits);
762 }
763
764 static void
asy_enable_interrupts(const struct asycom * asy,uint8_t intr)765 asy_enable_interrupts(const struct asycom *asy, uint8_t intr)
766 {
767 /* Don't touch any IER bits we don't support. */
768 intr &= ASY_IER_ALL;
769
770 asy_set(asy, ASY_IER, intr);
771 }
772
773 static void
asy_disable_interrupts(const struct asycom * asy,uint8_t intr)774 asy_disable_interrupts(const struct asycom *asy, uint8_t intr)
775 {
776 /* Don't touch any IER bits we don't support. */
777 intr &= ASY_IER_ALL;
778
779 asy_clr(asy, ASY_IER, intr);
780 }
781
782 static void
asy_set_baudrate(const struct asycom * asy,int baudrate)783 asy_set_baudrate(const struct asycom *asy, int baudrate)
784 {
785 uint8_t tcr;
786
787 if (baudrate == 0)
788 return;
789
790 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
791 return;
792
793 tcr = asy_baud_tab[baudrate].asy_tcr;
794
795 if (tcr != 0 && asy->asy_hwtype < ASY_16950)
796 return;
797
798 if (asy->asy_hwtype >= ASY_16950) {
799 if (tcr == 0x01) {
800 /* Isochronous 1x mode is selected in CKS, not TCR. */
801 asy_put(asy, ASY_CKS,
802 ASY_CKS_RCLK_1X | ASY_CKS_TCLK_1X);
803 asy_put(asy, ASY_TCR, 0);
804 } else {
805 /* Reset CKS in case it was set to 1x mode. */
806 asy_put(asy, ASY_CKS, 0);
807
808 ASSERT(tcr == 0x00 || tcr >= 0x04 || tcr <= 0x0f);
809 asy_put(asy, ASY_TCR, tcr);
810 }
811 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
812 "setting baudrate %d, CKS 0x%02x, TCR 0x%02x",
813 baudrate, asy_get(asy, ASY_CKS), asy_get(asy, ASY_TCR));
814 }
815
816 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
817 "setting baudrate %d, divisor 0x%02x%02x",
818 baudrate, asy_baud_tab[baudrate].asy_dlh,
819 asy_baud_tab[baudrate].asy_dll);
820
821 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
822
823 asy_put(asy, ASY_DLL, asy_baud_tab[baudrate].asy_dll);
824 asy_put(asy, ASY_DLH, asy_baud_tab[baudrate].asy_dlh);
825
826 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
827 }
828
829 /*
830 * Loop until the TSR is empty.
831 *
832 * The wait period is clock / (baud * 16) * 16 * 2.
833 */
834 static void
asy_wait_baudrate(struct asycom * asy)835 asy_wait_baudrate(struct asycom *asy)
836 {
837 struct asyncline *async = asy->asy_priv;
838 int rate = BAUDINDEX(async->async_ttycommon.t_cflag);
839 clock_t usec =
840 ((((clock_t)asy_baud_tab[rate].asy_dlh) << 8) |
841 ((clock_t)asy_baud_tab[rate].asy_dll)) * 16 * 2;
842
843 ASSERT(mutex_owned(&asy->asy_excl));
844 ASSERT(mutex_owned(&asy->asy_excl_hi));
845
846 while ((asy_get(asy, ASY_LSR) & ASY_LSR_TEMT) == 0) {
847 mutex_exit(&asy->asy_excl_hi);
848 mutex_exit(&asy->asy_excl);
849 drv_usecwait(usec);
850 mutex_enter(&asy->asy_excl);
851 mutex_enter(&asy->asy_excl_hi);
852 }
853 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
854 }
855
856 void
async_put_suspq(struct asycom * asy,mblk_t * mp)857 async_put_suspq(struct asycom *asy, mblk_t *mp)
858 {
859 struct asyncline *async = asy->asy_priv;
860
861 ASSERT(mutex_owned(&asy->asy_excl));
862
863 if (async->async_suspqf == NULL)
864 async->async_suspqf = mp;
865 else
866 async->async_suspqb->b_next = mp;
867
868 async->async_suspqb = mp;
869 }
870
871 static mblk_t *
async_get_suspq(struct asycom * asy)872 async_get_suspq(struct asycom *asy)
873 {
874 struct asyncline *async = asy->asy_priv;
875 mblk_t *mp;
876
877 ASSERT(mutex_owned(&asy->asy_excl));
878
879 if ((mp = async->async_suspqf) != NULL) {
880 async->async_suspqf = mp->b_next;
881 mp->b_next = NULL;
882 } else {
883 async->async_suspqb = NULL;
884 }
885 return (mp);
886 }
887
888 static void
async_process_suspq(struct asycom * asy)889 async_process_suspq(struct asycom *asy)
890 {
891 struct asyncline *async = asy->asy_priv;
892 mblk_t *mp;
893
894 ASSERT(mutex_owned(&asy->asy_excl));
895
896 while ((mp = async_get_suspq(asy)) != NULL) {
897 queue_t *q;
898
899 q = async->async_ttycommon.t_writeq;
900 ASSERT(q != NULL);
901 mutex_exit(&asy->asy_excl);
902 (void) asywputdo(q, mp, B_FALSE);
903 mutex_enter(&asy->asy_excl);
904 }
905 async->async_flags &= ~ASYNC_DDI_SUSPENDED;
906 cv_broadcast(&async->async_flags_cv);
907 }
908
909 static int
asy_get_bus_type(dev_info_t * devinfo)910 asy_get_bus_type(dev_info_t *devinfo)
911 {
912 char *prop;
913 int bustype;
914
915 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "device_type",
916 &prop) != DDI_PROP_SUCCESS &&
917 ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "bus-type",
918 &prop) != DDI_PROP_SUCCESS) {
919 dev_err(devinfo, CE_WARN,
920 "!%s: can't figure out device type for parent \"%s\"",
921 __func__, ddi_get_name(ddi_get_parent(devinfo)));
922 return (ASY_BUS_UNKNOWN);
923 }
924
925 if (strcmp(prop, "isa") == 0)
926 bustype = ASY_BUS_ISA;
927 else if (strcmp(prop, "pci") == 0)
928 bustype = ASY_BUS_PCI;
929 else if (strcmp(prop, "pciex") == 0)
930 return (ASY_BUS_PCI);
931 else
932 bustype = ASY_BUS_UNKNOWN;
933
934 ddi_prop_free(prop);
935 return (bustype);
936 }
937
938 static int
asy_get_io_regnum_pci(dev_info_t * devi,struct asycom * asy)939 asy_get_io_regnum_pci(dev_info_t *devi, struct asycom *asy)
940 {
941 int reglen, nregs;
942 int regnum, i;
943 uint64_t size;
944 struct pci_phys_spec *reglist;
945
946 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
947 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
948 dev_err(devi, CE_WARN, "!%s: reg property"
949 " not found in devices property list", __func__);
950 return (-1);
951 }
952
953 regnum = -1;
954 nregs = reglen / sizeof (*reglist);
955 for (i = 0; i < nregs; i++) {
956 switch (reglist[i].pci_phys_hi & PCI_ADDR_MASK) {
957 case PCI_ADDR_IO: /* I/O bus reg property */
958 if (regnum == -1) /* use only the first one */
959 regnum = i;
960 break;
961
962 default:
963 break;
964 }
965 }
966
967 /* check for valid count of registers */
968 if (regnum >= 0) {
969 size = ((uint64_t)reglist[regnum].pci_size_low) |
970 ((uint64_t)reglist[regnum].pci_size_hi) << 32;
971 if (size < 8)
972 regnum = -1;
973 }
974 kmem_free(reglist, reglen);
975 return (regnum);
976 }
977
978 static int
asy_get_io_regnum_isa(dev_info_t * devi,struct asycom * asy)979 asy_get_io_regnum_isa(dev_info_t *devi, struct asycom *asy)
980 {
981 int regnum = -1;
982 int reglen, nregs;
983 struct {
984 uint_t bustype;
985 int base;
986 int size;
987 } *reglist;
988
989 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
990 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
991 dev_err(devi, CE_WARN, "!%s: reg property not found "
992 "in devices property list", __func__);
993 return (-1);
994 }
995
996 nregs = reglen / sizeof (*reglist);
997
998 /*
999 * Find the first I/O bus in the "reg" property.
1000 */
1001 for (int i = 0; i < nregs && regnum == -1; i++) {
1002 if (reglist[i].bustype == 1) {
1003 regnum = i;
1004 break;
1005 }
1006 }
1007
1008 /* check for valid count of registers */
1009 if ((regnum < 0) || (reglist[regnum].size < 8))
1010 regnum = -1;
1011
1012 kmem_free(reglist, reglen);
1013
1014 return (regnum);
1015 }
1016
1017 static int
asy_get_io_regnum(dev_info_t * devinfo,struct asycom * asy)1018 asy_get_io_regnum(dev_info_t *devinfo, struct asycom *asy)
1019 {
1020 switch (asy_get_bus_type(devinfo)) {
1021 case ASY_BUS_ISA:
1022 return (asy_get_io_regnum_isa(devinfo, asy));
1023 case ASY_BUS_PCI:
1024 return (asy_get_io_regnum_pci(devinfo, asy));
1025 default:
1026 return (-1);
1027 }
1028 }
1029
1030 static void
asy_intr_free(struct asycom * asy)1031 asy_intr_free(struct asycom *asy)
1032 {
1033 int i;
1034
1035 for (i = 0; i < asy->asy_intr_cnt; i++) {
1036 if (asy->asy_inth[i] == NULL)
1037 break;
1038
1039 if ((asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK) != 0)
1040 (void) ddi_intr_block_disable(&asy->asy_inth[i], 1);
1041 else
1042 (void) ddi_intr_disable(asy->asy_inth[i]);
1043
1044 (void) ddi_intr_remove_handler(asy->asy_inth[i]);
1045 (void) ddi_intr_free(asy->asy_inth[i]);
1046 }
1047
1048 kmem_free(asy->asy_inth, asy->asy_inth_sz);
1049 asy->asy_inth = NULL;
1050 asy->asy_inth_sz = 0;
1051 }
1052
1053 static int
asy_intr_setup(struct asycom * asy,int intr_type)1054 asy_intr_setup(struct asycom *asy, int intr_type)
1055 {
1056 int nintrs, navail, count;
1057 int ret;
1058 int i;
1059
1060 if (asy->asy_intr_types == 0) {
1061 ret = ddi_intr_get_supported_types(asy->asy_dip,
1062 &asy->asy_intr_types);
1063 if (ret != DDI_SUCCESS) {
1064 asyerror(asy, CE_WARN,
1065 "ddi_intr_get_supported_types failed");
1066 return (ret);
1067 }
1068 }
1069
1070 if ((asy->asy_intr_types & intr_type) == 0)
1071 return (DDI_FAILURE);
1072
1073 ret = ddi_intr_get_nintrs(asy->asy_dip, intr_type, &nintrs);
1074 if (ret != DDI_SUCCESS) {
1075 asyerror(asy, CE_WARN, "ddi_intr_get_nintrs failed, type %d",
1076 intr_type);
1077 return (ret);
1078 }
1079
1080 if (nintrs < 1) {
1081 asyerror(asy, CE_WARN, "no interrupts of type %d", intr_type);
1082 return (DDI_FAILURE);
1083 }
1084
1085 ret = ddi_intr_get_navail(asy->asy_dip, intr_type, &navail);
1086 if (ret != DDI_SUCCESS) {
1087 asyerror(asy, CE_WARN, "ddi_intr_get_navail failed, type %d",
1088 intr_type);
1089 return (ret);
1090 }
1091
1092 if (navail < 1) {
1093 asyerror(asy, CE_WARN, "no available interrupts, type %d",
1094 intr_type);
1095 return (DDI_FAILURE);
1096 }
1097
1098 /*
1099 * Some PCI(e) RS232 adapters seem to support more than one interrupt,
1100 * but the asy driver really doesn't.
1101 */
1102 asy->asy_inth_sz = sizeof (ddi_intr_handle_t);
1103 asy->asy_inth = kmem_zalloc(asy->asy_inth_sz, KM_SLEEP);
1104 ret = ddi_intr_alloc(asy->asy_dip, asy->asy_inth, intr_type, 0, 1,
1105 &count, 0);
1106 if (ret != DDI_SUCCESS) {
1107 asyerror(asy, CE_WARN, "ddi_intr_alloc failed, count %d, "
1108 "type %d", navail, intr_type);
1109 goto fail;
1110 }
1111
1112 if (count != 1) {
1113 asyerror(asy, CE_WARN, "ddi_intr_alloc returned not 1 but %d "
1114 "interrupts of type %d", count, intr_type);
1115 goto fail;
1116 }
1117
1118 asy->asy_intr_cnt = count;
1119
1120 ret = ddi_intr_get_pri(asy->asy_inth[0], &asy->asy_intr_pri);
1121 if (ret != DDI_SUCCESS) {
1122 asyerror(asy, CE_WARN, "ddi_intr_get_pri failed, type %d",
1123 intr_type);
1124 goto fail;
1125 }
1126
1127 for (i = 0; i < count; i++) {
1128 ret = ddi_intr_add_handler(asy->asy_inth[i], asyintr,
1129 (void *)asy, (void *)(uintptr_t)i);
1130 if (ret != DDI_SUCCESS) {
1131 asyerror(asy, CE_WARN, "ddi_intr_add_handler failed, "
1132 "int %d, type %d", i, intr_type);
1133 goto fail;
1134 }
1135 }
1136
1137 (void) ddi_intr_get_cap(asy->asy_inth[0], &asy->asy_intr_cap);
1138
1139 for (i = 0; i < count; i++) {
1140 if (asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK)
1141 ret = ddi_intr_block_enable(&asy->asy_inth[i], 1);
1142 else
1143 ret = ddi_intr_enable(asy->asy_inth[i]);
1144
1145 if (ret != DDI_SUCCESS) {
1146 asyerror(asy, CE_WARN,
1147 "enabling interrupt %d failed, type %d",
1148 i, intr_type);
1149 goto fail;
1150 }
1151 }
1152
1153 asy->asy_intr_type = intr_type;
1154 return (DDI_SUCCESS);
1155
1156 fail:
1157 asy_intr_free(asy);
1158 return (ret);
1159 }
1160
1161 static void
asy_softintr_free(struct asycom * asy)1162 asy_softintr_free(struct asycom *asy)
1163 {
1164 (void) ddi_intr_remove_softint(asy->asy_soft_inth);
1165 }
1166
1167 static int
asy_softintr_setup(struct asycom * asy)1168 asy_softintr_setup(struct asycom *asy)
1169 {
1170 int ret;
1171
1172 ret = ddi_intr_add_softint(asy->asy_dip, &asy->asy_soft_inth,
1173 ASY_SOFT_INT_PRI, asysoftintr, asy);
1174 if (ret != DDI_SUCCESS) {
1175 asyerror(asy, CE_WARN, "ddi_intr_add_softint failed");
1176 return (ret);
1177 }
1178
1179 /*
1180 * This may seem pointless since we specified ASY_SOFT_INT_PRI above,
1181 * but then it's probably a good idea to consider the soft interrupt
1182 * priority an opaque value and don't hardcode any assumptions about
1183 * its actual value here.
1184 */
1185 ret = ddi_intr_get_softint_pri(asy->asy_soft_inth,
1186 &asy->asy_soft_intr_pri);
1187 if (ret != DDI_SUCCESS) {
1188 asyerror(asy, CE_WARN, "ddi_intr_get_softint_pri failed");
1189 return (ret);
1190 }
1191
1192 return (DDI_SUCCESS);
1193 }
1194
1195
1196 static int
asy_resume(dev_info_t * devi)1197 asy_resume(dev_info_t *devi)
1198 {
1199 struct asyncline *async;
1200 struct asycom *asy;
1201 int instance = ddi_get_instance(devi); /* find out which unit */
1202
1203 #ifdef DEBUG
1204 if (asy_nosuspend)
1205 return (DDI_SUCCESS);
1206 #endif
1207 asy = ddi_get_soft_state(asy_soft_state, instance);
1208 if (asy == NULL)
1209 return (DDI_FAILURE);
1210
1211 mutex_enter(&asy->asy_soft_sr);
1212 mutex_enter(&asy->asy_excl);
1213 mutex_enter(&asy->asy_excl_hi);
1214
1215 async = asy->asy_priv;
1216 asy_disable_interrupts(asy, ASY_IER_ALL);
1217 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1218 mutex_exit(&asy->asy_excl_hi);
1219 mutex_exit(&asy->asy_excl);
1220 mutex_exit(&asy->asy_soft_sr);
1221 ASY_DPRINTF(asy, ASY_DEBUG_INIT,
1222 "Cannot identify UART chip at %p",
1223 (void *)asy->asy_ioaddr);
1224 return (DDI_FAILURE);
1225 }
1226 asy->asy_flags &= ~ASY_DDI_SUSPENDED;
1227 if (async->async_flags & ASYNC_ISOPEN) {
1228 asy_program(asy, ASY_INIT);
1229 /* Kick off output */
1230 if (async->async_ocnt > 0) {
1231 async_resume(async);
1232 } else {
1233 mutex_exit(&asy->asy_excl_hi);
1234 if (async->async_xmitblk)
1235 freeb(async->async_xmitblk);
1236 async->async_xmitblk = NULL;
1237 async_start(async);
1238 mutex_enter(&asy->asy_excl_hi);
1239 }
1240 asysetsoft(asy);
1241 }
1242 mutex_exit(&asy->asy_excl_hi);
1243 mutex_exit(&asy->asy_excl);
1244 mutex_exit(&asy->asy_soft_sr);
1245
1246 mutex_enter(&asy->asy_excl);
1247 if (async->async_flags & ASYNC_RESUME_BUFCALL) {
1248 async->async_wbufcid = bufcall(async->async_wbufcds,
1249 BPRI_HI, (void (*)(void *)) async_reioctl,
1250 (void *)(intptr_t)async->async_common->asy_unit);
1251 async->async_flags &= ~ASYNC_RESUME_BUFCALL;
1252 }
1253 async_process_suspq(asy);
1254 mutex_exit(&asy->asy_excl);
1255 return (DDI_SUCCESS);
1256 }
1257
1258 static int
asy_suspend(struct asycom * asy)1259 asy_suspend(struct asycom *asy)
1260 {
1261 struct asyncline *async = asy->asy_priv;
1262 unsigned i;
1263 uchar_t lsr;
1264
1265 #ifdef DEBUG
1266 if (asy_nosuspend)
1267 return (DDI_SUCCESS);
1268 #endif
1269 mutex_enter(&asy->asy_excl);
1270
1271 ASSERT(async->async_ops >= 0);
1272 while (async->async_ops > 0)
1273 cv_wait(&async->async_ops_cv, &asy->asy_excl);
1274
1275 async->async_flags |= ASYNC_DDI_SUSPENDED;
1276
1277 /* Wait for timed break and delay to complete */
1278 while ((async->async_flags & (ASYNC_BREAK|ASYNC_DELAY))) {
1279 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0) {
1280 async_process_suspq(asy);
1281 mutex_exit(&asy->asy_excl);
1282 return (DDI_FAILURE);
1283 }
1284 }
1285
1286 /* Clear untimed break */
1287 if (async->async_flags & ASYNC_OUT_SUSPEND)
1288 async_resume_utbrk(async);
1289
1290 mutex_exit(&asy->asy_excl);
1291
1292 mutex_enter(&asy->asy_soft_sr);
1293 mutex_enter(&asy->asy_excl);
1294 if (async->async_wbufcid != 0) {
1295 bufcall_id_t bcid = async->async_wbufcid;
1296 async->async_wbufcid = 0;
1297 async->async_flags |= ASYNC_RESUME_BUFCALL;
1298 mutex_exit(&asy->asy_excl);
1299 unbufcall(bcid);
1300 mutex_enter(&asy->asy_excl);
1301 }
1302 mutex_enter(&asy->asy_excl_hi);
1303
1304 asy_disable_interrupts(asy, ASY_IER_ALL);
1305 asy->asy_flags |= ASY_DDI_SUSPENDED;
1306
1307 /*
1308 * Hardware interrupts are disabled we can drop our high level
1309 * lock and proceed.
1310 */
1311 mutex_exit(&asy->asy_excl_hi);
1312
1313 /* Process remaining RX characters and RX errors, if any */
1314 lsr = asy_get(asy, ASY_LSR);
1315 async_rxint(asy, lsr);
1316
1317 /* Wait for TX to drain */
1318 for (i = 1000; i > 0; i--) {
1319 lsr = asy_get(asy, ASY_LSR);
1320 if ((lsr & (ASY_LSR_TEMT | ASY_LSR_THRE)) ==
1321 (ASY_LSR_TEMT | ASY_LSR_THRE))
1322 break;
1323 delay(drv_usectohz(10000));
1324 }
1325 if (i == 0)
1326 asyerror(asy, CE_WARN, "transmitter wasn't drained before "
1327 "driver was suspended");
1328
1329 mutex_exit(&asy->asy_excl);
1330 mutex_exit(&asy->asy_soft_sr);
1331
1332 return (DDI_SUCCESS);
1333 }
1334
1335 static int
asydetach(dev_info_t * devi,ddi_detach_cmd_t cmd)1336 asydetach(dev_info_t *devi, ddi_detach_cmd_t cmd)
1337 {
1338 int instance;
1339 struct asycom *asy;
1340
1341 instance = ddi_get_instance(devi); /* find out which unit */
1342
1343 asy = ddi_get_soft_state(asy_soft_state, instance);
1344 if (asy == NULL)
1345 return (DDI_FAILURE);
1346
1347 switch (cmd) {
1348 case DDI_DETACH:
1349 break;
1350
1351 case DDI_SUSPEND:
1352 return (asy_suspend(asy));
1353
1354 default:
1355 return (DDI_FAILURE);
1356 }
1357
1358 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "%s shutdown", asy_hw_name(asy));
1359
1360 /*
1361 * Ensure that interrupts are disabled prior to destroying data and
1362 * mutexes that they depend on.
1363 */
1364 if ((asy->asy_progress & ASY_PROGRESS_INT) != 0)
1365 asy_intr_free(asy);
1366
1367 if ((asy->asy_progress & ASY_PROGRESS_SOFTINT) != 0)
1368 asy_softintr_free(asy);
1369
1370 if ((asy->asy_progress & ASY_PROGRESS_ASYNC) != 0) {
1371 struct asyncline *async = asy->asy_priv;
1372
1373 asy->asy_priv = NULL;
1374 /* cancel DTR hold timeout */
1375 if (async->async_dtrtid != 0) {
1376 (void) untimeout(async->async_dtrtid);
1377 async->async_dtrtid = 0;
1378 }
1379 cv_destroy(&async->async_flags_cv);
1380 kmem_free(async, sizeof (struct asyncline));
1381 }
1382
1383 if ((asy->asy_progress & ASY_PROGRESS_MINOR) != 0)
1384 ddi_remove_minor_node(devi, NULL);
1385
1386 if ((asy->asy_progress & ASY_PROGRESS_MUTEX) != 0) {
1387 mutex_destroy(&asy->asy_excl);
1388 mutex_destroy(&asy->asy_excl_hi);
1389 mutex_destroy(&asy->asy_soft_lock);
1390 }
1391
1392 if ((asy->asy_progress & ASY_PROGRESS_REGS) != 0)
1393 ddi_regs_map_free(&asy->asy_iohandle);
1394
1395 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "shutdown complete");
1396 ddi_set_driver_private(devi, NULL);
1397 asy_soft_state_free(asy);
1398
1399 return (DDI_SUCCESS);
1400 }
1401
1402 /*
1403 * asyprobe
1404 * We don't bother probing for the hardware, as since Solaris 2.6, device
1405 * nodes are only created for auto-detected hardware or nodes explicitly
1406 * created by the user, e.g. via the DCA. However, we should check the
1407 * device node is at least vaguely usable, i.e. we have a block of 8 i/o
1408 * ports. This prevents attempting to attach to bogus serial ports which
1409 * some BIOSs still partially report when they are disabled in the BIOS.
1410 */
1411 static int
asyprobe(dev_info_t * devi)1412 asyprobe(dev_info_t *devi)
1413 {
1414 return ((asy_get_io_regnum(devi, NULL) < 0) ?
1415 DDI_PROBE_FAILURE : DDI_PROBE_DONTCARE);
1416 }
1417
1418 static int
asyattach(dev_info_t * devi,ddi_attach_cmd_t cmd)1419 asyattach(dev_info_t *devi, ddi_attach_cmd_t cmd)
1420 {
1421 int instance;
1422 int mcr;
1423 int ret;
1424 int regnum = 0;
1425 int i;
1426 struct asycom *asy;
1427 char name[ASY_MINOR_LEN];
1428 int status;
1429 static ddi_device_acc_attr_t ioattr = {
1430 .devacc_attr_version = DDI_DEVICE_ATTR_V1,
1431 .devacc_attr_endian_flags = DDI_NEVERSWAP_ACC,
1432 .devacc_attr_dataorder = DDI_STRICTORDER_ACC,
1433 .devacc_attr_access = DDI_DEFAULT_ACC
1434 };
1435
1436 switch (cmd) {
1437 case DDI_ATTACH:
1438 break;
1439
1440 case DDI_RESUME:
1441 return (asy_resume(devi));
1442
1443 default:
1444 return (DDI_FAILURE);
1445 }
1446
1447 mutex_enter(&asy_glob_lock);
1448 if (com_ports == NULL) { /* need to initialize com_ports */
1449 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, devi, 0,
1450 "motherboard-serial-ports", &com_ports, &num_com_ports) !=
1451 DDI_PROP_SUCCESS) {
1452 /* Use our built-in COM[1234] values */
1453 com_ports = (int *)standard_com_ports;
1454 num_com_ports = sizeof (standard_com_ports) /
1455 sizeof (standard_com_ports[0]);
1456 }
1457 if (num_com_ports > 10) {
1458 /* We run out of single digits for device properties */
1459 num_com_ports = 10;
1460 cmn_err(CE_WARN,
1461 "%s: more than %d motherboard-serial-ports",
1462 asy_info.mi_idname, num_com_ports);
1463 }
1464 }
1465 mutex_exit(&asy_glob_lock);
1466
1467 instance = ddi_get_instance(devi); /* find out which unit */
1468 ret = ddi_soft_state_zalloc(asy_soft_state, instance);
1469 if (ret != DDI_SUCCESS)
1470 return (DDI_FAILURE);
1471 asy = ddi_get_soft_state(asy_soft_state, instance);
1472
1473 asy->asy_dip = devi;
1474 #ifdef DEBUG
1475 asy->asy_debug = debug;
1476 #endif
1477 asy->asy_unit = instance;
1478
1479 regnum = asy_get_io_regnum(devi, asy);
1480
1481 if (regnum < 0 ||
1482 ddi_regs_map_setup(devi, regnum, (caddr_t *)&asy->asy_ioaddr,
1483 (offset_t)0, (offset_t)0, &ioattr, &asy->asy_iohandle)
1484 != DDI_SUCCESS) {
1485 asyerror(asy, CE_WARN, "could not map UART registers @ %p",
1486 (void *)asy->asy_ioaddr);
1487 goto fail;
1488 }
1489
1490 asy->asy_progress |= ASY_PROGRESS_REGS;
1491
1492 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "UART @ %p", (void *)asy->asy_ioaddr);
1493
1494 /*
1495 * Lookup the i/o address to see if this is a standard COM port
1496 * in which case we assign it the correct tty[a-d] to match the
1497 * COM port number, or some other i/o address in which case it
1498 * will be assigned /dev/term/[0123...] in some rather arbitrary
1499 * fashion.
1500 */
1501 for (i = 0; i < num_com_ports; i++) {
1502 if (asy->asy_ioaddr == (uint8_t *)(uintptr_t)com_ports[i]) {
1503 asy->asy_com_port = i + 1;
1504 break;
1505 }
1506 }
1507
1508 /*
1509 * It appears that there was async hardware that on reset did not clear
1510 * IER. Hence when we enable interrupts, this hardware would cause the
1511 * system to hang if there was input available.
1512 *
1513 * Don't use asy_disable_interrupts() as the mutexes haven't been
1514 * initialized yet.
1515 */
1516 ddi_put8(asy->asy_iohandle,
1517 asy->asy_ioaddr + asy_reg_table[ASY_IER].asy_reg_off, 0);
1518
1519 /*
1520 * Establish default settings:
1521 * - use RTS/DTR after open
1522 * - 8N1 data format
1523 * - 9600 baud
1524 */
1525 asy->asy_mcr |= ASY_MCR_RTS | ASY_MCR_DTR;
1526 asy->asy_lcr = ASY_LCR_STOP1 | ASY_LCR_BITS8;
1527 asy->asy_bidx = B9600;
1528 asy->asy_fifo_buf = 1;
1529 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
1530
1531 #ifdef DEBUG
1532 asy->asy_msint_cnt = 0; /* # of times in async_msint */
1533 #endif
1534 mcr = 0; /* don't enable until open */
1535
1536 if (asy->asy_com_port != 0) {
1537 /*
1538 * For motherboard ports, emulate tty eeprom properties.
1539 * Actually, we can't tell if a port is motherboard or not,
1540 * so for "motherboard ports", read standard DOS COM ports.
1541 */
1542 switch (asy_getproperty(devi, asy, "ignore-cd")) {
1543 case 0: /* *-ignore-cd=False */
1544 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1545 "clear ASY_IGNORE_CD");
1546 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1547 break;
1548 case 1: /* *-ignore-cd=True */
1549 /*FALLTHRU*/
1550 default: /* *-ignore-cd not defined */
1551 /*
1552 * We set rather silly defaults of soft carrier on
1553 * and DTR/RTS raised here because it might be that
1554 * one of the motherboard ports is the system console.
1555 */
1556 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1557 "set ASY_IGNORE_CD, set RTS & DTR");
1558 mcr = asy->asy_mcr; /* rts/dtr on */
1559 asy->asy_flags |= ASY_IGNORE_CD; /* ignore cd */
1560 break;
1561 }
1562
1563 /* Property for not raising DTR/RTS */
1564 switch (asy_getproperty(devi, asy, "rts-dtr-off")) {
1565 case 0: /* *-rts-dtr-off=False */
1566 asy->asy_flags |= ASY_RTS_DTR_OFF; /* OFF */
1567 mcr = asy->asy_mcr; /* rts/dtr on */
1568 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1569 "ASY_RTS_DTR_OFF set and DTR & RTS set");
1570 break;
1571 case 1: /* *-rts-dtr-off=True */
1572 /*FALLTHRU*/
1573 default: /* *-rts-dtr-off undefined */
1574 break;
1575 }
1576
1577 /* Parse property for tty modes */
1578 asy_parse_mode(devi, asy);
1579 } else {
1580 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1581 "clear ASY_IGNORE_CD, clear RTS & DTR");
1582 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1583 }
1584
1585 /*
1586 * Install per instance software interrupt handler.
1587 */
1588 if (asy_softintr_setup(asy) != DDI_SUCCESS) {
1589 asyerror(asy, CE_WARN, "Cannot set soft interrupt");
1590 goto fail;
1591 }
1592
1593 asy->asy_progress |= ASY_PROGRESS_SOFTINT;
1594
1595 /*
1596 * Install interrupt handler for this device.
1597 */
1598 if ((asy_intr_setup(asy, DDI_INTR_TYPE_MSIX) != DDI_SUCCESS) &&
1599 (asy_intr_setup(asy, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) &&
1600 (asy_intr_setup(asy, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS)) {
1601 asyerror(asy, CE_WARN, "Cannot set device interrupt");
1602 goto fail;
1603 }
1604
1605 asy->asy_progress |= ASY_PROGRESS_INT;
1606
1607 /*
1608 * Initialize mutexes before accessing the hardware
1609 */
1610 mutex_init(&asy->asy_soft_lock, NULL, MUTEX_DRIVER,
1611 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1612 mutex_init(&asy->asy_soft_sr, NULL, MUTEX_DRIVER,
1613 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1614
1615 mutex_init(&asy->asy_excl, NULL, MUTEX_DRIVER, NULL);
1616 mutex_init(&asy->asy_excl_hi, NULL, MUTEX_DRIVER,
1617 DDI_INTR_PRI(asy->asy_intr_pri));
1618
1619 asy->asy_progress |= ASY_PROGRESS_MUTEX;
1620
1621 mutex_enter(&asy->asy_excl);
1622 mutex_enter(&asy->asy_excl_hi);
1623
1624 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1625 ASY_DPRINTF(asy, ASY_DEBUG_INIT,
1626 "Cannot identify UART chip at %p",
1627 (void *)asy->asy_ioaddr);
1628 goto fail;
1629 }
1630
1631 asy_disable_interrupts(asy, ASY_IER_ALL);
1632 asy_put(asy, ASY_LCR, asy->asy_lcr);
1633 asy_set_baudrate(asy, asy->asy_bidx);
1634 asy_put(asy, ASY_MCR, mcr);
1635
1636 mutex_exit(&asy->asy_excl_hi);
1637 mutex_exit(&asy->asy_excl);
1638
1639 asyinit(asy); /* initialize the asyncline structure */
1640 asy->asy_progress |= ASY_PROGRESS_ASYNC;
1641
1642 /* create minor device nodes for this device */
1643 if (asy->asy_com_port != 0) {
1644 /*
1645 * For DOS COM ports, add letter suffix so
1646 * devfsadm can create correct link names.
1647 */
1648 name[0] = asy->asy_com_port + 'a' - 1;
1649 name[1] = '\0';
1650 } else {
1651 /*
1652 * asy port which isn't a standard DOS COM
1653 * port gets a numeric name based on instance
1654 */
1655 (void) snprintf(name, ASY_MINOR_LEN, "%d", instance);
1656 }
1657 status = ddi_create_minor_node(devi, name, S_IFCHR, instance,
1658 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB : DDI_NT_SERIAL, 0);
1659 if (status == DDI_SUCCESS) {
1660 (void) strcat(name, ",cu");
1661 status = ddi_create_minor_node(devi, name, S_IFCHR,
1662 OUTLINE | instance,
1663 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB_DO :
1664 DDI_NT_SERIAL_DO, 0);
1665 }
1666
1667 if (status != DDI_SUCCESS)
1668 goto fail;
1669
1670 asy->asy_progress |= ASY_PROGRESS_MINOR;
1671
1672 /*
1673 * Fill in the polled I/O structure.
1674 */
1675 asy->polledio.cons_polledio_version = CONSPOLLEDIO_V0;
1676 asy->polledio.cons_polledio_argument = (cons_polledio_arg_t)asy;
1677 asy->polledio.cons_polledio_putchar = asyputchar;
1678 asy->polledio.cons_polledio_getchar = asygetchar;
1679 asy->polledio.cons_polledio_ischar = asyischar;
1680 asy->polledio.cons_polledio_enter = NULL;
1681 asy->polledio.cons_polledio_exit = NULL;
1682
1683 ddi_set_driver_private(devi, asy);
1684 ddi_report_dev(devi);
1685 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
1686 return (DDI_SUCCESS);
1687
1688 fail:
1689 (void) asydetach(devi, DDI_DETACH);
1690 return (DDI_FAILURE);
1691 }
1692
1693 static int
asyinfo(dev_info_t * dip __unused,ddi_info_cmd_t infocmd,void * arg,void ** result)1694 asyinfo(dev_info_t *dip __unused, ddi_info_cmd_t infocmd, void *arg,
1695 void **result)
1696 {
1697 dev_t dev = (dev_t)arg;
1698 int instance, error;
1699 struct asycom *asy;
1700
1701 instance = UNIT(dev);
1702
1703 switch (infocmd) {
1704 case DDI_INFO_DEVT2DEVINFO:
1705 asy = ddi_get_soft_state(asy_soft_state, instance);
1706 if ((asy == NULL) || (asy->asy_dip == NULL))
1707 error = DDI_FAILURE;
1708 else {
1709 *result = (void *) asy->asy_dip;
1710 error = DDI_SUCCESS;
1711 }
1712 break;
1713 case DDI_INFO_DEVT2INSTANCE:
1714 *result = (void *)(intptr_t)instance;
1715 error = DDI_SUCCESS;
1716 break;
1717 default:
1718 error = DDI_FAILURE;
1719 }
1720 return (error);
1721 }
1722
1723 /* asy_getproperty -- walk through all name variants until we find a match */
1724
1725 static int
asy_getproperty(dev_info_t * devi,struct asycom * asy,const char * property)1726 asy_getproperty(dev_info_t *devi, struct asycom *asy, const char *property)
1727 {
1728 int len;
1729 int ret;
1730 char letter = asy->asy_com_port + 'a' - 1; /* for ttya */
1731 char number = asy->asy_com_port + '0'; /* for COM1 */
1732 char val[40];
1733 char name[40];
1734
1735 /* Property for ignoring DCD */
1736 (void) sprintf(name, "tty%c-%s", letter, property);
1737 len = sizeof (val);
1738 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1739 if (ret != DDI_PROP_SUCCESS) {
1740 (void) sprintf(name, "com%c-%s", number, property);
1741 len = sizeof (val);
1742 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1743 }
1744 if (ret != DDI_PROP_SUCCESS) {
1745 (void) sprintf(name, "tty0%c-%s", number, property);
1746 len = sizeof (val);
1747 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1748 }
1749 if (ret != DDI_PROP_SUCCESS) {
1750 (void) sprintf(name, "port-%c-%s", letter, property);
1751 len = sizeof (val);
1752 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1753 }
1754 if (ret != DDI_PROP_SUCCESS)
1755 return (-1); /* property non-existant */
1756 if (val[0] == 'f' || val[0] == 'F' || val[0] == '0')
1757 return (0); /* property false/0 */
1758 return (1); /* property true/!0 */
1759 }
1760
1761 /* asy_soft_state_free - local wrapper for ddi_soft_state_free(9F) */
1762
1763 static void
asy_soft_state_free(struct asycom * asy)1764 asy_soft_state_free(struct asycom *asy)
1765 {
1766 if (asy->asy_priv != NULL) {
1767 kmem_free(asy->asy_priv, sizeof (struct asyncline));
1768 asy->asy_priv = NULL;
1769 }
1770 ddi_soft_state_free(asy_soft_state, asy->asy_unit);
1771 }
1772
1773 static char *
asy_hw_name(struct asycom * asy)1774 asy_hw_name(struct asycom *asy)
1775 {
1776 switch (asy->asy_hwtype) {
1777 case ASY_8250A:
1778 return ("8250A/16450");
1779 case ASY_16550:
1780 return ("16550");
1781 case ASY_16550A:
1782 return ("16550A");
1783 case ASY_16650:
1784 return ("16650");
1785 case ASY_16750:
1786 return ("16750");
1787 case ASY_16950:
1788 return ("16950");
1789 }
1790
1791 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "unknown asy_hwtype: %d",
1792 asy->asy_hwtype);
1793 return ("?");
1794 }
1795
1796 static boolean_t
asy_is_devid(struct asycom * asy,char * venprop,char * devprop,int venid,int devid)1797 asy_is_devid(struct asycom *asy, char *venprop, char *devprop,
1798 int venid, int devid)
1799 {
1800 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1801 venprop, 0) != venid) {
1802 return (B_FALSE);
1803 }
1804
1805 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1806 devprop, 0) != devid) {
1807 return (B_FALSE);
1808 }
1809
1810 return (B_FALSE);
1811 }
1812
1813 static void
asy_check_loopback(struct asycom * asy)1814 asy_check_loopback(struct asycom *asy)
1815 {
1816 if (asy_get_bus_type(asy->asy_dip) != ASY_BUS_PCI)
1817 return;
1818
1819 /* Check if this is a Agere/Lucent Venus PCI modem chipset. */
1820 if (asy_is_devid(asy, "vendor-id", "device-id", 0x11c1, 0x0480) ||
1821 asy_is_devid(asy, "subsystem-vendor-id", "subsystem-id", 0x11c1,
1822 0x0480))
1823 asy->asy_flags2 |= ASY2_NO_LOOPBACK;
1824 }
1825
1826 static int
asy_identify_chip(dev_info_t * devi,struct asycom * asy)1827 asy_identify_chip(dev_info_t *devi, struct asycom *asy)
1828 {
1829 int isr, lsr, mcr, spr;
1830 dev_t dev;
1831 uint_t hwtype;
1832
1833 /*
1834 * Initially, we'll assume we have the highest supported chip model
1835 * until we find out what we actually have.
1836 */
1837 asy->asy_hwtype = ASY_MAXCHIP;
1838
1839 /*
1840 * First, see if we can even do the loopback check, which may not work
1841 * on certain hardware.
1842 */
1843 asy_check_loopback(asy);
1844
1845 if (asy_scr_test) {
1846 /* Check that the scratch register works. */
1847
1848 /* write to scratch register */
1849 asy_put(asy, ASY_SPR, ASY_SPR_TEST);
1850 /* make sure that pattern doesn't just linger on the bus */
1851 asy_put(asy, ASY_FCR, 0x00);
1852 /* read data back from scratch register */
1853 spr = asy_get(asy, ASY_SPR);
1854 if (spr != ASY_SPR_TEST) {
1855 /*
1856 * Scratch register not working.
1857 * Probably not an async chip.
1858 * 8250 and 8250B don't have scratch registers,
1859 * but only worked in ancient PC XT's anyway.
1860 */
1861 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "UART @ %p "
1862 "scratch register: expected 0x5a, got 0x%02x",
1863 (void *)asy->asy_ioaddr, spr);
1864 return (DDI_FAILURE);
1865 }
1866 }
1867 /*
1868 * Use 16550 fifo reset sequence specified in NS application
1869 * note. Disable fifos until chip is initialized.
1870 */
1871 asy_put(asy, ASY_FCR, 0x00); /* disable */
1872 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN); /* enable */
1873 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN | ASY_FCR_RHR_FL); /* reset */
1874 if (asymaxchip >= ASY_16650 && asy_scr_test) {
1875 /*
1876 * Reset 16650 enhanced regs also, in case we have one of these
1877 */
1878 asy_put(asy, ASY_EFR, 0);
1879 }
1880
1881 /*
1882 * See what sort of FIFO we have.
1883 * Try enabling it and see what chip makes of this.
1884 */
1885
1886 asy->asy_fifor = 0;
1887 if (asymaxchip >= ASY_16550A)
1888 asy->asy_fifor |=
1889 ASY_FCR_FIFO_EN | ASY_FCR_DMA | (asy_trig_level & 0xff);
1890
1891 /*
1892 * On the 16750, FCR[5] enables the 64 byte FIFO. FCR[5] can only be set
1893 * while LCR[7] = 1 (DLAB), which is taken care of by asy_reset_fifo().
1894 */
1895 if (asymaxchip >= ASY_16750)
1896 asy->asy_fifor |= ASY_FCR_FIFO64;
1897
1898 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
1899
1900 mcr = asy_get(asy, ASY_MCR);
1901 isr = asy_get(asy, ASY_ISR);
1902
1903 /*
1904 * Note we get 0xff if chip didn't return us anything,
1905 * e.g. if there's no chip there.
1906 */
1907 if (isr == 0xff) {
1908 asyerror(asy, CE_WARN, "UART @ %p interrupt register: got 0xff",
1909 (void *)asy->asy_ioaddr);
1910 return (DDI_FAILURE);
1911 }
1912
1913 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
1914 "probe fifo FIFOR=0x%02x ISR=0x%02x MCR=0x%02x",
1915 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1916
1917 /*
1918 * Detect the chip type by comparing ISR[7,6] and ISR[5].
1919 *
1920 * When the FIFOs are enabled by setting FCR[0], ISR[7,6] read as 1.
1921 * Additionally on a 16750, the 64 byte FIFOs are enabled by setting
1922 * FCR[5], and ISR[5] will read as 1, too.
1923 *
1924 * We will check later whether we have a 16650, which requires EFR[4]=1
1925 * to enable its deeper FIFOs and extra features. It does not use FCR[5]
1926 * and ISR[5] to enable deeper FIFOs like the 16750 does.
1927 */
1928 switch (isr & (ASY_ISR_FIFOEN | ASY_ISR_FIFO64)) {
1929 case 0x40: /* 16550 with broken FIFOs */
1930 hwtype = ASY_16550;
1931 asy->asy_fifor = 0;
1932 break;
1933
1934 case ASY_ISR_FIFOEN: /* 16550A with working FIFOs */
1935 hwtype = ASY_16550A;
1936 asy->asy_fifo_buf = 16;
1937 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1938 asy->asy_fifor &= ~ASY_FCR_FIFO64;
1939 break;
1940
1941 case ASY_ISR_FIFOEN | ASY_ISR_FIFO64: /* 16750 with 64byte FIFOs */
1942 hwtype = ASY_16750;
1943 asy->asy_fifo_buf = 64;
1944 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1945 break;
1946
1947 default: /* 8250A/16450 without FIFOs */
1948 hwtype = ASY_8250A;
1949 asy->asy_fifor = 0;
1950 }
1951
1952 if (hwtype > asymaxchip) {
1953 asyerror(asy, CE_WARN, "UART @ %p "
1954 "unexpected probe result: "
1955 "FCR=0x%02x ISR=0x%02x MCR=0x%02x",
1956 (void *)asy->asy_ioaddr,
1957 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1958 return (DDI_FAILURE);
1959 }
1960
1961 /*
1962 * Now reset the FIFO operation appropriate for the chip type.
1963 * Note we must call asy_reset_fifo() before any possible
1964 * downgrade of the asy->asy_hwtype, or it may not disable
1965 * the more advanced features we specifically want downgraded.
1966 */
1967 asy_reset_fifo(asy, 0);
1968
1969 /*
1970 * Check for Exar/Startech ST16C650 or newer, which will still look like
1971 * a 16550A until we enable its enhanced mode.
1972 */
1973 if (hwtype >= ASY_16550A && asymaxchip >= ASY_16650 &&
1974 asy_scr_test) {
1975 /*
1976 * Write the XOFF2 register, which shadows SPR on the 16650.
1977 * On other chips, SPR will be overwritten.
1978 */
1979 asy_put(asy, ASY_XOFF2, 0);
1980
1981 /* read back scratch register */
1982 spr = asy_get(asy, ASY_SPR);
1983
1984 if (spr == ASY_SPR_TEST) {
1985 /* looks like we have an ST16650 -- enable it */
1986 hwtype = ASY_16650;
1987 asy_put(asy, ASY_EFR, ASY_EFR_ENH_EN);
1988
1989 /*
1990 * Some 16650-compatible chips are also compatible with
1991 * the 16750 and have deeper FIFOs, which we may have
1992 * detected above. Don't downgrade the FIFO size.
1993 */
1994 if (asy->asy_fifo_buf < 32)
1995 asy->asy_fifo_buf = 32;
1996
1997 /*
1998 * Use a 24 byte transmit FIFO trigger only if were
1999 * allowed to use >16 transmit FIFO depth by the
2000 * global tunable.
2001 */
2002 if (asy_max_tx_fifo >= asy->asy_fifo_buf)
2003 asy->asy_fifor |= ASY_FCR_THR_TRIG_24;
2004 asy_reset_fifo(asy, 0);
2005 }
2006 }
2007
2008 /*
2009 * If we think we got a 16650, we may actually have a 16950, so check
2010 * for that.
2011 */
2012 if (hwtype >= ASY_16650 && asymaxchip >= ASY_16950) {
2013 uint8_t ier, asr;
2014
2015 /*
2016 * First, clear IER and read it back. That should be a no-op as
2017 * either asyattach() or asy_resume() disabled all interrupts
2018 * before we were called.
2019 */
2020 asy_put(asy, ASY_IER, 0);
2021 ier = asy_get(asy, ASY_IER);
2022 if (ier != 0) {
2023 dev_err(asy->asy_dip, CE_WARN, "!%s: UART @ %p "
2024 "interrupt enable register: got 0x%02x", __func__,
2025 (void *)asy->asy_ioaddr, ier);
2026 return (DDI_FAILURE);
2027 }
2028
2029 /*
2030 * Next, try to read ASR, which shares the register offset with
2031 * IER. ASR can only be read if the ASR enable bit is set in
2032 * ACR, which itself is an indexed registers. This is taken care
2033 * of by asy_get().
2034 *
2035 * There are a few bits in ASR which should be 1 at this point,
2036 * definitely the TX idle bit (ASR[7]) and also the FIFO size
2037 * bit (ASR[6]) since we've done everything we can to enable any
2038 * deeper FIFO support.
2039 *
2040 * Thus if we read back ASR as 0, we failed to read it, and this
2041 * isn't the chip we're looking for.
2042 */
2043 asr = asy_get(asy, ASY_ASR);
2044
2045 if (asr != ier) {
2046 hwtype = ASY_16950;
2047
2048 if ((asr & ASY_ASR_FIFOSZ) != 0)
2049 asy->asy_fifo_buf = 128;
2050 else
2051 asy->asy_fifo_buf = 16;
2052
2053 asy_reset_fifo(asy, 0);
2054
2055 /*
2056 * Enable 16950 specific trigger level registers. Set
2057 * DTR pin to be compatible to 16450, 16550, and 16750.
2058 */
2059 asy->asy_acr = ASY_ACR_TRIG | ASY_ACR_DTR_NORM;
2060 asy_put(asy, ASY_ACR, asy->asy_acr);
2061
2062 /* Set half the FIFO size as receive trigger level. */
2063 asy_put(asy, ASY_RTL, asy->asy_fifo_buf/2);
2064
2065 /*
2066 * Set the transmit trigger level to 1.
2067 *
2068 * While one would expect that any transmit trigger
2069 * level would work (the 16550 uses a hardwired level
2070 * of 16), in my tests with a 16950 compatible chip
2071 * (MosChip 9912) I would never see a TX interrupt
2072 * on any transmit trigger level > 1.
2073 */
2074 asy_put(asy, ASY_TTL, 1);
2075
2076 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ASR 0x%02x", asr);
2077 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RFL 0x%02x",
2078 asy_get(asy, ASY_RFL));
2079 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TFL 0x%02x",
2080 asy_get(asy, ASY_TFL));
2081
2082 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ACR 0x%02x",
2083 asy_get(asy, ASY_ACR));
2084 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CPR 0x%02x",
2085 asy_get(asy, ASY_CPR));
2086 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TCR 0x%02x",
2087 asy_get(asy, ASY_TCR));
2088 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CKS 0x%02x",
2089 asy_get(asy, ASY_CKS));
2090 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TTL 0x%02x",
2091 asy_get(asy, ASY_TTL));
2092 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RTL 0x%02x",
2093 asy_get(asy, ASY_RTL));
2094 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCL 0x%02x",
2095 asy_get(asy, ASY_FCL));
2096 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCH 0x%02x",
2097 asy_get(asy, ASY_FCH));
2098
2099 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2100 "Chip ID: %02x%02x%02x,%02x",
2101 asy_get(asy, ASY_ID1), asy_get(asy, ASY_ID2),
2102 asy_get(asy, ASY_ID3), asy_get(asy, ASY_REV));
2103
2104 }
2105 }
2106
2107 asy->asy_hwtype = hwtype;
2108
2109 /*
2110 * If we think we might have a FIFO larger than 16 characters,
2111 * measure FIFO size and check it against expected.
2112 */
2113 if (asy_fifo_test > 0 &&
2114 !(asy->asy_flags2 & ASY2_NO_LOOPBACK) &&
2115 (asy->asy_fifo_buf > 16 ||
2116 (asy_fifo_test > 1 && asy->asy_use_fifo == ASY_FCR_FIFO_EN) ||
2117 ASY_DEBUG(asy, ASY_DEBUG_CHIP))) {
2118 int i;
2119
2120 /* Set baud rate to 57600 (fairly arbitrary choice) */
2121 asy_set_baudrate(asy, B57600);
2122 /* Set 8 bits, 1 stop bit */
2123 asy_put(asy, ASY_LCR, ASY_LCR_STOP1 | ASY_LCR_BITS8);
2124 /* Set loopback mode */
2125 asy_put(asy, ASY_MCR, ASY_MCR_LOOPBACK);
2126
2127 /* Overfill fifo */
2128 for (i = 0; i < asy->asy_fifo_buf * 2; i++) {
2129 asy_put(asy, ASY_THR, i);
2130 }
2131 /*
2132 * Now there's an interesting question here about which
2133 * FIFO we're testing the size of, RX or TX. We just
2134 * filled the TX FIFO much faster than it can empty,
2135 * although it is possible one or two characters may
2136 * have gone from it to the TX shift register.
2137 * We wait for enough time for all the characters to
2138 * move into the RX FIFO and any excess characters to
2139 * have been lost, and then read all the RX FIFO. So
2140 * the answer we finally get will be the size which is
2141 * the MIN(RX FIFO,(TX FIFO + 1 or 2)). The critical
2142 * one is actually the TX FIFO, because if we overfill
2143 * it in normal operation, the excess characters are
2144 * lost with no warning.
2145 */
2146 /*
2147 * Wait for characters to move into RX FIFO.
2148 * In theory, 200 * asy->asy_fifo_buf * 2 should be
2149 * enough. However, in practice it isn't always, so we
2150 * increase to 400 so some slow 16550A's finish, and we
2151 * increase to 3 so we spot more characters coming back
2152 * than we sent, in case that should ever happen.
2153 */
2154 delay(drv_usectohz(400 * asy->asy_fifo_buf * 3));
2155
2156 /* Now see how many characters we can read back */
2157 for (i = 0; i < asy->asy_fifo_buf * 3; i++) {
2158 lsr = asy_get(asy, ASY_LSR);
2159 if (!(lsr & ASY_LSR_DR))
2160 break; /* FIFO emptied */
2161 (void) asy_get(asy, ASY_RHR); /* lose another */
2162 }
2163
2164 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2165 "FIFO size: expected=%d, measured=%d",
2166 asy->asy_fifo_buf, i);
2167
2168 hwtype = asy->asy_hwtype;
2169 if (i < asy->asy_fifo_buf) {
2170 /*
2171 * FIFO is somewhat smaller than we anticipated.
2172 * If we have 16 characters usable, then this
2173 * UART will probably work well enough in
2174 * 16550A mode. If less than 16 characters,
2175 * then we'd better not use it at all.
2176 * UARTs with busted FIFOs do crop up.
2177 */
2178 if (i >= 16 && asy->asy_fifo_buf >= 16) {
2179 /* fall back to a 16550A */
2180 hwtype = ASY_16550A;
2181 asy->asy_fifo_buf = 16;
2182 asy->asy_fifor &=
2183 ~(ASY_FCR_THR_TR0 | ASY_FCR_THR_TR1);
2184 } else {
2185 /* fall back to no FIFO at all */
2186 hwtype = ASY_16550;
2187 asy->asy_fifo_buf = 1;
2188 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
2189 asy->asy_fifor = 0;
2190 }
2191 } else if (i > asy->asy_fifo_buf) {
2192 /*
2193 * The FIFO is larger than expected. Use it if it is
2194 * a power of 2.
2195 */
2196 if (ISP2(i))
2197 asy->asy_fifo_buf = i;
2198 }
2199
2200 /*
2201 * We will need to reprogram the FIFO if we changed
2202 * our mind about how to drive it above, and in any
2203 * case, it would be a good idea to flush any garbage
2204 * out incase the loopback test left anything behind.
2205 * Again as earlier above, we must call asy_reset_fifo()
2206 * before any possible downgrade of asy->asy_hwtype.
2207 */
2208 if (asy->asy_hwtype >= ASY_16650 && hwtype < ASY_16650) {
2209 /* Disable 16650 enhanced mode */
2210 asy_put(asy, ASY_EFR, 0);
2211 }
2212 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
2213 asy->asy_hwtype = hwtype;
2214
2215 /* Clear loopback mode and restore DTR/RTS */
2216 asy_put(asy, ASY_MCR, mcr);
2217 }
2218
2219 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "%s @ %p",
2220 asy_hw_name(asy), (void *)asy->asy_ioaddr);
2221
2222 /* Make UART type visible in device tree for prtconf, etc */
2223 dev = makedevice(DDI_MAJOR_T_UNKNOWN, asy->asy_unit);
2224 (void) ddi_prop_update_string(dev, devi, "uart", asy_hw_name(asy));
2225
2226 if (asy->asy_hwtype == ASY_16550) /* for broken 16550's, */
2227 asy->asy_hwtype = ASY_8250A; /* drive them as 8250A */
2228
2229 return (DDI_SUCCESS);
2230 }
2231
2232 /*
2233 * asyinit() initializes the TTY protocol-private data for this channel
2234 * before enabling the interrupts.
2235 */
2236 static void
asyinit(struct asycom * asy)2237 asyinit(struct asycom *asy)
2238 {
2239 struct asyncline *async;
2240
2241 asy->asy_priv = kmem_zalloc(sizeof (struct asyncline), KM_SLEEP);
2242 async = asy->asy_priv;
2243 mutex_enter(&asy->asy_excl);
2244 async->async_common = asy;
2245 cv_init(&async->async_flags_cv, NULL, CV_DRIVER, NULL);
2246 mutex_exit(&asy->asy_excl);
2247 }
2248
2249 static int
asyopen(queue_t * rq,dev_t * dev,int flag,int sflag __unused,cred_t * cr)2250 asyopen(queue_t *rq, dev_t *dev, int flag, int sflag __unused, cred_t *cr)
2251 {
2252 struct asycom *asy;
2253 struct asyncline *async;
2254 int unit;
2255 int len;
2256 struct termios *termiosp;
2257
2258 unit = UNIT(*dev);
2259 asy = ddi_get_soft_state(asy_soft_state, unit);
2260 if (asy == NULL)
2261 return (ENXIO); /* unit not configured */
2262 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "enter");
2263 async = asy->asy_priv;
2264 mutex_enter(&asy->asy_excl);
2265
2266 again:
2267 mutex_enter(&asy->asy_excl_hi);
2268
2269 /*
2270 * Block waiting for carrier to come up, unless this is a no-delay open.
2271 */
2272 if (!(async->async_flags & ASYNC_ISOPEN)) {
2273 /*
2274 * Set the default termios settings (cflag).
2275 * Others are set in ldterm.
2276 */
2277 mutex_exit(&asy->asy_excl_hi);
2278
2279 if (ddi_getlongprop(DDI_DEV_T_ANY, ddi_root_node(),
2280 0, "ttymodes",
2281 (caddr_t)&termiosp, &len) == DDI_PROP_SUCCESS &&
2282 len == sizeof (struct termios)) {
2283 async->async_ttycommon.t_cflag = termiosp->c_cflag;
2284 kmem_free(termiosp, len);
2285 } else {
2286 asyerror(asy, CE_WARN,
2287 "couldn't get ttymodes property");
2288 }
2289 mutex_enter(&asy->asy_excl_hi);
2290
2291 /* eeprom mode support - respect properties */
2292 if (asy->asy_cflag)
2293 async->async_ttycommon.t_cflag = asy->asy_cflag;
2294
2295 async->async_ttycommon.t_iflag = 0;
2296 async->async_ttycommon.t_iocpending = NULL;
2297 async->async_ttycommon.t_size.ws_row = 0;
2298 async->async_ttycommon.t_size.ws_col = 0;
2299 async->async_ttycommon.t_size.ws_xpixel = 0;
2300 async->async_ttycommon.t_size.ws_ypixel = 0;
2301 async->async_dev = *dev;
2302 async->async_wbufcid = 0;
2303
2304 async->async_startc = CSTART;
2305 async->async_stopc = CSTOP;
2306 asy_program(asy, ASY_INIT);
2307 } else if ((async->async_ttycommon.t_flags & TS_XCLUDE) &&
2308 secpolicy_excl_open(cr) != 0) {
2309 mutex_exit(&asy->asy_excl_hi);
2310 mutex_exit(&asy->asy_excl);
2311 return (EBUSY);
2312 } else if ((*dev & OUTLINE) && !(async->async_flags & ASYNC_OUT)) {
2313 mutex_exit(&asy->asy_excl_hi);
2314 mutex_exit(&asy->asy_excl);
2315 return (EBUSY);
2316 }
2317
2318 if (*dev & OUTLINE)
2319 async->async_flags |= ASYNC_OUT;
2320
2321 /* Raise DTR on every open, but delay if it was just lowered. */
2322 while (async->async_flags & ASYNC_DTR_DELAY) {
2323 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2324 "waiting for the ASYNC_DTR_DELAY to be clear");
2325 mutex_exit(&asy->asy_excl_hi);
2326 if (cv_wait_sig(&async->async_flags_cv,
2327 &asy->asy_excl) == 0) {
2328 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2329 "interrupted by signal, exiting");
2330 mutex_exit(&asy->asy_excl);
2331 return (EINTR);
2332 }
2333 mutex_enter(&asy->asy_excl_hi);
2334 }
2335
2336 asy_set(asy, ASY_MCR, asy->asy_mcr & ASY_MCR_DTR);
2337
2338 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "\"Raise DTR on every open\": "
2339 "make mcr = %x, make TS_SOFTCAR = %s", asy_get(asy, ASY_MCR),
2340 (asy->asy_flags & ASY_IGNORE_CD) ? "ON" : "OFF");
2341
2342 if (asy->asy_flags & ASY_IGNORE_CD) {
2343 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2344 "ASY_IGNORE_CD set, set TS_SOFTCAR");
2345 async->async_ttycommon.t_flags |= TS_SOFTCAR;
2346 } else {
2347 async->async_ttycommon.t_flags &= ~TS_SOFTCAR;
2348 }
2349
2350 /*
2351 * Check carrier.
2352 */
2353 asy->asy_msr = asy_get(asy, ASY_MSR);
2354 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "TS_SOFTCAR is %s, MSR & DCD is %s",
2355 (async->async_ttycommon.t_flags & TS_SOFTCAR) ? "set" : "clear",
2356 (asy->asy_msr & ASY_MSR_DCD) ? "set" : "clear");
2357
2358 if (asy->asy_msr & ASY_MSR_DCD)
2359 async->async_flags |= ASYNC_CARR_ON;
2360 else
2361 async->async_flags &= ~ASYNC_CARR_ON;
2362 mutex_exit(&asy->asy_excl_hi);
2363
2364 /*
2365 * If FNDELAY and FNONBLOCK are clear, block until carrier up.
2366 * Quit on interrupt.
2367 */
2368 if (!(flag & (FNDELAY|FNONBLOCK)) &&
2369 !(async->async_ttycommon.t_cflag & CLOCAL)) {
2370 if ((!(async->async_flags & (ASYNC_CARR_ON|ASYNC_OUT)) &&
2371 !(async->async_ttycommon.t_flags & TS_SOFTCAR)) ||
2372 ((async->async_flags & ASYNC_OUT) &&
2373 !(*dev & OUTLINE))) {
2374 async->async_flags |= ASYNC_WOPEN;
2375 if (cv_wait_sig(&async->async_flags_cv,
2376 &asy->asy_excl) == B_FALSE) {
2377 async->async_flags &= ~ASYNC_WOPEN;
2378 mutex_exit(&asy->asy_excl);
2379 return (EINTR);
2380 }
2381 async->async_flags &= ~ASYNC_WOPEN;
2382 goto again;
2383 }
2384 } else if ((async->async_flags & ASYNC_OUT) && !(*dev & OUTLINE)) {
2385 mutex_exit(&asy->asy_excl);
2386 return (EBUSY);
2387 }
2388
2389 async->async_ttycommon.t_readq = rq;
2390 async->async_ttycommon.t_writeq = WR(rq);
2391 rq->q_ptr = WR(rq)->q_ptr = (caddr_t)async;
2392 mutex_exit(&asy->asy_excl);
2393 /*
2394 * Caution here -- qprocson sets the pointers that are used by canput
2395 * called by async_softint. ASYNC_ISOPEN must *not* be set until those
2396 * pointers are valid.
2397 */
2398 qprocson(rq);
2399 async->async_flags |= ASYNC_ISOPEN;
2400 async->async_polltid = 0;
2401 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
2402 return (0);
2403 }
2404
2405 static void
async_progress_check(void * arg)2406 async_progress_check(void *arg)
2407 {
2408 struct asyncline *async = arg;
2409 struct asycom *asy = async->async_common;
2410 mblk_t *bp;
2411
2412 /*
2413 * We define "progress" as either waiting on a timed break or delay, or
2414 * having had at least one transmitter interrupt. If none of these are
2415 * true, then just terminate the output and wake up that close thread.
2416 */
2417 mutex_enter(&asy->asy_excl);
2418 mutex_enter(&asy->asy_excl_hi);
2419 if (!(async->async_flags & (ASYNC_BREAK|ASYNC_DELAY|ASYNC_PROGRESS))) {
2420 async->async_ocnt = 0;
2421 async->async_flags &= ~ASYNC_BUSY;
2422 async->async_timer = 0;
2423 bp = async->async_xmitblk;
2424 async->async_xmitblk = NULL;
2425 mutex_exit(&asy->asy_excl_hi);
2426 if (bp != NULL)
2427 freeb(bp);
2428 /*
2429 * Since this timer is running, we know that we're in exit(2).
2430 * That means that the user can't possibly be waiting on any
2431 * valid ioctl(2) completion anymore, and we should just flush
2432 * everything.
2433 */
2434 flushq(async->async_ttycommon.t_writeq, FLUSHALL);
2435 cv_broadcast(&async->async_flags_cv);
2436 } else {
2437 async->async_flags &= ~ASYNC_PROGRESS;
2438 async->async_timer = timeout(async_progress_check, async,
2439 drv_usectohz(asy_drain_check));
2440 mutex_exit(&asy->asy_excl_hi);
2441 }
2442 mutex_exit(&asy->asy_excl);
2443 }
2444
2445 /*
2446 * Release DTR so that asyopen() can raise it.
2447 */
2448 static void
async_dtr_free(struct asyncline * async)2449 async_dtr_free(struct asyncline *async)
2450 {
2451 struct asycom *asy = async->async_common;
2452
2453 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2454 "async_dtr_free, clearing ASYNC_DTR_DELAY");
2455 mutex_enter(&asy->asy_excl);
2456 async->async_flags &= ~ASYNC_DTR_DELAY;
2457 async->async_dtrtid = 0;
2458 cv_broadcast(&async->async_flags_cv);
2459 mutex_exit(&asy->asy_excl);
2460 }
2461
2462 /*
2463 * Close routine.
2464 */
2465 static int
asyclose(queue_t * q,int flag,cred_t * credp __unused)2466 asyclose(queue_t *q, int flag, cred_t *credp __unused)
2467 {
2468 struct asyncline *async;
2469 struct asycom *asy;
2470
2471 async = (struct asyncline *)q->q_ptr;
2472 ASSERT(async != NULL);
2473
2474 asy = async->async_common;
2475
2476 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "enter");
2477
2478 mutex_enter(&asy->asy_excl);
2479 async->async_flags |= ASYNC_CLOSING;
2480
2481 /*
2482 * Turn off PPS handling early to avoid events occuring during
2483 * close. Also reset the DCD edge monitoring bit.
2484 */
2485 mutex_enter(&asy->asy_excl_hi);
2486 asy->asy_flags &= ~(ASY_PPS | ASY_PPS_EDGE);
2487 mutex_exit(&asy->asy_excl_hi);
2488
2489 /*
2490 * There are two flavors of break -- timed (M_BREAK or TCSBRK) and
2491 * untimed (TIOCSBRK). For the timed case, these are enqueued on our
2492 * write queue and there's a timer running, so we don't have to worry
2493 * about them. For the untimed case, though, the user obviously made a
2494 * mistake, because these are handled immediately. We'll terminate the
2495 * break now and honor their implicit request by discarding the rest of
2496 * the data.
2497 */
2498 if (async->async_flags & ASYNC_OUT_SUSPEND) {
2499 if (async->async_utbrktid != 0) {
2500 (void) untimeout(async->async_utbrktid);
2501 async->async_utbrktid = 0;
2502 }
2503 mutex_enter(&asy->asy_excl_hi);
2504 (void) asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
2505 mutex_exit(&asy->asy_excl_hi);
2506 async->async_flags &= ~ASYNC_OUT_SUSPEND;
2507 goto nodrain;
2508 }
2509
2510 /*
2511 * If the user told us not to delay the close ("non-blocking"), then
2512 * don't bother trying to drain.
2513 *
2514 * If the user did M_STOP (ASYNC_STOPPED), there's no hope of ever
2515 * getting an M_START (since these messages aren't enqueued), and the
2516 * only other way to clear the stop condition is by loss of DCD, which
2517 * would discard the queue data. Thus, we drop the output data if
2518 * ASYNC_STOPPED is set.
2519 */
2520 if ((flag & (FNDELAY|FNONBLOCK)) ||
2521 (async->async_flags & ASYNC_STOPPED)) {
2522 goto nodrain;
2523 }
2524
2525 /*
2526 * If there's any pending output, then we have to try to drain it.
2527 * There are two main cases to be handled:
2528 * - called by close(2): need to drain until done or until
2529 * a signal is received. No timeout.
2530 * - called by exit(2): need to drain while making progress
2531 * or until a timeout occurs. No signals.
2532 *
2533 * If we can't rely on receiving a signal to get us out of a hung
2534 * session, then we have to use a timer. In this case, we set a timer
2535 * to check for progress in sending the output data -- all that we ask
2536 * (at each interval) is that there's been some progress made. Since
2537 * the interrupt routine grabs buffers from the write queue, we can't
2538 * trust changes in async_ocnt. Instead, we use a progress flag.
2539 *
2540 * Note that loss of carrier will cause the output queue to be flushed,
2541 * and we'll wake up again and finish normally.
2542 */
2543 if (!ddi_can_receive_sig() && asy_drain_check != 0) {
2544 async->async_flags &= ~ASYNC_PROGRESS;
2545 async->async_timer = timeout(async_progress_check, async,
2546 drv_usectohz(asy_drain_check));
2547 }
2548 while (async->async_ocnt > 0 ||
2549 async->async_ttycommon.t_writeq->q_first != NULL ||
2550 (async->async_flags & (ASYNC_BUSY|ASYNC_BREAK|ASYNC_DELAY))) {
2551 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0)
2552 break;
2553 }
2554 if (async->async_timer != 0) {
2555 (void) untimeout(async->async_timer);
2556 async->async_timer = 0;
2557 }
2558
2559 nodrain:
2560 async->async_ocnt = 0;
2561 if (async->async_xmitblk != NULL)
2562 freeb(async->async_xmitblk);
2563 async->async_xmitblk = NULL;
2564
2565 /*
2566 * If line has HUPCL set or is incompletely opened fix up the modem
2567 * lines.
2568 */
2569 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "next check HUPCL flag");
2570 mutex_enter(&asy->asy_excl_hi);
2571 if ((async->async_ttycommon.t_cflag & HUPCL) ||
2572 (async->async_flags & ASYNC_WOPEN)) {
2573 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2574 "HUPCL flag = %x, ASYNC_WOPEN flag = %x",
2575 async->async_ttycommon.t_cflag & HUPCL,
2576 async->async_ttycommon.t_cflag & ASYNC_WOPEN);
2577 async->async_flags |= ASYNC_DTR_DELAY;
2578
2579 /* turn off DTR, RTS but NOT interrupt to 386 */
2580 if (asy->asy_flags & (ASY_IGNORE_CD|ASY_RTS_DTR_OFF)) {
2581 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2582 "ASY_IGNORE_CD flag = %x, "
2583 "ASY_RTS_DTR_OFF flag = %x",
2584 asy->asy_flags & ASY_IGNORE_CD,
2585 asy->asy_flags & ASY_RTS_DTR_OFF);
2586
2587 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2588 } else {
2589 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2590 "Dropping DTR and RTS");
2591 asy_put(asy, ASY_MCR, ASY_MCR_OUT2);
2592 }
2593 async->async_dtrtid =
2594 timeout((void (*)())async_dtr_free,
2595 (caddr_t)async, drv_usectohz(asy_min_dtr_low));
2596 }
2597 /*
2598 * If nobody's using it now, turn off receiver interrupts.
2599 */
2600 if ((async->async_flags & (ASYNC_WOPEN|ASYNC_ISOPEN)) == 0)
2601 asy_disable_interrupts(asy, ASY_IER_RIEN);
2602
2603 mutex_exit(&asy->asy_excl_hi);
2604
2605 ttycommon_close(&async->async_ttycommon);
2606
2607 /*
2608 * Cancel outstanding "bufcall" request.
2609 */
2610 if (async->async_wbufcid != 0) {
2611 unbufcall(async->async_wbufcid);
2612 async->async_wbufcid = 0;
2613 }
2614
2615 /* Note that qprocsoff can't be done until after interrupts are off */
2616 qprocsoff(q);
2617 q->q_ptr = WR(q)->q_ptr = NULL;
2618 async->async_ttycommon.t_readq = NULL;
2619 async->async_ttycommon.t_writeq = NULL;
2620
2621 /*
2622 * Clear out device state, except persistant device property flags.
2623 */
2624 async->async_flags &= (ASYNC_DTR_DELAY|ASY_RTS_DTR_OFF);
2625 cv_broadcast(&async->async_flags_cv);
2626 mutex_exit(&asy->asy_excl);
2627
2628 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "done");
2629 return (0);
2630 }
2631
2632 static boolean_t
asy_isbusy(struct asycom * asy)2633 asy_isbusy(struct asycom *asy)
2634 {
2635 struct asyncline *async;
2636
2637 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2638 async = asy->asy_priv;
2639 ASSERT(mutex_owned(&asy->asy_excl));
2640 ASSERT(mutex_owned(&asy->asy_excl_hi));
2641 /*
2642 * XXXX this should be recoded
2643 */
2644 return ((async->async_ocnt > 0) ||
2645 ((asy_get(asy, ASY_LSR) & (ASY_LSR_TEMT | ASY_LSR_THRE)) == 0));
2646 }
2647
2648 static void
asy_waiteot(struct asycom * asy)2649 asy_waiteot(struct asycom *asy)
2650 {
2651 /*
2652 * Wait for the current transmission block and the
2653 * current fifo data to transmit. Once this is done
2654 * we may go on.
2655 */
2656 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2657 ASSERT(mutex_owned(&asy->asy_excl));
2658 ASSERT(mutex_owned(&asy->asy_excl_hi));
2659 while (asy_isbusy(asy)) {
2660 mutex_exit(&asy->asy_excl_hi);
2661 mutex_exit(&asy->asy_excl);
2662 drv_usecwait(10000); /* wait .01 */
2663 mutex_enter(&asy->asy_excl);
2664 mutex_enter(&asy->asy_excl_hi);
2665 }
2666 }
2667
2668 /* asy_reset_fifo -- flush fifos and [re]program fifo control register */
2669 static void
asy_reset_fifo(struct asycom * asy,uchar_t flush)2670 asy_reset_fifo(struct asycom *asy, uchar_t flush)
2671 {
2672 ASSERT(mutex_owned(&asy->asy_excl_hi));
2673
2674 /* On a 16750, we have to set DLAB in order to set ASY_FCR_FIFO64. */
2675 if (asy->asy_hwtype >= ASY_16750)
2676 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
2677
2678 asy_put(asy, ASY_FCR, asy->asy_fifor | flush);
2679
2680 /* Clear DLAB */
2681 if (asy->asy_hwtype >= ASY_16750)
2682 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
2683 }
2684
2685 /*
2686 * Program the ASY port. Most of the async operation is based on the values
2687 * of 'c_iflag' and 'c_cflag'.
2688 */
2689 static void
asy_program(struct asycom * asy,int mode)2690 asy_program(struct asycom *asy, int mode)
2691 {
2692 struct asyncline *async;
2693 int baudrate, c_flag;
2694 uint8_t ier;
2695 int flush_reg;
2696 int ocflags;
2697
2698 ASSERT(mutex_owned(&asy->asy_excl));
2699 ASSERT(mutex_owned(&asy->asy_excl_hi));
2700
2701 async = asy->asy_priv;
2702 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "mode = 0x%08X, enter", mode);
2703
2704 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2705
2706 async->async_ttycommon.t_cflag &= ~(CIBAUD);
2707
2708 if (baudrate > CBAUD) {
2709 async->async_ttycommon.t_cflag |= CIBAUDEXT;
2710 async->async_ttycommon.t_cflag |=
2711 (((baudrate - CBAUD - 1) << IBSHIFT) & CIBAUD);
2712 } else {
2713 async->async_ttycommon.t_cflag &= ~CIBAUDEXT;
2714 async->async_ttycommon.t_cflag |=
2715 ((baudrate << IBSHIFT) & CIBAUD);
2716 }
2717
2718 c_flag = async->async_ttycommon.t_cflag &
2719 (CLOCAL|CREAD|CSTOPB|CSIZE|PARENB|PARODD|CBAUD|CBAUDEXT);
2720
2721 asy_disable_interrupts(asy, ASY_IER_ALL);
2722
2723 ocflags = asy->asy_ocflag;
2724
2725 /* flush/reset the status registers */
2726 (void) asy_get(asy, ASY_ISR);
2727 (void) asy_get(asy, ASY_LSR);
2728 asy->asy_msr = flush_reg = asy_get(asy, ASY_MSR);
2729 /*
2730 * The device is programmed in the open sequence, if we
2731 * have to hardware handshake, then this is a good time
2732 * to check if the device can receive any data.
2733 */
2734
2735 if ((CRTSCTS & async->async_ttycommon.t_cflag) &&
2736 !(flush_reg & ASY_MSR_CTS)) {
2737 async_flowcontrol_hw_output(asy, FLOW_STOP);
2738 } else {
2739 /*
2740 * We can not use async_flowcontrol_hw_output(asy, FLOW_START)
2741 * here, because if CRTSCTS is clear, we need clear
2742 * ASYNC_HW_OUT_FLW bit.
2743 */
2744 async->async_flags &= ~ASYNC_HW_OUT_FLW;
2745 }
2746
2747 /*
2748 * If IXON is not set, clear ASYNC_SW_OUT_FLW;
2749 * If IXON is set, no matter what IXON flag is before this
2750 * function call to asy_program,
2751 * we will use the old ASYNC_SW_OUT_FLW status.
2752 * Because of handling IXON in the driver, we also should re-calculate
2753 * the value of ASYNC_OUT_FLW_RESUME bit, but in fact,
2754 * the TCSET* commands which call asy_program
2755 * are put into the write queue, so there is no output needed to
2756 * be resumed at this point.
2757 */
2758 if (!(IXON & async->async_ttycommon.t_iflag))
2759 async->async_flags &= ~ASYNC_SW_OUT_FLW;
2760
2761 /* manually flush receive buffer or fifo (workaround for buggy fifos) */
2762 if (mode == ASY_INIT) {
2763 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
2764 for (flush_reg = asy->asy_fifo_buf; flush_reg-- > 0; ) {
2765 (void) asy_get(asy, ASY_RHR);
2766 }
2767 } else {
2768 flush_reg = asy_get(asy, ASY_RHR);
2769 }
2770 }
2771
2772 if (ocflags != (c_flag & ~CLOCAL) || mode == ASY_INIT) {
2773 /* Set line control */
2774 uint8_t lcr = 0;
2775
2776 if (c_flag & CSTOPB)
2777 lcr |= ASY_LCR_STOP2; /* 2 stop bits */
2778
2779 if (c_flag & PARENB)
2780 lcr |= ASY_LCR_PEN;
2781
2782 if ((c_flag & PARODD) == 0)
2783 lcr |= ASY_LCR_EPS;
2784
2785 switch (c_flag & CSIZE) {
2786 case CS5:
2787 lcr |= ASY_LCR_BITS5;
2788 break;
2789 case CS6:
2790 lcr |= ASY_LCR_BITS6;
2791 break;
2792 case CS7:
2793 lcr |= ASY_LCR_BITS7;
2794 break;
2795 case CS8:
2796 lcr |= ASY_LCR_BITS8;
2797 break;
2798 }
2799
2800 asy_clr(asy, ASY_LCR, ASY_LCR_WLS0 | ASY_LCR_WLS1 |
2801 ASY_LCR_STB | ASY_LCR_PEN | ASY_LCR_EPS);
2802 asy_set(asy, ASY_LCR, lcr);
2803 asy_set_baudrate(asy, baudrate);
2804
2805 /*
2806 * If we have a FIFO buffer, enable/flush
2807 * at intialize time, flush if transitioning from
2808 * CREAD off to CREAD on.
2809 */
2810 if (((ocflags & CREAD) == 0 && (c_flag & CREAD)) ||
2811 mode == ASY_INIT) {
2812 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN)
2813 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
2814 }
2815
2816 /* remember the new cflags */
2817 asy->asy_ocflag = c_flag & ~CLOCAL;
2818 }
2819
2820 if (baudrate == 0)
2821 asy_put(asy, ASY_MCR,
2822 (asy->asy_mcr & ASY_MCR_RTS) | ASY_MCR_OUT2);
2823 else
2824 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2825
2826 /*
2827 * Call the modem status interrupt handler to check for the carrier
2828 * in case CLOCAL was turned off after the carrier came on.
2829 * (Note: Modem status interrupt is not enabled if CLOCAL is ON.)
2830 */
2831 async_msint(asy);
2832
2833 /* Set interrupt control */
2834 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
2835 "c_flag & CLOCAL = %x t_cflag & CRTSCTS = %x",
2836 c_flag & CLOCAL, async->async_ttycommon.t_cflag & CRTSCTS);
2837
2838
2839 /* Always enable transmit and line status interrupts. */
2840 ier = ASY_IER_TIEN | ASY_IER_SIEN;
2841
2842 /*
2843 * Enable Modem status interrupt if hardware flow control is enabled or
2844 * this isn't a direct-wired (local) line, which ignores DCD.
2845 */
2846 if (((c_flag & CLOCAL) == 0) ||
2847 (async->async_ttycommon.t_cflag & CRTSCTS))
2848 ier |= ASY_IER_MIEN;
2849
2850 if (c_flag & CREAD)
2851 ier |= ASY_IER_RIEN;
2852
2853 asy_enable_interrupts(asy, ier);
2854 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
2855 }
2856
2857 static boolean_t
asy_baudok(struct asycom * asy)2858 asy_baudok(struct asycom *asy)
2859 {
2860 struct asyncline *async = asy->asy_priv;
2861 int baudrate;
2862
2863
2864 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2865
2866 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
2867 return (0);
2868
2869 return (baudrate == 0 ||
2870 asy_baud_tab[baudrate].asy_dll != 0 ||
2871 asy_baud_tab[baudrate].asy_dlh != 0);
2872 }
2873
2874 /*
2875 * asyintr() is the High Level Interrupt Handler.
2876 *
2877 * There are four different interrupt types indexed by ISR register values:
2878 * 0: modem
2879 * 1: Tx holding register is empty, ready for next char
2880 * 2: Rx register now holds a char to be picked up
2881 * 3: error or break on line
2882 * This routine checks the Bit 0 (interrupt-not-pending) to determine if
2883 * the interrupt is from this port.
2884 */
2885 uint_t
asyintr(caddr_t argasy,caddr_t argunused __unused)2886 asyintr(caddr_t argasy, caddr_t argunused __unused)
2887 {
2888 struct asycom *asy = (struct asycom *)argasy;
2889 struct asyncline *async;
2890 int ret_status = DDI_INTR_UNCLAIMED;
2891
2892 mutex_enter(&asy->asy_excl_hi);
2893 async = asy->asy_priv;
2894 if (async == NULL ||
2895 (async->async_flags & (ASYNC_ISOPEN|ASYNC_WOPEN)) == 0) {
2896 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2897
2898 ASY_DPRINTF(asy, ASY_DEBUG_INTR,
2899 "not open async=%p flags=0x%x interrupt_id=0x%x",
2900 async, async == NULL ? 0 : async->async_flags, intr_id);
2901
2902 if ((intr_id & ASY_ISR_NOINTR) == 0) {
2903 /*
2904 * reset the device by:
2905 * reading line status
2906 * reading any data from data status register
2907 * reading modem status
2908 */
2909 (void) asy_get(asy, ASY_LSR);
2910 (void) asy_get(asy, ASY_RHR);
2911 asy->asy_msr = asy_get(asy, ASY_MSR);
2912 ret_status = DDI_INTR_CLAIMED;
2913 }
2914 mutex_exit(&asy->asy_excl_hi);
2915 return (ret_status);
2916 }
2917
2918 /* By this point we're sure this is for us. */
2919 ret_status = DDI_INTR_CLAIMED;
2920
2921 /*
2922 * Before this flag was set, interrupts were disabled. We may still get
2923 * here if asyintr() waited on the mutex.
2924 */
2925 if (asy->asy_flags & ASY_DDI_SUSPENDED) {
2926 mutex_exit(&asy->asy_excl_hi);
2927 return (ret_status);
2928 }
2929
2930 /*
2931 * We will loop until the interrupt line is pulled low. asy
2932 * interrupt is edge triggered.
2933 */
2934 for (;;) {
2935 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2936 /*
2937 * Reading LSR will clear any error bits (ASY_LSR_ERRORS) which
2938 * are set which is why the value is passed through to
2939 * async_rxint() and not re-read there. In the unexpected event
2940 * that we've ended up here without a pending interrupt, the
2941 * ASY_ISR_NOINTR case, it should do no harm to have cleared
2942 * the error bits, and it means we can get some additional
2943 * information in the debug message if it's enabled.
2944 */
2945 const uint8_t lsr = asy_get(asy, ASY_LSR);
2946
2947 ASY_DPRINTF(asy, ASY_DEBUG_INTR,
2948 "interrupt_id=0x%x LSR=0x%x",
2949 intr_id, lsr);
2950
2951 if (intr_id & ASY_ISR_NOINTR)
2952 break;
2953
2954 switch (intr_id & ASY_ISR_MASK) {
2955 case ASY_ISR_ID_RLST:
2956 case ASY_ISR_ID_RDA:
2957 case ASY_ISR_ID_TMO:
2958 /* receiver interrupt or receiver errors */
2959 async_rxint(asy, lsr);
2960 break;
2961
2962 case ASY_ISR_ID_THRE:
2963 /*
2964 * The transmit-ready interrupt implies an empty
2965 * transmit-hold register (or FIFO). Check that it is
2966 * present before attempting to transmit more data.
2967 */
2968 if ((lsr & ASY_LSR_THRE) == 0) {
2969 /*
2970 * Taking a THRE interrupt only to find THRE
2971 * absent would be a surprise, except for a
2972 * racing asyputchar(), which ignores the
2973 * excl_hi mutex when writing to the device.
2974 */
2975 continue;
2976 }
2977 async_txint(asy);
2978 /*
2979 * Unlike the other interrupts which fall through to
2980 * attempting to fill the output register/FIFO, THRE
2981 * has no need having just done so.
2982 */
2983 continue;
2984
2985 case ASY_ISR_ID_MST:
2986 /* modem status interrupt */
2987 async_msint(asy);
2988 break;
2989 }
2990
2991 /* Refill the output FIFO if it has gone empty */
2992 if ((lsr & ASY_LSR_THRE) && (async->async_flags & ASYNC_BUSY) &&
2993 async->async_ocnt > 0)
2994 async_txint(asy);
2995 }
2996
2997 mutex_exit(&asy->asy_excl_hi);
2998 return (ret_status);
2999 }
3000
3001 /*
3002 * Transmitter interrupt service routine.
3003 * If there is more data to transmit in the current pseudo-DMA block,
3004 * send the next character if output is not stopped or draining.
3005 * Otherwise, queue up a soft interrupt.
3006 *
3007 * XXX - Needs review for HW FIFOs.
3008 */
3009 static void
async_txint(struct asycom * asy)3010 async_txint(struct asycom *asy)
3011 {
3012 struct asyncline *async = asy->asy_priv;
3013 int fifo_len;
3014
3015 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3016
3017 /*
3018 * If ASYNC_BREAK or ASYNC_OUT_SUSPEND has been set, return to
3019 * asyintr()'s context to claim the interrupt without performing
3020 * any action. No character will be loaded into FIFO/THR until
3021 * timed or untimed break is removed
3022 */
3023 if (async->async_flags & (ASYNC_BREAK|ASYNC_OUT_SUSPEND))
3024 return;
3025
3026 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3027 if (fifo_len > asy_max_tx_fifo)
3028 fifo_len = asy_max_tx_fifo;
3029
3030 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3031 fifo_len--;
3032
3033 if (async->async_ocnt > 0 && fifo_len > 0 &&
3034 !(async->async_flags &
3035 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_STOPPED))) {
3036 while (fifo_len-- > 0 && async->async_ocnt-- > 0) {
3037 asy_put(asy, ASY_THR, *async->async_optr++);
3038 }
3039 async->async_flags |= ASYNC_PROGRESS;
3040 }
3041
3042 if (fifo_len <= 0)
3043 return;
3044
3045 asysetsoft(asy);
3046 }
3047
3048 /*
3049 * Interrupt on port: handle PPS event. This function is only called
3050 * for a port on which PPS event handling has been enabled.
3051 */
3052 static void
asy_ppsevent(struct asycom * asy,int msr)3053 asy_ppsevent(struct asycom *asy, int msr)
3054 {
3055 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3056
3057 if (asy->asy_flags & ASY_PPS_EDGE) {
3058 /* Have seen leading edge, now look for and record drop */
3059 if ((msr & ASY_MSR_DCD) == 0)
3060 asy->asy_flags &= ~ASY_PPS_EDGE;
3061 /*
3062 * Waiting for leading edge, look for rise; stamp event and
3063 * calibrate kernel clock.
3064 */
3065 } else if (msr & ASY_MSR_DCD) {
3066 /*
3067 * This code captures a timestamp at the designated
3068 * transition of the PPS signal (DCD asserted). The
3069 * code provides a pointer to the timestamp, as well
3070 * as the hardware counter value at the capture.
3071 *
3072 * Note: the kernel has nano based time values while
3073 * NTP requires micro based, an in-line fast algorithm
3074 * to convert nsec to usec is used here -- see hrt2ts()
3075 * in common/os/timers.c for a full description.
3076 */
3077 struct timeval *tvp = &asy_ppsev.tv;
3078 timestruc_t ts;
3079 long nsec, usec;
3080
3081 asy->asy_flags |= ASY_PPS_EDGE;
3082 LED_OFF;
3083 gethrestime(&ts);
3084 LED_ON;
3085 nsec = ts.tv_nsec;
3086 usec = nsec + (nsec >> 2);
3087 usec = nsec + (usec >> 1);
3088 usec = nsec + (usec >> 2);
3089 usec = nsec + (usec >> 4);
3090 usec = nsec - (usec >> 3);
3091 usec = nsec + (usec >> 2);
3092 usec = nsec + (usec >> 3);
3093 usec = nsec + (usec >> 4);
3094 usec = nsec + (usec >> 1);
3095 usec = nsec + (usec >> 6);
3096 tvp->tv_usec = usec >> 10;
3097 tvp->tv_sec = ts.tv_sec;
3098
3099 ++asy_ppsev.serial;
3100
3101 /*
3102 * Because the kernel keeps a high-resolution time,
3103 * pass the current highres timestamp in tvp and zero
3104 * in usec.
3105 */
3106 ddi_hardpps(tvp, 0);
3107 }
3108 }
3109
3110 /*
3111 * Receiver interrupt: RDA interrupt, FIFO timeout interrupt or receive
3112 * error interrupt.
3113 * Try to put the character into the circular buffer for this line; if it
3114 * overflows, indicate a circular buffer overrun. If this port is always
3115 * to be serviced immediately, or the character is a STOP character, or
3116 * more than 15 characters have arrived, queue up a soft interrupt to
3117 * drain the circular buffer.
3118 * XXX - needs review for hw FIFOs support.
3119 */
3120
3121 static void
async_rxint(struct asycom * asy,uchar_t lsr)3122 async_rxint(struct asycom *asy, uchar_t lsr)
3123 {
3124 struct asyncline *async = asy->asy_priv;
3125 uchar_t c;
3126 uint_t s, needsoft = 0;
3127 tty_common_t *tp;
3128 int looplim = asy->asy_fifo_buf * 2;
3129
3130 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3131
3132 tp = &async->async_ttycommon;
3133 if (!(tp->t_cflag & CREAD)) {
3134 /* Line is not open for reading. Flush receiver FIFO. */
3135 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3136 (void) asy_get(asy, ASY_RHR);
3137 lsr = asy_get(asy, ASY_LSR);
3138 if (looplim-- < 0) /* limit loop */
3139 break;
3140 }
3141 return;
3142 }
3143
3144 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3145 c = 0;
3146 s = 0; /* reset error status */
3147 if (lsr & ASY_LSR_DR) {
3148 c = asy_get(asy, ASY_RHR);
3149
3150 /*
3151 * We handle XON/XOFF char if IXON is set,
3152 * but if received char is _POSIX_VDISABLE,
3153 * we left it to the up level module.
3154 */
3155 if (tp->t_iflag & IXON) {
3156 if ((c == async->async_stopc) &&
3157 (c != _POSIX_VDISABLE)) {
3158 async_flowcontrol_sw_output(asy,
3159 FLOW_STOP);
3160 goto check_looplim;
3161 } else if ((c == async->async_startc) &&
3162 (c != _POSIX_VDISABLE)) {
3163 async_flowcontrol_sw_output(asy,
3164 FLOW_START);
3165 needsoft = 1;
3166 goto check_looplim;
3167 }
3168 if ((tp->t_iflag & IXANY) &&
3169 (async->async_flags & ASYNC_SW_OUT_FLW)) {
3170 async_flowcontrol_sw_output(asy,
3171 FLOW_START);
3172 needsoft = 1;
3173 }
3174 }
3175 }
3176
3177 /*
3178 * Check for character break sequence
3179 */
3180 if ((abort_enable == KIOCABORTALTERNATE) &&
3181 (asy->asy_flags & ASY_CONSOLE)) {
3182 if (abort_charseq_recognize(c))
3183 abort_sequence_enter((char *)NULL);
3184 }
3185
3186 /* Handle framing errors */
3187 if (lsr & ASY_LSR_ERRORS) {
3188 if (lsr & ASY_LSR_PE) {
3189 if (tp->t_iflag & INPCK) /* parity enabled */
3190 s |= PERROR;
3191 }
3192
3193 if (lsr & (ASY_LSR_FE | ASY_LSR_BI))
3194 s |= FRERROR;
3195 if (lsr & ASY_LSR_OE) {
3196 async->async_hw_overrun = 1;
3197 s |= OVERRUN;
3198 }
3199 }
3200
3201 if (s == 0)
3202 if ((tp->t_iflag & PARMRK) &&
3203 !(tp->t_iflag & (IGNPAR|ISTRIP)) &&
3204 (c == 0377))
3205 if (RING_POK(async, 2)) {
3206 RING_PUT(async, 0377);
3207 RING_PUT(async, c);
3208 } else
3209 async->async_sw_overrun = 1;
3210 else
3211 if (RING_POK(async, 1))
3212 RING_PUT(async, c);
3213 else
3214 async->async_sw_overrun = 1;
3215 else
3216 if (s & FRERROR) /* Handle framing errors */
3217 if (c == 0)
3218 if ((asy->asy_flags & ASY_CONSOLE) &&
3219 (abort_enable !=
3220 KIOCABORTALTERNATE))
3221 abort_sequence_enter((char *)0);
3222 else
3223 async->async_break++;
3224 else
3225 if (RING_POK(async, 1))
3226 RING_MARK(async, c, s);
3227 else
3228 async->async_sw_overrun = 1;
3229 else /* Parity errors are handled by ldterm */
3230 if (RING_POK(async, 1))
3231 RING_MARK(async, c, s);
3232 else
3233 async->async_sw_overrun = 1;
3234 check_looplim:
3235 lsr = asy_get(asy, ASY_LSR);
3236 if (looplim-- < 0) /* limit loop */
3237 break;
3238 }
3239 if ((RING_CNT(async) > (RINGSIZE * 3)/4) &&
3240 !(async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3241 async_flowcontrol_hw_input(asy, FLOW_STOP, IN_FLOW_RINGBUFF);
3242 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3243 IN_FLOW_RINGBUFF);
3244 }
3245
3246 if ((async->async_flags & ASYNC_SERVICEIMM) || needsoft ||
3247 (RING_FRAC(async)) || (async->async_polltid == 0)) {
3248 asysetsoft(asy); /* need a soft interrupt */
3249 }
3250 }
3251
3252 /*
3253 * Modem status interrupt.
3254 *
3255 * (Note: It is assumed that the MSR hasn't been read by asyintr().)
3256 */
3257
3258 static void
async_msint(struct asycom * asy)3259 async_msint(struct asycom *asy)
3260 {
3261 struct asyncline *async = asy->asy_priv;
3262 int msr, t_cflag = async->async_ttycommon.t_cflag;
3263
3264 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3265
3266 async_msint_retry:
3267 /* this resets the interrupt */
3268 msr = asy_get(asy, ASY_MSR);
3269 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "call #%d:",
3270 ++(asy->asy_msint_cnt));
3271 ASY_DPRINTF(asy, ASY_DEBUG_STATE, " transition: %3s %3s %3s %3s",
3272 (msr & ASY_MSR_DCTS) ? "DCTS" : " ",
3273 (msr & ASY_MSR_DDSR) ? "DDSR" : " ",
3274 (msr & ASY_MSR_TERI) ? "TERI" : " ",
3275 (msr & ASY_MSR_DDCD) ? "DDCD" : " ");
3276 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "current state: %3s %3s %3s %3s",
3277 (msr & ASY_MSR_CTS) ? "CTS " : " ",
3278 (msr & ASY_MSR_DSR) ? "DSR " : " ",
3279 (msr & ASY_MSR_RI) ? "RI " : " ",
3280 (msr & ASY_MSR_DCD) ? "DCD " : " ");
3281
3282 /* If CTS status is changed, do H/W output flow control */
3283 if ((t_cflag & CRTSCTS) && (((asy->asy_msr ^ msr) & ASY_MSR_CTS) != 0))
3284 async_flowcontrol_hw_output(asy,
3285 msr & ASY_MSR_CTS ? FLOW_START : FLOW_STOP);
3286 /*
3287 * Reading MSR resets the interrupt, we save the
3288 * value of msr so that other functions could examine MSR by
3289 * looking at asy_msr.
3290 */
3291 asy->asy_msr = (uchar_t)msr;
3292
3293 /* Handle PPS event */
3294 if (asy->asy_flags & ASY_PPS)
3295 asy_ppsevent(asy, msr);
3296
3297 async->async_ext++;
3298 asysetsoft(asy);
3299 /*
3300 * We will make sure that the modem status presented to us
3301 * during the previous read has not changed. If the chip samples
3302 * the modem status on the falling edge of the interrupt line,
3303 * and uses this state as the base for detecting change of modem
3304 * status, we would miss a change of modem status event that occured
3305 * after we initiated a read MSR operation.
3306 */
3307 msr = asy_get(asy, ASY_MSR);
3308 if (ASY_MSR_STATES(msr) != ASY_MSR_STATES(asy->asy_msr))
3309 goto async_msint_retry;
3310 }
3311
3312 /*
3313 * Pend a soft interrupt if one isn't already pending.
3314 */
3315 static void
asysetsoft(struct asycom * asy)3316 asysetsoft(struct asycom *asy)
3317 {
3318 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3319
3320 if (mutex_tryenter(&asy->asy_soft_lock) == 0)
3321 return;
3322
3323 asy->asy_flags |= ASY_NEEDSOFT;
3324 if (!asy->asysoftpend) {
3325 asy->asysoftpend = 1;
3326 mutex_exit(&asy->asy_soft_lock);
3327 (void) ddi_intr_trigger_softint(asy->asy_soft_inth, NULL);
3328 } else {
3329 mutex_exit(&asy->asy_soft_lock);
3330 }
3331 }
3332
3333 /*
3334 * Check the carrier signal DCD and handle carrier coming up or
3335 * going down, cleaning up as needed and signalling waiters.
3336 */
3337 static void
asy_carrier_check(struct asycom * asy)3338 asy_carrier_check(struct asycom *asy)
3339 {
3340 struct asyncline *async = asy->asy_priv;
3341 tty_common_t *tp = &async->async_ttycommon;
3342 queue_t *q = tp->t_readq;
3343 mblk_t *bp;
3344 int flushflag;
3345
3346 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
3347 "asy_msr & DCD = %x, tp->t_flags & TS_SOFTCAR = %x",
3348 asy->asy_msr & ASY_MSR_DCD, tp->t_flags & TS_SOFTCAR);
3349
3350 if (asy->asy_msr & ASY_MSR_DCD) {
3351 /*
3352 * The DCD line is on. If we already had a carrier,
3353 * nothing changed and there's nothing to do.
3354 */
3355 if ((async->async_flags & ASYNC_CARR_ON) != 0)
3356 return;
3357
3358 ASY_DPRINTF(asy, ASY_DEBUG_MODM2, "set ASYNC_CARR_ON");
3359 async->async_flags |= ASYNC_CARR_ON;
3360 if (async->async_flags & ASYNC_ISOPEN) {
3361 mutex_exit(&asy->asy_excl_hi);
3362 mutex_exit(&asy->asy_excl);
3363 (void) putctl(q, M_UNHANGUP);
3364 mutex_enter(&asy->asy_excl);
3365 mutex_enter(&asy->asy_excl_hi);
3366 }
3367 cv_broadcast(&async->async_flags_cv);
3368
3369 return;
3370 }
3371
3372 /*
3373 * The DCD line is off. If we had no carrier, nothing changed
3374 * and there's nothing to do.
3375 */
3376 if ((async->async_flags & ASYNC_CARR_ON) == 0)
3377 return;
3378
3379 /*
3380 * The DCD line is off, but we had a carrier. If we're on a local line,
3381 * where carrier is ignored, or we're using a soft carrier, we're done
3382 * here.
3383 */
3384 if ((tp->t_cflag & CLOCAL) != 0 || (tp->t_flags & TS_SOFTCAR) != 0)
3385 goto out;
3386
3387 /*
3388 * Else, drop DTR, abort any output in progress, indicate that output
3389 * is not stopped.
3390 */
3391 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "carrier dropped, so drop DTR");
3392 asy_clr(asy, ASY_MCR, ASY_MCR_DTR);
3393
3394 if (async->async_flags & ASYNC_BUSY) {
3395 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3396 "Carrier dropped. Clearing async_ocnt");
3397 async->async_ocnt = 0;
3398 }
3399
3400 async->async_flags &= ~ASYNC_STOPPED;
3401
3402 /* If nobody had the device open, we're done here. */
3403 if ((async->async_flags & ASYNC_ISOPEN) == 0)
3404 goto out;
3405
3406 /* Else, send a hangup notification upstream and clean up. */
3407 mutex_exit(&asy->asy_excl_hi);
3408 mutex_exit(&asy->asy_excl);
3409 (void) putctl(q, M_HANGUP);
3410 mutex_enter(&asy->asy_excl);
3411 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "putctl(q, M_HANGUP)");
3412
3413 /*
3414 * Flush the transmit FIFO. Any data left in there is invalid now.
3415 */
3416 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3417 mutex_enter(&asy->asy_excl_hi);
3418 asy_reset_fifo(asy, ASY_FCR_THR_FL);
3419 mutex_exit(&asy->asy_excl_hi);
3420 }
3421
3422 /*
3423 * Flush our write queue if we have one. If we're in the midst of close,
3424 * then flush everything. Don't leave stale ioctls lying about.
3425 */
3426 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
3427 "Flushing to prevent HUPCL hanging");
3428 flushflag = (async->async_flags & ASYNC_CLOSING) ? FLUSHALL : FLUSHDATA;
3429 flushq(tp->t_writeq, flushflag);
3430
3431 /* Free the last active msg. */
3432 bp = async->async_xmitblk;
3433 if (bp != NULL) {
3434 freeb(bp);
3435 async->async_xmitblk = NULL;
3436 }
3437
3438 mutex_enter(&asy->asy_excl_hi);
3439 async->async_flags &= ~ASYNC_BUSY;
3440
3441
3442 out:
3443 /* Clear our carrier flag and signal anyone waiting. */
3444 async->async_flags &= ~ASYNC_CARR_ON;
3445 cv_broadcast(&async->async_flags_cv);
3446 }
3447
3448 /*
3449 * Handle a second-stage interrupt.
3450 */
3451 uint_t
asysoftintr(caddr_t intarg,caddr_t unusedarg __unused)3452 asysoftintr(caddr_t intarg, caddr_t unusedarg __unused)
3453 {
3454 struct asycom *asy = (struct asycom *)intarg;
3455 struct asyncline *async;
3456 int rv;
3457 uint_t cc;
3458
3459 /*
3460 * Test and clear soft interrupt.
3461 */
3462 mutex_enter(&asy->asy_soft_lock);
3463 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3464 rv = asy->asysoftpend;
3465 if (rv != 0)
3466 asy->asysoftpend = 0;
3467 mutex_exit(&asy->asy_soft_lock);
3468
3469 if (rv) {
3470 if (asy->asy_priv == NULL)
3471 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3472 async = (struct asyncline *)asy->asy_priv;
3473 mutex_enter(&asy->asy_excl_hi);
3474 if (asy->asy_flags & ASY_NEEDSOFT) {
3475 asy->asy_flags &= ~ASY_NEEDSOFT;
3476 mutex_exit(&asy->asy_excl_hi);
3477 async_softint(asy);
3478 mutex_enter(&asy->asy_excl_hi);
3479 }
3480
3481 /*
3482 * There are some instances where the softintr is not
3483 * scheduled and hence not called. It so happens that
3484 * causes the last few characters to be stuck in the
3485 * ringbuffer. Hence, call the handler once again so
3486 * the last few characters are cleared.
3487 */
3488 cc = RING_CNT(async);
3489 mutex_exit(&asy->asy_excl_hi);
3490 if (cc > 0)
3491 (void) async_softint(asy);
3492 }
3493 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3494 }
3495
3496 /*
3497 * Handle a software interrupt.
3498 */
3499 static void
async_softint(struct asycom * asy)3500 async_softint(struct asycom *asy)
3501 {
3502 struct asyncline *async = asy->asy_priv;
3503 uint_t cc;
3504 mblk_t *bp;
3505 queue_t *q;
3506 uchar_t c;
3507 tty_common_t *tp;
3508 int nb;
3509
3510 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3511 mutex_enter(&asy->asy_excl_hi);
3512 if (asy->asy_flags & ASY_DOINGSOFT) {
3513 asy->asy_flags |= ASY_DOINGSOFT_RETRY;
3514 mutex_exit(&asy->asy_excl_hi);
3515 return;
3516 }
3517 asy->asy_flags |= ASY_DOINGSOFT;
3518 begin:
3519 asy->asy_flags &= ~ASY_DOINGSOFT_RETRY;
3520 mutex_exit(&asy->asy_excl_hi);
3521 mutex_enter(&asy->asy_excl);
3522 tp = &async->async_ttycommon;
3523 q = tp->t_readq;
3524
3525 if (async->async_flags & ASYNC_OUT_FLW_RESUME) {
3526 if (async->async_ocnt > 0) {
3527 mutex_enter(&asy->asy_excl_hi);
3528 async_resume(async);
3529 mutex_exit(&asy->asy_excl_hi);
3530 } else {
3531 if (async->async_xmitblk)
3532 freeb(async->async_xmitblk);
3533 async->async_xmitblk = NULL;
3534 async_start(async);
3535 }
3536 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
3537 }
3538
3539 mutex_enter(&asy->asy_excl_hi);
3540 if (async->async_ext) {
3541 async->async_ext = 0;
3542 asy_carrier_check(asy);
3543 }
3544 mutex_exit(&asy->asy_excl_hi);
3545
3546 /*
3547 * If data has been added to the circular buffer, remove
3548 * it from the buffer, and send it up the stream if there's
3549 * somebody listening. Try to do it 16 bytes at a time. If we
3550 * have more than 16 bytes to move, move 16 byte chunks and
3551 * leave the rest for next time around (maybe it will grow).
3552 */
3553 mutex_enter(&asy->asy_excl_hi);
3554 if (!(async->async_flags & ASYNC_ISOPEN)) {
3555 RING_INIT(async);
3556 goto rv;
3557 }
3558 if ((cc = RING_CNT(async)) == 0)
3559 goto rv;
3560 mutex_exit(&asy->asy_excl_hi);
3561
3562 if (!canput(q)) {
3563 mutex_enter(&asy->asy_excl_hi);
3564 if (!(async->async_inflow_source & IN_FLOW_STREAMS)) {
3565 async_flowcontrol_hw_input(asy, FLOW_STOP,
3566 IN_FLOW_STREAMS);
3567 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3568 IN_FLOW_STREAMS);
3569 }
3570 goto rv;
3571 }
3572 if (async->async_inflow_source & IN_FLOW_STREAMS) {
3573 mutex_enter(&asy->asy_excl_hi);
3574 async_flowcontrol_hw_input(asy, FLOW_START,
3575 IN_FLOW_STREAMS);
3576 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3577 IN_FLOW_STREAMS);
3578 mutex_exit(&asy->asy_excl_hi);
3579 }
3580
3581 ASY_DPRINTF(asy, ASY_DEBUG_INPUT, "%d char(s) in queue", cc);
3582
3583 if (!(bp = allocb(cc, BPRI_MED))) {
3584 mutex_exit(&asy->asy_excl);
3585 ttycommon_qfull(&async->async_ttycommon, q);
3586 mutex_enter(&asy->asy_excl);
3587 mutex_enter(&asy->asy_excl_hi);
3588 goto rv;
3589 }
3590 mutex_enter(&asy->asy_excl_hi);
3591 do {
3592 if (RING_ERR(async, S_ERRORS)) {
3593 RING_UNMARK(async);
3594 c = RING_GET(async);
3595 break;
3596 } else {
3597 *bp->b_wptr++ = RING_GET(async);
3598 }
3599 } while (--cc);
3600 mutex_exit(&asy->asy_excl_hi);
3601 mutex_exit(&asy->asy_excl);
3602 if (bp->b_wptr > bp->b_rptr) {
3603 if (!canput(q)) {
3604 asyerror(asy, CE_WARN, "local queue full");
3605 freemsg(bp);
3606 } else {
3607 (void) putq(q, bp);
3608 }
3609 } else {
3610 freemsg(bp);
3611 }
3612 /*
3613 * If we have a parity error, then send
3614 * up an M_BREAK with the "bad"
3615 * character as an argument. Let ldterm
3616 * figure out what to do with the error.
3617 */
3618 if (cc)
3619 (void) putctl1(q, M_BREAK, c);
3620 mutex_enter(&asy->asy_excl);
3621 mutex_enter(&asy->asy_excl_hi);
3622 if (cc) {
3623 asysetsoft(asy); /* finish cc chars */
3624 }
3625 rv:
3626 if ((RING_CNT(async) < (RINGSIZE/4)) &&
3627 (async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3628 async_flowcontrol_hw_input(asy, FLOW_START, IN_FLOW_RINGBUFF);
3629 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3630 IN_FLOW_RINGBUFF);
3631 }
3632
3633 /*
3634 * If a transmission has finished, indicate that it's finished,
3635 * and start that line up again.
3636 */
3637 if (async->async_break > 0) {
3638 nb = async->async_break;
3639 async->async_break = 0;
3640 if (async->async_flags & ASYNC_ISOPEN) {
3641 mutex_exit(&asy->asy_excl_hi);
3642 mutex_exit(&asy->asy_excl);
3643 for (; nb > 0; nb--)
3644 (void) putctl(q, M_BREAK);
3645 mutex_enter(&asy->asy_excl);
3646 mutex_enter(&asy->asy_excl_hi);
3647 }
3648 }
3649 if (async->async_ocnt <= 0 && (async->async_flags & ASYNC_BUSY)) {
3650 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3651 "Clearing ASYNC_BUSY, async_ocnt=%d", async->async_ocnt);
3652 async->async_flags &= ~ASYNC_BUSY;
3653 mutex_exit(&asy->asy_excl_hi);
3654 if (async->async_xmitblk)
3655 freeb(async->async_xmitblk);
3656 async->async_xmitblk = NULL;
3657 async_start(async);
3658 /*
3659 * If the flag isn't set after doing the async_start above, we
3660 * may have finished all the queued output. Signal any thread
3661 * stuck in close.
3662 */
3663 if (!(async->async_flags & ASYNC_BUSY))
3664 cv_broadcast(&async->async_flags_cv);
3665 mutex_enter(&asy->asy_excl_hi);
3666 }
3667 /*
3668 * A note about these overrun bits: all they do is *tell* someone
3669 * about an error- They do not track multiple errors. In fact,
3670 * you could consider them latched register bits if you like.
3671 * We are only interested in printing the error message once for
3672 * any cluster of overrun errors.
3673 */
3674 if (async->async_hw_overrun) {
3675 if (async->async_flags & ASYNC_ISOPEN) {
3676 mutex_exit(&asy->asy_excl_hi);
3677 mutex_exit(&asy->asy_excl);
3678 asyerror(asy, CE_WARN, "silo overflow");
3679 mutex_enter(&asy->asy_excl);
3680 mutex_enter(&asy->asy_excl_hi);
3681 }
3682 async->async_hw_overrun = 0;
3683 }
3684 if (async->async_sw_overrun) {
3685 if (async->async_flags & ASYNC_ISOPEN) {
3686 mutex_exit(&asy->asy_excl_hi);
3687 mutex_exit(&asy->asy_excl);
3688 asyerror(asy, CE_WARN, "ring buffer overflow");
3689 mutex_enter(&asy->asy_excl);
3690 mutex_enter(&asy->asy_excl_hi);
3691 }
3692 async->async_sw_overrun = 0;
3693 }
3694 if (asy->asy_flags & ASY_DOINGSOFT_RETRY) {
3695 mutex_exit(&asy->asy_excl);
3696 goto begin;
3697 }
3698 asy->asy_flags &= ~ASY_DOINGSOFT;
3699 mutex_exit(&asy->asy_excl_hi);
3700 mutex_exit(&asy->asy_excl);
3701 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
3702 }
3703
3704 /*
3705 * Restart output on a line after a delay or break timer expired.
3706 */
3707 static void
async_restart(void * arg)3708 async_restart(void *arg)
3709 {
3710 struct asyncline *async = (struct asyncline *)arg;
3711 struct asycom *asy = async->async_common;
3712
3713 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3714
3715 /*
3716 * If break timer expired, turn off the break bit.
3717 */
3718
3719 mutex_enter(&asy->asy_excl);
3720 /*
3721 * If ASYNC_OUT_SUSPEND is also set, we don't really
3722 * clean the HW break, TIOCCBRK is responsible for this.
3723 */
3724 if ((async->async_flags & ASYNC_BREAK) &&
3725 !(async->async_flags & ASYNC_OUT_SUSPEND)) {
3726 mutex_enter(&asy->asy_excl_hi);
3727 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3728 mutex_exit(&asy->asy_excl_hi);
3729 }
3730 async->async_flags &= ~(ASYNC_DELAY|ASYNC_BREAK);
3731 cv_broadcast(&async->async_flags_cv);
3732 async_start(async);
3733
3734 mutex_exit(&asy->asy_excl);
3735 }
3736
3737 /*
3738 * Start output on a line, unless it's busy, frozen, or otherwise.
3739 */
3740 static void
async_start(struct asyncline * async)3741 async_start(struct asyncline *async)
3742 {
3743 struct asycom *asy = async->async_common;
3744 int cc;
3745 queue_t *q;
3746 mblk_t *bp;
3747 uchar_t *xmit_addr;
3748 int fifo_len = 1;
3749 boolean_t didsome;
3750 mblk_t *nbp;
3751
3752 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3753
3754 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3755 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3756 if (fifo_len > asy_max_tx_fifo)
3757 fifo_len = asy_max_tx_fifo;
3758 }
3759
3760 ASSERT(mutex_owned(&asy->asy_excl));
3761
3762 /*
3763 * If the chip is busy (i.e., we're waiting for a break timeout
3764 * to expire, or for the current transmission to finish, or for
3765 * output to finish draining from chip), don't grab anything new.
3766 */
3767 if (async->async_flags & (ASYNC_BREAK|ASYNC_BUSY)) {
3768 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "%s",
3769 async->async_flags & ASYNC_BREAK ? "break" : "busy");
3770 return;
3771 }
3772
3773 /*
3774 * Check only pended sw input flow control.
3775 */
3776 mutex_enter(&asy->asy_excl_hi);
3777 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3778 fifo_len--;
3779 mutex_exit(&asy->asy_excl_hi);
3780
3781 /*
3782 * If we're waiting for a delay timeout to expire, don't grab
3783 * anything new.
3784 */
3785 if (async->async_flags & ASYNC_DELAY) {
3786 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start ASYNC_DELAY");
3787 return;
3788 }
3789
3790 if ((q = async->async_ttycommon.t_writeq) == NULL) {
3791 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start writeq is null");
3792 return; /* not attached to a stream */
3793 }
3794
3795 for (;;) {
3796 if ((bp = getq(q)) == NULL)
3797 return; /* no data to transmit */
3798
3799 /*
3800 * We have a message block to work on.
3801 * Check whether it's a break, a delay, or an ioctl (the latter
3802 * occurs if the ioctl in question was waiting for the output
3803 * to drain). If it's one of those, process it immediately.
3804 */
3805 switch (bp->b_datap->db_type) {
3806
3807 case M_BREAK:
3808 /*
3809 * Set the break bit, and arrange for "async_restart"
3810 * to be called in 1/4 second; it will turn the
3811 * break bit off, and call "async_start" to grab
3812 * the next message.
3813 */
3814 mutex_enter(&asy->asy_excl_hi);
3815 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
3816 mutex_exit(&asy->asy_excl_hi);
3817 async->async_flags |= ASYNC_BREAK;
3818 (void) timeout(async_restart, (caddr_t)async,
3819 drv_usectohz(1000000)/4);
3820 freemsg(bp);
3821 return; /* wait for this to finish */
3822
3823 case M_DELAY:
3824 /*
3825 * Arrange for "async_restart" to be called when the
3826 * delay expires; it will turn ASYNC_DELAY off,
3827 * and call "async_start" to grab the next message.
3828 */
3829 (void) timeout(async_restart, (caddr_t)async,
3830 (int)(*(unsigned char *)bp->b_rptr + 6));
3831 async->async_flags |= ASYNC_DELAY;
3832 freemsg(bp);
3833 return; /* wait for this to finish */
3834
3835 case M_IOCTL:
3836 /*
3837 * This ioctl was waiting for the output ahead of
3838 * it to drain; obviously, it has. Do it, and
3839 * then grab the next message after it.
3840 */
3841 mutex_exit(&asy->asy_excl);
3842 async_ioctl(async, q, bp);
3843 mutex_enter(&asy->asy_excl);
3844 continue;
3845 }
3846
3847 while (bp != NULL && ((cc = MBLKL(bp)) == 0)) {
3848 nbp = bp->b_cont;
3849 freeb(bp);
3850 bp = nbp;
3851 }
3852 if (bp != NULL)
3853 break;
3854 }
3855
3856 /*
3857 * We have data to transmit. If output is stopped, put
3858 * it back and try again later.
3859 */
3860 if (async->async_flags & (ASYNC_HW_OUT_FLW | ASYNC_SW_OUT_FLW |
3861 ASYNC_STOPPED | ASYNC_OUT_SUSPEND)) {
3862 (void) putbq(q, bp);
3863 return;
3864 }
3865
3866 async->async_xmitblk = bp;
3867 xmit_addr = bp->b_rptr;
3868 bp = bp->b_cont;
3869 if (bp != NULL)
3870 (void) putbq(q, bp); /* not done with this message yet */
3871
3872 /*
3873 * In 5-bit mode, the high order bits are used
3874 * to indicate character sizes less than five,
3875 * so we need to explicitly mask before transmitting
3876 */
3877 if ((async->async_ttycommon.t_cflag & CSIZE) == CS5) {
3878 unsigned char *p = xmit_addr;
3879 int cnt = cc;
3880
3881 while (cnt--)
3882 *p++ &= (unsigned char) 0x1f;
3883 }
3884
3885 /*
3886 * Set up this block for pseudo-DMA.
3887 */
3888 mutex_enter(&asy->asy_excl_hi);
3889 /*
3890 * If the transmitter is ready, shove the first
3891 * character out.
3892 */
3893 didsome = B_FALSE;
3894 while (--fifo_len >= 0 && cc > 0) {
3895 if (!(asy_get(asy, ASY_LSR) & ASY_LSR_THRE))
3896 break;
3897 asy_put(asy, ASY_THR, *xmit_addr++);
3898 cc--;
3899 didsome = B_TRUE;
3900 }
3901 async->async_optr = xmit_addr;
3902 async->async_ocnt = cc;
3903 if (didsome)
3904 async->async_flags |= ASYNC_PROGRESS;
3905 ASY_DPRINTF(asy, ASY_DEBUG_BUSY, "Set ASYNC_BUSY, async_ocnt=%d",
3906 async->async_ocnt);
3907 async->async_flags |= ASYNC_BUSY;
3908 mutex_exit(&asy->asy_excl_hi);
3909 }
3910
3911 /*
3912 * Resume output by poking the transmitter.
3913 */
3914 static void
async_resume(struct asyncline * async)3915 async_resume(struct asyncline *async)
3916 {
3917 struct asycom *asy = async->async_common;
3918
3919 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3920 ASSERT(mutex_owned(&asy->asy_excl_hi));
3921
3922 if (asy_get(asy, ASY_LSR) & ASY_LSR_THRE) {
3923 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3924 return;
3925 if (async->async_ocnt > 0 &&
3926 !(async->async_flags &
3927 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_OUT_SUSPEND))) {
3928 asy_put(asy, ASY_THR, *async->async_optr++);
3929 async->async_ocnt--;
3930 async->async_flags |= ASYNC_PROGRESS;
3931 }
3932 }
3933 }
3934
3935 /*
3936 * Hold the untimed break to last the minimum time.
3937 */
3938 static void
async_hold_utbrk(void * arg)3939 async_hold_utbrk(void *arg)
3940 {
3941 struct asyncline *async = arg;
3942 struct asycom *asy = async->async_common;
3943
3944 mutex_enter(&asy->asy_excl);
3945 async->async_flags &= ~ASYNC_HOLD_UTBRK;
3946 cv_broadcast(&async->async_flags_cv);
3947 async->async_utbrktid = 0;
3948 mutex_exit(&asy->asy_excl);
3949 }
3950
3951 /*
3952 * Resume the untimed break.
3953 */
3954 static void
async_resume_utbrk(struct asyncline * async)3955 async_resume_utbrk(struct asyncline *async)
3956 {
3957 struct asycom *asy = async->async_common;
3958 ASSERT(mutex_owned(&asy->asy_excl));
3959
3960 /*
3961 * Because the wait time is very short,
3962 * so we use uninterruptably wait.
3963 */
3964 while (async->async_flags & ASYNC_HOLD_UTBRK) {
3965 cv_wait(&async->async_flags_cv, &asy->asy_excl);
3966 }
3967 mutex_enter(&asy->asy_excl_hi);
3968 /*
3969 * Timed break and untimed break can exist simultaneously,
3970 * if ASYNC_BREAK is also set at here, we don't
3971 * really clean the HW break.
3972 */
3973 if (!(async->async_flags & ASYNC_BREAK))
3974 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3975
3976 async->async_flags &= ~ASYNC_OUT_SUSPEND;
3977 cv_broadcast(&async->async_flags_cv);
3978 if (async->async_ocnt > 0) {
3979 async_resume(async);
3980 mutex_exit(&asy->asy_excl_hi);
3981 } else {
3982 async->async_flags &= ~ASYNC_BUSY;
3983 mutex_exit(&asy->asy_excl_hi);
3984 if (async->async_xmitblk != NULL) {
3985 freeb(async->async_xmitblk);
3986 async->async_xmitblk = NULL;
3987 }
3988 async_start(async);
3989 }
3990 }
3991
3992 /*
3993 * Process an "ioctl" message sent down to us.
3994 * Note that we don't need to get any locks until we are ready to access
3995 * the hardware. Nothing we access until then is going to be altered
3996 * outside of the STREAMS framework, so we should be safe.
3997 */
3998 int asydelay = 10000;
3999 static void
async_ioctl(struct asyncline * async,queue_t * wq,mblk_t * mp)4000 async_ioctl(struct asyncline *async, queue_t *wq, mblk_t *mp)
4001 {
4002 struct asycom *asy = async->async_common;
4003 tty_common_t *tp = &async->async_ttycommon;
4004 struct iocblk *iocp;
4005 unsigned datasize;
4006 int error = 0;
4007 mblk_t *datamp;
4008
4009 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
4010
4011 if (tp->t_iocpending != NULL) {
4012 /*
4013 * We were holding an "ioctl" response pending the
4014 * availability of an "mblk" to hold data to be passed up;
4015 * another "ioctl" came through, which means that "ioctl"
4016 * must have timed out or been aborted.
4017 */
4018 freemsg(async->async_ttycommon.t_iocpending);
4019 async->async_ttycommon.t_iocpending = NULL;
4020 }
4021
4022 iocp = (struct iocblk *)mp->b_rptr;
4023
4024 /*
4025 * For TIOCMGET and the PPS ioctls, do NOT call ttycommon_ioctl()
4026 * because this function frees up the message block (mp->b_cont) that
4027 * contains the user location where we pass back the results.
4028 *
4029 * Similarly, CONSOPENPOLLEDIO needs ioc_count, which ttycommon_ioctl
4030 * zaps. We know that ttycommon_ioctl doesn't know any CONS*
4031 * ioctls, so keep the others safe too.
4032 */
4033 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL, "%s",
4034 iocp->ioc_cmd == TIOCMGET ? "TIOCMGET" :
4035 iocp->ioc_cmd == TIOCMSET ? "TIOCMSET" :
4036 iocp->ioc_cmd == TIOCMBIS ? "TIOCMBIS" :
4037 iocp->ioc_cmd == TIOCMBIC ? "TIOCMBIC" :
4038 "other");
4039
4040 switch (iocp->ioc_cmd) {
4041 case TIOCMGET:
4042 case TIOCGPPS:
4043 case TIOCSPPS:
4044 case TIOCGPPSEV:
4045 case CONSOPENPOLLEDIO:
4046 case CONSCLOSEPOLLEDIO:
4047 case CONSSETABORTENABLE:
4048 case CONSGETABORTENABLE:
4049 error = -1; /* Do Nothing */
4050 break;
4051 default:
4052
4053 /*
4054 * The only way in which "ttycommon_ioctl" can fail is if the
4055 * "ioctl" requires a response containing data to be returned
4056 * to the user, and no mblk could be allocated for the data.
4057 * No such "ioctl" alters our state. Thus, we always go ahead
4058 * and do any state-changes the "ioctl" calls for. If we
4059 * couldn't allocate the data, "ttycommon_ioctl" has stashed
4060 * the "ioctl" away safely, so we just call "bufcall" to
4061 * request that we be called back when we stand a better
4062 * chance of allocating the data.
4063 */
4064 if ((datasize = ttycommon_ioctl(tp, wq, mp, &error)) != 0) {
4065 if (async->async_wbufcid)
4066 unbufcall(async->async_wbufcid);
4067 async->async_wbufcid = bufcall(datasize, BPRI_HI,
4068 (void (*)(void *)) async_reioctl,
4069 (void *)(intptr_t)async->async_common->asy_unit);
4070 return;
4071 }
4072 }
4073
4074 mutex_enter(&asy->asy_excl);
4075
4076 if (error == 0) {
4077 /*
4078 * "ttycommon_ioctl" did most of the work; we just use the
4079 * data it set up.
4080 */
4081 switch (iocp->ioc_cmd) {
4082
4083 case TCSETS:
4084 mutex_enter(&asy->asy_excl_hi);
4085 if (asy_baudok(asy))
4086 asy_program(asy, ASY_NOINIT);
4087 else
4088 error = EINVAL;
4089 mutex_exit(&asy->asy_excl_hi);
4090 break;
4091 case TCSETSF:
4092 case TCSETSW:
4093 case TCSETA:
4094 case TCSETAW:
4095 case TCSETAF:
4096 mutex_enter(&asy->asy_excl_hi);
4097 if (!asy_baudok(asy))
4098 error = EINVAL;
4099 else {
4100 if (asy_isbusy(asy))
4101 asy_waiteot(asy);
4102 asy_program(asy, ASY_NOINIT);
4103 }
4104 mutex_exit(&asy->asy_excl_hi);
4105 break;
4106 }
4107 } else if (error < 0) {
4108 /*
4109 * "ttycommon_ioctl" didn't do anything; we process it here.
4110 */
4111 error = 0;
4112 switch (iocp->ioc_cmd) {
4113
4114 case TIOCGPPS:
4115 /*
4116 * Get PPS on/off.
4117 */
4118 if (mp->b_cont != NULL)
4119 freemsg(mp->b_cont);
4120
4121 mp->b_cont = allocb(sizeof (int), BPRI_HI);
4122 if (mp->b_cont == NULL) {
4123 error = ENOMEM;
4124 break;
4125 }
4126 if (asy->asy_flags & ASY_PPS)
4127 *(int *)mp->b_cont->b_wptr = 1;
4128 else
4129 *(int *)mp->b_cont->b_wptr = 0;
4130 mp->b_cont->b_wptr += sizeof (int);
4131 mp->b_datap->db_type = M_IOCACK;
4132 iocp->ioc_count = sizeof (int);
4133 break;
4134
4135 case TIOCSPPS:
4136 /*
4137 * Set PPS on/off.
4138 */
4139 error = miocpullup(mp, sizeof (int));
4140 if (error != 0)
4141 break;
4142
4143 mutex_enter(&asy->asy_excl_hi);
4144 if (*(int *)mp->b_cont->b_rptr)
4145 asy->asy_flags |= ASY_PPS;
4146 else
4147 asy->asy_flags &= ~ASY_PPS;
4148 /* Reset edge sense */
4149 asy->asy_flags &= ~ASY_PPS_EDGE;
4150 mutex_exit(&asy->asy_excl_hi);
4151 mp->b_datap->db_type = M_IOCACK;
4152 break;
4153
4154 case TIOCGPPSEV:
4155 {
4156 /*
4157 * Get PPS event data.
4158 */
4159 mblk_t *bp;
4160 void *buf;
4161 #ifdef _SYSCALL32_IMPL
4162 struct ppsclockev32 p32;
4163 #endif
4164 struct ppsclockev ppsclockev;
4165
4166 if (mp->b_cont != NULL) {
4167 freemsg(mp->b_cont);
4168 mp->b_cont = NULL;
4169 }
4170
4171 if ((asy->asy_flags & ASY_PPS) == 0) {
4172 error = ENXIO;
4173 break;
4174 }
4175
4176 /* Protect from incomplete asy_ppsev */
4177 mutex_enter(&asy->asy_excl_hi);
4178 ppsclockev = asy_ppsev;
4179 mutex_exit(&asy->asy_excl_hi);
4180
4181 #ifdef _SYSCALL32_IMPL
4182 if ((iocp->ioc_flag & IOC_MODELS) != IOC_NATIVE) {
4183 TIMEVAL_TO_TIMEVAL32(&p32.tv, &ppsclockev.tv);
4184 p32.serial = ppsclockev.serial;
4185 buf = &p32;
4186 iocp->ioc_count = sizeof (struct ppsclockev32);
4187 } else
4188 #endif
4189 {
4190 buf = &ppsclockev;
4191 iocp->ioc_count = sizeof (struct ppsclockev);
4192 }
4193
4194 if ((bp = allocb(iocp->ioc_count, BPRI_HI)) == NULL) {
4195 error = ENOMEM;
4196 break;
4197 }
4198 mp->b_cont = bp;
4199
4200 bcopy(buf, bp->b_wptr, iocp->ioc_count);
4201 bp->b_wptr += iocp->ioc_count;
4202 mp->b_datap->db_type = M_IOCACK;
4203 break;
4204 }
4205
4206 case TCSBRK:
4207 error = miocpullup(mp, sizeof (int));
4208 if (error != 0)
4209 break;
4210
4211 if (*(int *)mp->b_cont->b_rptr == 0) {
4212
4213 /*
4214 * XXX Arrangements to ensure that a break
4215 * isn't in progress should be sufficient.
4216 * This ugly delay() is the only thing
4217 * that seems to work on the NCR Worldmark.
4218 * It should be replaced. Note that an
4219 * asy_waiteot() also does not work.
4220 */
4221 if (asydelay)
4222 delay(drv_usectohz(asydelay));
4223
4224 while (async->async_flags & ASYNC_BREAK) {
4225 cv_wait(&async->async_flags_cv,
4226 &asy->asy_excl);
4227 }
4228 mutex_enter(&asy->asy_excl_hi);
4229 /*
4230 * Wait until TSR is empty and then set the
4231 * break. ASYNC_BREAK has been set to ensure
4232 * that no characters are transmitted while the
4233 * TSR is being flushed and SOUT is being used
4234 * for the break signal.
4235 */
4236 async->async_flags |= ASYNC_BREAK;
4237 asy_wait_baudrate(asy);
4238 /*
4239 * Arrange for "async_restart"
4240 * to be called in 1/4 second;
4241 * it will turn the break bit off, and call
4242 * "async_start" to grab the next message.
4243 */
4244 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
4245 mutex_exit(&asy->asy_excl_hi);
4246 (void) timeout(async_restart, (caddr_t)async,
4247 drv_usectohz(1000000)/4);
4248 } else {
4249 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4250 "wait for flush");
4251 mutex_enter(&asy->asy_excl_hi);
4252 asy_waiteot(asy);
4253 mutex_exit(&asy->asy_excl_hi);
4254 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4255 "ldterm satisfied");
4256 }
4257 break;
4258
4259 case TIOCSBRK:
4260 if (!(async->async_flags & ASYNC_OUT_SUSPEND)) {
4261 mutex_enter(&asy->asy_excl_hi);
4262 async->async_flags |= ASYNC_OUT_SUSPEND;
4263 async->async_flags |= ASYNC_HOLD_UTBRK;
4264 asy_wait_baudrate(asy);
4265 mutex_exit(&asy->asy_excl_hi);
4266 /* wait for 100ms to hold BREAK */
4267 async->async_utbrktid =
4268 timeout((void (*)())async_hold_utbrk,
4269 (caddr_t)async,
4270 drv_usectohz(asy_min_utbrk));
4271 }
4272 mioc2ack(mp, NULL, 0, 0);
4273 break;
4274
4275 case TIOCCBRK:
4276 if (async->async_flags & ASYNC_OUT_SUSPEND)
4277 async_resume_utbrk(async);
4278 mioc2ack(mp, NULL, 0, 0);
4279 break;
4280
4281 case TIOCMSET:
4282 case TIOCMBIS:
4283 case TIOCMBIC:
4284 if (iocp->ioc_count != TRANSPARENT) {
4285 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4286 "non-transparent");
4287
4288 error = miocpullup(mp, sizeof (int));
4289 if (error != 0)
4290 break;
4291
4292 mutex_enter(&asy->asy_excl_hi);
4293 (void) asymctl(asy,
4294 dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4295 iocp->ioc_cmd);
4296 mutex_exit(&asy->asy_excl_hi);
4297 iocp->ioc_error = 0;
4298 mp->b_datap->db_type = M_IOCACK;
4299 } else {
4300 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4301 "transparent");
4302 mcopyin(mp, NULL, sizeof (int), NULL);
4303 }
4304 break;
4305
4306 case TIOCMGET:
4307 datamp = allocb(sizeof (int), BPRI_MED);
4308 if (datamp == NULL) {
4309 error = EAGAIN;
4310 break;
4311 }
4312
4313 mutex_enter(&asy->asy_excl_hi);
4314 *(int *)datamp->b_rptr = asymctl(asy, 0, TIOCMGET);
4315 mutex_exit(&asy->asy_excl_hi);
4316
4317 if (iocp->ioc_count == TRANSPARENT) {
4318 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4319 "transparent");
4320 mcopyout(mp, NULL, sizeof (int), NULL, datamp);
4321 } else {
4322 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4323 "non-transparent");
4324 mioc2ack(mp, datamp, sizeof (int), 0);
4325 }
4326 break;
4327
4328 case CONSOPENPOLLEDIO:
4329 error = miocpullup(mp, sizeof (struct cons_polledio *));
4330 if (error != 0)
4331 break;
4332
4333 *(struct cons_polledio **)mp->b_cont->b_rptr =
4334 &asy->polledio;
4335
4336 mp->b_datap->db_type = M_IOCACK;
4337 break;
4338
4339 case CONSCLOSEPOLLEDIO:
4340 mp->b_datap->db_type = M_IOCACK;
4341 iocp->ioc_error = 0;
4342 iocp->ioc_rval = 0;
4343 break;
4344
4345 case CONSSETABORTENABLE:
4346 error = secpolicy_console(iocp->ioc_cr);
4347 if (error != 0)
4348 break;
4349
4350 if (iocp->ioc_count != TRANSPARENT) {
4351 error = EINVAL;
4352 break;
4353 }
4354
4355 mutex_enter(&asy->asy_excl_hi);
4356 if (*(intptr_t *)mp->b_cont->b_rptr)
4357 asy->asy_flags |= ASY_CONSOLE;
4358 else
4359 asy->asy_flags &= ~ASY_CONSOLE;
4360 mutex_exit(&asy->asy_excl_hi);
4361
4362 mp->b_datap->db_type = M_IOCACK;
4363 iocp->ioc_error = 0;
4364 iocp->ioc_rval = 0;
4365 break;
4366
4367 case CONSGETABORTENABLE:
4368 /*CONSTANTCONDITION*/
4369 ASSERT(sizeof (boolean_t) <= sizeof (boolean_t *));
4370 /*
4371 * Store the return value right in the payload
4372 * we were passed. Crude.
4373 */
4374 mcopyout(mp, NULL, sizeof (boolean_t), NULL, NULL);
4375 *(boolean_t *)mp->b_cont->b_rptr =
4376 (asy->asy_flags & ASY_CONSOLE) != 0;
4377 break;
4378
4379 default:
4380 /*
4381 * If we don't understand it, it's an error. NAK it.
4382 */
4383 error = EINVAL;
4384 break;
4385 }
4386 }
4387 if (error != 0) {
4388 iocp->ioc_error = error;
4389 mp->b_datap->db_type = M_IOCNAK;
4390 }
4391 mutex_exit(&asy->asy_excl);
4392 qreply(wq, mp);
4393 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
4394 }
4395
4396 static int
asyrsrv(queue_t * q)4397 asyrsrv(queue_t *q)
4398 {
4399 mblk_t *bp;
4400 struct asyncline *async;
4401 struct asycom *asy;
4402
4403 async = (struct asyncline *)q->q_ptr;
4404 asy = (struct asycom *)async->async_common;
4405
4406 while (canputnext(q) && (bp = getq(q)))
4407 putnext(q, bp);
4408 mutex_enter(&asy->asy_excl_hi);
4409 asysetsoft(asy);
4410 mutex_exit(&asy->asy_excl_hi);
4411 async->async_polltid = 0;
4412 return (0);
4413 }
4414
4415 /*
4416 * The ASYWPUTDO_NOT_SUSP macro indicates to asywputdo() whether it should
4417 * handle messages as though the driver is operating normally or is
4418 * suspended. In the suspended case, some or all of the processing may have
4419 * to be delayed until the driver is resumed.
4420 */
4421 #define ASYWPUTDO_NOT_SUSP(async, wput) \
4422 !((wput) && ((async)->async_flags & ASYNC_DDI_SUSPENDED))
4423
4424 /*
4425 * Processing for write queue put procedure.
4426 * Respond to M_STOP, M_START, M_IOCTL, and M_FLUSH messages here;
4427 * set the flow control character for M_STOPI and M_STARTI messages;
4428 * queue up M_BREAK, M_DELAY, and M_DATA messages for processing
4429 * by the start routine, and then call the start routine; discard
4430 * everything else. Note that this driver does not incorporate any
4431 * mechanism to negotiate to handle the canonicalization process.
4432 * It expects that these functions are handled in upper module(s),
4433 * as we do in ldterm.
4434 */
4435 static int
asywputdo(queue_t * q,mblk_t * mp,boolean_t wput)4436 asywputdo(queue_t *q, mblk_t *mp, boolean_t wput)
4437 {
4438 struct asyncline *async;
4439 struct asycom *asy;
4440 int error;
4441
4442 async = (struct asyncline *)q->q_ptr;
4443 asy = async->async_common;
4444
4445 switch (mp->b_datap->db_type) {
4446
4447 case M_STOP:
4448 /*
4449 * Since we don't do real DMA, we can just let the
4450 * chip coast to a stop after applying the brakes.
4451 */
4452 mutex_enter(&asy->asy_excl);
4453 async->async_flags |= ASYNC_STOPPED;
4454 mutex_exit(&asy->asy_excl);
4455 freemsg(mp);
4456 break;
4457
4458 case M_START:
4459 mutex_enter(&asy->asy_excl);
4460 if (async->async_flags & ASYNC_STOPPED) {
4461 async->async_flags &= ~ASYNC_STOPPED;
4462 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4463 /*
4464 * If an output operation is in progress,
4465 * resume it. Otherwise, prod the start
4466 * routine.
4467 */
4468 if (async->async_ocnt > 0) {
4469 mutex_enter(&asy->asy_excl_hi);
4470 async_resume(async);
4471 mutex_exit(&asy->asy_excl_hi);
4472 } else {
4473 async_start(async);
4474 }
4475 }
4476 }
4477 mutex_exit(&asy->asy_excl);
4478 freemsg(mp);
4479 break;
4480
4481 case M_IOCTL:
4482 switch (((struct iocblk *)mp->b_rptr)->ioc_cmd) {
4483
4484 case TCSBRK:
4485 error = miocpullup(mp, sizeof (int));
4486 if (error != 0) {
4487 miocnak(q, mp, 0, error);
4488 return (0);
4489 }
4490
4491 if (*(int *)mp->b_cont->b_rptr != 0) {
4492 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4493 "flush request");
4494 (void) putq(q, mp);
4495
4496 mutex_enter(&asy->asy_excl);
4497 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4498 /*
4499 * If an TIOCSBRK is in progress,
4500 * clean it as TIOCCBRK does,
4501 * then kick off output.
4502 * If TIOCSBRK is not in progress,
4503 * just kick off output.
4504 */
4505 async_resume_utbrk(async);
4506 }
4507 mutex_exit(&asy->asy_excl);
4508 break;
4509 }
4510 /*FALLTHROUGH*/
4511 case TCSETSW:
4512 case TCSETSF:
4513 case TCSETAW:
4514 case TCSETAF:
4515 /*
4516 * The changes do not take effect until all
4517 * output queued before them is drained.
4518 * Put this message on the queue, so that
4519 * "async_start" will see it when it's done
4520 * with the output before it. Poke the
4521 * start routine, just in case.
4522 */
4523 (void) putq(q, mp);
4524
4525 mutex_enter(&asy->asy_excl);
4526 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4527 /*
4528 * If an TIOCSBRK is in progress,
4529 * clean it as TIOCCBRK does.
4530 * then kick off output.
4531 * If TIOCSBRK is not in progress,
4532 * just kick off output.
4533 */
4534 async_resume_utbrk(async);
4535 }
4536 mutex_exit(&asy->asy_excl);
4537 break;
4538
4539 default:
4540 /*
4541 * Do it now.
4542 */
4543 mutex_enter(&asy->asy_excl);
4544 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4545 mutex_exit(&asy->asy_excl);
4546 async_ioctl(async, q, mp);
4547 break;
4548 }
4549 async_put_suspq(asy, mp);
4550 mutex_exit(&asy->asy_excl);
4551 break;
4552 }
4553 break;
4554
4555 case M_FLUSH:
4556 if (*mp->b_rptr & FLUSHW) {
4557 mutex_enter(&asy->asy_excl);
4558
4559 /*
4560 * Abort any output in progress.
4561 */
4562 mutex_enter(&asy->asy_excl_hi);
4563 if (async->async_flags & ASYNC_BUSY) {
4564 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
4565 "Clearing async_ocnt, "
4566 "leaving ASYNC_BUSY set");
4567 async->async_ocnt = 0;
4568 async->async_flags &= ~ASYNC_BUSY;
4569 } /* if */
4570
4571 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4572 /* Flush FIFO buffers */
4573 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4574 asy_reset_fifo(asy, ASY_FCR_THR_FL);
4575 }
4576 }
4577 mutex_exit(&asy->asy_excl_hi);
4578
4579 /*
4580 * Flush our write queue.
4581 */
4582 flushq(q, FLUSHDATA); /* XXX doesn't flush M_DELAY */
4583 if (async->async_xmitblk != NULL) {
4584 freeb(async->async_xmitblk);
4585 async->async_xmitblk = NULL;
4586 }
4587 mutex_exit(&asy->asy_excl);
4588 *mp->b_rptr &= ~FLUSHW; /* it has been flushed */
4589 }
4590 if (*mp->b_rptr & FLUSHR) {
4591 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4592 mutex_enter(&asy->asy_excl);
4593 mutex_enter(&asy->asy_excl_hi);
4594 /* Flush FIFO buffers */
4595 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4596 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
4597 }
4598 mutex_exit(&asy->asy_excl_hi);
4599 mutex_exit(&asy->asy_excl);
4600 }
4601 flushq(RD(q), FLUSHDATA);
4602 qreply(q, mp); /* give the read queues a crack at it */
4603 } else {
4604 freemsg(mp);
4605 }
4606
4607 /*
4608 * We must make sure we process messages that survive the
4609 * write-side flush.
4610 */
4611 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4612 mutex_enter(&asy->asy_excl);
4613 async_start(async);
4614 mutex_exit(&asy->asy_excl);
4615 }
4616 break;
4617
4618 case M_BREAK:
4619 case M_DELAY:
4620 case M_DATA:
4621 /*
4622 * Queue the message up to be transmitted,
4623 * and poke the start routine.
4624 */
4625 (void) putq(q, mp);
4626 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4627 mutex_enter(&asy->asy_excl);
4628 async_start(async);
4629 mutex_exit(&asy->asy_excl);
4630 }
4631 break;
4632
4633 case M_STOPI:
4634 mutex_enter(&asy->asy_excl);
4635 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4636 mutex_enter(&asy->asy_excl_hi);
4637 if (!(async->async_inflow_source & IN_FLOW_USER)) {
4638 async_flowcontrol_hw_input(asy, FLOW_STOP,
4639 IN_FLOW_USER);
4640 (void) async_flowcontrol_sw_input(asy,
4641 FLOW_STOP, IN_FLOW_USER);
4642 }
4643 mutex_exit(&asy->asy_excl_hi);
4644 mutex_exit(&asy->asy_excl);
4645 freemsg(mp);
4646 break;
4647 }
4648 async_put_suspq(asy, mp);
4649 mutex_exit(&asy->asy_excl);
4650 break;
4651
4652 case M_STARTI:
4653 mutex_enter(&asy->asy_excl);
4654 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4655 mutex_enter(&asy->asy_excl_hi);
4656 if (async->async_inflow_source & IN_FLOW_USER) {
4657 async_flowcontrol_hw_input(asy, FLOW_START,
4658 IN_FLOW_USER);
4659 (void) async_flowcontrol_sw_input(asy,
4660 FLOW_START, IN_FLOW_USER);
4661 }
4662 mutex_exit(&asy->asy_excl_hi);
4663 mutex_exit(&asy->asy_excl);
4664 freemsg(mp);
4665 break;
4666 }
4667 async_put_suspq(asy, mp);
4668 mutex_exit(&asy->asy_excl);
4669 break;
4670
4671 case M_CTL:
4672 if (MBLKL(mp) >= sizeof (struct iocblk) &&
4673 ((struct iocblk *)mp->b_rptr)->ioc_cmd == MC_POSIXQUERY) {
4674 mutex_enter(&asy->asy_excl);
4675 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4676 ((struct iocblk *)mp->b_rptr)->ioc_cmd =
4677 MC_HAS_POSIX;
4678 mutex_exit(&asy->asy_excl);
4679 qreply(q, mp);
4680 break;
4681 } else {
4682 async_put_suspq(asy, mp);
4683 }
4684 } else {
4685 /*
4686 * These MC_SERVICE type messages are used by upper
4687 * modules to tell this driver to send input up
4688 * immediately, or that it can wait for normal
4689 * processing that may or may not be done. Sun
4690 * requires these for the mouse module.
4691 * (XXX - for x86?)
4692 */
4693 mutex_enter(&asy->asy_excl);
4694 switch (*mp->b_rptr) {
4695
4696 case MC_SERVICEIMM:
4697 async->async_flags |= ASYNC_SERVICEIMM;
4698 break;
4699
4700 case MC_SERVICEDEF:
4701 async->async_flags &= ~ASYNC_SERVICEIMM;
4702 break;
4703 }
4704 mutex_exit(&asy->asy_excl);
4705 freemsg(mp);
4706 }
4707 break;
4708
4709 case M_IOCDATA:
4710 mutex_enter(&asy->asy_excl);
4711 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4712 mutex_exit(&asy->asy_excl);
4713 async_iocdata(q, mp);
4714 break;
4715 }
4716 async_put_suspq(asy, mp);
4717 mutex_exit(&asy->asy_excl);
4718 break;
4719
4720 default:
4721 freemsg(mp);
4722 break;
4723 }
4724 return (0);
4725 }
4726
4727 static int
asywput(queue_t * q,mblk_t * mp)4728 asywput(queue_t *q, mblk_t *mp)
4729 {
4730 return (asywputdo(q, mp, B_TRUE));
4731 }
4732
4733 /*
4734 * Retry an "ioctl", now that "bufcall" claims we may be able to allocate
4735 * the buffer we need.
4736 */
4737 static void
async_reioctl(void * unit)4738 async_reioctl(void *unit)
4739 {
4740 int instance = (uintptr_t)unit;
4741 struct asyncline *async;
4742 struct asycom *asy;
4743 queue_t *q;
4744 mblk_t *mp;
4745
4746 asy = ddi_get_soft_state(asy_soft_state, instance);
4747 ASSERT(asy != NULL);
4748 async = asy->asy_priv;
4749
4750 /*
4751 * The bufcall is no longer pending.
4752 */
4753 mutex_enter(&asy->asy_excl);
4754 async->async_wbufcid = 0;
4755 if ((q = async->async_ttycommon.t_writeq) == NULL) {
4756 mutex_exit(&asy->asy_excl);
4757 return;
4758 }
4759 if ((mp = async->async_ttycommon.t_iocpending) != NULL) {
4760 /* not pending any more */
4761 async->async_ttycommon.t_iocpending = NULL;
4762 mutex_exit(&asy->asy_excl);
4763 async_ioctl(async, q, mp);
4764 } else
4765 mutex_exit(&asy->asy_excl);
4766 }
4767
4768 static void
async_iocdata(queue_t * q,mblk_t * mp)4769 async_iocdata(queue_t *q, mblk_t *mp)
4770 {
4771 struct asyncline *async = (struct asyncline *)q->q_ptr;
4772 struct asycom *asy;
4773 struct iocblk *ip;
4774 struct copyresp *csp;
4775
4776 asy = async->async_common;
4777 ip = (struct iocblk *)mp->b_rptr;
4778 csp = (struct copyresp *)mp->b_rptr;
4779
4780 if (csp->cp_rval != 0) {
4781 if (csp->cp_private)
4782 freemsg(csp->cp_private);
4783 freemsg(mp);
4784 return;
4785 }
4786
4787 mutex_enter(&asy->asy_excl);
4788 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "case %s",
4789 csp->cp_cmd == TIOCMGET ? "TIOCMGET" :
4790 csp->cp_cmd == TIOCMSET ? "TIOCMSET" :
4791 csp->cp_cmd == TIOCMBIS ? "TIOCMBIS" :
4792 "TIOCMBIC");
4793 switch (csp->cp_cmd) {
4794
4795 case TIOCMGET:
4796 if (mp->b_cont) {
4797 freemsg(mp->b_cont);
4798 mp->b_cont = NULL;
4799 }
4800 mp->b_datap->db_type = M_IOCACK;
4801 ip->ioc_error = 0;
4802 ip->ioc_count = 0;
4803 ip->ioc_rval = 0;
4804 mp->b_wptr = mp->b_rptr + sizeof (struct iocblk);
4805 break;
4806
4807 case TIOCMSET:
4808 case TIOCMBIS:
4809 case TIOCMBIC:
4810 mutex_enter(&asy->asy_excl_hi);
4811 (void) asymctl(asy, dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4812 csp->cp_cmd);
4813 mutex_exit(&asy->asy_excl_hi);
4814 mioc2ack(mp, NULL, 0, 0);
4815 break;
4816
4817 default:
4818 mp->b_datap->db_type = M_IOCNAK;
4819 ip->ioc_error = EINVAL;
4820 break;
4821 }
4822 qreply(q, mp);
4823 mutex_exit(&asy->asy_excl);
4824 }
4825
4826 /*
4827 * debugger/console support routines.
4828 */
4829
4830 /*
4831 * put a character out
4832 * Do not use interrupts. If char is LF, put out CR, LF.
4833 */
4834 static void
asyputchar(cons_polledio_arg_t arg,uchar_t c)4835 asyputchar(cons_polledio_arg_t arg, uchar_t c)
4836 {
4837 struct asycom *asy = (struct asycom *)arg;
4838
4839 if (c == '\n')
4840 asyputchar(arg, '\r');
4841
4842 while ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_THRE) == 0) {
4843 /* wait for xmit to finish */
4844 drv_usecwait(10);
4845 }
4846
4847 /* put the character out */
4848 asy_put_reg(asy, ASY_THR, c);
4849 }
4850
4851 /*
4852 * See if there's a character available. If no character is
4853 * available, return 0. Run in polled mode, no interrupts.
4854 */
4855 static boolean_t
asyischar(cons_polledio_arg_t arg)4856 asyischar(cons_polledio_arg_t arg)
4857 {
4858 struct asycom *asy = (struct asycom *)arg;
4859
4860 return ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_DR) != 0);
4861 }
4862
4863 /*
4864 * Get a character. Run in polled mode, no interrupts.
4865 */
4866 static int
asygetchar(cons_polledio_arg_t arg)4867 asygetchar(cons_polledio_arg_t arg)
4868 {
4869 struct asycom *asy = (struct asycom *)arg;
4870
4871 while (!asyischar(arg))
4872 drv_usecwait(10);
4873 return (asy_get_reg(asy, ASY_RHR));
4874 }
4875
4876 /*
4877 * Set or get the modem control status.
4878 */
4879 static int
asymctl(struct asycom * asy,int bits,int how)4880 asymctl(struct asycom *asy, int bits, int how)
4881 {
4882 int mcr_r, msr_r;
4883
4884 ASSERT(mutex_owned(&asy->asy_excl_hi));
4885 ASSERT(mutex_owned(&asy->asy_excl));
4886
4887 /* Read Modem Control Registers */
4888 mcr_r = asy_get(asy, ASY_MCR);
4889
4890 switch (how) {
4891
4892 case TIOCMSET:
4893 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMSET, bits = %x", bits);
4894 mcr_r = bits; /* Set bits */
4895 break;
4896
4897 case TIOCMBIS:
4898 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIS, bits = %x", bits);
4899 mcr_r |= bits; /* Mask in bits */
4900 break;
4901
4902 case TIOCMBIC:
4903 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIC, bits = %x", bits);
4904 mcr_r &= ~bits; /* Mask out bits */
4905 break;
4906
4907 case TIOCMGET:
4908 /* Read Modem Status Registers */
4909 /*
4910 * If modem interrupts are enabled, we return the
4911 * saved value of msr. We read MSR only in async_msint()
4912 */
4913 if (asy_get(asy, ASY_IER) & ASY_IER_MIEN) {
4914 msr_r = asy->asy_msr;
4915 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4916 "TIOCMGET, read msr_r = %x", msr_r);
4917 } else {
4918 msr_r = asy_get(asy, ASY_MSR);
4919 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4920 "TIOCMGET, read MSR = %x", msr_r);
4921 }
4922 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "modem_lines = %x",
4923 asytodm(mcr_r, msr_r));
4924 return (asytodm(mcr_r, msr_r));
4925 }
4926
4927 asy_put(asy, ASY_MCR, mcr_r);
4928
4929 return (mcr_r);
4930 }
4931
4932 static int
asytodm(int mcr_r,int msr_r)4933 asytodm(int mcr_r, int msr_r)
4934 {
4935 int b = 0;
4936
4937 /* MCR registers */
4938 if (mcr_r & ASY_MCR_RTS)
4939 b |= TIOCM_RTS;
4940
4941 if (mcr_r & ASY_MCR_DTR)
4942 b |= TIOCM_DTR;
4943
4944 /* MSR registers */
4945 if (msr_r & ASY_MSR_DCD)
4946 b |= TIOCM_CAR;
4947
4948 if (msr_r & ASY_MSR_CTS)
4949 b |= TIOCM_CTS;
4950
4951 if (msr_r & ASY_MSR_DSR)
4952 b |= TIOCM_DSR;
4953
4954 if (msr_r & ASY_MSR_RI)
4955 b |= TIOCM_RNG;
4956 return (b);
4957 }
4958
4959 static int
dmtoasy(struct asycom * asy,int bits)4960 dmtoasy(struct asycom *asy, int bits)
4961 {
4962 int b = 0;
4963
4964 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "bits = %x", bits);
4965 #ifdef CAN_NOT_SET /* only DTR and RTS can be set */
4966 if (bits & TIOCM_CAR)
4967 b |= ASY_MSR_DCD;
4968 if (bits & TIOCM_CTS)
4969 b |= ASY_MSR_CTS;
4970 if (bits & TIOCM_DSR)
4971 b |= ASY_MSR_DSR;
4972 if (bits & TIOCM_RNG)
4973 b |= ASY_MSR_RI;
4974 #endif
4975
4976 if (bits & TIOCM_RTS) {
4977 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & RTS");
4978 b |= ASY_MCR_RTS;
4979 }
4980 if (bits & TIOCM_DTR) {
4981 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & DTR");
4982 b |= ASY_MCR_DTR;
4983 }
4984
4985 return (b);
4986 }
4987
4988 static void
asyerror(const struct asycom * asy,int level,const char * fmt,...)4989 asyerror(const struct asycom *asy, int level, const char *fmt, ...)
4990 {
4991 va_list adx;
4992 static time_t last;
4993 static const char *lastfmt;
4994 time_t now;
4995
4996 /*
4997 * Don't print the same error message too often.
4998 * Print the message only if we have not printed the
4999 * message within the last second.
5000 * Note: that fmt cannot be a pointer to a string
5001 * stored on the stack. The fmt pointer
5002 * must be in the data segment otherwise lastfmt would point
5003 * to non-sense.
5004 */
5005 now = gethrestime_sec();
5006 if (last == now && lastfmt == fmt)
5007 return;
5008
5009 last = now;
5010 lastfmt = fmt;
5011
5012 va_start(adx, fmt);
5013 vdev_err(asy->asy_dip, level, fmt, adx);
5014 va_end(adx);
5015 }
5016
5017 /*
5018 * asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5019 * The value of this property is in the form of "9600,8,n,1,-"
5020 * 1) speed: 9600, 4800, ...
5021 * 2) data bits
5022 * 3) parity: n(none), e(even), o(odd)
5023 * 4) stop bits
5024 * 5) handshake: -(none), h(hardware: rts/cts), s(software: xon/off)
5025 *
5026 * This parsing came from a SPARCstation eeprom.
5027 */
5028 static void
asy_parse_mode(dev_info_t * devi,struct asycom * asy)5029 asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5030 {
5031 char name[40];
5032 char val[40];
5033 int len;
5034 int ret;
5035 char *p;
5036 char *p1;
5037
5038 ASSERT(asy->asy_com_port != 0);
5039
5040 /*
5041 * Parse the ttyx-mode property
5042 */
5043 (void) sprintf(name, "tty%c-mode", asy->asy_com_port + 'a' - 1);
5044 len = sizeof (val);
5045 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5046 if (ret != DDI_PROP_SUCCESS) {
5047 (void) sprintf(name, "com%c-mode", asy->asy_com_port + '0');
5048 len = sizeof (val);
5049 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5050 }
5051
5052 /* no property to parse */
5053 asy->asy_cflag = 0;
5054 if (ret != DDI_PROP_SUCCESS)
5055 return;
5056
5057 p = val;
5058 /* ---- baud rate ---- */
5059 asy->asy_cflag = CREAD|B9600; /* initial default */
5060 if (p && (p1 = strchr(p, ',')) != 0) {
5061 *p1++ = '\0';
5062 } else {
5063 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5064 return;
5065 }
5066
5067 if (strcmp(p, "110") == 0)
5068 asy->asy_bidx = B110;
5069 else if (strcmp(p, "150") == 0)
5070 asy->asy_bidx = B150;
5071 else if (strcmp(p, "300") == 0)
5072 asy->asy_bidx = B300;
5073 else if (strcmp(p, "600") == 0)
5074 asy->asy_bidx = B600;
5075 else if (strcmp(p, "1200") == 0)
5076 asy->asy_bidx = B1200;
5077 else if (strcmp(p, "2400") == 0)
5078 asy->asy_bidx = B2400;
5079 else if (strcmp(p, "4800") == 0)
5080 asy->asy_bidx = B4800;
5081 else if (strcmp(p, "9600") == 0)
5082 asy->asy_bidx = B9600;
5083 else if (strcmp(p, "19200") == 0)
5084 asy->asy_bidx = B19200;
5085 else if (strcmp(p, "38400") == 0)
5086 asy->asy_bidx = B38400;
5087 else if (strcmp(p, "57600") == 0)
5088 asy->asy_bidx = B57600;
5089 else if (strcmp(p, "115200") == 0)
5090 asy->asy_bidx = B115200;
5091 else
5092 asy->asy_bidx = B9600;
5093
5094 asy->asy_cflag &= ~CBAUD;
5095 if (asy->asy_bidx > CBAUD) { /* > 38400 uses the CBAUDEXT bit */
5096 asy->asy_cflag |= CBAUDEXT;
5097 asy->asy_cflag |= asy->asy_bidx - CBAUD - 1;
5098 } else {
5099 asy->asy_cflag |= asy->asy_bidx;
5100 }
5101
5102 ASSERT(asy->asy_bidx == BAUDINDEX(asy->asy_cflag));
5103
5104 /* ---- Next item is data bits ---- */
5105 p = p1;
5106 if (p && (p1 = strchr(p, ',')) != 0) {
5107 *p1++ = '\0';
5108 } else {
5109 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5110 return;
5111 }
5112 switch (*p) {
5113 default:
5114 case '8':
5115 asy->asy_cflag |= CS8;
5116 asy->asy_lcr = ASY_LCR_BITS8;
5117 break;
5118 case '7':
5119 asy->asy_cflag |= CS7;
5120 asy->asy_lcr = ASY_LCR_BITS7;
5121 break;
5122 case '6':
5123 asy->asy_cflag |= CS6;
5124 asy->asy_lcr = ASY_LCR_BITS6;
5125 break;
5126 case '5':
5127 /* LINTED: CS5 is currently zero (but might change) */
5128 asy->asy_cflag |= CS5;
5129 asy->asy_lcr = ASY_LCR_BITS5;
5130 break;
5131 }
5132
5133 /* ---- Parity info ---- */
5134 p = p1;
5135 if (p && (p1 = strchr(p, ',')) != 0) {
5136 *p1++ = '\0';
5137 } else {
5138 return;
5139 }
5140 switch (*p) {
5141 default:
5142 case 'n':
5143 break;
5144 case 'e':
5145 asy->asy_cflag |= PARENB;
5146 asy->asy_lcr |= ASY_LCR_PEN;
5147 break;
5148 case 'o':
5149 asy->asy_cflag |= PARENB|PARODD;
5150 asy->asy_lcr |= ASY_LCR_PEN | ASY_LCR_EPS;
5151 break;
5152 }
5153
5154 /* ---- Find stop bits ---- */
5155 p = p1;
5156 if (p && (p1 = strchr(p, ',')) != 0) {
5157 *p1++ = '\0';
5158 } else {
5159 return;
5160 }
5161 if (*p == '2') {
5162 asy->asy_cflag |= CSTOPB;
5163 asy->asy_lcr |= ASY_LCR_STB;
5164 }
5165
5166 /* ---- handshake is next ---- */
5167 p = p1;
5168 if (p) {
5169 if ((p1 = strchr(p, ',')) != 0)
5170 *p1++ = '\0';
5171
5172 if (*p == 'h')
5173 asy->asy_cflag |= CRTSCTS;
5174 else if (*p == 's')
5175 asy->asy_cflag |= CRTSXOFF;
5176 }
5177 }
5178
5179 /*
5180 * Check for abort character sequence
5181 */
5182 static boolean_t
abort_charseq_recognize(uchar_t ch)5183 abort_charseq_recognize(uchar_t ch)
5184 {
5185 static int state = 0;
5186 #define CNTRL(c) ((c)&037)
5187 static char sequence[] = { '\r', '~', CNTRL('b') };
5188
5189 if (ch == sequence[state]) {
5190 if (++state >= sizeof (sequence)) {
5191 state = 0;
5192 return (B_TRUE);
5193 }
5194 } else {
5195 state = (ch == sequence[0]) ? 1 : 0;
5196 }
5197 return (B_FALSE);
5198 }
5199
5200 /*
5201 * Flow control functions
5202 */
5203 /*
5204 * Software input flow control
5205 * This function can execute software input flow control sucessfully
5206 * at most of situations except that the line is in BREAK status
5207 * (timed and untimed break).
5208 * INPUT VALUE of onoff:
5209 * FLOW_START means to send out a XON char
5210 * and clear SW input flow control flag.
5211 * FLOW_STOP means to send out a XOFF char
5212 * and set SW input flow control flag.
5213 * FLOW_CHECK means to check whether there is pending XON/XOFF
5214 * if it is true, send it out.
5215 * INPUT VALUE of type:
5216 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5217 * IN_FLOW_STREAMS means flow control is due to STREAMS
5218 * IN_FLOW_USER means flow control is due to user's commands
5219 * RETURN VALUE: B_FALSE means no flow control char is sent
5220 * B_TRUE means one flow control char is sent
5221 */
5222 static boolean_t
async_flowcontrol_sw_input(struct asycom * asy,async_flowc_action onoff,int type)5223 async_flowcontrol_sw_input(struct asycom *asy, async_flowc_action onoff,
5224 int type)
5225 {
5226 struct asyncline *async = asy->asy_priv;
5227 int rval = B_FALSE;
5228
5229 ASSERT(mutex_owned(&asy->asy_excl_hi));
5230
5231 if (!(async->async_ttycommon.t_iflag & IXOFF))
5232 return (rval);
5233
5234 /*
5235 * If we get this far, then we know IXOFF is set.
5236 */
5237 switch (onoff) {
5238 case FLOW_STOP:
5239 async->async_inflow_source |= type;
5240
5241 /*
5242 * We'll send an XOFF character for each of up to
5243 * three different input flow control attempts to stop input.
5244 * If we already send out one XOFF, but FLOW_STOP comes again,
5245 * it seems that input flow control becomes more serious,
5246 * then send XOFF again.
5247 */
5248 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5249 IN_FLOW_STREAMS | IN_FLOW_USER))
5250 async->async_flags |= ASYNC_SW_IN_FLOW |
5251 ASYNC_SW_IN_NEEDED;
5252 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow stop, type = %x",
5253 async->async_inflow_source);
5254 break;
5255 case FLOW_START:
5256 async->async_inflow_source &= ~type;
5257 if (async->async_inflow_source == 0) {
5258 async->async_flags = (async->async_flags &
5259 ~ASYNC_SW_IN_FLOW) | ASYNC_SW_IN_NEEDED;
5260 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow start");
5261 }
5262 break;
5263 default:
5264 break;
5265 }
5266
5267 if (((async->async_flags & (ASYNC_SW_IN_NEEDED | ASYNC_BREAK |
5268 ASYNC_OUT_SUSPEND)) == ASYNC_SW_IN_NEEDED) &&
5269 (asy_get(asy, ASY_LSR) & ASY_LSR_THRE)) {
5270 /*
5271 * If we get this far, then we know we need to send out
5272 * XON or XOFF char.
5273 */
5274 async->async_flags = (async->async_flags &
5275 ~ASYNC_SW_IN_NEEDED) | ASYNC_BUSY;
5276 asy_put(asy, ASY_THR,
5277 async->async_flags & ASYNC_SW_IN_FLOW ?
5278 async->async_stopc : async->async_startc);
5279 rval = B_TRUE;
5280 }
5281 return (rval);
5282 }
5283
5284 /*
5285 * Software output flow control
5286 * This function can be executed sucessfully at any situation.
5287 * It does not handle HW, and just change the SW output flow control flag.
5288 * INPUT VALUE of onoff:
5289 * FLOW_START means to clear SW output flow control flag,
5290 * also combine with HW output flow control status to
5291 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5292 * FLOW_STOP means to set SW output flow control flag,
5293 * also clear ASYNC_OUT_FLW_RESUME.
5294 */
5295 static void
async_flowcontrol_sw_output(struct asycom * asy,async_flowc_action onoff)5296 async_flowcontrol_sw_output(struct asycom *asy, async_flowc_action onoff)
5297 {
5298 struct asyncline *async = asy->asy_priv;
5299
5300 ASSERT(mutex_owned(&asy->asy_excl_hi));
5301
5302 if (!(async->async_ttycommon.t_iflag & IXON))
5303 return;
5304
5305 switch (onoff) {
5306 case FLOW_STOP:
5307 async->async_flags |= ASYNC_SW_OUT_FLW;
5308 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5309 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow stop");
5310 break;
5311 case FLOW_START:
5312 async->async_flags &= ~ASYNC_SW_OUT_FLW;
5313 if (!(async->async_flags & ASYNC_HW_OUT_FLW))
5314 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5315 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow start");
5316 break;
5317 default:
5318 break;
5319 }
5320 }
5321
5322 /*
5323 * Hardware input flow control
5324 * This function can be executed sucessfully at any situation.
5325 * It directly changes RTS depending on input parameter onoff.
5326 * INPUT VALUE of onoff:
5327 * FLOW_START means to clear HW input flow control flag,
5328 * and pull up RTS if it is low.
5329 * FLOW_STOP means to set HW input flow control flag,
5330 * and low RTS if it is high.
5331 * INPUT VALUE of type:
5332 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5333 * IN_FLOW_STREAMS means flow control is due to STREAMS
5334 * IN_FLOW_USER means flow control is due to user's commands
5335 */
5336 static void
async_flowcontrol_hw_input(struct asycom * asy,async_flowc_action onoff,int type)5337 async_flowcontrol_hw_input(struct asycom *asy, async_flowc_action onoff,
5338 int type)
5339 {
5340 uchar_t mcr;
5341 uchar_t flag;
5342 struct asyncline *async = asy->asy_priv;
5343
5344 ASSERT(mutex_owned(&asy->asy_excl_hi));
5345
5346 if (!(async->async_ttycommon.t_cflag & CRTSXOFF))
5347 return;
5348
5349 switch (onoff) {
5350 case FLOW_STOP:
5351 async->async_inflow_source |= type;
5352 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5353 IN_FLOW_STREAMS | IN_FLOW_USER))
5354 async->async_flags |= ASYNC_HW_IN_FLOW;
5355 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow stop, type = %x",
5356 async->async_inflow_source);
5357 break;
5358 case FLOW_START:
5359 async->async_inflow_source &= ~type;
5360 if (async->async_inflow_source == 0) {
5361 async->async_flags &= ~ASYNC_HW_IN_FLOW;
5362 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow start");
5363 }
5364 break;
5365 default:
5366 break;
5367 }
5368 mcr = asy_get(asy, ASY_MCR);
5369 flag = (async->async_flags & ASYNC_HW_IN_FLOW) ? 0 : ASY_MCR_RTS;
5370
5371 if (((mcr ^ flag) & ASY_MCR_RTS) != 0) {
5372 asy_put(asy, ASY_MCR, (mcr ^ ASY_MCR_RTS));
5373 }
5374 }
5375
5376 /*
5377 * Hardware output flow control
5378 * This function can execute HW output flow control sucessfully
5379 * at any situation.
5380 * It doesn't really change RTS, and just change
5381 * HW output flow control flag depending on CTS status.
5382 * INPUT VALUE of onoff:
5383 * FLOW_START means to clear HW output flow control flag.
5384 * also combine with SW output flow control status to
5385 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5386 * FLOW_STOP means to set HW output flow control flag.
5387 * also clear ASYNC_OUT_FLW_RESUME.
5388 */
5389 static void
async_flowcontrol_hw_output(struct asycom * asy,async_flowc_action onoff)5390 async_flowcontrol_hw_output(struct asycom *asy, async_flowc_action onoff)
5391 {
5392 struct asyncline *async = asy->asy_priv;
5393
5394 ASSERT(mutex_owned(&asy->asy_excl_hi));
5395
5396 if (!(async->async_ttycommon.t_cflag & CRTSCTS))
5397 return;
5398
5399 switch (onoff) {
5400 case FLOW_STOP:
5401 async->async_flags |= ASYNC_HW_OUT_FLW;
5402 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5403 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow stop");
5404 break;
5405 case FLOW_START:
5406 async->async_flags &= ~ASYNC_HW_OUT_FLW;
5407 if (!(async->async_flags & ASYNC_SW_OUT_FLW))
5408 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5409 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow start");
5410 break;
5411 default:
5412 break;
5413 }
5414 }
5415
5416 /*
5417 * quiesce(9E) entry point.
5418 *
5419 * This function is called when the system is single-threaded at high
5420 * PIL with preemption disabled. Therefore, this function must not be
5421 * blocked.
5422 *
5423 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
5424 * DDI_FAILURE indicates an error condition and should almost never happen.
5425 */
5426 static int
asyquiesce(dev_info_t * devi)5427 asyquiesce(dev_info_t *devi)
5428 {
5429 int instance;
5430 struct asycom *asy;
5431
5432 instance = ddi_get_instance(devi); /* find out which unit */
5433
5434 asy = ddi_get_soft_state(asy_soft_state, instance);
5435 if (asy == NULL)
5436 return (DDI_FAILURE);
5437
5438 asy_disable_interrupts(asy, ASY_IER_ALL);
5439
5440 /* Flush the FIFOs, if required */
5441 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
5442 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
5443 }
5444
5445 return (DDI_SUCCESS);
5446 }
5447