xref: /linux/drivers/iio/health/afe4404.c (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters
4  *
5  * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
6  *	Andrew F. Davis <afd@ti.com>
7  */
8 
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/i2c.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/regmap.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18 
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/trigger.h>
23 #include <linux/iio/triggered_buffer.h>
24 #include <linux/iio/trigger_consumer.h>
25 
26 #include "afe440x.h"
27 
28 #define AFE4404_DRIVER_NAME		"afe4404"
29 
30 /* AFE4404 registers */
31 #define AFE4404_TIA_GAIN_SEP		0x20
32 #define AFE4404_TIA_GAIN		0x21
33 #define AFE4404_PROG_TG_STC		0x34
34 #define AFE4404_PROG_TG_ENDC		0x35
35 #define AFE4404_LED3LEDSTC		0x36
36 #define AFE4404_LED3LEDENDC		0x37
37 #define AFE4404_CLKDIV_PRF		0x39
38 #define AFE4404_OFFDAC			0x3a
39 #define AFE4404_DEC			0x3d
40 #define AFE4404_AVG_LED2_ALED2VAL	0x3f
41 #define AFE4404_AVG_LED1_ALED1VAL	0x40
42 
43 /* AFE4404 CONTROL2 register fields */
44 #define AFE440X_CONTROL2_OSC_ENABLE	BIT(9)
45 
46 enum afe4404_fields {
47 	/* Gains */
48 	F_TIA_GAIN_SEP, F_TIA_CF_SEP,
49 	F_TIA_GAIN, TIA_CF,
50 
51 	/* LED Current */
52 	F_ILED1, F_ILED2, F_ILED3,
53 
54 	/* Offset DAC */
55 	F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2,
56 
57 	/* sentinel */
58 	F_MAX_FIELDS
59 };
60 
61 static const struct reg_field afe4404_reg_fields[] = {
62 	/* Gains */
63 	[F_TIA_GAIN_SEP]	= REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2),
64 	[F_TIA_CF_SEP]		= REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5),
65 	[F_TIA_GAIN]		= REG_FIELD(AFE4404_TIA_GAIN, 0, 2),
66 	[TIA_CF]		= REG_FIELD(AFE4404_TIA_GAIN, 3, 5),
67 	/* LED Current */
68 	[F_ILED1]		= REG_FIELD(AFE440X_LEDCNTRL, 0, 5),
69 	[F_ILED2]		= REG_FIELD(AFE440X_LEDCNTRL, 6, 11),
70 	[F_ILED3]		= REG_FIELD(AFE440X_LEDCNTRL, 12, 17),
71 	/* Offset DAC */
72 	[F_OFFDAC_AMB2]		= REG_FIELD(AFE4404_OFFDAC, 0, 4),
73 	[F_OFFDAC_LED1]		= REG_FIELD(AFE4404_OFFDAC, 5, 9),
74 	[F_OFFDAC_AMB1]		= REG_FIELD(AFE4404_OFFDAC, 10, 14),
75 	[F_OFFDAC_LED2]		= REG_FIELD(AFE4404_OFFDAC, 15, 19),
76 };
77 
78 /**
79  * struct afe4404_data - AFE4404 device instance data
80  * @dev: Device structure
81  * @regmap: Register map of the device
82  * @fields: Register fields of the device
83  * @regulator: Pointer to the regulator for the IC
84  * @trig: IIO trigger for this device
85  * @irq: ADC_RDY line interrupt number
86  * @buffer: Used to construct a scan to push to the iio buffer.
87  */
88 struct afe4404_data {
89 	struct device *dev;
90 	struct regmap *regmap;
91 	struct regmap_field *fields[F_MAX_FIELDS];
92 	struct regulator *regulator;
93 	struct iio_trigger *trig;
94 	int irq;
95 	s32 buffer[10] __aligned(8);
96 };
97 
98 enum afe4404_chan_id {
99 	LED2 = 1,
100 	ALED2,
101 	LED1,
102 	ALED1,
103 	LED2_ALED2,
104 	LED1_ALED1,
105 };
106 
107 static const unsigned int afe4404_channel_values[] = {
108 	[LED2] = AFE440X_LED2VAL,
109 	[ALED2] = AFE440X_ALED2VAL,
110 	[LED1] = AFE440X_LED1VAL,
111 	[ALED1] = AFE440X_ALED1VAL,
112 	[LED2_ALED2] = AFE440X_LED2_ALED2VAL,
113 	[LED1_ALED1] = AFE440X_LED1_ALED1VAL,
114 };
115 
116 static const unsigned int afe4404_channel_leds[] = {
117 	[LED2] = F_ILED2,
118 	[ALED2] = F_ILED3,
119 	[LED1] = F_ILED1,
120 };
121 
122 static const unsigned int afe4404_channel_offdacs[] = {
123 	[LED2] = F_OFFDAC_LED2,
124 	[ALED2] = F_OFFDAC_AMB2,
125 	[LED1] = F_OFFDAC_LED1,
126 	[ALED1] = F_OFFDAC_AMB1,
127 };
128 
129 static const struct iio_chan_spec afe4404_channels[] = {
130 	/* ADC values */
131 	AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)),
132 	AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)),
133 	AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)),
134 	AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)),
135 	AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
136 	AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
137 	/* LED current */
138 	AFE440X_CURRENT_CHAN(LED2),
139 	AFE440X_CURRENT_CHAN(ALED2),
140 	AFE440X_CURRENT_CHAN(LED1),
141 };
142 
143 static const struct afe440x_val_table afe4404_res_table[] = {
144 	{ .integer = 500000, .fract = 0 },
145 	{ .integer = 250000, .fract = 0 },
146 	{ .integer = 100000, .fract = 0 },
147 	{ .integer = 50000, .fract = 0 },
148 	{ .integer = 25000, .fract = 0 },
149 	{ .integer = 10000, .fract = 0 },
150 	{ .integer = 1000000, .fract = 0 },
151 	{ .integer = 2000000, .fract = 0 },
152 };
153 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table);
154 
155 static const struct afe440x_val_table afe4404_cap_table[] = {
156 	{ .integer = 0, .fract = 5000 },
157 	{ .integer = 0, .fract = 2500 },
158 	{ .integer = 0, .fract = 10000 },
159 	{ .integer = 0, .fract = 7500 },
160 	{ .integer = 0, .fract = 20000 },
161 	{ .integer = 0, .fract = 17500 },
162 	{ .integer = 0, .fract = 25000 },
163 	{ .integer = 0, .fract = 22500 },
164 };
165 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table);
166 
afe440x_show_register(struct device * dev,struct device_attribute * attr,char * buf)167 static ssize_t afe440x_show_register(struct device *dev,
168 				     struct device_attribute *attr,
169 				     char *buf)
170 {
171 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
172 	struct afe4404_data *afe = iio_priv(indio_dev);
173 	struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
174 	unsigned int reg_val;
175 	int vals[2];
176 	int ret;
177 
178 	ret = regmap_field_read(afe->fields[afe440x_attr->field], &reg_val);
179 	if (ret)
180 		return ret;
181 
182 	if (reg_val >= afe440x_attr->table_size)
183 		return -EINVAL;
184 
185 	vals[0] = afe440x_attr->val_table[reg_val].integer;
186 	vals[1] = afe440x_attr->val_table[reg_val].fract;
187 
188 	return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
189 }
190 
afe440x_store_register(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)191 static ssize_t afe440x_store_register(struct device *dev,
192 				      struct device_attribute *attr,
193 				      const char *buf, size_t count)
194 {
195 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
196 	struct afe4404_data *afe = iio_priv(indio_dev);
197 	struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
198 	int val, integer, fract, ret;
199 
200 	ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
201 	if (ret)
202 		return ret;
203 
204 	for (val = 0; val < afe440x_attr->table_size; val++)
205 		if (afe440x_attr->val_table[val].integer == integer &&
206 		    afe440x_attr->val_table[val].fract == fract)
207 			break;
208 	if (val == afe440x_attr->table_size)
209 		return -EINVAL;
210 
211 	ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
212 	if (ret)
213 		return ret;
214 
215 	return count;
216 }
217 
218 static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
219 static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
220 
221 static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
222 static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
223 
224 static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table);
225 static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table);
226 
227 static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table);
228 static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table);
229 
230 static struct attribute *afe440x_attributes[] = {
231 	&dev_attr_in_intensity_resistance_available.attr,
232 	&dev_attr_in_intensity_capacitance_available.attr,
233 	&afe440x_attr_in_intensity1_resistance.dev_attr.attr,
234 	&afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
235 	&afe440x_attr_in_intensity2_resistance.dev_attr.attr,
236 	&afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
237 	&afe440x_attr_in_intensity3_resistance.dev_attr.attr,
238 	&afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
239 	&afe440x_attr_in_intensity4_resistance.dev_attr.attr,
240 	&afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
241 	NULL
242 };
243 
244 static const struct attribute_group afe440x_attribute_group = {
245 	.attrs = afe440x_attributes
246 };
247 
afe4404_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)248 static int afe4404_read_raw(struct iio_dev *indio_dev,
249 			    struct iio_chan_spec const *chan,
250 			    int *val, int *val2, long mask)
251 {
252 	struct afe4404_data *afe = iio_priv(indio_dev);
253 	unsigned int value_reg, led_field, offdac_field;
254 	int ret;
255 
256 	switch (chan->type) {
257 	case IIO_INTENSITY:
258 		switch (mask) {
259 		case IIO_CHAN_INFO_RAW:
260 			value_reg = afe4404_channel_values[chan->address];
261 			ret = regmap_read(afe->regmap, value_reg, val);
262 			if (ret)
263 				return ret;
264 			return IIO_VAL_INT;
265 		case IIO_CHAN_INFO_OFFSET:
266 			offdac_field = afe4404_channel_offdacs[chan->address];
267 			ret = regmap_field_read(afe->fields[offdac_field], val);
268 			if (ret)
269 				return ret;
270 			return IIO_VAL_INT;
271 		}
272 		break;
273 	case IIO_CURRENT:
274 		switch (mask) {
275 		case IIO_CHAN_INFO_RAW:
276 			led_field = afe4404_channel_leds[chan->address];
277 			ret = regmap_field_read(afe->fields[led_field], val);
278 			if (ret)
279 				return ret;
280 			return IIO_VAL_INT;
281 		case IIO_CHAN_INFO_SCALE:
282 			*val = 0;
283 			*val2 = 800000;
284 			return IIO_VAL_INT_PLUS_MICRO;
285 		}
286 		break;
287 	default:
288 		break;
289 	}
290 
291 	return -EINVAL;
292 }
293 
afe4404_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)294 static int afe4404_write_raw(struct iio_dev *indio_dev,
295 			     struct iio_chan_spec const *chan,
296 			     int val, int val2, long mask)
297 {
298 	struct afe4404_data *afe = iio_priv(indio_dev);
299 	unsigned int led_field, offdac_field;
300 
301 	switch (chan->type) {
302 	case IIO_INTENSITY:
303 		switch (mask) {
304 		case IIO_CHAN_INFO_OFFSET:
305 			offdac_field = afe4404_channel_offdacs[chan->address];
306 			return regmap_field_write(afe->fields[offdac_field], val);
307 		}
308 		break;
309 	case IIO_CURRENT:
310 		switch (mask) {
311 		case IIO_CHAN_INFO_RAW:
312 			led_field = afe4404_channel_leds[chan->address];
313 			return regmap_field_write(afe->fields[led_field], val);
314 		}
315 		break;
316 	default:
317 		break;
318 	}
319 
320 	return -EINVAL;
321 }
322 
323 static const struct iio_info afe4404_iio_info = {
324 	.attrs = &afe440x_attribute_group,
325 	.read_raw = afe4404_read_raw,
326 	.write_raw = afe4404_write_raw,
327 };
328 
afe4404_trigger_handler(int irq,void * private)329 static irqreturn_t afe4404_trigger_handler(int irq, void *private)
330 {
331 	struct iio_poll_func *pf = private;
332 	struct iio_dev *indio_dev = pf->indio_dev;
333 	struct afe4404_data *afe = iio_priv(indio_dev);
334 	int ret, bit, i = 0;
335 
336 	for_each_set_bit(bit, indio_dev->active_scan_mask,
337 			 indio_dev->masklength) {
338 		ret = regmap_read(afe->regmap, afe4404_channel_values[bit],
339 				  &afe->buffer[i++]);
340 		if (ret)
341 			goto err;
342 	}
343 
344 	iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
345 					   pf->timestamp);
346 err:
347 	iio_trigger_notify_done(indio_dev->trig);
348 
349 	return IRQ_HANDLED;
350 }
351 
afe4404_regulator_disable(void * data)352 static void afe4404_regulator_disable(void *data)
353 {
354 	struct regulator *regulator = data;
355 
356 	regulator_disable(regulator);
357 }
358 
359 /* Default timings from data-sheet */
360 #define AFE4404_TIMING_PAIRS			\
361 	{ AFE440X_PRPCOUNT,	39999	},	\
362 	{ AFE440X_LED2LEDSTC,	0	},	\
363 	{ AFE440X_LED2LEDENDC,	398	},	\
364 	{ AFE440X_LED2STC,	80	},	\
365 	{ AFE440X_LED2ENDC,	398	},	\
366 	{ AFE440X_ADCRSTSTCT0,	5600	},	\
367 	{ AFE440X_ADCRSTENDCT0,	5606	},	\
368 	{ AFE440X_LED2CONVST,	5607	},	\
369 	{ AFE440X_LED2CONVEND,	6066	},	\
370 	{ AFE4404_LED3LEDSTC,	400	},	\
371 	{ AFE4404_LED3LEDENDC,	798	},	\
372 	{ AFE440X_ALED2STC,	480	},	\
373 	{ AFE440X_ALED2ENDC,	798	},	\
374 	{ AFE440X_ADCRSTSTCT1,	6068	},	\
375 	{ AFE440X_ADCRSTENDCT1,	6074	},	\
376 	{ AFE440X_ALED2CONVST,	6075	},	\
377 	{ AFE440X_ALED2CONVEND,	6534	},	\
378 	{ AFE440X_LED1LEDSTC,	800	},	\
379 	{ AFE440X_LED1LEDENDC,	1198	},	\
380 	{ AFE440X_LED1STC,	880	},	\
381 	{ AFE440X_LED1ENDC,	1198	},	\
382 	{ AFE440X_ADCRSTSTCT2,	6536	},	\
383 	{ AFE440X_ADCRSTENDCT2,	6542	},	\
384 	{ AFE440X_LED1CONVST,	6543	},	\
385 	{ AFE440X_LED1CONVEND,	7003	},	\
386 	{ AFE440X_ALED1STC,	1280	},	\
387 	{ AFE440X_ALED1ENDC,	1598	},	\
388 	{ AFE440X_ADCRSTSTCT3,	7005	},	\
389 	{ AFE440X_ADCRSTENDCT3,	7011	},	\
390 	{ AFE440X_ALED1CONVST,	7012	},	\
391 	{ AFE440X_ALED1CONVEND,	7471	},	\
392 	{ AFE440X_PDNCYCLESTC,	7671	},	\
393 	{ AFE440X_PDNCYCLEENDC,	39199	}
394 
395 static const struct reg_sequence afe4404_reg_sequences[] = {
396 	AFE4404_TIMING_PAIRS,
397 	{ AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
398 	{ AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN },
399 	{ AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE	},
400 };
401 
402 static const struct regmap_range afe4404_yes_ranges[] = {
403 	regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
404 	regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL),
405 };
406 
407 static const struct regmap_access_table afe4404_volatile_table = {
408 	.yes_ranges = afe4404_yes_ranges,
409 	.n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges),
410 };
411 
412 static const struct regmap_config afe4404_regmap_config = {
413 	.reg_bits = 8,
414 	.val_bits = 24,
415 
416 	.max_register = AFE4404_AVG_LED1_ALED1VAL,
417 	.cache_type = REGCACHE_RBTREE,
418 	.volatile_table = &afe4404_volatile_table,
419 };
420 
421 static const struct of_device_id afe4404_of_match[] = {
422 	{ .compatible = "ti,afe4404", },
423 	{ /* sentinel */ }
424 };
425 MODULE_DEVICE_TABLE(of, afe4404_of_match);
426 
afe4404_suspend(struct device * dev)427 static int afe4404_suspend(struct device *dev)
428 {
429 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
430 	struct afe4404_data *afe = iio_priv(indio_dev);
431 	int ret;
432 
433 	ret = regmap_set_bits(afe->regmap, AFE440X_CONTROL2,
434 			      AFE440X_CONTROL2_PDN_AFE);
435 	if (ret)
436 		return ret;
437 
438 	ret = regulator_disable(afe->regulator);
439 	if (ret) {
440 		dev_err(dev, "Unable to disable regulator\n");
441 		return ret;
442 	}
443 
444 	return 0;
445 }
446 
afe4404_resume(struct device * dev)447 static int afe4404_resume(struct device *dev)
448 {
449 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
450 	struct afe4404_data *afe = iio_priv(indio_dev);
451 	int ret;
452 
453 	ret = regulator_enable(afe->regulator);
454 	if (ret) {
455 		dev_err(dev, "Unable to enable regulator\n");
456 		return ret;
457 	}
458 
459 	ret = regmap_clear_bits(afe->regmap, AFE440X_CONTROL2,
460 				AFE440X_CONTROL2_PDN_AFE);
461 	if (ret)
462 		return ret;
463 
464 	return 0;
465 }
466 
467 static DEFINE_SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend,
468 				afe4404_resume);
469 
afe4404_probe(struct i2c_client * client)470 static int afe4404_probe(struct i2c_client *client)
471 {
472 	struct iio_dev *indio_dev;
473 	struct afe4404_data *afe;
474 	int i, ret;
475 
476 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe));
477 	if (!indio_dev)
478 		return -ENOMEM;
479 
480 	afe = iio_priv(indio_dev);
481 	i2c_set_clientdata(client, indio_dev);
482 
483 	afe->dev = &client->dev;
484 	afe->irq = client->irq;
485 
486 	afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config);
487 	if (IS_ERR(afe->regmap)) {
488 		dev_err(afe->dev, "Unable to allocate register map\n");
489 		return PTR_ERR(afe->regmap);
490 	}
491 
492 	for (i = 0; i < F_MAX_FIELDS; i++) {
493 		afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
494 							 afe4404_reg_fields[i]);
495 		if (IS_ERR(afe->fields[i])) {
496 			dev_err(afe->dev, "Unable to allocate regmap fields\n");
497 			return PTR_ERR(afe->fields[i]);
498 		}
499 	}
500 
501 	afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
502 	if (IS_ERR(afe->regulator))
503 		return dev_err_probe(afe->dev, PTR_ERR(afe->regulator),
504 				     "Unable to get regulator\n");
505 
506 	ret = regulator_enable(afe->regulator);
507 	if (ret) {
508 		dev_err(afe->dev, "Unable to enable regulator\n");
509 		return ret;
510 	}
511 	ret = devm_add_action_or_reset(afe->dev, afe4404_regulator_disable, afe->regulator);
512 	if (ret) {
513 		dev_err(afe->dev, "Unable to enable regulator\n");
514 		return ret;
515 	}
516 
517 	ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
518 			   AFE440X_CONTROL0_SW_RESET);
519 	if (ret) {
520 		dev_err(afe->dev, "Unable to reset device\n");
521 		return ret;
522 	}
523 
524 	ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences,
525 				     ARRAY_SIZE(afe4404_reg_sequences));
526 	if (ret) {
527 		dev_err(afe->dev, "Unable to set register defaults\n");
528 		return ret;
529 	}
530 
531 	indio_dev->modes = INDIO_DIRECT_MODE;
532 	indio_dev->channels = afe4404_channels;
533 	indio_dev->num_channels = ARRAY_SIZE(afe4404_channels);
534 	indio_dev->name = AFE4404_DRIVER_NAME;
535 	indio_dev->info = &afe4404_iio_info;
536 
537 	if (afe->irq > 0) {
538 		afe->trig = devm_iio_trigger_alloc(afe->dev,
539 						   "%s-dev%d",
540 						   indio_dev->name,
541 						   iio_device_id(indio_dev));
542 		if (!afe->trig) {
543 			dev_err(afe->dev, "Unable to allocate IIO trigger\n");
544 			return -ENOMEM;
545 		}
546 
547 		iio_trigger_set_drvdata(afe->trig, indio_dev);
548 
549 		ret = devm_iio_trigger_register(afe->dev, afe->trig);
550 		if (ret) {
551 			dev_err(afe->dev, "Unable to register IIO trigger\n");
552 			return ret;
553 		}
554 
555 		ret = devm_request_threaded_irq(afe->dev, afe->irq,
556 						iio_trigger_generic_data_rdy_poll,
557 						NULL, IRQF_ONESHOT,
558 						AFE4404_DRIVER_NAME,
559 						afe->trig);
560 		if (ret) {
561 			dev_err(afe->dev, "Unable to request IRQ\n");
562 			return ret;
563 		}
564 	}
565 
566 	ret = devm_iio_triggered_buffer_setup(afe->dev, indio_dev,
567 					      &iio_pollfunc_store_time,
568 					      afe4404_trigger_handler, NULL);
569 	if (ret) {
570 		dev_err(afe->dev, "Unable to setup buffer\n");
571 		return ret;
572 	}
573 
574 	ret = devm_iio_device_register(afe->dev, indio_dev);
575 	if (ret) {
576 		dev_err(afe->dev, "Unable to register IIO device\n");
577 		return ret;
578 	}
579 
580 	return 0;
581 }
582 
583 static const struct i2c_device_id afe4404_ids[] = {
584 	{ "afe4404" },
585 	{ /* sentinel */ }
586 };
587 MODULE_DEVICE_TABLE(i2c, afe4404_ids);
588 
589 static struct i2c_driver afe4404_i2c_driver = {
590 	.driver = {
591 		.name = AFE4404_DRIVER_NAME,
592 		.of_match_table = afe4404_of_match,
593 		.pm = pm_sleep_ptr(&afe4404_pm_ops),
594 	},
595 	.probe = afe4404_probe,
596 	.id_table = afe4404_ids,
597 };
598 module_i2c_driver(afe4404_i2c_driver);
599 
600 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
601 MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE");
602 MODULE_LICENSE("GPL v2");
603