xref: /linux/drivers/crypto/intel/qat/qat_common/adf_common_drv.h (revision 3fd6c59042dbba50391e30862beac979491145fe)
1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2 /* Copyright(c) 2014 - 2021 Intel Corporation */
3 #ifndef ADF_DRV_H
4 #define ADF_DRV_H
5 
6 #include <linux/list.h>
7 #include <linux/pci.h>
8 #include "adf_accel_devices.h"
9 #include "icp_qat_fw_loader_handle.h"
10 #include "icp_qat_hal.h"
11 
12 #define ADF_MAJOR_VERSION	0
13 #define ADF_MINOR_VERSION	6
14 #define ADF_BUILD_VERSION	0
15 #define ADF_DRV_VERSION		__stringify(ADF_MAJOR_VERSION) "." \
16 				__stringify(ADF_MINOR_VERSION) "." \
17 				__stringify(ADF_BUILD_VERSION)
18 
19 #define ADF_STATUS_RESTARTING 0
20 #define ADF_STATUS_STARTING 1
21 #define ADF_STATUS_CONFIGURED 2
22 #define ADF_STATUS_STARTED 3
23 #define ADF_STATUS_AE_INITIALISED 4
24 #define ADF_STATUS_AE_UCODE_LOADED 5
25 #define ADF_STATUS_AE_STARTED 6
26 #define ADF_STATUS_PF_RUNNING 7
27 #define ADF_STATUS_IRQ_ALLOCATED 8
28 #define ADF_STATUS_CRYPTO_ALGS_REGISTERED 9
29 #define ADF_STATUS_COMP_ALGS_REGISTERED 10
30 
31 enum adf_dev_reset_mode {
32 	ADF_DEV_RESET_ASYNC = 0,
33 	ADF_DEV_RESET_SYNC
34 };
35 
36 enum adf_event {
37 	ADF_EVENT_INIT = 0,
38 	ADF_EVENT_START,
39 	ADF_EVENT_STOP,
40 	ADF_EVENT_SHUTDOWN,
41 	ADF_EVENT_RESTARTING,
42 	ADF_EVENT_RESTARTED,
43 	ADF_EVENT_FATAL_ERROR,
44 };
45 
46 struct service_hndl {
47 	int (*event_hld)(struct adf_accel_dev *accel_dev,
48 			 enum adf_event event);
49 	unsigned long init_status[ADF_DEVS_ARRAY_SIZE];
50 	unsigned long start_status[ADF_DEVS_ARRAY_SIZE];
51 	char *name;
52 	struct list_head list;
53 };
54 
55 int adf_service_register(struct service_hndl *service);
56 int adf_service_unregister(struct service_hndl *service);
57 
58 int adf_dev_up(struct adf_accel_dev *accel_dev, bool init_config);
59 int adf_dev_down(struct adf_accel_dev *accel_dev);
60 int adf_dev_restart(struct adf_accel_dev *accel_dev);
61 
62 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
63 void adf_clean_vf_map(bool);
64 int adf_notify_fatal_error(struct adf_accel_dev *accel_dev);
65 void adf_error_notifier(struct adf_accel_dev *accel_dev);
66 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
67 		       struct adf_accel_dev *pf);
68 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
69 		       struct adf_accel_dev *pf);
70 struct list_head *adf_devmgr_get_head(void);
71 struct adf_accel_dev *adf_devmgr_get_dev_by_id(u32 id);
72 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev);
73 int adf_devmgr_verify_id(u32 id);
74 void adf_devmgr_get_num_dev(u32 *num);
75 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
76 int adf_dev_started(struct adf_accel_dev *accel_dev);
77 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
78 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
79 int adf_ae_init(struct adf_accel_dev *accel_dev);
80 int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
81 int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
82 void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
83 int adf_ae_start(struct adf_accel_dev *accel_dev);
84 int adf_ae_stop(struct adf_accel_dev *accel_dev);
85 
86 extern const struct pci_error_handlers adf_err_handler;
87 void adf_reset_sbr(struct adf_accel_dev *accel_dev);
88 void adf_reset_flr(struct adf_accel_dev *accel_dev);
89 int adf_dev_autoreset(struct adf_accel_dev *accel_dev);
90 void adf_dev_restore(struct adf_accel_dev *accel_dev);
91 int adf_init_aer(void);
92 void adf_exit_aer(void);
93 int adf_init_arb(struct adf_accel_dev *accel_dev);
94 void adf_exit_arb(struct adf_accel_dev *accel_dev);
95 void adf_update_ring_arb(struct adf_etr_ring_data *ring);
96 int adf_disable_arb_thd(struct adf_accel_dev *accel_dev, u32 ae, u32 thr);
97 
98 int adf_dev_get(struct adf_accel_dev *accel_dev);
99 void adf_dev_put(struct adf_accel_dev *accel_dev);
100 int adf_dev_in_use(struct adf_accel_dev *accel_dev);
101 int adf_init_etr_data(struct adf_accel_dev *accel_dev);
102 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
103 int qat_crypto_register(void);
104 int qat_crypto_unregister(void);
105 int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev);
106 struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
107 void qat_crypto_put_instance(struct qat_crypto_instance *inst);
108 void qat_alg_callback(void *resp);
109 void qat_alg_asym_callback(void *resp);
110 int qat_algs_register(void);
111 void qat_algs_unregister(void);
112 int qat_asym_algs_register(void);
113 void qat_asym_algs_unregister(void);
114 
115 struct qat_compression_instance *qat_compression_get_instance_node(int node);
116 void qat_compression_put_instance(struct qat_compression_instance *inst);
117 int qat_compression_register(void);
118 int qat_compression_unregister(void);
119 int qat_comp_algs_register(void);
120 void qat_comp_algs_unregister(void);
121 void qat_comp_alg_callback(void *resp);
122 
123 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
124 void adf_isr_resource_free(struct adf_accel_dev *accel_dev);
125 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
126 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev);
127 
128 int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev);
129 
130 int adf_sysfs_init(struct adf_accel_dev *accel_dev);
131 
132 int qat_hal_init(struct adf_accel_dev *accel_dev);
133 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
134 int qat_hal_start(struct icp_qat_fw_loader_handle *handle);
135 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
136 		  unsigned int ctx_mask);
137 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
138 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
139 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
140 			  unsigned char ae, unsigned int ctx_mask);
141 int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle,
142 			    unsigned int ae);
143 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
144 			   unsigned char ae, enum icp_qat_uof_regtype lm_type,
145 			   unsigned char mode);
146 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
147 			    unsigned char ae, unsigned char mode);
148 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
149 			   unsigned char ae, unsigned char mode);
150 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
151 		    unsigned char ae, unsigned int ctx_mask, unsigned int upc);
152 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
153 		       unsigned char ae, unsigned int uaddr,
154 		       unsigned int words_num, u64 *uword);
155 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
156 		     unsigned int uword_addr, unsigned int words_num,
157 		     unsigned int *data);
158 int qat_hal_get_ins_num(void);
159 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
160 			unsigned char ae,
161 			struct icp_qat_uof_batch_init *lm_init_header);
162 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
163 		     unsigned char ae, unsigned long ctx_mask,
164 		     enum icp_qat_uof_regtype reg_type,
165 		     unsigned short reg_num, unsigned int regdata);
166 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
167 			 unsigned char ae, unsigned long ctx_mask,
168 			 enum icp_qat_uof_regtype reg_type,
169 			 unsigned short reg_num, unsigned int regdata);
170 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
171 			 unsigned char ae, unsigned long ctx_mask,
172 			 enum icp_qat_uof_regtype reg_type,
173 			 unsigned short reg_num, unsigned int regdata);
174 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
175 		    unsigned char ae, unsigned long ctx_mask,
176 		    unsigned short reg_num, unsigned int regdata);
177 void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle,
178 				unsigned char ae, unsigned char mode);
179 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
180 void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle);
181 int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr,
182 		       int mem_size);
183 int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle,
184 		     void *addr_ptr, u32 mem_size, const char *obj_name);
185 int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle,
186 			     unsigned int cfg_ae_mask);
187 int adf_init_misc_wq(void);
188 void adf_exit_misc_wq(void);
189 bool adf_misc_wq_queue_work(struct work_struct *work);
190 bool adf_misc_wq_queue_delayed_work(struct delayed_work *work,
191 				    unsigned long delay);
192 #if defined(CONFIG_PCI_IOV)
193 int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
194 void adf_disable_sriov(struct adf_accel_dev *accel_dev);
195 void adf_reenable_sriov(struct adf_accel_dev *accel_dev);
196 void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask);
197 void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev);
198 bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev);
199 bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr);
200 int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev);
201 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
202 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
203 void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info);
204 int adf_init_pf_wq(void);
205 void adf_exit_pf_wq(void);
206 int adf_init_vf_wq(void);
207 void adf_exit_vf_wq(void);
208 void adf_flush_vf_wq(struct adf_accel_dev *accel_dev);
209 #else
210 #define adf_sriov_configure NULL
211 
adf_disable_sriov(struct adf_accel_dev * accel_dev)212 static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev)
213 {
214 }
215 
adf_reenable_sriov(struct adf_accel_dev * accel_dev)216 static inline void adf_reenable_sriov(struct adf_accel_dev *accel_dev)
217 {
218 }
219 
adf_init_pf_wq(void)220 static inline int adf_init_pf_wq(void)
221 {
222 	return 0;
223 }
224 
adf_exit_pf_wq(void)225 static inline void adf_exit_pf_wq(void)
226 {
227 }
228 
adf_init_vf_wq(void)229 static inline int adf_init_vf_wq(void)
230 {
231 	return 0;
232 }
233 
adf_exit_vf_wq(void)234 static inline void adf_exit_vf_wq(void)
235 {
236 }
237 
238 #endif
239 
adf_get_pmisc_base(struct adf_accel_dev * accel_dev)240 static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev)
241 {
242 	struct adf_hw_device_data *hw_data = accel_dev->hw_device;
243 	struct adf_bar *pmisc;
244 
245 	pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
246 
247 	return pmisc->virt_addr;
248 }
249 
adf_get_etr_base(struct adf_accel_dev * accel_dev)250 static inline void __iomem *adf_get_etr_base(struct adf_accel_dev *accel_dev)
251 {
252 	struct adf_hw_device_data *hw_data = accel_dev->hw_device;
253 	struct adf_bar *etr;
254 
255 	etr = &GET_BARS(accel_dev)[hw_data->get_etr_bar_id(hw_data)];
256 
257 	return etr->virt_addr;
258 }
259 
adf_get_aram_base(struct adf_accel_dev * accel_dev)260 static inline void __iomem *adf_get_aram_base(struct adf_accel_dev *accel_dev)
261 {
262 	struct adf_hw_device_data *hw_data = accel_dev->hw_device;
263 	struct adf_bar *param;
264 
265 	param = &GET_BARS(accel_dev)[hw_data->get_sram_bar_id(hw_data)];
266 
267 	return param->virt_addr;
268 }
269 
270 #endif
271