xref: /freebsd/sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h (revision 71625ec9ad2a9bc8c09784fbd23b759830e0ee5f)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
3 #ifndef ADF_C4XXX_RESET_H_
4 #define ADF_C4XXX_RESET_H_
5 
6 #include <adf_accel_devices.h>
7 #include <adf_common_drv.h>
8 #include "adf_c4xxx_hw_data.h"
9 
10 /* IA2IOSFSB register definitions */
11 #define ADF_C4XXX_IA2IOSFSB_PORTCMD (0x60000 + 0x1320)
12 #define ADF_C4XXX_IA2IOSFSB_LOADD (0x60000 + 0x1324)
13 #define ADF_C4XXX_IA2IOSFSB_HIADD (0x60000 + 0x1328)
14 #define ADF_C4XXX_IA2IOSFSB_DATA(index) ((index)*0x4 + 0x60000 + 0x132C)
15 #define ADF_C4XXX_IA2IOSFSB_KHOLE (0x60000 + 0x136C)
16 #define ADF_C4XXX_IA2IOSFSB_STATUS (0x60000 + 0x1370)
17 
18 /* IOSF-SB Port command definitions */
19 /* Ethernet controller Port ID */
20 #define ADF_C4XXX_ETH_PORT_ID 0x61
21 /* Byte enable */
22 #define ADF_C4XXX_PORTD_CMD_BE 0xFF
23 /* Non posted; Only non-posted commands are used */
24 #define ADF_C4XXX_PORTD_CMD_NP 0x1
25 /* Number of DWORDs to transfer */
26 #define ADF_C4XXX_PORTD_CMD_LENDW 0x2
27 /* Extended header always used */
28 #define ADF_C4XXX_PORTD_CMD_EH 0x1
29 /* Address length */
30 #define ADF_C4XXX_PORTD_CMD_ALEN 0x0
31 /* Message opcode: Private Register Write Non-Posted or Posted Message*/
32 #define ADF_C4XXX_MOPCODE 0x07
33 
34 /* Compute port command based on port ID */
35 #define ADF_C4XXX_GET_PORT_CMD(port_id)                                        \
36 	((((port_id)&0xFF) << 24) | (ADF_C4XXX_PORTD_CMD_BE << 16) |           \
37 	 (ADF_C4XXX_PORTD_CMD_NP << 15) | (ADF_C4XXX_PORTD_CMD_LENDW << 10) |  \
38 	 (ADF_C4XXX_PORTD_CMD_EH << 9) | (ADF_C4XXX_PORTD_CMD_ALEN << 8) |     \
39 	 (ADF_C4XXX_MOPCODE))
40 
41 /* Pending reset event/ack message over IOSF-SB */
42 #define ADF_C4XXX_IOSFSB_RESET_EVENT BIT(0)
43 #define ADF_C4XXX_IOSFSB_RESET_ACK BIT(7)
44 
45 /* Upon an FLR, the PCI_EXP_AERUCS register must be read and we must make sure
46  * that not other bit is set excepted the:
47  * - UR (Unsupported request) bit<20>
48  * - IEUNC (Uncorrectable Internal Error) bit <22>
49  */
50 #define PCIE_C4XXX_VALID_ERR_MASK (~BIT(20) ^ BIT(22))
51 
52 /* Trigger: trigger an IOSF SB message */
53 #define ADF_C4XXX_IOSFSB_TRIGGER BIT(0)
54 
55 /* IOSF-SB status definitions */
56 /* Response status bits<1:0> definitions
57  * 00 = Successful
58  * 01 = Unsuccessful
59  * 10 = Powered down
60  * 11 = Multicast
61  */
62 #define ADF_C4XXX_IA2IOSFSB_STATUS_RTS (BIT(0) | BIT(1))
63 #define ADF_C4XXX_IA2IOSFSB_STATUS_PEND BIT(6)
64 /* Allow 100ms polling interval */
65 #define ADF_C4XXX_IA2IOSFSB_POLLING_INTERVAL 100
66 /* Allow a maximum of 500ms before timing out */
67 #define ADF_C4XXX_IA2IOSFSB_POLLING_COUNT 5
68 
69 /* Ethernet notification polling interval */
70 #define ADF_C4XXX_MAX_ETH_ACK_ATTEMPT 100
71 #define ADF_C4XXX_ETH_ACK_POLLING_INTERVAL 10
72 
73 void adf_c4xxx_dev_restore(struct adf_accel_dev *accel_dev);
74 void notify_and_wait_ethernet(struct adf_accel_dev *accel_dev);
75 #endif
76