1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */ 177 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 178 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 179 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 180 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 181 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 182 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 183 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 184 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 185 #define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */ 186 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 187 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 188 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 189 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 190 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 191 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 192 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 193 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 194 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 195 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 196 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 197 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 198 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 199 #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */ 200 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 201 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 202 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 203 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 204 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 205 206 207 /* 208 * All tables must be byte-packed to match the ACPI specification, since 209 * the tables are provided by the system BIOS. 210 */ 211 #pragma pack(1) 212 213 /* 214 * Note: C bitfields are not used for this reason: 215 * 216 * "Bitfields are great and easy to read, but unfortunately the C language 217 * does not specify the layout of bitfields in memory, which means they are 218 * essentially useless for dealing with packed data in on-disk formats or 219 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 220 * this decision was a design error in C. Ritchie could have picked an order 221 * and stuck with it." Norman Ramsey. 222 * See http://stackoverflow.com/a/1053662/41661 223 */ 224 225 226 /******************************************************************************* 227 * 228 * AEST - Arm Error Source Table 229 * 230 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 231 * September 2020. 232 * 233 ******************************************************************************/ 234 235 typedef struct acpi_table_aest 236 { 237 ACPI_TABLE_HEADER Header; 238 239 } ACPI_TABLE_AEST; 240 241 /* Common Subtable header - one per Node Structure (Subtable) */ 242 243 typedef struct acpi_aest_hdr 244 { 245 UINT8 Type; 246 UINT16 Length; 247 UINT8 Reserved; 248 UINT32 NodeSpecificOffset; 249 UINT32 NodeInterfaceOffset; 250 UINT32 NodeInterruptOffset; 251 UINT32 NodeInterruptCount; 252 UINT64 TimestampRate; 253 UINT64 Reserved1; 254 UINT64 ErrorInjectionRate; 255 256 } ACPI_AEST_HEADER; 257 258 /* Values for Type above */ 259 260 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 261 #define ACPI_AEST_MEMORY_ERROR_NODE 1 262 #define ACPI_AEST_SMMU_ERROR_NODE 2 263 #define ACPI_AEST_VENDOR_ERROR_NODE 3 264 #define ACPI_AEST_GIC_ERROR_NODE 4 265 #define ACPI_AEST_PCIE_ERROR_NODE 5 266 #define ACPI_AEST_PROXY_ERROR_NODE 6 267 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 268 269 270 /* 271 * AEST subtables (Error nodes) 272 */ 273 274 /* 0: Processor Error */ 275 276 typedef struct acpi_aest_processor 277 { 278 UINT32 ProcessorId; 279 UINT8 ResourceType; 280 UINT8 Reserved; 281 UINT8 Flags; 282 UINT8 Revision; 283 UINT64 ProcessorAffinity; 284 285 } ACPI_AEST_PROCESSOR; 286 287 /* Values for ResourceType above, related structs below */ 288 289 #define ACPI_AEST_CACHE_RESOURCE 0 290 #define ACPI_AEST_TLB_RESOURCE 1 291 #define ACPI_AEST_GENERIC_RESOURCE 2 292 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 293 294 /* 0R: Processor Cache Resource Substructure */ 295 296 typedef struct acpi_aest_processor_cache 297 { 298 UINT32 CacheReference; 299 UINT32 Reserved; 300 301 } ACPI_AEST_PROCESSOR_CACHE; 302 303 /* Values for CacheType above */ 304 305 #define ACPI_AEST_CACHE_DATA 0 306 #define ACPI_AEST_CACHE_INSTRUCTION 1 307 #define ACPI_AEST_CACHE_UNIFIED 2 308 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 309 310 /* 1R: Processor TLB Resource Substructure */ 311 312 typedef struct acpi_aest_processor_tlb 313 { 314 UINT32 TlbLevel; 315 UINT32 Reserved; 316 317 } ACPI_AEST_PROCESSOR_TLB; 318 319 /* 2R: Processor Generic Resource Substructure */ 320 321 typedef struct acpi_aest_processor_generic 322 { 323 UINT32 Resource; 324 325 } ACPI_AEST_PROCESSOR_GENERIC; 326 327 /* 1: Memory Error */ 328 329 typedef struct acpi_aest_memory 330 { 331 UINT32 SratProximityDomain; 332 333 } ACPI_AEST_MEMORY; 334 335 /* 2: Smmu Error */ 336 337 typedef struct acpi_aest_smmu 338 { 339 UINT32 IortNodeReference; 340 UINT32 SubcomponentReference; 341 342 } ACPI_AEST_SMMU; 343 344 /* 3: Vendor Defined */ 345 346 typedef struct acpi_aest_vendor 347 { 348 UINT32 AcpiHid; 349 UINT32 AcpiUid; 350 UINT8 VendorSpecificData[16]; 351 352 } ACPI_AEST_VENDOR; 353 354 /* 3: Vendor Defined V2 */ 355 356 typedef struct acpi_aest_vendor_v2 357 { 358 UINT64 AcpiHid; 359 UINT32 AcpiUid; 360 UINT8 VendorSpecificData[16]; 361 362 } ACPI_AEST_VENDOR_V2; 363 364 /* 4: Gic Error */ 365 366 typedef struct acpi_aest_gic 367 { 368 UINT32 InterfaceType; 369 UINT32 InstanceId; 370 371 } ACPI_AEST_GIC; 372 373 /* Values for InterfaceType above */ 374 375 #define ACPI_AEST_GIC_CPU 0 376 #define ACPI_AEST_GIC_DISTRIBUTOR 1 377 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 378 #define ACPI_AEST_GIC_ITS 3 379 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 380 381 /* 5: PCIe Error */ 382 383 typedef struct acpi_aest_pcie 384 { 385 UINT32 IortNodeReference; 386 387 } ACPI_AEST_PCIE; 388 389 390 /* 6: Proxy Error */ 391 392 typedef struct acpi_aest_proxy 393 { 394 UINT64 NodeAddress; 395 396 } ACPI_AEST_PROXY; 397 398 /* Node Interface Structure */ 399 400 typedef struct acpi_aest_node_interface 401 { 402 UINT8 Type; 403 UINT8 Reserved[3]; 404 UINT32 Flags; 405 UINT64 Address; 406 UINT32 ErrorRecordIndex; 407 UINT32 ErrorRecordCount; 408 UINT64 ErrorRecordImplemented; 409 UINT64 ErrorStatusReporting; 410 UINT64 AddressingMode; 411 412 } ACPI_AEST_NODE_INTERFACE; 413 414 /* Node Interface Structure V2*/ 415 416 typedef struct acpi_aest_node_interface_header 417 { 418 UINT8 Type; 419 UINT8 GroupFormat; 420 UINT8 Reserved[2]; 421 UINT32 Flags; 422 UINT64 Address; 423 UINT32 ErrorRecordIndex; 424 UINT32 ErrorRecordCount; 425 426 } ACPI_AEST_NODE_INTERFACE_HEADER; 427 428 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 429 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 430 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 431 432 typedef struct acpi_aest_node_interface_common 433 { 434 UINT32 ErrorNodeDevice; 435 UINT32 ProcessorAffinity; 436 UINT64 ErrorGroupRegisterBase; 437 UINT64 FaultInjectRegisterBase; 438 UINT64 InterruptConfigRegisterBase; 439 440 } ACPI_AEST_NODE_INTERFACE_COMMON; 441 442 typedef struct acpi_aest_node_interface_4k 443 { 444 UINT64 ErrorRecordImplemented; 445 UINT64 ErrorStatusReporting; 446 UINT64 AddressingMode; 447 ACPI_AEST_NODE_INTERFACE_COMMON Common; 448 449 } ACPI_AEST_NODE_INTERFACE_4K; 450 451 typedef struct acpi_aest_node_interface_16k 452 { 453 UINT64 ErrorRecordImplemented[4]; 454 UINT64 ErrorStatusReporting[4]; 455 UINT64 AddressingMode[4]; 456 ACPI_AEST_NODE_INTERFACE_COMMON Common; 457 458 } ACPI_AEST_NODE_INTERFACE_16K; 459 460 typedef struct acpi_aest_node_interface_64k 461 { 462 INT64 ErrorRecordImplemented[14]; 463 UINT64 ErrorStatusReporting[14]; 464 UINT64 AddressingMode[14]; 465 ACPI_AEST_NODE_INTERFACE_COMMON Common; 466 467 } ACPI_AEST_NODE_INTERFACE_64K; 468 469 /* Values for Type field above */ 470 471 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 472 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 473 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 474 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 475 476 /* Node Interrupt Structure */ 477 478 typedef struct acpi_aest_node_interrupt 479 { 480 UINT8 Type; 481 UINT8 Reserved[2]; 482 UINT8 Flags; 483 UINT32 Gsiv; 484 UINT8 IortId; 485 UINT8 Reserved1[3]; 486 487 } ACPI_AEST_NODE_INTERRUPT; 488 489 /* Node Interrupt Structure V2 */ 490 491 typedef struct acpi_aest_node_interrupt_v2 492 { 493 UINT8 Type; 494 UINT8 Reserved[2]; 495 UINT8 Flags; 496 UINT32 Gsiv; 497 UINT8 Reserved1[4]; 498 499 } ACPI_AEST_NODE_INTERRUPT_V2; 500 501 /* Values for Type field above */ 502 503 #define ACPI_AEST_NODE_FAULT_HANDLING 0 504 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 505 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 506 507 508 /******************************************************************************* 509 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 510 * 511 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 512 * ARM DEN0093 v1.1 513 * 514 ******************************************************************************/ 515 typedef struct acpi_table_agdi 516 { 517 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 518 UINT8 Flags; 519 UINT8 Reserved[3]; 520 UINT32 SdeiEvent; 521 UINT32 Gsiv; 522 523 } ACPI_TABLE_AGDI; 524 525 /* Mask for Flags field above */ 526 527 #define ACPI_AGDI_SIGNALING_MODE (1) 528 529 530 /******************************************************************************* 531 * 532 * APMT - ARM Performance Monitoring Unit Table 533 * 534 * Conforms to: 535 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 536 * ARM DEN0117 v1.0 November 25, 2021 537 * 538 ******************************************************************************/ 539 540 typedef struct acpi_table_apmt { 541 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 542 } ACPI_TABLE_APMT; 543 544 #define ACPI_APMT_NODE_ID_LENGTH 4 545 546 /* 547 * APMT subtables 548 */ 549 typedef struct acpi_apmt_node { 550 UINT16 Length; 551 UINT8 Flags; 552 UINT8 Type; 553 UINT32 Id; 554 UINT64 InstPrimary; 555 UINT32 InstSecondary; 556 UINT64 BaseAddress0; 557 UINT64 BaseAddress1; 558 UINT32 OvflwIrq; 559 UINT32 Reserved; 560 UINT32 OvflwIrqFlags; 561 UINT32 ProcAffinity; 562 UINT32 ImplId; 563 } ACPI_APMT_NODE; 564 565 /* Masks for Flags field above */ 566 567 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 568 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 569 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 570 571 /* Values for Flags dual page field above */ 572 573 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 574 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 575 576 /* Values for Flags processor affinity field above */ 577 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 578 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 579 580 /* Values for Flags 64-bit atomic field above */ 581 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 582 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 583 584 /* Values for Type field above */ 585 586 enum acpi_apmt_node_type { 587 ACPI_APMT_NODE_TYPE_MC = 0x00, 588 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 589 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 590 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 591 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 592 ACPI_APMT_NODE_TYPE_COUNT 593 }; 594 595 /* Masks for ovflw_irq_flags field above */ 596 597 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 598 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 599 600 /* Values for ovflw_irq_flags mode field above */ 601 602 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 603 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 604 605 /* Values for ovflw_irq_flags type field above */ 606 607 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 608 609 610 /******************************************************************************* 611 * 612 * BDAT - BIOS Data ACPI Table 613 * 614 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 615 * Nov 2020 616 * 617 ******************************************************************************/ 618 619 typedef struct acpi_table_bdat 620 { 621 ACPI_TABLE_HEADER Header; 622 ACPI_GENERIC_ADDRESS Gas; 623 624 } ACPI_TABLE_BDAT; 625 626 /******************************************************************************* 627 * 628 * CCEL - CC-Event Log 629 * From: "Guest-Host-Communication Interface (GHCI) for Intel 630 * Trust Domain Extensions (Intel TDX)". Feb 2022 631 * 632 ******************************************************************************/ 633 634 typedef struct acpi_table_ccel 635 { 636 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 637 UINT8 CCType; 638 UINT8 CCSubType; 639 UINT16 Reserved; 640 UINT64 LogAreaMinimumLength; 641 UINT64 LogAreaStartAddress; 642 643 } ACPI_TABLE_CCEL; 644 645 /******************************************************************************* 646 * 647 * ERDT - Enhanced Resource Director Technology (ERDT) table 648 * 649 * Conforms to "Intel Resource Director Technology Architecture Specification" 650 * Version 1.1, January 2025 651 * 652 ******************************************************************************/ 653 654 typedef struct acpi_table_erdt 655 { 656 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 657 UINT32 MaxClos; /* Maximum classes of service */ 658 UINT8 Reserved[24]; 659 UINT8 Erdt_Substructures[]; 660 661 } ACPI_TABLE_ERDT; 662 663 664 /* Values for subtable type in ACPI_SUBTBL_HDR_16 */ 665 666 enum AcpiErdtType 667 { 668 ACPI_ERDT_TYPE_RMDD = 0, 669 ACPI_ERDT_TYPE_CACD = 1, 670 ACPI_ERDT_TYPE_DACD = 2, 671 ACPI_ERDT_TYPE_CMRC = 3, 672 ACPI_ERDT_TYPE_MMRC = 4, 673 ACPI_ERDT_TYPE_MARC = 5, 674 ACPI_ERDT_TYPE_CARC = 6, 675 ACPI_ERDT_TYPE_CMRD = 7, 676 ACPI_ERDT_TYPE_IBRD = 8, 677 ACPI_ERDT_TYPE_IBAD = 9, 678 ACPI_ERDT_TYPE_CARD = 10, 679 ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */ 680 681 }; 682 683 /* 684 * ERDT Subtables, correspond to Type in ACPI_SUBTBL_HDR_16 685 */ 686 687 /* 0: RMDD - Resource Management Domain Description */ 688 689 typedef struct acpi_erdt_rmdd 690 { 691 ACPI_SUBTBL_HDR_16 Header; 692 UINT16 Flags; 693 UINT16 IO_l3_Slices; /* Number of slices in IO cache */ 694 UINT8 IO_l3_Sets; /* Number of sets in IO cache */ 695 UINT8 IO_l3_Ways; /* Number of ways in IO cache */ 696 UINT64 Reserved; 697 UINT16 DomainId; /* Unique domain ID */ 698 UINT32 MaxRmid; /* Maximun RMID supported */ 699 UINT64 CregBase; /* Control Register Base Address */ 700 UINT16 CregSize; /* Control Register Size (4K pages) */ 701 UINT8 RmddStructs[]; 702 703 } ACPI_ERDT_RMDD; 704 705 706 /* 1: CACD - CPU Agent Collection Description */ 707 708 typedef struct acpi_erdt_cacd 709 { 710 ACPI_SUBTBL_HDR_16 Header; 711 UINT16 Reserved; 712 UINT16 DomainId; /* Unique domain ID */ 713 UINT32 X2APICIDS[]; 714 715 } ACPI_ERDT_CACD; 716 717 718 /* 2: DACD - Device Agent Collection Description */ 719 720 typedef struct acpi_erdt_dacd 721 { 722 ACPI_SUBTBL_HDR_16 Header; 723 UINT16 Reserved; 724 UINT16 DomainId; /* Unique domain ID */ 725 UINT8 DevPaths[]; 726 727 } ACPI_ERDT_DACD; 728 729 typedef struct acpi_erdt_dacd_dev_paths 730 { 731 ACPI_SUBTABLE_HEADER Header; 732 UINT16 Segment; 733 UINT8 Reserved; 734 UINT8 StartBus; 735 UINT8 Path[]; 736 737 } ACPI_ERDT_DACD_PATHS; 738 739 740 /* 3: CMRC - Cache Monitoring Registers for CPU Agents */ 741 742 typedef struct acpi_erdt_cmrc 743 { 744 ACPI_SUBTBL_HDR_16 Header; 745 UINT32 Reserved1; 746 UINT32 Flags; 747 UINT8 IndexFn; 748 UINT8 Reserved2[11]; 749 UINT64 CmtRegBase; 750 UINT32 CmtRegSize; 751 UINT16 ClumpSize; 752 UINT16 ClumpStride; 753 UINT64 UpScale; 754 755 } ACPI_ERDT_CMRC; 756 757 758 /* 4: MMRC - Memory-bandwidth Monitoring Registers for CPU Agents */ 759 760 typedef struct acpi_erdt_mmrc 761 { 762 ACPI_SUBTBL_HDR_16 Header; 763 UINT32 Reserved1; 764 UINT32 Flags; 765 UINT8 IndexFn; 766 UINT8 Reserved2[11]; 767 UINT64 RegBase; 768 UINT32 RegSize; 769 UINT8 CounterWidth; 770 UINT64 UpScale; 771 UINT8 Reserved3[7]; 772 UINT32 CorrFactorListLen; 773 UINT32 CorrFactorList[]; 774 775 } ACPI_ERDT_MMRC; 776 777 778 /* 5: MARC - Memory-bandwidth Allocation Registers for CPU Agents */ 779 780 typedef struct acpi_erdt_marc 781 { 782 ACPI_SUBTBL_HDR_16 Header; 783 UINT16 Reserved1; 784 UINT16 Flags; 785 UINT8 IndexFn; 786 UINT8 Reserved2[7]; 787 UINT64 RegBaseOpt; 788 UINT64 RegBaseMin; 789 UINT64 RegBaseMax; 790 UINT32 MbaRegSize; 791 UINT32 MbaCtrlRange; 792 793 } ACPI_ERDT_MARC; 794 795 796 /* 6: CARC - Cache Allocation Registers for CPU Agents */ 797 798 typedef struct acpi_erdt_carc 799 { 800 ACPI_SUBTBL_HDR_16 Header; 801 802 } ACPI_ERDT_CARC; 803 804 805 /* 7: CMRD - Cache Monitoring Registers for Device Agents */ 806 807 typedef struct acpi_erdt_cmrd 808 { 809 ACPI_SUBTBL_HDR_16 Header; 810 UINT32 Reserved1; 811 UINT32 Flags; 812 UINT8 IndexFn; 813 UINT8 Reserved2[11]; 814 UINT64 RegBase; 815 UINT32 RegSize; 816 UINT16 CmtRegOff; 817 UINT16 CmtClumpSize; 818 UINT64 UpScale; 819 820 } ACPI_ERDT_CMRD; 821 822 823 /* 8: IBRD - Cache Monitoring Registers for Device Agents */ 824 825 typedef struct acpi_erdt_ibrd 826 { 827 ACPI_SUBTBL_HDR_16 Header; 828 UINT32 Reserved1; 829 UINT32 Flags; 830 UINT8 IndexFn; 831 UINT8 Reserved2[11]; 832 UINT64 RegBase; 833 UINT32 RegSize; 834 UINT16 TotalBwOffset; 835 UINT16 IOMissBwOffset; 836 UINT16 TotalBwClump; 837 UINT16 IOMissBwClump; 838 UINT8 Reserved3[7]; 839 UINT8 CounterWidth; 840 UINT64 UpScale; 841 UINT32 CorrFactorListLen; 842 UINT32 CorrFactorList[]; 843 844 } ACPI_ERDT_IBRD; 845 846 847 /* 9: IBAD - IO bandwidth Allocation Registers for device agents */ 848 849 typedef struct acpi_erdt_ibad 850 { 851 ACPI_SUBTBL_HDR_16 Header; 852 853 } ACPI_ERDT_IBAD; 854 855 856 /* 10: CARD - IO bandwidth Allocation Registers for Device Agents */ 857 858 typedef struct acpi_erdt_card 859 { 860 ACPI_SUBTBL_HDR_16 Header; 861 UINT32 Reserved1; 862 UINT32 Flags; 863 UINT32 ContentionMask; 864 UINT8 IndexFn; 865 UINT8 Reserved2[7]; 866 UINT64 RegBase; 867 UINT32 RegSize; 868 UINT16 CatRegOffset; 869 UINT16 CatRegBlockSize; 870 871 } ACPI_ERDT_CARD; 872 873 874 /******************************************************************************* 875 * 876 * IORT - IO Remapping Table 877 * 878 * Conforms to "IO Remapping Table System Software on ARM Platforms", 879 * Document number: ARM DEN 0049E.f, Apr 2024 880 * 881 ******************************************************************************/ 882 883 typedef struct acpi_table_iort 884 { 885 ACPI_TABLE_HEADER Header; 886 UINT32 NodeCount; 887 UINT32 NodeOffset; 888 UINT32 Reserved; 889 890 } ACPI_TABLE_IORT; 891 892 893 /* 894 * IORT subtables 895 */ 896 typedef struct acpi_iort_node 897 { 898 UINT8 Type; 899 UINT16 Length; 900 UINT8 Revision; 901 UINT32 Identifier; 902 UINT32 MappingCount; 903 UINT32 MappingOffset; 904 char NodeData[]; 905 906 } ACPI_IORT_NODE; 907 908 /* Values for subtable Type above */ 909 910 enum AcpiIortNodeType 911 { 912 ACPI_IORT_NODE_ITS_GROUP = 0x00, 913 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 914 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 915 ACPI_IORT_NODE_SMMU = 0x03, 916 ACPI_IORT_NODE_SMMU_V3 = 0x04, 917 ACPI_IORT_NODE_PMCG = 0x05, 918 ACPI_IORT_NODE_RMR = 0x06, 919 }; 920 921 922 typedef struct acpi_iort_id_mapping 923 { 924 UINT32 InputBase; /* Lowest value in input range */ 925 UINT32 IdCount; /* Number of IDs */ 926 UINT32 OutputBase; /* Lowest value in output range */ 927 UINT32 OutputReference; /* A reference to the output node */ 928 UINT32 Flags; 929 930 } ACPI_IORT_ID_MAPPING; 931 932 /* Masks for Flags field above for IORT subtable */ 933 934 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 935 936 937 typedef struct acpi_iort_memory_access 938 { 939 UINT32 CacheCoherency; 940 UINT8 Hints; 941 UINT16 Reserved; 942 UINT8 MemoryFlags; 943 944 } ACPI_IORT_MEMORY_ACCESS; 945 946 /* Values for CacheCoherency field above */ 947 948 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 949 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 950 951 /* Masks for Hints field above */ 952 953 #define ACPI_IORT_HT_TRANSIENT (1) 954 #define ACPI_IORT_HT_WRITE (1<<1) 955 #define ACPI_IORT_HT_READ (1<<2) 956 #define ACPI_IORT_HT_OVERRIDE (1<<3) 957 958 /* Masks for MemoryFlags field above */ 959 960 #define ACPI_IORT_MF_COHERENCY (1) 961 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 962 #define ACPI_IORT_MF_CANWBS (1<<2) 963 964 965 /* 966 * IORT node specific subtables 967 */ 968 typedef struct acpi_iort_its_group 969 { 970 UINT32 ItsCount; 971 UINT32 Identifiers[]; /* GIC ITS identifier array */ 972 973 } ACPI_IORT_ITS_GROUP; 974 975 976 typedef struct acpi_iort_named_component 977 { 978 UINT32 NodeFlags; 979 UINT64 MemoryProperties; /* Memory access properties */ 980 UINT8 MemoryAddressLimit; /* Memory address size limit */ 981 char DeviceName[]; /* Path of namespace object */ 982 983 } ACPI_IORT_NAMED_COMPONENT; 984 985 /* Masks for Flags field above */ 986 987 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 988 #define ACPI_IORT_NC_PASID_BITS (31<<1) 989 990 typedef struct acpi_iort_root_complex 991 { 992 UINT64 MemoryProperties; /* Memory access properties */ 993 UINT32 AtsAttribute; 994 UINT32 PciSegmentNumber; 995 UINT8 MemoryAddressLimit; /* Memory address size limit */ 996 UINT16 PasidCapabilities; /* PASID Capabilities */ 997 UINT8 Reserved[]; /* Reserved, must be zero */ 998 999 } ACPI_IORT_ROOT_COMPLEX; 1000 1001 /* Masks for AtsAttribute field above */ 1002 1003 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 1004 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 1005 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 1006 1007 /* Masks for PasidCapabilities field above */ 1008 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 1009 1010 typedef struct acpi_iort_smmu 1011 { 1012 UINT64 BaseAddress; /* SMMU base address */ 1013 UINT64 Span; /* Length of memory range */ 1014 UINT32 Model; 1015 UINT32 Flags; 1016 UINT32 GlobalInterruptOffset; 1017 UINT32 ContextInterruptCount; 1018 UINT32 ContextInterruptOffset; 1019 UINT32 PmuInterruptCount; 1020 UINT32 PmuInterruptOffset; 1021 UINT64 Interrupts[]; /* Interrupt array */ 1022 1023 } ACPI_IORT_SMMU; 1024 1025 /* Values for Model field above */ 1026 1027 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 1028 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 1029 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 1030 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 1031 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 1032 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 1033 1034 /* Masks for Flags field above */ 1035 1036 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 1037 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 1038 1039 /* Global interrupt format */ 1040 1041 typedef struct acpi_iort_smmu_gsi 1042 { 1043 UINT32 NSgIrpt; 1044 UINT32 NSgIrptFlags; 1045 UINT32 NSgCfgIrpt; 1046 UINT32 NSgCfgIrptFlags; 1047 1048 } ACPI_IORT_SMMU_GSI; 1049 1050 1051 typedef struct acpi_iort_smmu_v3 1052 { 1053 UINT64 BaseAddress; /* SMMUv3 base address */ 1054 UINT32 Flags; 1055 UINT32 Reserved; 1056 UINT64 VatosAddress; 1057 UINT32 Model; 1058 UINT32 EventGsiv; 1059 UINT32 PriGsiv; 1060 UINT32 GerrGsiv; 1061 UINT32 SyncGsiv; 1062 UINT32 Pxm; 1063 UINT32 IdMappingIndex; 1064 1065 } ACPI_IORT_SMMU_V3; 1066 1067 /* Values for Model field above */ 1068 1069 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 1070 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 1071 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 1072 1073 /* Masks for Flags field above */ 1074 1075 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 1076 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 1077 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 1078 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 1079 1080 typedef struct acpi_iort_pmcg 1081 { 1082 UINT64 Page0BaseAddress; 1083 UINT32 OverflowGsiv; 1084 UINT32 NodeReference; 1085 UINT64 Page1BaseAddress; 1086 1087 } ACPI_IORT_PMCG; 1088 1089 typedef struct acpi_iort_rmr { 1090 UINT32 Flags; 1091 UINT32 RmrCount; 1092 UINT32 RmrOffset; 1093 1094 } ACPI_IORT_RMR; 1095 1096 /* Masks for Flags field above */ 1097 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 1098 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 1099 1100 /* 1101 * Macro to access the Access Attributes in flags field above: 1102 * Access Attributes is encoded in bits 9:2 1103 */ 1104 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 1105 1106 /* Values for above Access Attributes */ 1107 1108 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 1109 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 1110 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 1111 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 1112 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 1113 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 1114 1115 typedef struct acpi_iort_rmr_desc { 1116 UINT64 BaseAddress; 1117 UINT64 Length; 1118 UINT32 Reserved; 1119 1120 } ACPI_IORT_RMR_DESC; 1121 1122 /******************************************************************************* 1123 * 1124 * IVRS - I/O Virtualization Reporting Structure 1125 * Version 1 1126 * 1127 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 1128 * Revision 1.26, February 2009. 1129 * 1130 ******************************************************************************/ 1131 1132 typedef struct acpi_table_ivrs 1133 { 1134 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1135 UINT32 Info; /* Common virtualization info */ 1136 UINT64 Reserved; 1137 1138 } ACPI_TABLE_IVRS; 1139 1140 /* Values for Info field above */ 1141 1142 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 1143 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 1144 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 1145 1146 1147 /* IVRS subtable header */ 1148 1149 typedef struct acpi_ivrs_header 1150 { 1151 UINT8 Type; /* Subtable type */ 1152 UINT8 Flags; 1153 UINT16 Length; /* Subtable length */ 1154 UINT16 DeviceId; /* ID of IOMMU */ 1155 1156 } ACPI_IVRS_HEADER; 1157 1158 /* Values for subtable Type above */ 1159 1160 enum AcpiIvrsType 1161 { 1162 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 1163 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 1164 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 1165 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 1166 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 1167 ACPI_IVRS_TYPE_MEMORY3 = 0x22 1168 }; 1169 1170 /* Masks for Flags field above for IVHD subtable */ 1171 1172 #define ACPI_IVHD_TT_ENABLE (1) 1173 #define ACPI_IVHD_PASS_PW (1<<1) 1174 #define ACPI_IVHD_RES_PASS_PW (1<<2) 1175 #define ACPI_IVHD_ISOC (1<<3) 1176 #define ACPI_IVHD_IOTLB (1<<4) 1177 1178 /* Masks for Flags field above for IVMD subtable */ 1179 1180 #define ACPI_IVMD_UNITY (1) 1181 #define ACPI_IVMD_READ (1<<1) 1182 #define ACPI_IVMD_WRITE (1<<2) 1183 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 1184 1185 1186 /* 1187 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 1188 */ 1189 1190 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 1191 1192 typedef struct acpi_ivrs_hardware_10 1193 { 1194 ACPI_IVRS_HEADER Header; 1195 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1196 UINT64 BaseAddress; /* IOMMU control registers */ 1197 UINT16 PciSegmentGroup; 1198 UINT16 Info; /* MSI number and unit ID */ 1199 UINT32 FeatureReporting; 1200 1201 } ACPI_IVRS_HARDWARE1; 1202 1203 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 1204 1205 typedef struct acpi_ivrs_hardware_11 1206 { 1207 ACPI_IVRS_HEADER Header; 1208 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1209 UINT64 BaseAddress; /* IOMMU control registers */ 1210 UINT16 PciSegmentGroup; 1211 UINT16 Info; /* MSI number and unit ID */ 1212 UINT32 Attributes; 1213 UINT64 EfrRegisterImage; 1214 UINT64 Reserved; 1215 } ACPI_IVRS_HARDWARE2; 1216 1217 /* Masks for Info field above */ 1218 1219 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 1220 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 1221 1222 1223 /* 1224 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 1225 * Upper two bits of the Type field are the (encoded) length of the structure. 1226 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 1227 * are reserved for future use but not defined. 1228 */ 1229 typedef struct acpi_ivrs_de_header 1230 { 1231 UINT8 Type; 1232 UINT16 Id; 1233 UINT8 DataSetting; 1234 1235 } ACPI_IVRS_DE_HEADER; 1236 1237 /* Length of device entry is in the top two bits of Type field above */ 1238 1239 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 1240 1241 /* Values for device entry Type field above */ 1242 1243 enum AcpiIvrsDeviceEntryType 1244 { 1245 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 1246 1247 ACPI_IVRS_TYPE_PAD4 = 0, 1248 ACPI_IVRS_TYPE_ALL = 1, 1249 ACPI_IVRS_TYPE_SELECT = 2, 1250 ACPI_IVRS_TYPE_START = 3, 1251 ACPI_IVRS_TYPE_END = 4, 1252 1253 /* 8-byte device entries */ 1254 1255 ACPI_IVRS_TYPE_PAD8 = 64, 1256 ACPI_IVRS_TYPE_NOT_USED = 65, 1257 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 1258 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 1259 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 1260 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 1261 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 1262 1263 /* Variable-length device entries */ 1264 1265 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 1266 }; 1267 1268 /* Values for Data field above */ 1269 1270 #define ACPI_IVHD_INIT_PASS (1) 1271 #define ACPI_IVHD_EINT_PASS (1<<1) 1272 #define ACPI_IVHD_NMI_PASS (1<<2) 1273 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 1274 #define ACPI_IVHD_LINT0_PASS (1<<6) 1275 #define ACPI_IVHD_LINT1_PASS (1<<7) 1276 1277 1278 /* Types 0-4: 4-byte device entry */ 1279 1280 typedef struct acpi_ivrs_device4 1281 { 1282 ACPI_IVRS_DE_HEADER Header; 1283 1284 } ACPI_IVRS_DEVICE4; 1285 1286 /* Types 66-67: 8-byte device entry */ 1287 1288 typedef struct acpi_ivrs_device8a 1289 { 1290 ACPI_IVRS_DE_HEADER Header; 1291 UINT8 Reserved1; 1292 UINT16 UsedId; 1293 UINT8 Reserved2; 1294 1295 } ACPI_IVRS_DEVICE8A; 1296 1297 /* Types 70-71: 8-byte device entry */ 1298 1299 typedef struct acpi_ivrs_device8b 1300 { 1301 ACPI_IVRS_DE_HEADER Header; 1302 UINT32 ExtendedData; 1303 1304 } ACPI_IVRS_DEVICE8B; 1305 1306 /* Values for ExtendedData above */ 1307 1308 #define ACPI_IVHD_ATS_DISABLED (1<<31) 1309 1310 /* Type 72: 8-byte device entry */ 1311 1312 typedef struct acpi_ivrs_device8c 1313 { 1314 ACPI_IVRS_DE_HEADER Header; 1315 UINT8 Handle; 1316 UINT16 UsedId; 1317 UINT8 Variety; 1318 1319 } ACPI_IVRS_DEVICE8C; 1320 1321 /* Values for Variety field above */ 1322 1323 #define ACPI_IVHD_IOAPIC 1 1324 #define ACPI_IVHD_HPET 2 1325 1326 /* Type 240: variable-length device entry */ 1327 1328 typedef struct acpi_ivrs_device_hid 1329 { 1330 ACPI_IVRS_DE_HEADER Header; 1331 UINT64 AcpiHid; 1332 UINT64 AcpiCid; 1333 UINT8 UidType; 1334 UINT8 UidLength; 1335 1336 } ACPI_IVRS_DEVICE_HID; 1337 1338 /* Values for UidType above */ 1339 1340 #define ACPI_IVRS_UID_NOT_PRESENT 0 1341 #define ACPI_IVRS_UID_IS_INTEGER 1 1342 #define ACPI_IVRS_UID_IS_STRING 2 1343 1344 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1345 1346 typedef struct acpi_ivrs_memory 1347 { 1348 ACPI_IVRS_HEADER Header; 1349 UINT16 AuxData; 1350 UINT64 Reserved; 1351 UINT64 StartAddress; 1352 UINT64 MemoryLength; 1353 1354 } ACPI_IVRS_MEMORY; 1355 1356 1357 /******************************************************************************* 1358 * 1359 * LPIT - Low Power Idle Table 1360 * 1361 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1362 * 1363 ******************************************************************************/ 1364 1365 typedef struct acpi_table_lpit 1366 { 1367 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1368 1369 } ACPI_TABLE_LPIT; 1370 1371 1372 /* LPIT subtable header */ 1373 1374 typedef struct acpi_lpit_header 1375 { 1376 UINT32 Type; /* Subtable type */ 1377 UINT32 Length; /* Subtable length */ 1378 UINT16 UniqueId; 1379 UINT16 Reserved; 1380 UINT32 Flags; 1381 1382 } ACPI_LPIT_HEADER; 1383 1384 /* Values for subtable Type above */ 1385 1386 enum AcpiLpitType 1387 { 1388 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1389 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1390 }; 1391 1392 /* Masks for Flags field above */ 1393 1394 #define ACPI_LPIT_STATE_DISABLED (1) 1395 #define ACPI_LPIT_NO_COUNTER (1<<1) 1396 1397 /* 1398 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1399 */ 1400 1401 /* 0x00: Native C-state instruction based LPI structure */ 1402 1403 typedef struct acpi_lpit_native 1404 { 1405 ACPI_LPIT_HEADER Header; 1406 ACPI_GENERIC_ADDRESS EntryTrigger; 1407 UINT32 Residency; 1408 UINT32 Latency; 1409 ACPI_GENERIC_ADDRESS ResidencyCounter; 1410 UINT64 CounterFrequency; 1411 1412 } ACPI_LPIT_NATIVE; 1413 1414 1415 /******************************************************************************* 1416 * 1417 * MADT - Multiple APIC Description Table 1418 * Version 3 1419 * 1420 ******************************************************************************/ 1421 1422 typedef struct acpi_table_madt 1423 { 1424 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1425 UINT32 Address; /* Physical address of local APIC */ 1426 UINT32 Flags; 1427 1428 } ACPI_TABLE_MADT; 1429 1430 /* Masks for Flags field above */ 1431 1432 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1433 1434 /* Values for PCATCompat flag */ 1435 1436 #define ACPI_MADT_DUAL_PIC 1 1437 #define ACPI_MADT_MULTIPLE_APIC 0 1438 1439 1440 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1441 1442 enum AcpiMadtType 1443 { 1444 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1445 ACPI_MADT_TYPE_IO_APIC = 1, 1446 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1447 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1448 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1449 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1450 ACPI_MADT_TYPE_IO_SAPIC = 6, 1451 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1452 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1453 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1454 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1455 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1456 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1457 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1458 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1459 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1460 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1461 ACPI_MADT_TYPE_CORE_PIC = 17, 1462 ACPI_MADT_TYPE_LIO_PIC = 18, 1463 ACPI_MADT_TYPE_HT_PIC = 19, 1464 ACPI_MADT_TYPE_EIO_PIC = 20, 1465 ACPI_MADT_TYPE_MSI_PIC = 21, 1466 ACPI_MADT_TYPE_BIO_PIC = 22, 1467 ACPI_MADT_TYPE_LPC_PIC = 23, 1468 ACPI_MADT_TYPE_RINTC = 24, 1469 ACPI_MADT_TYPE_IMSIC = 25, 1470 ACPI_MADT_TYPE_APLIC = 26, 1471 ACPI_MADT_TYPE_PLIC = 27, 1472 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 1473 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1474 }; 1475 1476 1477 /* 1478 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1479 */ 1480 1481 /* 0: Processor Local APIC */ 1482 1483 typedef struct acpi_madt_local_apic 1484 { 1485 ACPI_SUBTABLE_HEADER Header; 1486 UINT8 ProcessorId; /* ACPI processor id */ 1487 UINT8 Id; /* Processor's local APIC id */ 1488 UINT32 LapicFlags; 1489 1490 } ACPI_MADT_LOCAL_APIC; 1491 1492 1493 /* 1: IO APIC */ 1494 1495 typedef struct acpi_madt_io_apic 1496 { 1497 ACPI_SUBTABLE_HEADER Header; 1498 UINT8 Id; /* I/O APIC ID */ 1499 UINT8 Reserved; /* Reserved - must be zero */ 1500 UINT32 Address; /* APIC physical address */ 1501 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1502 1503 } ACPI_MADT_IO_APIC; 1504 1505 1506 /* 2: Interrupt Override */ 1507 1508 typedef struct acpi_madt_interrupt_override 1509 { 1510 ACPI_SUBTABLE_HEADER Header; 1511 UINT8 Bus; /* 0 - ISA */ 1512 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1513 UINT32 GlobalIrq; /* Global system interrupt */ 1514 UINT16 IntiFlags; 1515 1516 } ACPI_MADT_INTERRUPT_OVERRIDE; 1517 1518 1519 /* 3: NMI Source */ 1520 1521 typedef struct acpi_madt_nmi_source 1522 { 1523 ACPI_SUBTABLE_HEADER Header; 1524 UINT16 IntiFlags; 1525 UINT32 GlobalIrq; /* Global system interrupt */ 1526 1527 } ACPI_MADT_NMI_SOURCE; 1528 1529 1530 /* 4: Local APIC NMI */ 1531 1532 typedef struct acpi_madt_local_apic_nmi 1533 { 1534 ACPI_SUBTABLE_HEADER Header; 1535 UINT8 ProcessorId; /* ACPI processor id */ 1536 UINT16 IntiFlags; 1537 UINT8 Lint; /* LINTn to which NMI is connected */ 1538 1539 } ACPI_MADT_LOCAL_APIC_NMI; 1540 1541 1542 /* 5: Address Override */ 1543 1544 typedef struct acpi_madt_local_apic_override 1545 { 1546 ACPI_SUBTABLE_HEADER Header; 1547 UINT16 Reserved; /* Reserved, must be zero */ 1548 UINT64 Address; /* APIC physical address */ 1549 1550 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1551 1552 1553 /* 6: I/O Sapic */ 1554 1555 typedef struct acpi_madt_io_sapic 1556 { 1557 ACPI_SUBTABLE_HEADER Header; 1558 UINT8 Id; /* I/O SAPIC ID */ 1559 UINT8 Reserved; /* Reserved, must be zero */ 1560 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1561 UINT64 Address; /* SAPIC physical address */ 1562 1563 } ACPI_MADT_IO_SAPIC; 1564 1565 1566 /* 7: Local Sapic */ 1567 1568 typedef struct acpi_madt_local_sapic 1569 { 1570 ACPI_SUBTABLE_HEADER Header; 1571 UINT8 ProcessorId; /* ACPI processor id */ 1572 UINT8 Id; /* SAPIC ID */ 1573 UINT8 Eid; /* SAPIC EID */ 1574 UINT8 Reserved[3]; /* Reserved, must be zero */ 1575 UINT32 LapicFlags; 1576 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1577 char UidString[]; /* String UID - ACPI 3.0 */ 1578 1579 } ACPI_MADT_LOCAL_SAPIC; 1580 1581 1582 /* 8: Platform Interrupt Source */ 1583 1584 typedef struct acpi_madt_interrupt_source 1585 { 1586 ACPI_SUBTABLE_HEADER Header; 1587 UINT16 IntiFlags; 1588 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1589 UINT8 Id; /* Processor ID */ 1590 UINT8 Eid; /* Processor EID */ 1591 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1592 UINT32 GlobalIrq; /* Global system interrupt */ 1593 UINT32 Flags; /* Interrupt Source Flags */ 1594 1595 } ACPI_MADT_INTERRUPT_SOURCE; 1596 1597 /* Masks for Flags field above */ 1598 1599 #define ACPI_MADT_CPEI_OVERRIDE (1) 1600 1601 1602 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1603 1604 typedef struct acpi_madt_local_x2apic 1605 { 1606 ACPI_SUBTABLE_HEADER Header; 1607 UINT16 Reserved; /* Reserved - must be zero */ 1608 UINT32 LocalApicId; /* Processor x2APIC ID */ 1609 UINT32 LapicFlags; 1610 UINT32 Uid; /* ACPI processor UID */ 1611 1612 } ACPI_MADT_LOCAL_X2APIC; 1613 1614 1615 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1616 1617 typedef struct acpi_madt_local_x2apic_nmi 1618 { 1619 ACPI_SUBTABLE_HEADER Header; 1620 UINT16 IntiFlags; 1621 UINT32 Uid; /* ACPI processor UID */ 1622 UINT8 Lint; /* LINTn to which NMI is connected */ 1623 UINT8 Reserved[3]; /* Reserved - must be zero */ 1624 1625 } ACPI_MADT_LOCAL_X2APIC_NMI; 1626 1627 1628 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1629 1630 typedef struct acpi_madt_generic_interrupt 1631 { 1632 ACPI_SUBTABLE_HEADER Header; 1633 UINT16 Reserved; /* Reserved - must be zero */ 1634 UINT32 CpuInterfaceNumber; 1635 UINT32 Uid; 1636 UINT32 Flags; 1637 UINT32 ParkingVersion; 1638 UINT32 PerformanceInterrupt; 1639 UINT64 ParkedAddress; 1640 UINT64 BaseAddress; 1641 UINT64 GicvBaseAddress; 1642 UINT64 GichBaseAddress; 1643 UINT32 VgicInterrupt; 1644 UINT64 GicrBaseAddress; 1645 UINT64 ArmMpidr; 1646 UINT8 EfficiencyClass; 1647 UINT8 Reserved2[1]; 1648 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1649 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1650 1651 } ACPI_MADT_GENERIC_INTERRUPT; 1652 1653 /* Masks for Flags field above */ 1654 1655 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1656 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1657 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1658 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1659 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1660 1661 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1662 1663 typedef struct acpi_madt_generic_distributor 1664 { 1665 ACPI_SUBTABLE_HEADER Header; 1666 UINT16 Reserved; /* Reserved - must be zero */ 1667 UINT32 GicId; 1668 UINT64 BaseAddress; 1669 UINT32 GlobalIrqBase; 1670 UINT8 Version; 1671 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1672 1673 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1674 1675 /* Values for Version field above */ 1676 1677 enum AcpiMadtGicVersion 1678 { 1679 ACPI_MADT_GIC_VERSION_NONE = 0, 1680 ACPI_MADT_GIC_VERSION_V1 = 1, 1681 ACPI_MADT_GIC_VERSION_V2 = 2, 1682 ACPI_MADT_GIC_VERSION_V3 = 3, 1683 ACPI_MADT_GIC_VERSION_V4 = 4, 1684 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1685 }; 1686 1687 1688 /* 13: Generic MSI Frame (ACPI 5.1) */ 1689 1690 typedef struct acpi_madt_generic_msi_frame 1691 { 1692 ACPI_SUBTABLE_HEADER Header; 1693 UINT16 Reserved; /* Reserved - must be zero */ 1694 UINT32 MsiFrameId; 1695 UINT64 BaseAddress; 1696 UINT32 Flags; 1697 UINT16 SpiCount; 1698 UINT16 SpiBase; 1699 1700 } ACPI_MADT_GENERIC_MSI_FRAME; 1701 1702 /* Masks for Flags field above */ 1703 1704 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1705 1706 1707 /* 14: Generic Redistributor (ACPI 5.1) */ 1708 1709 typedef struct acpi_madt_generic_redistributor 1710 { 1711 ACPI_SUBTABLE_HEADER Header; 1712 UINT8 Flags; 1713 UINT8 Reserved; /* reserved - must be zero */ 1714 UINT64 BaseAddress; 1715 UINT32 Length; 1716 1717 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1718 1719 #define ACPI_MADT_GICR_NON_COHERENT (1) 1720 1721 /* 15: Generic Translator (ACPI 6.0) */ 1722 1723 typedef struct acpi_madt_generic_translator 1724 { 1725 ACPI_SUBTABLE_HEADER Header; 1726 UINT8 Flags; 1727 UINT8 Reserved; /* reserved - must be zero */ 1728 UINT32 TranslationId; 1729 UINT64 BaseAddress; 1730 UINT32 Reserved2; 1731 1732 } ACPI_MADT_GENERIC_TRANSLATOR; 1733 1734 #define ACPI_MADT_ITS_NON_COHERENT (1) 1735 1736 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1737 1738 typedef struct acpi_madt_multiproc_wakeup 1739 { 1740 ACPI_SUBTABLE_HEADER Header; 1741 UINT16 MailboxVersion; 1742 UINT32 Reserved; /* reserved - must be zero */ 1743 UINT64 BaseAddress; 1744 1745 } ACPI_MADT_MULTIPROC_WAKEUP; 1746 1747 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1748 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1749 1750 typedef struct acpi_madt_multiproc_wakeup_mailbox 1751 { 1752 UINT16 Command; 1753 UINT16 Reserved; /* reserved - must be zero */ 1754 UINT32 ApicId; 1755 UINT64 WakeupVector; 1756 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1757 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1758 1759 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1760 1761 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1762 1763 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1764 1765 typedef struct acpi_madt_core_pic { 1766 ACPI_SUBTABLE_HEADER Header; 1767 UINT8 Version; 1768 UINT32 ProcessorId; 1769 UINT32 CoreId; 1770 UINT32 Flags; 1771 } ACPI_MADT_CORE_PIC; 1772 1773 /* Values for Version field above */ 1774 1775 enum AcpiMadtCorePicVersion { 1776 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1777 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1778 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1779 }; 1780 1781 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1782 1783 typedef struct acpi_madt_lio_pic { 1784 ACPI_SUBTABLE_HEADER Header; 1785 UINT8 Version; 1786 UINT64 Address; 1787 UINT16 Size; 1788 UINT8 Cascade[2]; 1789 UINT32 CascadeMap[2]; 1790 } ACPI_MADT_LIO_PIC; 1791 1792 /* Values for Version field above */ 1793 1794 enum AcpiMadtLioPicVersion { 1795 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1796 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1797 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1798 }; 1799 1800 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1801 1802 typedef struct acpi_madt_ht_pic { 1803 ACPI_SUBTABLE_HEADER Header; 1804 UINT8 Version; 1805 UINT64 Address; 1806 UINT16 Size; 1807 UINT8 Cascade[8]; 1808 } ACPI_MADT_HT_PIC; 1809 1810 /* Values for Version field above */ 1811 1812 enum AcpiMadtHtPicVersion { 1813 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1814 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1815 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1816 }; 1817 1818 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1819 1820 typedef struct acpi_madt_eio_pic { 1821 ACPI_SUBTABLE_HEADER Header; 1822 UINT8 Version; 1823 UINT8 Cascade; 1824 UINT8 Node; 1825 UINT64 NodeMap; 1826 } ACPI_MADT_EIO_PIC; 1827 1828 /* Values for Version field above */ 1829 1830 enum AcpiMadtEioPicVersion { 1831 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1832 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1833 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1834 }; 1835 1836 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1837 1838 typedef struct acpi_madt_msi_pic { 1839 ACPI_SUBTABLE_HEADER Header; 1840 UINT8 Version; 1841 UINT64 MsgAddress; 1842 UINT32 Start; 1843 UINT32 Count; 1844 } ACPI_MADT_MSI_PIC; 1845 1846 /* Values for Version field above */ 1847 1848 enum AcpiMadtMsiPicVersion { 1849 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1850 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1851 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1852 }; 1853 1854 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1855 1856 typedef struct acpi_madt_bio_pic { 1857 ACPI_SUBTABLE_HEADER Header; 1858 UINT8 Version; 1859 UINT64 Address; 1860 UINT16 Size; 1861 UINT16 Id; 1862 UINT16 GsiBase; 1863 } ACPI_MADT_BIO_PIC; 1864 1865 /* Values for Version field above */ 1866 1867 enum AcpiMadtBioPicVersion { 1868 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1869 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1870 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1871 }; 1872 1873 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1874 1875 typedef struct acpi_madt_lpc_pic { 1876 ACPI_SUBTABLE_HEADER Header; 1877 UINT8 Version; 1878 UINT64 Address; 1879 UINT16 Size; 1880 UINT8 Cascade; 1881 } ACPI_MADT_LPC_PIC; 1882 1883 /* Values for Version field above */ 1884 1885 enum AcpiMadtLpcPicVersion { 1886 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1887 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1888 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1889 }; 1890 1891 /* 24: RISC-V INTC */ 1892 typedef struct acpi_madt_rintc { 1893 ACPI_SUBTABLE_HEADER Header; 1894 UINT8 Version; 1895 UINT8 Reserved; 1896 UINT32 Flags; 1897 UINT64 HartId; 1898 UINT32 Uid; /* ACPI processor UID */ 1899 UINT32 ExtIntcId; /* External INTC Id */ 1900 UINT64 ImsicAddr; /* IMSIC base address */ 1901 UINT32 ImsicSize; /* IMSIC size */ 1902 } ACPI_MADT_RINTC; 1903 1904 /* Values for RISC-V INTC Version field above */ 1905 1906 enum AcpiMadtRintcVersion { 1907 ACPI_MADT_RINTC_VERSION_NONE = 0, 1908 ACPI_MADT_RINTC_VERSION_V1 = 1, 1909 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1910 }; 1911 1912 /* 25: RISC-V IMSIC */ 1913 typedef struct acpi_madt_imsic { 1914 ACPI_SUBTABLE_HEADER Header; 1915 UINT8 Version; 1916 UINT8 Reserved; 1917 UINT32 Flags; 1918 UINT16 NumIds; 1919 UINT16 NumGuestIds; 1920 UINT8 GuestIndexBits; 1921 UINT8 HartIndexBits; 1922 UINT8 GroupIndexBits; 1923 UINT8 GroupIndexShift; 1924 } ACPI_MADT_IMSIC; 1925 1926 /* 26: RISC-V APLIC */ 1927 typedef struct acpi_madt_aplic { 1928 ACPI_SUBTABLE_HEADER Header; 1929 UINT8 Version; 1930 UINT8 Id; 1931 UINT32 Flags; 1932 UINT8 HwId[8]; 1933 UINT16 NumIdcs; 1934 UINT16 NumSources; 1935 UINT32 GsiBase; 1936 UINT64 BaseAddr; 1937 UINT32 Size; 1938 } ACPI_MADT_APLIC; 1939 1940 /* 27: RISC-V PLIC */ 1941 typedef struct acpi_madt_plic { 1942 ACPI_SUBTABLE_HEADER Header; 1943 UINT8 Version; 1944 UINT8 Id; 1945 UINT8 HwId[8]; 1946 UINT16 NumIrqs; 1947 UINT16 MaxPrio; 1948 UINT32 Flags; 1949 UINT32 Size; 1950 UINT64 BaseAddr; 1951 UINT32 GsiBase; 1952 } ACPI_MADT_PLIC; 1953 1954 1955 /* 80: OEM data */ 1956 1957 typedef struct acpi_madt_oem_data 1958 { 1959 ACPI_FLEX_ARRAY(UINT8, OemData); 1960 } ACPI_MADT_OEM_DATA; 1961 1962 1963 /* 1964 * Common flags fields for MADT subtables 1965 */ 1966 1967 /* MADT Local APIC flags */ 1968 1969 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1970 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1971 1972 /* MADT MPS INTI flags (IntiFlags) */ 1973 1974 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1975 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1976 1977 /* Values for MPS INTI flags */ 1978 1979 #define ACPI_MADT_POLARITY_CONFORMS 0 1980 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1981 #define ACPI_MADT_POLARITY_RESERVED 2 1982 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1983 1984 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1985 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1986 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1987 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1988 1989 1990 /******************************************************************************* 1991 * 1992 * MCFG - PCI Memory Mapped Configuration table and subtable 1993 * Version 1 1994 * 1995 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1996 * 1997 ******************************************************************************/ 1998 1999 typedef struct acpi_table_mcfg 2000 { 2001 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2002 UINT8 Reserved[8]; 2003 2004 } ACPI_TABLE_MCFG; 2005 2006 2007 /* Subtable */ 2008 2009 typedef struct acpi_mcfg_allocation 2010 { 2011 UINT64 Address; /* Base address, processor-relative */ 2012 UINT16 PciSegment; /* PCI segment group number */ 2013 UINT8 StartBusNumber; /* Starting PCI Bus number */ 2014 UINT8 EndBusNumber; /* Final PCI Bus number */ 2015 UINT32 Reserved; 2016 2017 } ACPI_MCFG_ALLOCATION; 2018 2019 2020 /******************************************************************************* 2021 * 2022 * MCHI - Management Controller Host Interface Table 2023 * Version 1 2024 * 2025 * Conforms to "Management Component Transport Protocol (MCTP) Host 2026 * Interface Specification", Revision 1.0.0a, October 13, 2009 2027 * 2028 ******************************************************************************/ 2029 2030 typedef struct acpi_table_mchi 2031 { 2032 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2033 UINT8 InterfaceType; 2034 UINT8 Protocol; 2035 UINT64 ProtocolData; 2036 UINT8 InterruptType; 2037 UINT8 Gpe; 2038 UINT8 PciDeviceFlag; 2039 UINT32 GlobalInterrupt; 2040 ACPI_GENERIC_ADDRESS ControlRegister; 2041 UINT8 PciSegment; 2042 UINT8 PciBus; 2043 UINT8 PciDevice; 2044 UINT8 PciFunction; 2045 2046 } ACPI_TABLE_MCHI; 2047 2048 /******************************************************************************* 2049 * 2050 * MPAM - Memory System Resource Partitioning and Monitoring 2051 * 2052 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 2053 * Document number: ARM DEN 0065, December, 2022. 2054 * 2055 ******************************************************************************/ 2056 2057 /* MPAM RIS locator types. Table 11, Location types */ 2058 enum AcpiMpamLocatorType { 2059 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 2060 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 2061 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 2062 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 2063 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 2064 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 2065 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 2066 }; 2067 2068 /* MPAM Functional dependency descriptor. Table 10 */ 2069 typedef struct acpi_mpam_func_deps 2070 { 2071 UINT32 Producer; 2072 UINT32 Reserved; 2073 } ACPI_MPAM_FUNC_DEPS; 2074 2075 /* MPAM Processor cache locator descriptor. Table 13 */ 2076 typedef struct acpi_mpam_resource_cache_locator 2077 { 2078 UINT64 CacheReference; 2079 UINT32 Reserved; 2080 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 2081 2082 /* MPAM Memory locator descriptor. Table 14 */ 2083 typedef struct acpi_mpam_resource_memory_locator 2084 { 2085 UINT64 ProximityDomain; 2086 UINT32 Reserved; 2087 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 2088 2089 /* MPAM SMMU locator descriptor. Table 15 */ 2090 typedef struct acpi_mpam_resource_smmu_locator 2091 { 2092 UINT64 SmmuInterface; 2093 UINT32 Reserved; 2094 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 2095 2096 /* MPAM Memory-side cache locator descriptor. Table 16 */ 2097 typedef struct acpi_mpam_resource_memcache_locator 2098 { 2099 UINT8 Reserved[7]; 2100 UINT8 Level; 2101 UINT32 Reference; 2102 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 2103 2104 /* MPAM ACPI device locator descriptor. Table 17 */ 2105 typedef struct acpi_mpam_resource_acpi_locator 2106 { 2107 UINT64 AcpiHwId; 2108 UINT32 AcpiUniqueId; 2109 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 2110 2111 /* MPAM Interconnect locator descriptor. Table 18 */ 2112 typedef struct acpi_mpam_resource_interconnect_locator 2113 { 2114 UINT64 InterConnectDescTblOff; 2115 UINT32 Reserved; 2116 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 2117 2118 /* MPAM Locator structure. Table 12 */ 2119 typedef struct acpi_mpam_resource_generic_locator 2120 { 2121 UINT64 Descriptor1; 2122 UINT32 Descriptor2; 2123 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 2124 2125 typedef union acpi_mpam_resource_locator 2126 { 2127 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 2128 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 2129 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 2130 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 2131 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 2132 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 2133 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 2134 } ACPI_MPAM_RESOURCE_LOCATOR; 2135 2136 /* Memory System Component Resource Node Structure Table 9 */ 2137 typedef struct acpi_mpam_resource_node 2138 { 2139 UINT32 Identifier; 2140 UINT8 RISIndex; 2141 UINT16 Reserved1; 2142 UINT8 LocatorType; 2143 ACPI_MPAM_RESOURCE_LOCATOR Locator; 2144 UINT32 NumFunctionalDeps; 2145 } ACPI_MPAM_RESOURCE_NODE; 2146 2147 /* Memory System Component (MSC) Node Structure. Table 4 */ 2148 typedef struct acpi_mpam_msc_node 2149 { 2150 UINT16 Length; 2151 UINT8 InterfaceType; 2152 UINT8 Reserved; 2153 UINT32 Identifier; 2154 UINT64 BaseAddress; 2155 UINT32 MMIOSize; 2156 UINT32 OverflowInterrupt; 2157 UINT32 OverflowInterruptFlags; 2158 UINT32 Reserved1; 2159 UINT32 OverflowInterruptAffinity; 2160 UINT32 ErrorInterrupt; 2161 UINT32 ErrorInterruptFlags; 2162 UINT32 Reserved2; 2163 UINT32 ErrorInterruptAffinity; 2164 UINT32 MaxNrdyUsec; 2165 UINT64 HardwareIdLinkedDevice; 2166 UINT32 InstanceIdLinkedDevice; 2167 UINT32 NumResourceNodes; 2168 } ACPI_MPAM_MSC_NODE; 2169 2170 typedef struct acpi_table_mpam 2171 { 2172 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2173 } ACPI_TABLE_MPAM; 2174 2175 /******************************************************************************* 2176 * 2177 * MPST - Memory Power State Table (ACPI 5.0) 2178 * Version 1 2179 * 2180 ******************************************************************************/ 2181 2182 #define ACPI_MPST_CHANNEL_INFO \ 2183 UINT8 ChannelId; \ 2184 UINT8 Reserved1[3]; \ 2185 UINT16 PowerNodeCount; \ 2186 UINT16 Reserved2; 2187 2188 /* Main table */ 2189 2190 typedef struct acpi_table_mpst 2191 { 2192 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2193 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2194 2195 } ACPI_TABLE_MPST; 2196 2197 2198 /* Memory Platform Communication Channel Info */ 2199 2200 typedef struct acpi_mpst_channel 2201 { 2202 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2203 2204 } ACPI_MPST_CHANNEL; 2205 2206 2207 /* Memory Power Node Structure */ 2208 2209 typedef struct acpi_mpst_power_node 2210 { 2211 UINT8 Flags; 2212 UINT8 Reserved1; 2213 UINT16 NodeId; 2214 UINT32 Length; 2215 UINT64 RangeAddress; 2216 UINT64 RangeLength; 2217 UINT32 NumPowerStates; 2218 UINT32 NumPhysicalComponents; 2219 2220 } ACPI_MPST_POWER_NODE; 2221 2222 /* Values for Flags field above */ 2223 2224 #define ACPI_MPST_ENABLED 1 2225 #define ACPI_MPST_POWER_MANAGED 2 2226 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 2227 2228 2229 /* Memory Power State Structure (follows POWER_NODE above) */ 2230 2231 typedef struct acpi_mpst_power_state 2232 { 2233 UINT8 PowerState; 2234 UINT8 InfoIndex; 2235 2236 } ACPI_MPST_POWER_STATE; 2237 2238 2239 /* Physical Component ID Structure (follows POWER_STATE above) */ 2240 2241 typedef struct acpi_mpst_component 2242 { 2243 UINT16 ComponentId; 2244 2245 } ACPI_MPST_COMPONENT; 2246 2247 2248 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 2249 2250 typedef struct acpi_mpst_data_hdr 2251 { 2252 UINT16 CharacteristicsCount; 2253 UINT16 Reserved; 2254 2255 } ACPI_MPST_DATA_HDR; 2256 2257 typedef struct acpi_mpst_power_data 2258 { 2259 UINT8 StructureId; 2260 UINT8 Flags; 2261 UINT16 Reserved1; 2262 UINT32 AveragePower; 2263 UINT32 PowerSaving; 2264 UINT64 ExitLatency; 2265 UINT64 Reserved2; 2266 2267 } ACPI_MPST_POWER_DATA; 2268 2269 /* Values for Flags field above */ 2270 2271 #define ACPI_MPST_PRESERVE 1 2272 #define ACPI_MPST_AUTOENTRY 2 2273 #define ACPI_MPST_AUTOEXIT 4 2274 2275 2276 /* Shared Memory Region (not part of an ACPI table) */ 2277 2278 typedef struct acpi_mpst_shared 2279 { 2280 UINT32 Signature; 2281 UINT16 PccCommand; 2282 UINT16 PccStatus; 2283 UINT32 CommandRegister; 2284 UINT32 StatusRegister; 2285 UINT32 PowerStateId; 2286 UINT32 PowerNodeId; 2287 UINT64 EnergyConsumed; 2288 UINT64 AveragePower; 2289 2290 } ACPI_MPST_SHARED; 2291 2292 2293 /******************************************************************************* 2294 * 2295 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 2296 * Version 1 2297 * 2298 ******************************************************************************/ 2299 2300 typedef struct acpi_table_msct 2301 { 2302 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2303 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 2304 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 2305 UINT32 MaxClockDomains; /* Max number of clock domains */ 2306 UINT64 MaxAddress; /* Max physical address in system */ 2307 2308 } ACPI_TABLE_MSCT; 2309 2310 2311 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 2312 2313 typedef struct acpi_msct_proximity 2314 { 2315 UINT8 Revision; 2316 UINT8 Length; 2317 UINT32 RangeStart; /* Start of domain range */ 2318 UINT32 RangeEnd; /* End of domain range */ 2319 UINT32 ProcessorCapacity; 2320 UINT64 MemoryCapacity; /* In bytes */ 2321 2322 } ACPI_MSCT_PROXIMITY; 2323 2324 2325 /******************************************************************************* 2326 * 2327 * MRRM - Memory Range and Region Mapping (MRRM) table 2328 * Conforms to "Intel Resource Director Technology Architecture Specification" 2329 * Version 1.1, January 2025 2330 * 2331 ******************************************************************************/ 2332 2333 typedef struct acpi_table_mrrm 2334 { 2335 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2336 UINT8 MaxMemRegion; /* Max Memory Regions supported */ 2337 UINT8 Flags; /* Region assignment type */ 2338 UINT8 Reserved[26]; 2339 UINT8 Memory_Range_Entry[]; 2340 2341 } ACPI_TABLE_MRRM; 2342 2343 /* Flags */ 2344 #define ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS (1<<0) 2345 2346 /******************************************************************************* 2347 * 2348 * Memory Range entry - Memory Range entry in MRRM table 2349 * 2350 ******************************************************************************/ 2351 2352 typedef struct acpi_mrrm_mem_range_entry 2353 { 2354 ACPI_SUBTBL_HDR_16 Header; 2355 UINT32 Reserved0; /* Reserved */ 2356 UINT64 AddrBase; /* Base addr of the mem range */ 2357 UINT64 AddrLen; /* Length of the mem range */ 2358 UINT16 RegionIdFlags; /* Valid local or remote Region-ID */ 2359 UINT8 LocalRegionId; /* Platform-assigned static local Region-ID */ 2360 UINT8 RemoteRegionId; /* Platform-assigned static remote Region-ID */ 2361 UINT32 Reserved1; /* Reserved */ 2362 /* Region-ID Programming Registers[] */ 2363 2364 } ACPI_MRRM_MEM_RANGE_ENTRY; 2365 2366 /* Values for RegionIdFlags above */ 2367 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL (1<<0) 2368 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE (1<<1) 2369 2370 2371 /******************************************************************************* 2372 * 2373 * MSDM - Microsoft Data Management table 2374 * 2375 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 2376 * November 29, 2011. Copyright 2011 Microsoft 2377 * 2378 ******************************************************************************/ 2379 2380 /* Basic MSDM table is only the common ACPI header */ 2381 2382 typedef struct acpi_table_msdm 2383 { 2384 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2385 2386 } ACPI_TABLE_MSDM; 2387 2388 2389 /******************************************************************************* 2390 * 2391 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2392 * Version 1 2393 * 2394 ******************************************************************************/ 2395 2396 typedef struct acpi_table_nfit 2397 { 2398 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2399 UINT32 Reserved; /* Reserved, must be zero */ 2400 2401 } ACPI_TABLE_NFIT; 2402 2403 /* Subtable header for NFIT */ 2404 2405 typedef struct acpi_nfit_header 2406 { 2407 UINT16 Type; 2408 UINT16 Length; 2409 2410 } ACPI_NFIT_HEADER; 2411 2412 2413 /* Values for subtable type in ACPI_NFIT_HEADER */ 2414 2415 enum AcpiNfitType 2416 { 2417 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2418 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2419 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2420 ACPI_NFIT_TYPE_SMBIOS = 3, 2421 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2422 ACPI_NFIT_TYPE_DATA_REGION = 5, 2423 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2424 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2425 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2426 }; 2427 2428 /* 2429 * NFIT Subtables 2430 */ 2431 2432 /* 0: System Physical Address Range Structure */ 2433 2434 typedef struct acpi_nfit_system_address 2435 { 2436 ACPI_NFIT_HEADER Header; 2437 UINT16 RangeIndex; 2438 UINT16 Flags; 2439 UINT32 Reserved; /* Reserved, must be zero */ 2440 UINT32 ProximityDomain; 2441 UINT8 RangeGuid[16]; 2442 UINT64 Address; 2443 UINT64 Length; 2444 UINT64 MemoryMapping; 2445 UINT64 LocationCookie; /* ACPI 6.4 */ 2446 2447 } ACPI_NFIT_SYSTEM_ADDRESS; 2448 2449 /* Flags */ 2450 2451 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2452 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2453 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2454 2455 /* Range Type GUIDs appear in the include/acuuid.h file */ 2456 2457 2458 /* 1: Memory Device to System Address Range Map Structure */ 2459 2460 typedef struct acpi_nfit_memory_map 2461 { 2462 ACPI_NFIT_HEADER Header; 2463 UINT32 DeviceHandle; 2464 UINT16 PhysicalId; 2465 UINT16 RegionId; 2466 UINT16 RangeIndex; 2467 UINT16 RegionIndex; 2468 UINT64 RegionSize; 2469 UINT64 RegionOffset; 2470 UINT64 Address; 2471 UINT16 InterleaveIndex; 2472 UINT16 InterleaveWays; 2473 UINT16 Flags; 2474 UINT16 Reserved; /* Reserved, must be zero */ 2475 2476 } ACPI_NFIT_MEMORY_MAP; 2477 2478 /* Flags */ 2479 2480 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2481 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2482 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2483 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2484 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2485 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2486 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2487 2488 2489 /* 2: Interleave Structure */ 2490 2491 typedef struct acpi_nfit_interleave 2492 { 2493 ACPI_NFIT_HEADER Header; 2494 UINT16 InterleaveIndex; 2495 UINT16 Reserved; /* Reserved, must be zero */ 2496 UINT32 LineCount; 2497 UINT32 LineSize; 2498 UINT32 LineOffset[]; /* Variable length */ 2499 2500 } ACPI_NFIT_INTERLEAVE; 2501 2502 2503 /* 3: SMBIOS Management Information Structure */ 2504 2505 typedef struct acpi_nfit_smbios 2506 { 2507 ACPI_NFIT_HEADER Header; 2508 UINT32 Reserved; /* Reserved, must be zero */ 2509 UINT8 Data[]; /* Variable length */ 2510 2511 } ACPI_NFIT_SMBIOS; 2512 2513 2514 /* 4: NVDIMM Control Region Structure */ 2515 2516 typedef struct acpi_nfit_control_region 2517 { 2518 ACPI_NFIT_HEADER Header; 2519 UINT16 RegionIndex; 2520 UINT16 VendorId; 2521 UINT16 DeviceId; 2522 UINT16 RevisionId; 2523 UINT16 SubsystemVendorId; 2524 UINT16 SubsystemDeviceId; 2525 UINT16 SubsystemRevisionId; 2526 UINT8 ValidFields; 2527 UINT8 ManufacturingLocation; 2528 UINT16 ManufacturingDate; 2529 UINT8 Reserved[2]; /* Reserved, must be zero */ 2530 UINT32 SerialNumber; 2531 UINT16 Code; 2532 UINT16 Windows; 2533 UINT64 WindowSize; 2534 UINT64 CommandOffset; 2535 UINT64 CommandSize; 2536 UINT64 StatusOffset; 2537 UINT64 StatusSize; 2538 UINT16 Flags; 2539 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2540 2541 } ACPI_NFIT_CONTROL_REGION; 2542 2543 /* Flags */ 2544 2545 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2546 2547 /* ValidFields bits */ 2548 2549 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2550 2551 2552 /* 5: NVDIMM Block Data Window Region Structure */ 2553 2554 typedef struct acpi_nfit_data_region 2555 { 2556 ACPI_NFIT_HEADER Header; 2557 UINT16 RegionIndex; 2558 UINT16 Windows; 2559 UINT64 Offset; 2560 UINT64 Size; 2561 UINT64 Capacity; 2562 UINT64 StartAddress; 2563 2564 } ACPI_NFIT_DATA_REGION; 2565 2566 2567 /* 6: Flush Hint Address Structure */ 2568 2569 typedef struct acpi_nfit_flush_address 2570 { 2571 ACPI_NFIT_HEADER Header; 2572 UINT32 DeviceHandle; 2573 UINT16 HintCount; 2574 UINT8 Reserved[6]; /* Reserved, must be zero */ 2575 UINT64 HintAddress[]; /* Variable length */ 2576 2577 } ACPI_NFIT_FLUSH_ADDRESS; 2578 2579 2580 /* 7: Platform Capabilities Structure */ 2581 2582 typedef struct acpi_nfit_capabilities 2583 { 2584 ACPI_NFIT_HEADER Header; 2585 UINT8 HighestCapability; 2586 UINT8 Reserved[3]; /* Reserved, must be zero */ 2587 UINT32 Capabilities; 2588 UINT32 Reserved2; 2589 2590 } ACPI_NFIT_CAPABILITIES; 2591 2592 /* Capabilities Flags */ 2593 2594 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2595 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2596 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2597 2598 2599 /* 2600 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2601 */ 2602 typedef struct nfit_device_handle 2603 { 2604 UINT32 Handle; 2605 2606 } NFIT_DEVICE_HANDLE; 2607 2608 /* Device handle construction and extraction macros */ 2609 2610 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2611 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2612 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2613 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2614 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2615 2616 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2617 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2618 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2619 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2620 #define ACPI_NFIT_NODE_ID_OFFSET 16 2621 2622 /* Macro to construct a NFIT/NVDIMM device handle */ 2623 2624 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2625 ((dimm) | \ 2626 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2627 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2628 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2629 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2630 2631 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2632 2633 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2634 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2635 2636 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2637 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2638 2639 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2640 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2641 2642 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2643 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2644 2645 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2646 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2647 2648 2649 /******************************************************************************* 2650 * 2651 * NHLT - Non HDAudio Link Table 2652 * Version 1 2653 * 2654 ******************************************************************************/ 2655 2656 typedef struct acpi_table_nhlt 2657 { 2658 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2659 UINT8 EndpointsCount; 2660 /* 2661 * ACPI_NHLT_ENDPOINT Endpoints[]; 2662 * ACPI_NHLT_CONFIG OEDConfig; 2663 */ 2664 2665 } ACPI_TABLE_NHLT; 2666 2667 typedef struct acpi_nhlt_endpoint 2668 { 2669 UINT32 Length; 2670 UINT8 LinkType; 2671 UINT8 InstanceId; 2672 UINT16 VendorId; 2673 UINT16 DeviceId; 2674 UINT16 RevisionId; 2675 UINT32 SubsystemId; 2676 UINT8 DeviceType; 2677 UINT8 Direction; 2678 UINT8 VirtualBusId; 2679 /* 2680 * ACPI_NHLT_CONFIG DeviceConfig; 2681 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig; 2682 * ACPI_NHLT_DEVICES_INFO DevicesInfo; 2683 */ 2684 2685 } ACPI_NHLT_ENDPOINT; 2686 2687 /* Values for LinkType field above */ 2688 2689 #define ACPI_NHLT_LINKTYPE_HDA 0 2690 #define ACPI_NHLT_LINKTYPE_DSP 1 2691 #define ACPI_NHLT_LINKTYPE_PDM 2 2692 #define ACPI_NHLT_LINKTYPE_SSP 3 2693 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2694 #define ACPI_NHLT_LINKTYPE_SDW 5 2695 #define ACPI_NHLT_LINKTYPE_UAOL 6 2696 2697 /* Values for DeviceId field above */ 2698 2699 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2700 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2701 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2702 2703 /* Values for DeviceType field above */ 2704 2705 /* Device types unique to endpoint of LinkType=PDM */ 2706 #define ACPI_NHLT_DEVICETYPE_PDM 0 2707 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2708 /* Device types unique to endpoint of LinkType=SSP */ 2709 #define ACPI_NHLT_DEVICETYPE_BT 0 2710 #define ACPI_NHLT_DEVICETYPE_FM 1 2711 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2712 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2713 2714 /* Values for Direction field above */ 2715 2716 #define ACPI_NHLT_DIR_RENDER 0 2717 #define ACPI_NHLT_DIR_CAPTURE 1 2718 2719 typedef struct acpi_nhlt_config 2720 { 2721 UINT32 CapabilitiesSize; 2722 UINT8 Capabilities[1]; 2723 2724 } ACPI_NHLT_CONFIG; 2725 2726 typedef struct acpi_nhlt_gendevice_config 2727 { 2728 UINT8 VirtualSlot; 2729 UINT8 ConfigType; 2730 2731 } ACPI_NHLT_GENDEVICE_CONFIG; 2732 2733 /* Values for ConfigType field above */ 2734 2735 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2736 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2737 2738 typedef struct acpi_nhlt_micdevice_config 2739 { 2740 UINT8 VirtualSlot; 2741 UINT8 ConfigType; 2742 UINT8 ArrayType; 2743 2744 } ACPI_NHLT_MICDEVICE_CONFIG; 2745 2746 /* Values for ArrayType field above */ 2747 2748 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2749 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2750 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2751 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2752 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2753 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2754 2755 typedef struct acpi_nhlt_vendor_mic_config 2756 { 2757 UINT8 Type; 2758 UINT8 Panel; 2759 UINT16 SpeakerPositionDistance; /* mm */ 2760 UINT16 HorizontalOffset; /* mm */ 2761 UINT16 VerticalOffset; /* mm */ 2762 UINT8 FrequencyLowBand; /* 5*Hz */ 2763 UINT8 FrequencyHighBand; /* 500*Hz */ 2764 UINT16 DirectionAngle; /* -180 - +180 */ 2765 UINT16 ElevationAngle; /* -180 - +180 */ 2766 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */ 2767 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */ 2768 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */ 2769 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */ 2770 2771 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2772 2773 /* Values for Type field above */ 2774 2775 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2776 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2777 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2778 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2779 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2780 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2781 #define ACPI_NHLT_MICTYPE_RESERVED 6 2782 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2783 2784 /* Values for Panel field above */ 2785 2786 #define ACPI_NHLT_MICLOCATION_TOP 0 2787 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2788 #define ACPI_NHLT_MICLOCATION_LEFT 2 2789 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2790 #define ACPI_NHLT_MICLOCATION_FRONT 4 2791 #define ACPI_NHLT_MICLOCATION_REAR 5 2792 2793 typedef struct acpi_nhlt_vendor_micdevice_config 2794 { 2795 UINT8 VirtualSlot; 2796 UINT8 ConfigType; 2797 UINT8 ArrayType; 2798 UINT8 MicsCount; 2799 ACPI_NHLT_VENDOR_MIC_CONFIG Mics[]; 2800 2801 } ACPI_NHLT_VENDOR_MICDEVICE_CONFIG; 2802 2803 typedef union acpi_nhlt_device_config 2804 { 2805 UINT8 VirtualSlot; 2806 ACPI_NHLT_GENDEVICE_CONFIG Gen; 2807 ACPI_NHLT_MICDEVICE_CONFIG Mic; 2808 ACPI_NHLT_VENDOR_MICDEVICE_CONFIG VendorMic; 2809 2810 } ACPI_NHLT_DEVICE_CONFIG; 2811 2812 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2813 typedef struct acpi_nhlt_wave_formatext 2814 { 2815 UINT16 FormatTag; 2816 UINT16 ChannelCount; 2817 UINT32 SamplesPerSec; 2818 UINT32 AvgBytesPerSec; 2819 UINT16 BlockAlign; 2820 UINT16 BitsPerSample; 2821 UINT16 ExtraFormatSize; 2822 UINT16 ValidBitsPerSample; 2823 UINT32 ChannelMask; 2824 UINT8 Subformat[16]; 2825 2826 } ACPI_NHLT_WAVE_FORMATEXT; 2827 2828 typedef struct acpi_nhlt_format_config 2829 { 2830 ACPI_NHLT_WAVE_FORMATEXT Format; 2831 ACPI_NHLT_CONFIG Config; 2832 2833 } ACPI_NHLT_FORMAT_CONFIG; 2834 2835 typedef struct acpi_nhlt_formats_config 2836 { 2837 UINT8 FormatsCount; 2838 ACPI_NHLT_FORMAT_CONFIG Formats[]; 2839 2840 } ACPI_NHLT_FORMATS_CONFIG; 2841 2842 typedef struct acpi_nhlt_device_info 2843 { 2844 UINT8 Id[16]; 2845 UINT8 InstanceId; 2846 UINT8 PortId; 2847 2848 } ACPI_NHLT_DEVICE_INFO; 2849 2850 typedef struct acpi_nhlt_devices_info 2851 { 2852 UINT8 DevicesCount; 2853 ACPI_NHLT_DEVICE_INFO Devices[]; 2854 2855 } ACPI_NHLT_DEVICES_INFO; 2856 2857 2858 /******************************************************************************* 2859 * 2860 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2861 * Version 2 (ACPI 6.2) 2862 * 2863 ******************************************************************************/ 2864 2865 typedef struct acpi_table_pcct 2866 { 2867 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2868 UINT32 Flags; 2869 UINT64 Reserved; 2870 2871 } ACPI_TABLE_PCCT; 2872 2873 /* Values for Flags field above */ 2874 2875 #define ACPI_PCCT_DOORBELL 1 2876 2877 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2878 2879 enum AcpiPcctType 2880 { 2881 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2882 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2883 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2884 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2885 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2886 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2887 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2888 }; 2889 2890 /* 2891 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2892 */ 2893 2894 /* 0: Generic Communications Subspace */ 2895 2896 typedef struct acpi_pcct_subspace 2897 { 2898 ACPI_SUBTABLE_HEADER Header; 2899 UINT8 Reserved[6]; 2900 UINT64 BaseAddress; 2901 UINT64 Length; 2902 ACPI_GENERIC_ADDRESS DoorbellRegister; 2903 UINT64 PreserveMask; 2904 UINT64 WriteMask; 2905 UINT32 Latency; 2906 UINT32 MaxAccessRate; 2907 UINT16 MinTurnaroundTime; 2908 2909 } ACPI_PCCT_SUBSPACE; 2910 2911 2912 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2913 2914 typedef struct acpi_pcct_hw_reduced 2915 { 2916 ACPI_SUBTABLE_HEADER Header; 2917 UINT32 PlatformInterrupt; 2918 UINT8 Flags; 2919 UINT8 Reserved; 2920 UINT64 BaseAddress; 2921 UINT64 Length; 2922 ACPI_GENERIC_ADDRESS DoorbellRegister; 2923 UINT64 PreserveMask; 2924 UINT64 WriteMask; 2925 UINT32 Latency; 2926 UINT32 MaxAccessRate; 2927 UINT16 MinTurnaroundTime; 2928 2929 } ACPI_PCCT_HW_REDUCED; 2930 2931 2932 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2933 2934 typedef struct acpi_pcct_hw_reduced_type2 2935 { 2936 ACPI_SUBTABLE_HEADER Header; 2937 UINT32 PlatformInterrupt; 2938 UINT8 Flags; 2939 UINT8 Reserved; 2940 UINT64 BaseAddress; 2941 UINT64 Length; 2942 ACPI_GENERIC_ADDRESS DoorbellRegister; 2943 UINT64 PreserveMask; 2944 UINT64 WriteMask; 2945 UINT32 Latency; 2946 UINT32 MaxAccessRate; 2947 UINT16 MinTurnaroundTime; 2948 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2949 UINT64 AckPreserveMask; 2950 UINT64 AckWriteMask; 2951 2952 } ACPI_PCCT_HW_REDUCED_TYPE2; 2953 2954 2955 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2956 2957 typedef struct acpi_pcct_ext_pcc_master 2958 { 2959 ACPI_SUBTABLE_HEADER Header; 2960 UINT32 PlatformInterrupt; 2961 UINT8 Flags; 2962 UINT8 Reserved1; 2963 UINT64 BaseAddress; 2964 UINT32 Length; 2965 ACPI_GENERIC_ADDRESS DoorbellRegister; 2966 UINT64 PreserveMask; 2967 UINT64 WriteMask; 2968 UINT32 Latency; 2969 UINT32 MaxAccessRate; 2970 UINT32 MinTurnaroundTime; 2971 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2972 UINT64 AckPreserveMask; 2973 UINT64 AckSetMask; 2974 UINT64 Reserved2; 2975 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2976 UINT64 CmdCompleteMask; 2977 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2978 UINT64 CmdUpdatePreserveMask; 2979 UINT64 CmdUpdateSetMask; 2980 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2981 UINT64 ErrorStatusMask; 2982 2983 } ACPI_PCCT_EXT_PCC_MASTER; 2984 2985 2986 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2987 2988 typedef struct acpi_pcct_ext_pcc_slave 2989 { 2990 ACPI_SUBTABLE_HEADER Header; 2991 UINT32 PlatformInterrupt; 2992 UINT8 Flags; 2993 UINT8 Reserved1; 2994 UINT64 BaseAddress; 2995 UINT32 Length; 2996 ACPI_GENERIC_ADDRESS DoorbellRegister; 2997 UINT64 PreserveMask; 2998 UINT64 WriteMask; 2999 UINT32 Latency; 3000 UINT32 MaxAccessRate; 3001 UINT32 MinTurnaroundTime; 3002 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3003 UINT64 AckPreserveMask; 3004 UINT64 AckSetMask; 3005 UINT64 Reserved2; 3006 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3007 UINT64 CmdCompleteMask; 3008 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 3009 UINT64 CmdUpdatePreserveMask; 3010 UINT64 CmdUpdateSetMask; 3011 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3012 UINT64 ErrorStatusMask; 3013 3014 } ACPI_PCCT_EXT_PCC_SLAVE; 3015 3016 /* 5: HW Registers based Communications Subspace */ 3017 3018 typedef struct acpi_pcct_hw_reg 3019 { 3020 ACPI_SUBTABLE_HEADER Header; 3021 UINT16 Version; 3022 UINT64 BaseAddress; 3023 UINT64 Length; 3024 ACPI_GENERIC_ADDRESS DoorbellRegister; 3025 UINT64 DoorbellPreserve; 3026 UINT64 DoorbellWrite; 3027 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3028 UINT64 CmdCompleteMask; 3029 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3030 UINT64 ErrorStatusMask; 3031 UINT32 NominalLatency; 3032 UINT32 MinTurnaroundTime; 3033 3034 } ACPI_PCCT_HW_REG; 3035 3036 3037 /* Values for doorbell flags above */ 3038 3039 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 3040 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 3041 3042 3043 /* 3044 * PCC memory structures (not part of the ACPI table) 3045 */ 3046 3047 /* Shared Memory Region */ 3048 3049 typedef struct acpi_pcct_shared_memory 3050 { 3051 UINT32 Signature; 3052 UINT16 Command; 3053 UINT16 Status; 3054 3055 } ACPI_PCCT_SHARED_MEMORY; 3056 3057 3058 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 3059 3060 typedef struct acpi_pcct_ext_pcc_shared_memory 3061 { 3062 UINT32 Signature; 3063 UINT32 Flags; 3064 UINT32 Length; 3065 UINT32 Command; 3066 3067 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 3068 3069 3070 /******************************************************************************* 3071 * 3072 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 3073 * Version 0 3074 * 3075 ******************************************************************************/ 3076 3077 typedef struct acpi_table_pdtt 3078 { 3079 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3080 UINT8 TriggerCount; 3081 UINT8 Reserved[3]; 3082 UINT32 ArrayOffset; 3083 3084 } ACPI_TABLE_PDTT; 3085 3086 3087 /* 3088 * PDTT Communication Channel Identifier Structure. 3089 * The number of these structures is defined by TriggerCount above, 3090 * starting at ArrayOffset. 3091 */ 3092 typedef struct acpi_pdtt_channel 3093 { 3094 UINT8 SubchannelId; 3095 UINT8 Flags; 3096 3097 } ACPI_PDTT_CHANNEL; 3098 3099 /* Flags for above */ 3100 3101 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 3102 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 3103 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 3104 3105 3106 /******************************************************************************* 3107 * 3108 * PHAT - Platform Health Assessment Table (ACPI 6.4) 3109 * Version 1 3110 * 3111 ******************************************************************************/ 3112 3113 typedef struct acpi_table_phat 3114 { 3115 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3116 3117 } ACPI_TABLE_PHAT; 3118 3119 /* Common header for PHAT subtables that follow main table */ 3120 3121 typedef struct acpi_phat_header 3122 { 3123 UINT16 Type; 3124 UINT16 Length; 3125 UINT8 Revision; 3126 3127 } ACPI_PHAT_HEADER; 3128 3129 3130 /* Values for Type field above */ 3131 3132 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 3133 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 3134 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 3135 3136 /* 3137 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 3138 */ 3139 3140 /* 0: Firmware Version Data Record */ 3141 3142 typedef struct acpi_phat_version_data 3143 { 3144 ACPI_PHAT_HEADER Header; 3145 UINT8 Reserved[3]; 3146 UINT32 ElementCount; 3147 3148 } ACPI_PHAT_VERSION_DATA; 3149 3150 typedef struct acpi_phat_version_element 3151 { 3152 UINT8 Guid[16]; 3153 UINT64 VersionValue; 3154 UINT32 ProducerId; 3155 3156 } ACPI_PHAT_VERSION_ELEMENT; 3157 3158 3159 /* 1: Firmware Health Data Record */ 3160 3161 typedef struct acpi_phat_health_data 3162 { 3163 ACPI_PHAT_HEADER Header; 3164 UINT8 Reserved[2]; 3165 UINT8 Health; 3166 UINT8 DeviceGuid[16]; 3167 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 3168 3169 } ACPI_PHAT_HEALTH_DATA; 3170 3171 /* Values for Health field above */ 3172 3173 #define ACPI_PHAT_ERRORS_FOUND 0 3174 #define ACPI_PHAT_NO_ERRORS 1 3175 #define ACPI_PHAT_UNKNOWN_ERRORS 2 3176 #define ACPI_PHAT_ADVISORY 3 3177 3178 3179 /******************************************************************************* 3180 * 3181 * PMTT - Platform Memory Topology Table (ACPI 5.0) 3182 * Version 1 3183 * 3184 ******************************************************************************/ 3185 3186 typedef struct acpi_table_pmtt 3187 { 3188 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3189 UINT32 MemoryDeviceCount; 3190 /* 3191 * Immediately followed by: 3192 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3193 */ 3194 3195 } ACPI_TABLE_PMTT; 3196 3197 3198 /* Common header for PMTT subtables that follow main table */ 3199 3200 typedef struct acpi_pmtt_header 3201 { 3202 UINT8 Type; 3203 UINT8 Reserved1; 3204 UINT16 Length; 3205 UINT16 Flags; 3206 UINT16 Reserved2; 3207 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 3208 /* 3209 * Immediately followed by: 3210 * UINT8 TypeSpecificData[] 3211 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3212 */ 3213 3214 } ACPI_PMTT_HEADER; 3215 3216 /* Values for Type field above */ 3217 3218 #define ACPI_PMTT_TYPE_SOCKET 0 3219 #define ACPI_PMTT_TYPE_CONTROLLER 1 3220 #define ACPI_PMTT_TYPE_DIMM 2 3221 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 3222 #define ACPI_PMTT_TYPE_VENDOR 0xFF 3223 3224 /* Values for Flags field above */ 3225 3226 #define ACPI_PMTT_TOP_LEVEL 0x0001 3227 #define ACPI_PMTT_PHYSICAL 0x0002 3228 #define ACPI_PMTT_MEMORY_TYPE 0x000C 3229 3230 3231 /* 3232 * PMTT subtables, correspond to Type in acpi_pmtt_header 3233 */ 3234 3235 3236 /* 0: Socket Structure */ 3237 3238 typedef struct acpi_pmtt_socket 3239 { 3240 ACPI_PMTT_HEADER Header; 3241 UINT16 SocketId; 3242 UINT16 Reserved; 3243 3244 } ACPI_PMTT_SOCKET; 3245 /* 3246 * Immediately followed by: 3247 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3248 */ 3249 3250 3251 /* 1: Memory Controller subtable */ 3252 3253 typedef struct acpi_pmtt_controller 3254 { 3255 ACPI_PMTT_HEADER Header; 3256 UINT16 ControllerId; 3257 UINT16 Reserved; 3258 3259 } ACPI_PMTT_CONTROLLER; 3260 /* 3261 * Immediately followed by: 3262 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3263 */ 3264 3265 3266 /* 2: Physical Component Identifier (DIMM) */ 3267 3268 typedef struct acpi_pmtt_physical_component 3269 { 3270 ACPI_PMTT_HEADER Header; 3271 UINT32 BiosHandle; 3272 3273 } ACPI_PMTT_PHYSICAL_COMPONENT; 3274 3275 3276 /* 0xFF: Vendor Specific Data */ 3277 3278 typedef struct acpi_pmtt_vendor_specific 3279 { 3280 ACPI_PMTT_HEADER Header; 3281 UINT8 TypeUuid[16]; 3282 UINT8 Specific[]; 3283 /* 3284 * Immediately followed by: 3285 * UINT8 VendorSpecificData[]; 3286 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3287 */ 3288 3289 } ACPI_PMTT_VENDOR_SPECIFIC; 3290 3291 3292 /******************************************************************************* 3293 * 3294 * PPTT - Processor Properties Topology Table (ACPI 6.2) 3295 * Version 1 3296 * 3297 ******************************************************************************/ 3298 3299 typedef struct acpi_table_pptt 3300 { 3301 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3302 3303 } ACPI_TABLE_PPTT; 3304 3305 /* Values for Type field above */ 3306 3307 enum AcpiPpttType 3308 { 3309 ACPI_PPTT_TYPE_PROCESSOR = 0, 3310 ACPI_PPTT_TYPE_CACHE = 1, 3311 ACPI_PPTT_TYPE_ID = 2, 3312 ACPI_PPTT_TYPE_RESERVED = 3 3313 }; 3314 3315 3316 /* 0: Processor Hierarchy Node Structure */ 3317 3318 typedef struct acpi_pptt_processor 3319 { 3320 ACPI_SUBTABLE_HEADER Header; 3321 UINT16 Reserved; 3322 UINT32 Flags; 3323 UINT32 Parent; 3324 UINT32 AcpiProcessorId; 3325 UINT32 NumberOfPrivResources; 3326 3327 } ACPI_PPTT_PROCESSOR; 3328 3329 /* Flags */ 3330 3331 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 3332 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 3333 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 3334 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 3335 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 3336 3337 3338 /* 1: Cache Type Structure */ 3339 3340 typedef struct acpi_pptt_cache 3341 { 3342 ACPI_SUBTABLE_HEADER Header; 3343 UINT16 Reserved; 3344 UINT32 Flags; 3345 UINT32 NextLevelOfCache; 3346 UINT32 Size; 3347 UINT32 NumberOfSets; 3348 UINT8 Associativity; 3349 UINT8 Attributes; 3350 UINT16 LineSize; 3351 3352 } ACPI_PPTT_CACHE; 3353 3354 /* 1: Cache Type Structure for PPTT version 3 */ 3355 3356 typedef struct acpi_pptt_cache_v1 3357 { 3358 UINT32 CacheId; 3359 3360 } ACPI_PPTT_CACHE_V1; 3361 3362 3363 /* Flags */ 3364 3365 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 3366 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 3367 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 3368 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 3369 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 3370 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 3371 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 3372 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 3373 3374 /* Masks for Attributes */ 3375 3376 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3377 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3378 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3379 3380 /* Attributes describing cache */ 3381 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3382 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3383 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3384 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3385 3386 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3387 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3388 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3389 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3390 3391 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3392 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3393 3394 /* 2: ID Structure */ 3395 3396 typedef struct acpi_pptt_id 3397 { 3398 ACPI_SUBTABLE_HEADER Header; 3399 UINT16 Reserved; 3400 UINT32 VendorId; 3401 UINT64 Level1Id; 3402 UINT64 Level2Id; 3403 UINT16 MajorRev; 3404 UINT16 MinorRev; 3405 UINT16 SpinRev; 3406 3407 } ACPI_PPTT_ID; 3408 3409 3410 /******************************************************************************* 3411 * 3412 * PRMT - Platform Runtime Mechanism Table 3413 * Version 1 3414 * 3415 ******************************************************************************/ 3416 3417 typedef struct acpi_table_prmt 3418 { 3419 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3420 3421 } ACPI_TABLE_PRMT; 3422 3423 typedef struct acpi_table_prmt_header 3424 { 3425 UINT8 PlatformGuid[16]; 3426 UINT32 ModuleInfoOffset; 3427 UINT32 ModuleInfoCount; 3428 3429 } ACPI_TABLE_PRMT_HEADER; 3430 3431 typedef struct acpi_prmt_module_header 3432 { 3433 UINT16 Revision; 3434 UINT16 Length; 3435 3436 } ACPI_PRMT_MODULE_HEADER; 3437 3438 typedef struct acpi_prmt_module_info 3439 { 3440 UINT16 Revision; 3441 UINT16 Length; 3442 UINT8 ModuleGuid[16]; 3443 UINT16 MajorRev; 3444 UINT16 MinorRev; 3445 UINT16 HandlerInfoCount; 3446 UINT32 HandlerInfoOffset; 3447 UINT64 MmioListPointer; 3448 3449 } ACPI_PRMT_MODULE_INFO; 3450 3451 typedef struct acpi_prmt_handler_info 3452 { 3453 UINT16 Revision; 3454 UINT16 Length; 3455 UINT8 HandlerGuid[16]; 3456 UINT64 HandlerAddress; 3457 UINT64 StaticDataBufferAddress; 3458 UINT64 AcpiParamBufferAddress; 3459 3460 } ACPI_PRMT_HANDLER_INFO; 3461 3462 3463 /******************************************************************************* 3464 * 3465 * RASF - RAS Feature Table (ACPI 5.0) 3466 * Version 1 3467 * 3468 ******************************************************************************/ 3469 3470 typedef struct acpi_table_rasf 3471 { 3472 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3473 UINT8 ChannelId[12]; 3474 3475 } ACPI_TABLE_RASF; 3476 3477 /* RASF Platform Communication Channel Shared Memory Region */ 3478 3479 typedef struct acpi_rasf_shared_memory 3480 { 3481 UINT32 Signature; 3482 UINT16 Command; 3483 UINT16 Status; 3484 UINT16 Version; 3485 UINT8 Capabilities[16]; 3486 UINT8 SetCapabilities[16]; 3487 UINT16 NumParameterBlocks; 3488 UINT32 SetCapabilitiesStatus; 3489 3490 } ACPI_RASF_SHARED_MEMORY; 3491 3492 /* RASF Parameter Block Structure Header */ 3493 3494 typedef struct acpi_rasf_parameter_block 3495 { 3496 UINT16 Type; 3497 UINT16 Version; 3498 UINT16 Length; 3499 3500 } ACPI_RASF_PARAMETER_BLOCK; 3501 3502 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3503 3504 typedef struct acpi_rasf_patrol_scrub_parameter 3505 { 3506 ACPI_RASF_PARAMETER_BLOCK Header; 3507 UINT16 PatrolScrubCommand; 3508 UINT64 RequestedAddressRange[2]; 3509 UINT64 ActualAddressRange[2]; 3510 UINT16 Flags; 3511 UINT8 RequestedSpeed; 3512 3513 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3514 3515 /* Masks for Flags and Speed fields above */ 3516 3517 #define ACPI_RASF_SCRUBBER_RUNNING 1 3518 #define ACPI_RASF_SPEED (7<<1) 3519 #define ACPI_RASF_SPEED_SLOW (0<<1) 3520 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3521 #define ACPI_RASF_SPEED_FAST (7<<1) 3522 3523 /* Channel Commands */ 3524 3525 enum AcpiRasfCommands 3526 { 3527 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3528 }; 3529 3530 /* Platform RAS Capabilities */ 3531 3532 enum AcpiRasfCapabiliities 3533 { 3534 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3535 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3536 }; 3537 3538 /* Patrol Scrub Commands */ 3539 3540 enum AcpiRasfPatrolScrubCommands 3541 { 3542 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3543 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3544 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3545 }; 3546 3547 /* Channel Command flags */ 3548 3549 #define ACPI_RASF_GENERATE_SCI (1<<15) 3550 3551 /* Status values */ 3552 3553 enum AcpiRasfStatus 3554 { 3555 ACPI_RASF_SUCCESS = 0, 3556 ACPI_RASF_NOT_VALID = 1, 3557 ACPI_RASF_NOT_SUPPORTED = 2, 3558 ACPI_RASF_BUSY = 3, 3559 ACPI_RASF_FAILED = 4, 3560 ACPI_RASF_ABORTED = 5, 3561 ACPI_RASF_INVALID_DATA = 6 3562 }; 3563 3564 /* Status flags */ 3565 3566 #define ACPI_RASF_COMMAND_COMPLETE (1) 3567 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3568 #define ACPI_RASF_ERROR (1<<2) 3569 #define ACPI_RASF_STATUS (0x1F<<3) 3570 3571 3572 /******************************************************************************* 3573 * 3574 * RAS2 - RAS2 Feature Table (ACPI 6.5) 3575 * Version 1 3576 * 3577 * 3578 ******************************************************************************/ 3579 3580 typedef struct acpi_table_ras2 { 3581 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3582 UINT16 Reserved; 3583 UINT16 NumPccDescs; 3584 3585 } ACPI_TABLE_RAS2; 3586 3587 /* RAS2 Platform Communication Channel Descriptor */ 3588 3589 typedef struct acpi_ras2_pcc_desc { 3590 UINT8 ChannelId; 3591 UINT16 Reserved; 3592 UINT8 FeatureType; 3593 UINT32 Instance; 3594 3595 } ACPI_RAS2_PCC_DESC; 3596 3597 /* RAS2 Platform Communication Channel Shared Memory Region */ 3598 3599 typedef struct acpi_ras2_shmem { 3600 UINT32 Signature; 3601 UINT16 Command; 3602 UINT16 Status; 3603 UINT16 Version; 3604 UINT8 Features[16]; 3605 UINT8 SetCaps[16]; 3606 UINT16 NumParamBlks; 3607 UINT32 SetCapsStatus; 3608 3609 } ACPI_RAS2_SHMEM; 3610 3611 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3612 3613 typedef struct acpi_ras2_parameter_block 3614 { 3615 UINT16 Type; 3616 UINT16 Version; 3617 UINT16 Length; 3618 3619 } ACPI_RAS2_PARAMETER_BLOCK; 3620 3621 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3622 3623 typedef struct acpi_ras2_patrol_scrub_param { 3624 ACPI_RAS2_PARAMETER_BLOCK Header; 3625 UINT16 Command; 3626 UINT64 ReqAddrRange[2]; 3627 UINT64 ActlAddrRange[2]; 3628 UINT32 Flags; 3629 UINT32 ScrubParamsOut; 3630 UINT32 ScrubParamsIn; 3631 3632 } ACPI_RAS2_PATROL_SCRUB_PARAM; 3633 3634 /* Masks for Flags field above */ 3635 3636 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3637 3638 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3639 3640 typedef struct acpi_ras2_la2pa_translation_parameter { 3641 ACPI_RAS2_PARAMETER_BLOCK Header; 3642 UINT16 AddrTranslationCommand; 3643 UINT64 SubInstId; 3644 UINT64 LogicalAddress; 3645 UINT64 PhysicalAddress; 3646 UINT32 Status; 3647 3648 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3649 3650 /* Channel Commands */ 3651 3652 enum AcpiRas2Commands 3653 { 3654 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3655 }; 3656 3657 /* Platform RAS2 Features */ 3658 3659 enum AcpiRas2Features 3660 { 3661 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3662 ACPI_RAS2_LA2PA_TRANSLATION = 1 3663 }; 3664 3665 /* RAS2 Patrol Scrub Commands */ 3666 3667 enum AcpiRas2PatrolScrubCommands 3668 { 3669 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3670 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3671 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3672 }; 3673 3674 /* RAS2 LA2PA Translation Commands */ 3675 3676 enum AcpiRas2La2PaTranslationCommands 3677 { 3678 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3679 }; 3680 3681 /* RAS2 LA2PA Translation Status values */ 3682 3683 enum AcpiRas2La2PaTranslationStatus 3684 { 3685 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3686 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3687 }; 3688 3689 /* Channel Command flags */ 3690 3691 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3692 3693 /* Status values */ 3694 3695 enum AcpiRas2Status 3696 { 3697 ACPI_RAS2_SUCCESS = 0, 3698 ACPI_RAS2_NOT_VALID = 1, 3699 ACPI_RAS2_NOT_SUPPORTED = 2, 3700 ACPI_RAS2_BUSY = 3, 3701 ACPI_RAS2_FAILED = 4, 3702 ACPI_RAS2_ABORTED = 5, 3703 ACPI_RAS2_INVALID_DATA = 6 3704 }; 3705 3706 /* Status flags */ 3707 3708 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3709 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3710 #define ACPI_RAS2_ERROR (1<<2) 3711 #define ACPI_RAS2_STATUS (0x1F<<3) 3712 3713 3714 /******************************************************************************* 3715 * 3716 * RGRT - Regulatory Graphics Resource Table 3717 * Version 1 3718 * 3719 * Conforms to "ACPI RGRT" available at: 3720 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3721 * 3722 ******************************************************************************/ 3723 3724 typedef struct acpi_table_rgrt 3725 { 3726 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3727 UINT16 Version; 3728 UINT8 ImageType; 3729 UINT8 Reserved; 3730 UINT8 Image[]; 3731 3732 } ACPI_TABLE_RGRT; 3733 3734 /* ImageType values */ 3735 3736 enum AcpiRgrtImageType 3737 { 3738 ACPI_RGRT_TYPE_RESERVED0 = 0, 3739 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3740 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3741 }; 3742 3743 3744 /******************************************************************************* 3745 * 3746 * RHCT - RISC-V Hart Capabilities Table 3747 * Version 1 3748 * 3749 ******************************************************************************/ 3750 3751 typedef struct acpi_table_rhct { 3752 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3753 UINT32 Flags; /* RHCT flags */ 3754 UINT64 TimeBaseFreq; 3755 UINT32 NodeCount; 3756 UINT32 NodeOffset; 3757 } ACPI_TABLE_RHCT; 3758 3759 /* RHCT Flags */ 3760 3761 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3762 /* 3763 * RHCT subtables 3764 */ 3765 typedef struct acpi_rhct_node_header { 3766 UINT16 Type; 3767 UINT16 Length; 3768 UINT16 Revision; 3769 } ACPI_RHCT_NODE_HEADER; 3770 3771 /* Values for RHCT subtable Type above */ 3772 3773 enum acpi_rhct_node_type { 3774 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3775 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3776 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3777 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3778 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3779 }; 3780 3781 /* 3782 * RHCT node specific subtables 3783 */ 3784 3785 /* ISA string node structure */ 3786 typedef struct acpi_rhct_isa_string { 3787 UINT16 IsaLength; 3788 char Isa[]; 3789 } ACPI_RHCT_ISA_STRING; 3790 3791 typedef struct acpi_rhct_cmo_node { 3792 UINT8 Reserved; /* Must be zero */ 3793 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3794 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3795 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3796 } ACPI_RHCT_CMO_NODE; 3797 3798 typedef struct acpi_rhct_mmu_node { 3799 UINT8 Reserved; /* Must be zero */ 3800 UINT8 MmuType; /* Virtual Address Scheme */ 3801 } ACPI_RHCT_MMU_NODE; 3802 3803 enum acpi_rhct_mmu_type { 3804 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3805 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3806 ACPI_RHCT_MMU_TYPE_SV57 = 2 3807 }; 3808 3809 /* Hart Info node structure */ 3810 typedef struct acpi_rhct_hart_info { 3811 UINT16 NumOffsets; 3812 UINT32 Uid; /* ACPI processor UID */ 3813 } ACPI_RHCT_HART_INFO; 3814 3815 /******************************************************************************* 3816 * 3817 * RIMT - RISC-V IO Remapping Table 3818 * 3819 * https://github.com/riscv-non-isa/riscv-acpi-rimt 3820 * 3821 ******************************************************************************/ 3822 3823 typedef struct acpi_table_rimt { 3824 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3825 UINT32 NumNodes; /* Number of RIMT Nodes */ 3826 UINT32 NodeOffset; /* Offset to RIMT Node Array */ 3827 UINT32 Reserved; 3828 } ACPI_TABLE_RIMT; 3829 3830 typedef struct acpi_rimt_node { 3831 UINT8 Type; 3832 UINT8 Revision; 3833 UINT16 Length; 3834 UINT16 Reserved; 3835 UINT16 Id; 3836 char NodeData[]; 3837 } ACPI_RIMT_NODE; 3838 3839 enum acpi_rimt_node_type { 3840 ACPI_RIMT_NODE_TYPE_IOMMU = 0x0, 3841 ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1, 3842 ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2, 3843 }; 3844 3845 typedef struct acpi_rimt_iommu { 3846 UINT8 HardwareId[8]; /* Hardware ID */ 3847 UINT64 BaseAddress; /* Base Address */ 3848 UINT32 Flags; /* Flags */ 3849 UINT32 ProximityDomain; /* Proximity Domain */ 3850 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 3851 UINT16 PcieBdf; /* PCIe B/D/F */ 3852 UINT16 NumInterruptWires; /* Number of interrupt wires */ 3853 UINT16 InterruptWireOffset; /* Interrupt wire array offset */ 3854 UINT64 InterruptWire[]; /* Interrupt wire array */ 3855 } ACPI_RIMT_IOMMU; 3856 3857 /* IOMMU Node Flags */ 3858 #define ACPI_RIMT_IOMMU_FLAGS_PCIE (1) 3859 #define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1) 3860 3861 /* Interrupt Wire Structure */ 3862 typedef struct acpi_rimt_iommu_wire_gsi { 3863 UINT32 IrqNum; /* Interrupt Number */ 3864 UINT32 Flags; /* Flags */ 3865 } ACPI_RIMT_IOMMU_WIRE_GSI; 3866 3867 /* Interrupt Wire Flags */ 3868 #define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1) 3869 #define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1) 3870 3871 typedef struct acpi_rimt_id_mapping { 3872 UINT32 SourceIdBase; /* Source ID Base */ 3873 UINT32 NumIds; /* Number of IDs */ 3874 UINT32 DestIdBase; /* Destination Device ID Base */ 3875 UINT32 DestOffset; /* Destination IOMMU Offset */ 3876 UINT32 Flags; /* Flags */ 3877 } ACPI_RIMT_ID_MAPPING; 3878 3879 typedef struct acpi_rimt_pcie_rc { 3880 UINT32 Flags; /* Flags */ 3881 UINT16 Reserved; /* Reserved */ 3882 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 3883 UINT16 IdMappingOffset; /* ID mapping array offset */ 3884 UINT16 NumIdMappings; /* Number of ID mappings */ 3885 } ACPI_RIMT_PCIE_RC; 3886 3887 /* PCIe Root Complex Node Flags */ 3888 #define ACPI_RIMT_PCIE_ATS_SUPPORTED (1) 3889 #define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1) 3890 3891 typedef struct acpi_rimt_platform_device { 3892 UINT16 IdMappingOffset; /* ID Mapping array offset */ 3893 UINT16 NumIdMappings; /* Number of ID mappings */ 3894 char DeviceName[]; /* Device Object Name */ 3895 } ACPI_RIMT_PLATFORM_DEVICE; 3896 3897 3898 /******************************************************************************* 3899 * 3900 * SBST - Smart Battery Specification Table 3901 * Version 1 3902 * 3903 ******************************************************************************/ 3904 3905 typedef struct acpi_table_sbst 3906 { 3907 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3908 UINT32 WarningLevel; 3909 UINT32 LowLevel; 3910 UINT32 CriticalLevel; 3911 3912 } ACPI_TABLE_SBST; 3913 3914 3915 /******************************************************************************* 3916 * 3917 * SDEI - Software Delegated Exception Interface Descriptor Table 3918 * 3919 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3920 * May 8th, 2017. Copyright 2017 ARM Ltd. 3921 * 3922 ******************************************************************************/ 3923 3924 typedef struct acpi_table_sdei 3925 { 3926 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3927 3928 } ACPI_TABLE_SDEI; 3929 3930 3931 /******************************************************************************* 3932 * 3933 * SDEV - Secure Devices Table (ACPI 6.2) 3934 * Version 1 3935 * 3936 ******************************************************************************/ 3937 3938 typedef struct acpi_table_sdev 3939 { 3940 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3941 3942 } ACPI_TABLE_SDEV; 3943 3944 3945 typedef struct acpi_sdev_header 3946 { 3947 UINT8 Type; 3948 UINT8 Flags; 3949 UINT16 Length; 3950 3951 } ACPI_SDEV_HEADER; 3952 3953 3954 /* Values for subtable type above */ 3955 3956 enum AcpiSdevType 3957 { 3958 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3959 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3960 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3961 }; 3962 3963 /* Values for flags above */ 3964 3965 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3966 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3967 3968 /* 3969 * SDEV subtables 3970 */ 3971 3972 /* 0: Namespace Device Based Secure Device Structure */ 3973 3974 typedef struct acpi_sdev_namespace 3975 { 3976 ACPI_SDEV_HEADER Header; 3977 UINT16 DeviceIdOffset; 3978 UINT16 DeviceIdLength; 3979 UINT16 VendorDataOffset; 3980 UINT16 VendorDataLength; 3981 3982 } ACPI_SDEV_NAMESPACE; 3983 3984 typedef struct acpi_sdev_secure_component 3985 { 3986 UINT16 SecureComponentOffset; 3987 UINT16 SecureComponentLength; 3988 3989 } ACPI_SDEV_SECURE_COMPONENT; 3990 3991 3992 /* 3993 * SDEV sub-subtables ("Components") for above 3994 */ 3995 typedef struct acpi_sdev_component 3996 { 3997 ACPI_SDEV_HEADER Header; 3998 3999 } ACPI_SDEV_COMPONENT; 4000 4001 4002 /* Values for sub-subtable type above */ 4003 4004 enum AcpiSacType 4005 { 4006 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 4007 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 4008 }; 4009 4010 typedef struct acpi_sdev_id_component 4011 { 4012 ACPI_SDEV_HEADER Header; 4013 UINT16 HardwareIdOffset; 4014 UINT16 HardwareIdLength; 4015 UINT16 SubsystemIdOffset; 4016 UINT16 SubsystemIdLength; 4017 UINT16 HardwareRevision; 4018 UINT8 HardwareRevPresent; 4019 UINT8 ClassCodePresent; 4020 UINT8 PciBaseClass; 4021 UINT8 PciSubClass; 4022 UINT8 PciProgrammingXface; 4023 4024 } ACPI_SDEV_ID_COMPONENT; 4025 4026 typedef struct acpi_sdev_mem_component 4027 { 4028 ACPI_SDEV_HEADER Header; 4029 UINT32 Reserved; 4030 UINT64 MemoryBaseAddress; 4031 UINT64 MemoryLength; 4032 4033 } ACPI_SDEV_MEM_COMPONENT; 4034 4035 4036 /* 1: PCIe Endpoint Device Based Device Structure */ 4037 4038 typedef struct acpi_sdev_pcie 4039 { 4040 ACPI_SDEV_HEADER Header; 4041 UINT16 Segment; 4042 UINT16 StartBus; 4043 UINT16 PathOffset; 4044 UINT16 PathLength; 4045 UINT16 VendorDataOffset; 4046 UINT16 VendorDataLength; 4047 4048 } ACPI_SDEV_PCIE; 4049 4050 /* 1a: PCIe Endpoint path entry */ 4051 4052 typedef struct acpi_sdev_pcie_path 4053 { 4054 UINT8 Device; 4055 UINT8 Function; 4056 4057 } ACPI_SDEV_PCIE_PATH; 4058 4059 4060 /******************************************************************************* 4061 * 4062 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 4063 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4064 * Trust Domain Extensions (Intel TDX)". 4065 * Version 1 4066 * 4067 ******************************************************************************/ 4068 4069 typedef struct acpi_table_svkl 4070 { 4071 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4072 UINT32 Count; 4073 4074 } ACPI_TABLE_SVKL; 4075 4076 typedef struct acpi_svkl_key 4077 { 4078 UINT16 Type; 4079 UINT16 Format; 4080 UINT32 Size; 4081 UINT64 Address; 4082 4083 } ACPI_SVKL_KEY; 4084 4085 enum acpi_svkl_type 4086 { 4087 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 4088 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 4089 }; 4090 4091 enum acpi_svkl_format 4092 { 4093 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 4094 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 4095 }; 4096 4097 4098 /******************************************************************************* 4099 * 4100 * TDEL - TD-Event Log 4101 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4102 * Trust Domain Extensions (Intel TDX)". 4103 * September 2020 4104 * 4105 ******************************************************************************/ 4106 4107 typedef struct acpi_table_tdel 4108 { 4109 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4110 UINT32 Reserved; 4111 UINT64 LogAreaMinimumLength; 4112 UINT64 LogAreaStartAddress; 4113 4114 } ACPI_TABLE_TDEL; 4115 4116 /* Reset to default packing */ 4117 4118 #pragma pack() 4119 4120 #endif /* __ACTBL2_H__ */ 4121