1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */ 177 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 178 #define ACPI_SIG_IOVT "IOVT" /* I/O Virtualization Table */ 179 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 180 #define ACPI_SIG_KEYP "KEYP" /* Key Programming Interface for IDE */ 181 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 182 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 183 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 184 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 185 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 186 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 187 #define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */ 188 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 189 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 190 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 191 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 192 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 193 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 194 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 195 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 196 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 197 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 198 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 199 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 200 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 201 #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */ 202 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 203 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 204 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 205 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 206 #define ACPI_SIG_SWFT "SWFT" /* SoundWire File Table */ 207 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 208 209 210 /* 211 * All tables must be byte-packed to match the ACPI specification, since 212 * the tables are provided by the system BIOS. 213 */ 214 #pragma pack(1) 215 216 /* 217 * Note: C bitfields are not used for this reason: 218 * 219 * "Bitfields are great and easy to read, but unfortunately the C language 220 * does not specify the layout of bitfields in memory, which means they are 221 * essentially useless for dealing with packed data in on-disk formats or 222 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 223 * this decision was a design error in C. Ritchie could have picked an order 224 * and stuck with it." Norman Ramsey. 225 * See http://stackoverflow.com/a/1053662/41661 226 */ 227 228 229 /******************************************************************************* 230 * 231 * AEST - Arm Error Source Table 232 * 233 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 234 * September 2020. 235 * 236 ******************************************************************************/ 237 238 typedef struct acpi_table_aest 239 { 240 ACPI_TABLE_HEADER Header; 241 242 } ACPI_TABLE_AEST; 243 244 /* Common Subtable header - one per Node Structure (Subtable) */ 245 246 typedef struct acpi_aest_hdr 247 { 248 UINT8 Type; 249 UINT16 Length; 250 UINT8 Reserved; 251 UINT32 NodeSpecificOffset; 252 UINT32 NodeInterfaceOffset; 253 UINT32 NodeInterruptOffset; 254 UINT32 NodeInterruptCount; 255 UINT64 TimestampRate; 256 UINT64 Reserved1; 257 UINT64 ErrorInjectionRate; 258 259 } ACPI_AEST_HEADER; 260 261 /* Values for Type above */ 262 263 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 264 #define ACPI_AEST_MEMORY_ERROR_NODE 1 265 #define ACPI_AEST_SMMU_ERROR_NODE 2 266 #define ACPI_AEST_VENDOR_ERROR_NODE 3 267 #define ACPI_AEST_GIC_ERROR_NODE 4 268 #define ACPI_AEST_PCIE_ERROR_NODE 5 269 #define ACPI_AEST_PROXY_ERROR_NODE 6 270 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 271 272 273 /* 274 * AEST subtables (Error nodes) 275 */ 276 277 /* 0: Processor Error */ 278 279 typedef struct acpi_aest_processor 280 { 281 UINT32 ProcessorId; 282 UINT8 ResourceType; 283 UINT8 Reserved; 284 UINT8 Flags; 285 UINT8 Revision; 286 UINT64 ProcessorAffinity; 287 288 } ACPI_AEST_PROCESSOR; 289 290 /* Values for ResourceType above, related structs below */ 291 292 #define ACPI_AEST_CACHE_RESOURCE 0 293 #define ACPI_AEST_TLB_RESOURCE 1 294 #define ACPI_AEST_GENERIC_RESOURCE 2 295 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 296 297 /* 0R: Processor Cache Resource Substructure */ 298 299 typedef struct acpi_aest_processor_cache 300 { 301 UINT32 CacheReference; 302 UINT32 Reserved; 303 304 } ACPI_AEST_PROCESSOR_CACHE; 305 306 /* Values for CacheType above */ 307 308 #define ACPI_AEST_CACHE_DATA 0 309 #define ACPI_AEST_CACHE_INSTRUCTION 1 310 #define ACPI_AEST_CACHE_UNIFIED 2 311 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 312 313 /* 1R: Processor TLB Resource Substructure */ 314 315 typedef struct acpi_aest_processor_tlb 316 { 317 UINT32 TlbLevel; 318 UINT32 Reserved; 319 320 } ACPI_AEST_PROCESSOR_TLB; 321 322 /* 2R: Processor Generic Resource Substructure */ 323 324 typedef struct acpi_aest_processor_generic 325 { 326 UINT32 Resource; 327 328 } ACPI_AEST_PROCESSOR_GENERIC; 329 330 /* 1: Memory Error */ 331 332 typedef struct acpi_aest_memory 333 { 334 UINT32 SratProximityDomain; 335 336 } ACPI_AEST_MEMORY; 337 338 /* 2: Smmu Error */ 339 340 typedef struct acpi_aest_smmu 341 { 342 UINT32 IortNodeReference; 343 UINT32 SubcomponentReference; 344 345 } ACPI_AEST_SMMU; 346 347 /* 3: Vendor Defined */ 348 349 typedef struct acpi_aest_vendor 350 { 351 UINT32 AcpiHid; 352 UINT32 AcpiUid; 353 UINT8 VendorSpecificData[16]; 354 355 } ACPI_AEST_VENDOR; 356 357 /* 3: Vendor Defined V2 */ 358 359 typedef struct acpi_aest_vendor_v2 360 { 361 UINT64 AcpiHid; 362 UINT32 AcpiUid; 363 UINT8 VendorSpecificData[16]; 364 365 } ACPI_AEST_VENDOR_V2; 366 367 /* 4: Gic Error */ 368 369 typedef struct acpi_aest_gic 370 { 371 UINT32 InterfaceType; 372 UINT32 InstanceId; 373 374 } ACPI_AEST_GIC; 375 376 /* Values for InterfaceType above */ 377 378 #define ACPI_AEST_GIC_CPU 0 379 #define ACPI_AEST_GIC_DISTRIBUTOR 1 380 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 381 #define ACPI_AEST_GIC_ITS 3 382 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 383 384 /* 5: PCIe Error */ 385 386 typedef struct acpi_aest_pcie 387 { 388 UINT32 IortNodeReference; 389 390 } ACPI_AEST_PCIE; 391 392 393 /* 6: Proxy Error */ 394 395 typedef struct acpi_aest_proxy 396 { 397 UINT64 NodeAddress; 398 399 } ACPI_AEST_PROXY; 400 401 /* Node Interface Structure */ 402 403 typedef struct acpi_aest_node_interface 404 { 405 UINT8 Type; 406 UINT8 Reserved[3]; 407 UINT32 Flags; 408 UINT64 Address; 409 UINT32 ErrorRecordIndex; 410 UINT32 ErrorRecordCount; 411 UINT64 ErrorRecordImplemented; 412 UINT64 ErrorStatusReporting; 413 UINT64 AddressingMode; 414 415 } ACPI_AEST_NODE_INTERFACE; 416 417 /* Node Interface Structure V2*/ 418 419 typedef struct acpi_aest_node_interface_header 420 { 421 UINT8 Type; 422 UINT8 GroupFormat; 423 UINT8 Reserved[2]; 424 UINT32 Flags; 425 UINT64 Address; 426 UINT32 ErrorRecordIndex; 427 UINT32 ErrorRecordCount; 428 429 } ACPI_AEST_NODE_INTERFACE_HEADER; 430 431 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 432 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 433 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 434 435 typedef struct acpi_aest_node_interface_common 436 { 437 UINT32 ErrorNodeDevice; 438 UINT32 ProcessorAffinity; 439 UINT64 ErrorGroupRegisterBase; 440 UINT64 FaultInjectRegisterBase; 441 UINT64 InterruptConfigRegisterBase; 442 443 } ACPI_AEST_NODE_INTERFACE_COMMON; 444 445 typedef struct acpi_aest_node_interface_4k 446 { 447 UINT64 ErrorRecordImplemented; 448 UINT64 ErrorStatusReporting; 449 UINT64 AddressingMode; 450 ACPI_AEST_NODE_INTERFACE_COMMON Common; 451 452 } ACPI_AEST_NODE_INTERFACE_4K; 453 454 typedef struct acpi_aest_node_interface_16k 455 { 456 UINT64 ErrorRecordImplemented[4]; 457 UINT64 ErrorStatusReporting[4]; 458 UINT64 AddressingMode[4]; 459 ACPI_AEST_NODE_INTERFACE_COMMON Common; 460 461 } ACPI_AEST_NODE_INTERFACE_16K; 462 463 typedef struct acpi_aest_node_interface_64k 464 { 465 INT64 ErrorRecordImplemented[14]; 466 UINT64 ErrorStatusReporting[14]; 467 UINT64 AddressingMode[14]; 468 ACPI_AEST_NODE_INTERFACE_COMMON Common; 469 470 } ACPI_AEST_NODE_INTERFACE_64K; 471 472 /* Values for Type field above */ 473 474 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 475 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 476 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 477 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 478 479 /* Node Interrupt Structure */ 480 481 typedef struct acpi_aest_node_interrupt 482 { 483 UINT8 Type; 484 UINT8 Reserved[2]; 485 UINT8 Flags; 486 UINT32 Gsiv; 487 UINT8 IortId; 488 UINT8 Reserved1[3]; 489 490 } ACPI_AEST_NODE_INTERRUPT; 491 492 /* Node Interrupt Structure V2 */ 493 494 typedef struct acpi_aest_node_interrupt_v2 495 { 496 UINT8 Type; 497 UINT8 Reserved[2]; 498 UINT8 Flags; 499 UINT32 Gsiv; 500 UINT8 Reserved1[4]; 501 502 } ACPI_AEST_NODE_INTERRUPT_V2; 503 504 /* Values for Type field above */ 505 506 #define ACPI_AEST_NODE_FAULT_HANDLING 0 507 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 508 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 509 510 511 /******************************************************************************* 512 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 513 * 514 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 515 * ARM DEN0093 v1.1 516 * 517 ******************************************************************************/ 518 typedef struct acpi_table_agdi 519 { 520 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 521 UINT8 Flags; 522 UINT8 Reserved[3]; 523 UINT32 SdeiEvent; 524 UINT32 Gsiv; 525 526 } ACPI_TABLE_AGDI; 527 528 /* Mask for Flags field above */ 529 530 #define ACPI_AGDI_SIGNALING_MODE (1) 531 532 533 /******************************************************************************* 534 * 535 * APMT - ARM Performance Monitoring Unit Table 536 * 537 * Conforms to: 538 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 539 * ARM DEN0117 v1.0 November 25, 2021 540 * 541 ******************************************************************************/ 542 543 typedef struct acpi_table_apmt { 544 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 545 } ACPI_TABLE_APMT; 546 547 #define ACPI_APMT_NODE_ID_LENGTH 4 548 549 /* 550 * APMT subtables 551 */ 552 typedef struct acpi_apmt_node { 553 UINT16 Length; 554 UINT8 Flags; 555 UINT8 Type; 556 UINT32 Id; 557 UINT64 InstPrimary; 558 UINT32 InstSecondary; 559 UINT64 BaseAddress0; 560 UINT64 BaseAddress1; 561 UINT32 OvflwIrq; 562 UINT32 Reserved; 563 UINT32 OvflwIrqFlags; 564 UINT32 ProcAffinity; 565 UINT32 ImplId; 566 } ACPI_APMT_NODE; 567 568 /* Masks for Flags field above */ 569 570 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 571 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 572 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 573 574 /* Values for Flags dual page field above */ 575 576 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 577 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 578 579 /* Values for Flags processor affinity field above */ 580 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 581 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 582 583 /* Values for Flags 64-bit atomic field above */ 584 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 585 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 586 587 /* Values for Type field above */ 588 589 enum acpi_apmt_node_type { 590 ACPI_APMT_NODE_TYPE_MC = 0x00, 591 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 592 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 593 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 594 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 595 ACPI_APMT_NODE_TYPE_COUNT 596 }; 597 598 /* Masks for ovflw_irq_flags field above */ 599 600 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 601 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 602 603 /* Values for ovflw_irq_flags mode field above */ 604 605 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 606 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 607 608 /* Values for ovflw_irq_flags type field above */ 609 610 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 611 612 613 /******************************************************************************* 614 * 615 * BDAT - BIOS Data ACPI Table 616 * 617 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 618 * Nov 2020 619 * 620 ******************************************************************************/ 621 622 typedef struct acpi_table_bdat 623 { 624 ACPI_TABLE_HEADER Header; 625 ACPI_GENERIC_ADDRESS Gas; 626 627 } ACPI_TABLE_BDAT; 628 629 /******************************************************************************* 630 * 631 * CCEL - CC-Event Log 632 * From: "Guest-Host-Communication Interface (GHCI) for Intel 633 * Trust Domain Extensions (Intel TDX)". Feb 2022 634 * 635 ******************************************************************************/ 636 637 typedef struct acpi_table_ccel 638 { 639 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 640 UINT8 CCType; 641 UINT8 CCSubType; 642 UINT16 Reserved; 643 UINT64 LogAreaMinimumLength; 644 UINT64 LogAreaStartAddress; 645 646 } ACPI_TABLE_CCEL; 647 648 /******************************************************************************* 649 * 650 * ERDT - Enhanced Resource Director Technology (ERDT) table 651 * 652 * Conforms to "Intel Resource Director Technology Architecture Specification" 653 * Version 1.1, January 2025 654 * 655 ******************************************************************************/ 656 657 typedef struct acpi_table_erdt 658 { 659 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 660 UINT32 MaxClos; /* Maximum classes of service */ 661 UINT8 Reserved[24]; 662 UINT8 Erdt_Substructures[]; 663 664 } ACPI_TABLE_ERDT; 665 666 667 /* Values for subtable type in ACPI_SUBTBL_HDR_16 */ 668 669 enum AcpiErdtType 670 { 671 ACPI_ERDT_TYPE_RMDD = 0, 672 ACPI_ERDT_TYPE_CACD = 1, 673 ACPI_ERDT_TYPE_DACD = 2, 674 ACPI_ERDT_TYPE_CMRC = 3, 675 ACPI_ERDT_TYPE_MMRC = 4, 676 ACPI_ERDT_TYPE_MARC = 5, 677 ACPI_ERDT_TYPE_CARC = 6, 678 ACPI_ERDT_TYPE_CMRD = 7, 679 ACPI_ERDT_TYPE_IBRD = 8, 680 ACPI_ERDT_TYPE_IBAD = 9, 681 ACPI_ERDT_TYPE_CARD = 10, 682 ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */ 683 684 }; 685 686 /* 687 * ERDT Subtables, correspond to Type in ACPI_SUBTBL_HDR_16 688 */ 689 690 /* 0: RMDD - Resource Management Domain Description */ 691 692 typedef struct acpi_erdt_rmdd 693 { 694 ACPI_SUBTBL_HDR_16 Header; 695 UINT16 Flags; 696 UINT16 IO_l3_Slices; /* Number of slices in IO cache */ 697 UINT8 IO_l3_Sets; /* Number of sets in IO cache */ 698 UINT8 IO_l3_Ways; /* Number of ways in IO cache */ 699 UINT64 Reserved; 700 UINT16 DomainId; /* Unique domain ID */ 701 UINT32 MaxRmid; /* Maximun RMID supported */ 702 UINT64 CregBase; /* Control Register Base Address */ 703 UINT16 CregSize; /* Control Register Size (4K pages) */ 704 UINT8 RmddStructs[]; 705 706 } ACPI_ERDT_RMDD; 707 708 709 /* 1: CACD - CPU Agent Collection Description */ 710 711 typedef struct acpi_erdt_cacd 712 { 713 ACPI_SUBTBL_HDR_16 Header; 714 UINT16 Reserved; 715 UINT16 DomainId; /* Unique domain ID */ 716 UINT32 X2APICIDS[]; 717 718 } ACPI_ERDT_CACD; 719 720 721 /* 2: DACD - Device Agent Collection Description */ 722 723 typedef struct acpi_erdt_dacd 724 { 725 ACPI_SUBTBL_HDR_16 Header; 726 UINT16 Reserved; 727 UINT16 DomainId; /* Unique domain ID */ 728 UINT8 DevPaths[]; 729 730 } ACPI_ERDT_DACD; 731 732 typedef struct acpi_erdt_dacd_dev_paths 733 { 734 ACPI_SUBTABLE_HEADER Header; 735 UINT16 Segment; 736 UINT8 Reserved; 737 UINT8 StartBus; 738 UINT8 Path[]; 739 740 } ACPI_ERDT_DACD_PATHS; 741 742 743 /* 3: CMRC - Cache Monitoring Registers for CPU Agents */ 744 745 typedef struct acpi_erdt_cmrc 746 { 747 ACPI_SUBTBL_HDR_16 Header; 748 UINT32 Reserved1; 749 UINT32 Flags; 750 UINT8 IndexFn; 751 UINT8 Reserved2[11]; 752 UINT64 CmtRegBase; 753 UINT32 CmtRegSize; 754 UINT16 ClumpSize; 755 UINT16 ClumpStride; 756 UINT64 UpScale; 757 758 } ACPI_ERDT_CMRC; 759 760 761 /* 4: MMRC - Memory-bandwidth Monitoring Registers for CPU Agents */ 762 763 typedef struct acpi_erdt_mmrc 764 { 765 ACPI_SUBTBL_HDR_16 Header; 766 UINT32 Reserved1; 767 UINT32 Flags; 768 UINT8 IndexFn; 769 UINT8 Reserved2[11]; 770 UINT64 RegBase; 771 UINT32 RegSize; 772 UINT8 CounterWidth; 773 UINT64 UpScale; 774 UINT8 Reserved3[7]; 775 UINT32 CorrFactorListLen; 776 UINT32 CorrFactorList[]; 777 778 } ACPI_ERDT_MMRC; 779 780 781 /* 5: MARC - Memory-bandwidth Allocation Registers for CPU Agents */ 782 783 typedef struct acpi_erdt_marc 784 { 785 ACPI_SUBTBL_HDR_16 Header; 786 UINT16 Reserved1; 787 UINT16 Flags; 788 UINT8 IndexFn; 789 UINT8 Reserved2[7]; 790 UINT64 RegBaseOpt; 791 UINT64 RegBaseMin; 792 UINT64 RegBaseMax; 793 UINT32 MbaRegSize; 794 UINT32 MbaCtrlRange; 795 796 } ACPI_ERDT_MARC; 797 798 799 /* 6: CARC - Cache Allocation Registers for CPU Agents */ 800 801 typedef struct acpi_erdt_carc 802 { 803 ACPI_SUBTBL_HDR_16 Header; 804 805 } ACPI_ERDT_CARC; 806 807 808 /* 7: CMRD - Cache Monitoring Registers for Device Agents */ 809 810 typedef struct acpi_erdt_cmrd 811 { 812 ACPI_SUBTBL_HDR_16 Header; 813 UINT32 Reserved1; 814 UINT32 Flags; 815 UINT8 IndexFn; 816 UINT8 Reserved2[11]; 817 UINT64 RegBase; 818 UINT32 RegSize; 819 UINT16 CmtRegOff; 820 UINT16 CmtClumpSize; 821 UINT64 UpScale; 822 823 } ACPI_ERDT_CMRD; 824 825 826 /* 8: IBRD - Cache Monitoring Registers for Device Agents */ 827 828 typedef struct acpi_erdt_ibrd 829 { 830 ACPI_SUBTBL_HDR_16 Header; 831 UINT32 Reserved1; 832 UINT32 Flags; 833 UINT8 IndexFn; 834 UINT8 Reserved2[11]; 835 UINT64 RegBase; 836 UINT32 RegSize; 837 UINT16 TotalBwOffset; 838 UINT16 IOMissBwOffset; 839 UINT16 TotalBwClump; 840 UINT16 IOMissBwClump; 841 UINT8 Reserved3[7]; 842 UINT8 CounterWidth; 843 UINT64 UpScale; 844 UINT32 CorrFactorListLen; 845 UINT32 CorrFactorList[]; 846 847 } ACPI_ERDT_IBRD; 848 849 850 /* 9: IBAD - IO bandwidth Allocation Registers for device agents */ 851 852 typedef struct acpi_erdt_ibad 853 { 854 ACPI_SUBTBL_HDR_16 Header; 855 856 } ACPI_ERDT_IBAD; 857 858 859 /* 10: CARD - IO bandwidth Allocation Registers for Device Agents */ 860 861 typedef struct acpi_erdt_card 862 { 863 ACPI_SUBTBL_HDR_16 Header; 864 UINT32 Reserved1; 865 UINT32 Flags; 866 UINT32 ContentionMask; 867 UINT8 IndexFn; 868 UINT8 Reserved2[7]; 869 UINT64 RegBase; 870 UINT32 RegSize; 871 UINT16 CatRegOffset; 872 UINT16 CatRegBlockSize; 873 874 } ACPI_ERDT_CARD; 875 876 877 /******************************************************************************* 878 * 879 * IORT - IO Remapping Table 880 * 881 * Conforms to "IO Remapping Table System Software on ARM Platforms", 882 * Document number: ARM DEN 0049E.f, Apr 2024 883 * 884 ******************************************************************************/ 885 886 typedef struct acpi_table_iort 887 { 888 ACPI_TABLE_HEADER Header; 889 UINT32 NodeCount; 890 UINT32 NodeOffset; 891 UINT32 Reserved; 892 893 } ACPI_TABLE_IORT; 894 895 896 /* 897 * IORT subtables 898 */ 899 typedef struct acpi_iort_node 900 { 901 UINT8 Type; 902 UINT16 Length; 903 UINT8 Revision; 904 UINT32 Identifier; 905 UINT32 MappingCount; 906 UINT32 MappingOffset; 907 char NodeData[]; 908 909 } ACPI_IORT_NODE; 910 911 /* Values for subtable Type above */ 912 913 enum AcpiIortNodeType 914 { 915 ACPI_IORT_NODE_ITS_GROUP = 0x00, 916 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 917 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 918 ACPI_IORT_NODE_SMMU = 0x03, 919 ACPI_IORT_NODE_SMMU_V3 = 0x04, 920 ACPI_IORT_NODE_PMCG = 0x05, 921 ACPI_IORT_NODE_RMR = 0x06, 922 ACPI_IORT_NODE_IWB = 0x07, 923 }; 924 925 926 typedef struct acpi_iort_id_mapping 927 { 928 UINT32 InputBase; /* Lowest value in input range */ 929 UINT32 IdCount; /* Number of IDs */ 930 UINT32 OutputBase; /* Lowest value in output range */ 931 UINT32 OutputReference; /* A reference to the output node */ 932 UINT32 Flags; 933 934 } ACPI_IORT_ID_MAPPING; 935 936 /* Masks for Flags field above for IORT subtable */ 937 938 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 939 940 941 typedef struct acpi_iort_memory_access 942 { 943 UINT32 CacheCoherency; 944 UINT8 Hints; 945 UINT16 Reserved; 946 UINT8 MemoryFlags; 947 948 } ACPI_IORT_MEMORY_ACCESS; 949 950 /* Values for CacheCoherency field above */ 951 952 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 953 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 954 955 /* Masks for Hints field above */ 956 957 #define ACPI_IORT_HT_TRANSIENT (1) 958 #define ACPI_IORT_HT_WRITE (1<<1) 959 #define ACPI_IORT_HT_READ (1<<2) 960 #define ACPI_IORT_HT_OVERRIDE (1<<3) 961 962 /* Masks for MemoryFlags field above */ 963 964 #define ACPI_IORT_MF_COHERENCY (1) 965 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 966 #define ACPI_IORT_MF_CANWBS (1<<2) 967 968 969 /* 970 * IORT node specific subtables 971 */ 972 typedef struct acpi_iort_its_group 973 { 974 UINT32 ItsCount; 975 UINT32 Identifiers[]; /* GIC ITS identifier array */ 976 977 } ACPI_IORT_ITS_GROUP; 978 979 980 typedef struct acpi_iort_named_component 981 { 982 UINT32 NodeFlags; 983 UINT64 MemoryProperties; /* Memory access properties */ 984 UINT8 MemoryAddressLimit; /* Memory address size limit */ 985 char DeviceName[]; /* Path of namespace object */ 986 987 } ACPI_IORT_NAMED_COMPONENT; 988 989 /* Masks for Flags field above */ 990 991 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 992 #define ACPI_IORT_NC_PASID_BITS (31<<1) 993 994 typedef struct acpi_iort_root_complex 995 { 996 UINT64 MemoryProperties; /* Memory access properties */ 997 UINT32 AtsAttribute; 998 UINT32 PciSegmentNumber; 999 UINT8 MemoryAddressLimit; /* Memory address size limit */ 1000 UINT16 PasidCapabilities; /* PASID Capabilities */ 1001 UINT8 Reserved[]; /* Reserved, must be zero */ 1002 1003 } ACPI_IORT_ROOT_COMPLEX; 1004 1005 /* Masks for AtsAttribute field above */ 1006 1007 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 1008 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 1009 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 1010 1011 /* Masks for PasidCapabilities field above */ 1012 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 1013 1014 typedef struct acpi_iort_smmu 1015 { 1016 UINT64 BaseAddress; /* SMMU base address */ 1017 UINT64 Span; /* Length of memory range */ 1018 UINT32 Model; 1019 UINT32 Flags; 1020 UINT32 GlobalInterruptOffset; 1021 UINT32 ContextInterruptCount; 1022 UINT32 ContextInterruptOffset; 1023 UINT32 PmuInterruptCount; 1024 UINT32 PmuInterruptOffset; 1025 UINT64 Interrupts[]; /* Interrupt array */ 1026 1027 } ACPI_IORT_SMMU; 1028 1029 /* Values for Model field above */ 1030 1031 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 1032 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 1033 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 1034 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 1035 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 1036 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 1037 1038 /* Masks for Flags field above */ 1039 1040 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 1041 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 1042 1043 /* Global interrupt format */ 1044 1045 typedef struct acpi_iort_smmu_gsi 1046 { 1047 UINT32 NSgIrpt; 1048 UINT32 NSgIrptFlags; 1049 UINT32 NSgCfgIrpt; 1050 UINT32 NSgCfgIrptFlags; 1051 1052 } ACPI_IORT_SMMU_GSI; 1053 1054 1055 typedef struct acpi_iort_smmu_v3 1056 { 1057 UINT64 BaseAddress; /* SMMUv3 base address */ 1058 UINT32 Flags; 1059 UINT32 Reserved; 1060 UINT64 VatosAddress; 1061 UINT32 Model; 1062 UINT32 EventGsiv; 1063 UINT32 PriGsiv; 1064 UINT32 GerrGsiv; 1065 UINT32 SyncGsiv; 1066 UINT32 Pxm; 1067 UINT32 IdMappingIndex; 1068 1069 } ACPI_IORT_SMMU_V3; 1070 1071 /* Values for Model field above */ 1072 1073 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 1074 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 1075 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 1076 1077 /* Masks for Flags field above */ 1078 1079 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 1080 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 1081 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 1082 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 1083 1084 typedef struct acpi_iort_pmcg 1085 { 1086 UINT64 Page0BaseAddress; 1087 UINT32 OverflowGsiv; 1088 UINT32 NodeReference; 1089 UINT64 Page1BaseAddress; 1090 1091 } ACPI_IORT_PMCG; 1092 1093 typedef struct acpi_iort_rmr { 1094 UINT32 Flags; 1095 UINT32 RmrCount; 1096 UINT32 RmrOffset; 1097 1098 } ACPI_IORT_RMR; 1099 1100 /* Masks for Flags field above */ 1101 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 1102 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 1103 1104 /* 1105 * Macro to access the Access Attributes in flags field above: 1106 * Access Attributes is encoded in bits 9:2 1107 */ 1108 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 1109 1110 /* Values for above Access Attributes */ 1111 1112 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 1113 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 1114 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 1115 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 1116 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 1117 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 1118 1119 typedef struct acpi_iort_rmr_desc { 1120 UINT64 BaseAddress; 1121 UINT64 Length; 1122 UINT32 Reserved; 1123 1124 } ACPI_IORT_RMR_DESC; 1125 1126 typedef struct acpi_iort_iwb { 1127 UINT64 BaseAddress; 1128 UINT16 IwbIndex; /* Unique IWB identifier matching with the IWB GSI namespace. */ 1129 char DeviceName[]; /* Path of the IWB namespace object */ 1130 1131 } ACPI_IORT_IWB; 1132 1133 1134 /******************************************************************************* 1135 * 1136 * IOVT - I/O Virtualization Table 1137 * 1138 * Conforms to "LoongArch I/O Virtualization Table", 1139 * Version 0.1, October 2024 1140 * 1141 ******************************************************************************/ 1142 1143 typedef struct acpi_table_iovt 1144 { 1145 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1146 UINT16 IommuCount; 1147 UINT16 IommuOffset; 1148 UINT8 Reserved[8]; 1149 1150 } ACPI_TABLE_IOVT; 1151 1152 /* IOVT subtable header */ 1153 1154 typedef struct acpi_iovt_header 1155 { 1156 UINT16 Type; 1157 UINT16 Length; 1158 1159 } ACPI_IOVT_HEADER; 1160 1161 /* Values for Type field above */ 1162 1163 enum AcpiIovtIommuType 1164 { 1165 ACPI_IOVT_IOMMU_V1 = 0x00, 1166 ACPI_IOVT_IOMMU_RESERVED = 0x01 /* 1 and greater are reserved */ 1167 }; 1168 1169 /* IOVT subtables */ 1170 1171 typedef struct acpi_iovt_iommu 1172 { 1173 ACPI_IOVT_HEADER Header; 1174 UINT32 Flags; 1175 UINT16 Segment; 1176 UINT16 PhyWidth; /* Physical Address Width */ 1177 UINT16 VirtWidth; /* Virtual Address Width */ 1178 UINT16 MaxPageLevel; 1179 UINT64 PageSize; 1180 UINT32 DeviceId; 1181 UINT64 BaseAddress; 1182 UINT32 AddressSpaceSize; 1183 UINT8 InterruptType; 1184 UINT8 Reserved[3]; 1185 UINT32 GsiNumber; 1186 UINT32 ProximityDomain; 1187 UINT32 MaxDeviceNum; 1188 UINT32 DeviceEntryNum; 1189 UINT32 DeviceEntryOffset; 1190 1191 } ACPI_IOVT_IOMMU; 1192 1193 typedef struct acpi_iovt_device_entry 1194 { 1195 UINT8 Type; 1196 UINT8 Length; 1197 UINT8 Flags; 1198 UINT8 Reserved[3]; 1199 UINT16 DeviceId; 1200 1201 } ACPI_IOVT_DEVICE_ENTRY; 1202 1203 enum AcpiIovtDeviceEntryType 1204 { 1205 ACPI_IOVT_DEVICE_ENTRY_SINGLE = 0x00, 1206 ACPI_IOVT_DEVICE_ENTRY_START = 0x01, 1207 ACPI_IOVT_DEVICE_ENTRY_END = 0x02, 1208 ACPI_IOVT_DEVICE_ENTRY_RESERVED = 0x03 /* 3 and greater are reserved */ 1209 }; 1210 1211 1212 /******************************************************************************* 1213 * 1214 * IVRS - I/O Virtualization Reporting Structure 1215 * Version 1 1216 * 1217 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 1218 * Revision 1.26, February 2009. 1219 * 1220 ******************************************************************************/ 1221 1222 typedef struct acpi_table_ivrs 1223 { 1224 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1225 UINT32 Info; /* Common virtualization info */ 1226 UINT64 Reserved; 1227 1228 } ACPI_TABLE_IVRS; 1229 1230 /* Values for Info field above */ 1231 1232 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 1233 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 1234 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 1235 1236 1237 /* IVRS subtable header */ 1238 1239 typedef struct acpi_ivrs_header 1240 { 1241 UINT8 Type; /* Subtable type */ 1242 UINT8 Flags; 1243 UINT16 Length; /* Subtable length */ 1244 UINT16 DeviceId; /* ID of IOMMU */ 1245 1246 } ACPI_IVRS_HEADER; 1247 1248 /* Values for subtable Type above */ 1249 1250 enum AcpiIvrsType 1251 { 1252 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 1253 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 1254 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 1255 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 1256 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 1257 ACPI_IVRS_TYPE_MEMORY3 = 0x22 1258 }; 1259 1260 /* Masks for Flags field above for IVHD subtable */ 1261 1262 #define ACPI_IVHD_TT_ENABLE (1) 1263 #define ACPI_IVHD_PASS_PW (1<<1) 1264 #define ACPI_IVHD_RES_PASS_PW (1<<2) 1265 #define ACPI_IVHD_ISOC (1<<3) 1266 #define ACPI_IVHD_IOTLB (1<<4) 1267 1268 /* Masks for Flags field above for IVMD subtable */ 1269 1270 #define ACPI_IVMD_UNITY (1) 1271 #define ACPI_IVMD_READ (1<<1) 1272 #define ACPI_IVMD_WRITE (1<<2) 1273 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 1274 1275 1276 /* 1277 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 1278 */ 1279 1280 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 1281 1282 typedef struct acpi_ivrs_hardware_10 1283 { 1284 ACPI_IVRS_HEADER Header; 1285 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1286 UINT64 BaseAddress; /* IOMMU control registers */ 1287 UINT16 PciSegmentGroup; 1288 UINT16 Info; /* MSI number and unit ID */ 1289 UINT32 FeatureReporting; 1290 1291 } ACPI_IVRS_HARDWARE1; 1292 1293 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 1294 1295 typedef struct acpi_ivrs_hardware_11 1296 { 1297 ACPI_IVRS_HEADER Header; 1298 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1299 UINT64 BaseAddress; /* IOMMU control registers */ 1300 UINT16 PciSegmentGroup; 1301 UINT16 Info; /* MSI number and unit ID */ 1302 UINT32 Attributes; 1303 UINT64 EfrRegisterImage; 1304 UINT64 Reserved; 1305 } ACPI_IVRS_HARDWARE2; 1306 1307 /* Masks for Info field above */ 1308 1309 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 1310 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 1311 1312 1313 /* 1314 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 1315 * Upper two bits of the Type field are the (encoded) length of the structure. 1316 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 1317 * are reserved for future use but not defined. 1318 */ 1319 typedef struct acpi_ivrs_de_header 1320 { 1321 UINT8 Type; 1322 UINT16 Id; 1323 UINT8 DataSetting; 1324 1325 } ACPI_IVRS_DE_HEADER; 1326 1327 /* Length of device entry is in the top two bits of Type field above */ 1328 1329 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 1330 1331 /* Values for device entry Type field above */ 1332 1333 enum AcpiIvrsDeviceEntryType 1334 { 1335 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 1336 1337 ACPI_IVRS_TYPE_PAD4 = 0, 1338 ACPI_IVRS_TYPE_ALL = 1, 1339 ACPI_IVRS_TYPE_SELECT = 2, 1340 ACPI_IVRS_TYPE_START = 3, 1341 ACPI_IVRS_TYPE_END = 4, 1342 1343 /* 8-byte device entries */ 1344 1345 ACPI_IVRS_TYPE_PAD8 = 64, 1346 ACPI_IVRS_TYPE_NOT_USED = 65, 1347 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 1348 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 1349 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 1350 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 1351 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 1352 1353 /* Variable-length device entries */ 1354 1355 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 1356 }; 1357 1358 /* Values for Data field above */ 1359 1360 #define ACPI_IVHD_INIT_PASS (1) 1361 #define ACPI_IVHD_EINT_PASS (1<<1) 1362 #define ACPI_IVHD_NMI_PASS (1<<2) 1363 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 1364 #define ACPI_IVHD_LINT0_PASS (1<<6) 1365 #define ACPI_IVHD_LINT1_PASS (1<<7) 1366 1367 1368 /* Types 0-4: 4-byte device entry */ 1369 1370 typedef struct acpi_ivrs_device4 1371 { 1372 ACPI_IVRS_DE_HEADER Header; 1373 1374 } ACPI_IVRS_DEVICE4; 1375 1376 /* Types 66-67: 8-byte device entry */ 1377 1378 typedef struct acpi_ivrs_device8a 1379 { 1380 ACPI_IVRS_DE_HEADER Header; 1381 UINT8 Reserved1; 1382 UINT16 UsedId; 1383 UINT8 Reserved2; 1384 1385 } ACPI_IVRS_DEVICE8A; 1386 1387 /* Types 70-71: 8-byte device entry */ 1388 1389 typedef struct acpi_ivrs_device8b 1390 { 1391 ACPI_IVRS_DE_HEADER Header; 1392 UINT32 ExtendedData; 1393 1394 } ACPI_IVRS_DEVICE8B; 1395 1396 /* Values for ExtendedData above */ 1397 1398 #define ACPI_IVHD_ATS_DISABLED (1<<31) 1399 1400 /* Type 72: 8-byte device entry */ 1401 1402 typedef struct acpi_ivrs_device8c 1403 { 1404 ACPI_IVRS_DE_HEADER Header; 1405 UINT8 Handle; 1406 UINT16 UsedId; 1407 UINT8 Variety; 1408 1409 } ACPI_IVRS_DEVICE8C; 1410 1411 /* Values for Variety field above */ 1412 1413 #define ACPI_IVHD_IOAPIC 1 1414 #define ACPI_IVHD_HPET 2 1415 1416 /* Type 240: variable-length device entry */ 1417 1418 typedef struct acpi_ivrs_device_hid 1419 { 1420 ACPI_IVRS_DE_HEADER Header; 1421 UINT64 AcpiHid; 1422 UINT64 AcpiCid; 1423 UINT8 UidType; 1424 UINT8 UidLength; 1425 1426 } ACPI_IVRS_DEVICE_HID; 1427 1428 /* Values for UidType above */ 1429 1430 #define ACPI_IVRS_UID_NOT_PRESENT 0 1431 #define ACPI_IVRS_UID_IS_INTEGER 1 1432 #define ACPI_IVRS_UID_IS_STRING 2 1433 1434 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1435 1436 typedef struct acpi_ivrs_memory 1437 { 1438 ACPI_IVRS_HEADER Header; 1439 UINT16 AuxData; 1440 UINT64 Reserved; 1441 UINT64 StartAddress; 1442 UINT64 MemoryLength; 1443 1444 } ACPI_IVRS_MEMORY; 1445 1446 /******************************************************************************* 1447 * 1448 * KEYP - Key Programming Interface for Root Complex Integrity and Data 1449 * Encryption (IDE) 1450 * Version 1 1451 * 1452 * Conforms to "Key Programming Interface for Root Complex Integrity and Data 1453 * Encryption (IDE)" document. See under ACPI-Related Documents. 1454 * 1455 ******************************************************************************/ 1456 typedef struct acpi_table_keyp { 1457 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1458 UINT32 Reserved; 1459 } ACPI_TABLE_KEYP; 1460 1461 /* KEYP common subtable header */ 1462 1463 typedef struct acpi_keyp_common_header { 1464 UINT8 Type; 1465 UINT8 Reserved; 1466 UINT16 Length; 1467 } ACPI_KEYP_COMMON_HEADER; 1468 1469 /* Values for Type field above */ 1470 1471 enum AcpiKeypType 1472 { 1473 ACPI_KEYP_TYPE_CONFIG_UNIT = 0, 1474 }; 1475 1476 /* Root Port Information Structure */ 1477 1478 typedef struct acpi_keyp_rp_info { 1479 UINT16 Segment; 1480 UINT8 Bus; 1481 UINT8 Devfn; 1482 } ACPI_KEYP_RP_INFO; 1483 1484 /* Key Configuration Unit Structure */ 1485 1486 typedef struct acpi_keyp_config_unit { 1487 ACPI_KEYP_COMMON_HEADER Header; 1488 UINT8 ProtocolType; 1489 UINT8 Version; 1490 UINT8 RootPortCount; 1491 UINT8 Flags; 1492 UINT64 RegisterBaseAddress; 1493 ACPI_KEYP_RP_INFO RpInfo[]; 1494 } ACPI_KEYP_CONFIG_UNIT; 1495 1496 enum AcpiKeypProtocolType 1497 { 1498 ACPI_KEYP_PROTO_TYPE_INVALID = 0, 1499 ACPI_KEYP_PROTO_TYPE_PCIE, 1500 ACPI_KEYP_PROTO_TYPE_CXL, 1501 ACPI_KEYP_PROTO_TYPE_RESERVED 1502 }; 1503 1504 #define ACPI_KEYP_F_TVM_USABLE (1) 1505 1506 /******************************************************************************* 1507 * 1508 * LPIT - Low Power Idle Table 1509 * 1510 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1511 * 1512 ******************************************************************************/ 1513 1514 typedef struct acpi_table_lpit 1515 { 1516 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1517 1518 } ACPI_TABLE_LPIT; 1519 1520 1521 /* LPIT subtable header */ 1522 1523 typedef struct acpi_lpit_header 1524 { 1525 UINT32 Type; /* Subtable type */ 1526 UINT32 Length; /* Subtable length */ 1527 UINT16 UniqueId; 1528 UINT16 Reserved; 1529 UINT32 Flags; 1530 1531 } ACPI_LPIT_HEADER; 1532 1533 /* Values for subtable Type above */ 1534 1535 enum AcpiLpitType 1536 { 1537 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1538 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1539 }; 1540 1541 /* Masks for Flags field above */ 1542 1543 #define ACPI_LPIT_STATE_DISABLED (1) 1544 #define ACPI_LPIT_NO_COUNTER (1<<1) 1545 1546 /* 1547 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1548 */ 1549 1550 /* 0x00: Native C-state instruction based LPI structure */ 1551 1552 typedef struct acpi_lpit_native 1553 { 1554 ACPI_LPIT_HEADER Header; 1555 ACPI_GENERIC_ADDRESS EntryTrigger; 1556 UINT32 Residency; 1557 UINT32 Latency; 1558 ACPI_GENERIC_ADDRESS ResidencyCounter; 1559 UINT64 CounterFrequency; 1560 1561 } ACPI_LPIT_NATIVE; 1562 1563 1564 /******************************************************************************* 1565 * 1566 * MADT - Multiple APIC Description Table 1567 * Version 3 1568 * 1569 ******************************************************************************/ 1570 1571 typedef struct acpi_table_madt 1572 { 1573 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1574 UINT32 Address; /* Physical address of local APIC */ 1575 UINT32 Flags; 1576 1577 } ACPI_TABLE_MADT; 1578 1579 /* Masks for Flags field above */ 1580 1581 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1582 1583 /* Values for PCATCompat flag */ 1584 1585 #define ACPI_MADT_DUAL_PIC 1 1586 #define ACPI_MADT_MULTIPLE_APIC 0 1587 1588 1589 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1590 1591 enum AcpiMadtType 1592 { 1593 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1594 ACPI_MADT_TYPE_IO_APIC = 1, 1595 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1596 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1597 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1598 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1599 ACPI_MADT_TYPE_IO_SAPIC = 6, 1600 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1601 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1602 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1603 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1604 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1605 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1606 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1607 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1608 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1609 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1610 ACPI_MADT_TYPE_CORE_PIC = 17, 1611 ACPI_MADT_TYPE_LIO_PIC = 18, 1612 ACPI_MADT_TYPE_HT_PIC = 19, 1613 ACPI_MADT_TYPE_EIO_PIC = 20, 1614 ACPI_MADT_TYPE_MSI_PIC = 21, 1615 ACPI_MADT_TYPE_BIO_PIC = 22, 1616 ACPI_MADT_TYPE_LPC_PIC = 23, 1617 ACPI_MADT_TYPE_RINTC = 24, 1618 ACPI_MADT_TYPE_IMSIC = 25, 1619 ACPI_MADT_TYPE_APLIC = 26, 1620 ACPI_MADT_TYPE_PLIC = 27, 1621 ACPI_MADT_TYPE_GICV5_IRS = 28, 1622 ACPI_MADT_TYPE_GICV5_ITS = 29, 1623 ACPI_MADT_TYPE_GICV5_ITS_TRANSLATE = 30, 1624 ACPI_MADT_TYPE_RESERVED = 31, /* 31 to 0x7F are reserved */ 1625 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1626 }; 1627 1628 1629 /* 1630 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1631 */ 1632 1633 /* 0: Processor Local APIC */ 1634 1635 typedef struct acpi_madt_local_apic 1636 { 1637 ACPI_SUBTABLE_HEADER Header; 1638 UINT8 ProcessorId; /* ACPI processor id */ 1639 UINT8 Id; /* Processor's local APIC id */ 1640 UINT32 LapicFlags; 1641 1642 } ACPI_MADT_LOCAL_APIC; 1643 1644 1645 /* 1: IO APIC */ 1646 1647 typedef struct acpi_madt_io_apic 1648 { 1649 ACPI_SUBTABLE_HEADER Header; 1650 UINT8 Id; /* I/O APIC ID */ 1651 UINT8 Reserved; /* Reserved - must be zero */ 1652 UINT32 Address; /* APIC physical address */ 1653 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1654 1655 } ACPI_MADT_IO_APIC; 1656 1657 1658 /* 2: Interrupt Override */ 1659 1660 typedef struct acpi_madt_interrupt_override 1661 { 1662 ACPI_SUBTABLE_HEADER Header; 1663 UINT8 Bus; /* 0 - ISA */ 1664 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1665 UINT32 GlobalIrq; /* Global system interrupt */ 1666 UINT16 IntiFlags; 1667 1668 } ACPI_MADT_INTERRUPT_OVERRIDE; 1669 1670 1671 /* 3: NMI Source */ 1672 1673 typedef struct acpi_madt_nmi_source 1674 { 1675 ACPI_SUBTABLE_HEADER Header; 1676 UINT16 IntiFlags; 1677 UINT32 GlobalIrq; /* Global system interrupt */ 1678 1679 } ACPI_MADT_NMI_SOURCE; 1680 1681 1682 /* 4: Local APIC NMI */ 1683 1684 typedef struct acpi_madt_local_apic_nmi 1685 { 1686 ACPI_SUBTABLE_HEADER Header; 1687 UINT8 ProcessorId; /* ACPI processor id */ 1688 UINT16 IntiFlags; 1689 UINT8 Lint; /* LINTn to which NMI is connected */ 1690 1691 } ACPI_MADT_LOCAL_APIC_NMI; 1692 1693 1694 /* 5: Address Override */ 1695 1696 typedef struct acpi_madt_local_apic_override 1697 { 1698 ACPI_SUBTABLE_HEADER Header; 1699 UINT16 Reserved; /* Reserved, must be zero */ 1700 UINT64 Address; /* APIC physical address */ 1701 1702 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1703 1704 1705 /* 6: I/O Sapic */ 1706 1707 typedef struct acpi_madt_io_sapic 1708 { 1709 ACPI_SUBTABLE_HEADER Header; 1710 UINT8 Id; /* I/O SAPIC ID */ 1711 UINT8 Reserved; /* Reserved, must be zero */ 1712 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1713 UINT64 Address; /* SAPIC physical address */ 1714 1715 } ACPI_MADT_IO_SAPIC; 1716 1717 1718 /* 7: Local Sapic */ 1719 1720 typedef struct acpi_madt_local_sapic 1721 { 1722 ACPI_SUBTABLE_HEADER Header; 1723 UINT8 ProcessorId; /* ACPI processor id */ 1724 UINT8 Id; /* SAPIC ID */ 1725 UINT8 Eid; /* SAPIC EID */ 1726 UINT8 Reserved[3]; /* Reserved, must be zero */ 1727 UINT32 LapicFlags; 1728 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1729 char UidString[]; /* String UID - ACPI 3.0 */ 1730 1731 } ACPI_MADT_LOCAL_SAPIC; 1732 1733 1734 /* 8: Platform Interrupt Source */ 1735 1736 typedef struct acpi_madt_interrupt_source 1737 { 1738 ACPI_SUBTABLE_HEADER Header; 1739 UINT16 IntiFlags; 1740 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1741 UINT8 Id; /* Processor ID */ 1742 UINT8 Eid; /* Processor EID */ 1743 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1744 UINT32 GlobalIrq; /* Global system interrupt */ 1745 UINT32 Flags; /* Interrupt Source Flags */ 1746 1747 } ACPI_MADT_INTERRUPT_SOURCE; 1748 1749 /* Masks for Flags field above */ 1750 1751 #define ACPI_MADT_CPEI_OVERRIDE (1) 1752 1753 1754 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1755 1756 typedef struct acpi_madt_local_x2apic 1757 { 1758 ACPI_SUBTABLE_HEADER Header; 1759 UINT16 Reserved; /* Reserved - must be zero */ 1760 UINT32 LocalApicId; /* Processor x2APIC ID */ 1761 UINT32 LapicFlags; 1762 UINT32 Uid; /* ACPI processor UID */ 1763 1764 } ACPI_MADT_LOCAL_X2APIC; 1765 1766 1767 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1768 1769 typedef struct acpi_madt_local_x2apic_nmi 1770 { 1771 ACPI_SUBTABLE_HEADER Header; 1772 UINT16 IntiFlags; 1773 UINT32 Uid; /* ACPI processor UID */ 1774 UINT8 Lint; /* LINTn to which NMI is connected */ 1775 UINT8 Reserved[3]; /* Reserved - must be zero */ 1776 1777 } ACPI_MADT_LOCAL_X2APIC_NMI; 1778 1779 1780 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 + ACPI 6.7 changes) */ 1781 1782 typedef struct acpi_madt_generic_interrupt 1783 { 1784 ACPI_SUBTABLE_HEADER Header; 1785 UINT16 Reserved; /* Reserved - must be zero */ 1786 UINT32 CpuInterfaceNumber; 1787 UINT32 Uid; 1788 UINT32 Flags; 1789 UINT32 ParkingVersion; 1790 UINT32 PerformanceInterrupt; 1791 UINT64 ParkedAddress; 1792 UINT64 BaseAddress; 1793 UINT64 GicvBaseAddress; 1794 UINT64 GichBaseAddress; 1795 UINT32 VgicInterrupt; 1796 UINT64 GicrBaseAddress; 1797 UINT64 ArmMpidr; 1798 UINT8 EfficiencyClass; 1799 UINT8 Reserved2[1]; 1800 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1801 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1802 UINT16 Iaffid; /* ACPI 6.7 */ 1803 UINT32 IrsId; 1804 1805 } ACPI_MADT_GENERIC_INTERRUPT; 1806 1807 /* Masks for Flags field above */ 1808 1809 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1810 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1811 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1812 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1813 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1814 1815 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1816 1817 typedef struct acpi_madt_generic_distributor 1818 { 1819 ACPI_SUBTABLE_HEADER Header; 1820 UINT16 Reserved; /* Reserved - must be zero */ 1821 UINT32 GicId; 1822 UINT64 BaseAddress; 1823 UINT32 GlobalIrqBase; 1824 UINT8 Version; 1825 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1826 1827 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1828 1829 /* Values for Version field above and Version field in acpi_madt_gicv5_irs */ 1830 1831 enum AcpiMadtGicVersion 1832 { 1833 ACPI_MADT_GIC_VERSION_NONE = 0, 1834 ACPI_MADT_GIC_VERSION_V1 = 1, 1835 ACPI_MADT_GIC_VERSION_V2 = 2, 1836 ACPI_MADT_GIC_VERSION_V3 = 3, 1837 ACPI_MADT_GIC_VERSION_V4 = 4, 1838 ACPI_MADT_GIC_VERSION_V5 = 5, 1839 ACPI_MADT_GIC_VERSION_RESERVED = 6 /* 6 and greater are reserved */ 1840 }; 1841 1842 1843 /* 13: Generic MSI Frame (ACPI 5.1) */ 1844 1845 typedef struct acpi_madt_generic_msi_frame 1846 { 1847 ACPI_SUBTABLE_HEADER Header; 1848 UINT16 Reserved; /* Reserved - must be zero */ 1849 UINT32 MsiFrameId; 1850 UINT64 BaseAddress; 1851 UINT32 Flags; 1852 UINT16 SpiCount; 1853 UINT16 SpiBase; 1854 1855 } ACPI_MADT_GENERIC_MSI_FRAME; 1856 1857 /* Masks for Flags field above */ 1858 1859 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1860 1861 1862 /* 14: Generic Redistributor (ACPI 5.1) */ 1863 1864 typedef struct acpi_madt_generic_redistributor 1865 { 1866 ACPI_SUBTABLE_HEADER Header; 1867 UINT8 Flags; 1868 UINT8 Reserved; /* reserved - must be zero */ 1869 UINT64 BaseAddress; 1870 UINT32 Length; 1871 1872 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1873 1874 #define ACPI_MADT_GICR_NON_COHERENT (1) 1875 1876 /* 15: Generic Translator (ACPI 6.0) */ 1877 1878 typedef struct acpi_madt_generic_translator 1879 { 1880 ACPI_SUBTABLE_HEADER Header; 1881 UINT8 Flags; 1882 UINT8 Reserved; /* reserved - must be zero */ 1883 UINT32 TranslationId; 1884 UINT64 BaseAddress; 1885 UINT32 Reserved2; 1886 1887 } ACPI_MADT_GENERIC_TRANSLATOR; 1888 1889 #define ACPI_MADT_ITS_NON_COHERENT (1) 1890 1891 /* 16: Multiprocessor wakeup (ACPI 6.6) */ 1892 1893 typedef struct acpi_madt_multiproc_wakeup 1894 { 1895 ACPI_SUBTABLE_HEADER Header; 1896 UINT16 MailboxVersion; 1897 UINT32 Reserved; /* reserved - must be zero */ 1898 UINT64 BaseAddress; 1899 UINT64 ResetVector; 1900 1901 } ACPI_MADT_MULTIPROC_WAKEUP; 1902 1903 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1904 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1905 1906 typedef struct acpi_madt_multiproc_wakeup_mailbox 1907 { 1908 UINT16 Command; 1909 UINT16 Reserved; /* reserved - must be zero */ 1910 UINT32 ApicId; 1911 UINT64 WakeupVector; 1912 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1913 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1914 1915 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1916 1917 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1918 #define ACPI_MP_WAKE_COMMAND_TEST 2 1919 1920 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1921 1922 typedef struct acpi_madt_core_pic { 1923 ACPI_SUBTABLE_HEADER Header; 1924 UINT8 Version; 1925 UINT32 ProcessorId; 1926 UINT32 CoreId; 1927 UINT32 Flags; 1928 } ACPI_MADT_CORE_PIC; 1929 1930 /* Values for Version field above */ 1931 1932 enum AcpiMadtCorePicVersion { 1933 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1934 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1935 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1936 }; 1937 1938 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1939 1940 typedef struct acpi_madt_lio_pic { 1941 ACPI_SUBTABLE_HEADER Header; 1942 UINT8 Version; 1943 UINT64 Address; 1944 UINT16 Size; 1945 UINT8 Cascade[2]; 1946 UINT32 CascadeMap[2]; 1947 } ACPI_MADT_LIO_PIC; 1948 1949 /* Values for Version field above */ 1950 1951 enum AcpiMadtLioPicVersion { 1952 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1953 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1954 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1955 }; 1956 1957 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1958 1959 typedef struct acpi_madt_ht_pic { 1960 ACPI_SUBTABLE_HEADER Header; 1961 UINT8 Version; 1962 UINT64 Address; 1963 UINT16 Size; 1964 UINT8 Cascade[8]; 1965 } ACPI_MADT_HT_PIC; 1966 1967 /* Values for Version field above */ 1968 1969 enum AcpiMadtHtPicVersion { 1970 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1971 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1972 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1973 }; 1974 1975 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1976 1977 typedef struct acpi_madt_eio_pic { 1978 ACPI_SUBTABLE_HEADER Header; 1979 UINT8 Version; 1980 UINT8 Cascade; 1981 UINT8 Node; 1982 UINT64 NodeMap; 1983 } ACPI_MADT_EIO_PIC; 1984 1985 /* Values for Version field above */ 1986 1987 enum AcpiMadtEioPicVersion { 1988 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1989 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1990 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1991 }; 1992 1993 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1994 1995 typedef struct acpi_madt_msi_pic { 1996 ACPI_SUBTABLE_HEADER Header; 1997 UINT8 Version; 1998 UINT64 MsgAddress; 1999 UINT32 Start; 2000 UINT32 Count; 2001 } ACPI_MADT_MSI_PIC; 2002 2003 /* Values for Version field above */ 2004 2005 enum AcpiMadtMsiPicVersion { 2006 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 2007 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 2008 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 2009 }; 2010 2011 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 2012 2013 typedef struct acpi_madt_bio_pic { 2014 ACPI_SUBTABLE_HEADER Header; 2015 UINT8 Version; 2016 UINT64 Address; 2017 UINT16 Size; 2018 UINT16 Id; 2019 UINT16 GsiBase; 2020 } ACPI_MADT_BIO_PIC; 2021 2022 /* Values for Version field above */ 2023 2024 enum AcpiMadtBioPicVersion { 2025 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 2026 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 2027 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 2028 }; 2029 2030 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 2031 2032 typedef struct acpi_madt_lpc_pic { 2033 ACPI_SUBTABLE_HEADER Header; 2034 UINT8 Version; 2035 UINT64 Address; 2036 UINT16 Size; 2037 UINT8 Cascade; 2038 } ACPI_MADT_LPC_PIC; 2039 2040 /* Values for Version field above */ 2041 2042 enum AcpiMadtLpcPicVersion { 2043 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 2044 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 2045 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 2046 }; 2047 2048 /* 24: RISC-V INTC */ 2049 typedef struct acpi_madt_rintc { 2050 ACPI_SUBTABLE_HEADER Header; 2051 UINT8 Version; 2052 UINT8 Reserved; 2053 UINT32 Flags; 2054 UINT64 HartId; 2055 UINT32 Uid; /* ACPI processor UID */ 2056 UINT32 ExtIntcId; /* External INTC Id */ 2057 UINT64 ImsicAddr; /* IMSIC base address */ 2058 UINT32 ImsicSize; /* IMSIC size */ 2059 } ACPI_MADT_RINTC; 2060 2061 /* Values for RISC-V INTC Version field above */ 2062 2063 enum AcpiMadtRintcVersion { 2064 ACPI_MADT_RINTC_VERSION_NONE = 0, 2065 ACPI_MADT_RINTC_VERSION_V1 = 1, 2066 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 2067 }; 2068 2069 /* 25: RISC-V IMSIC */ 2070 typedef struct acpi_madt_imsic { 2071 ACPI_SUBTABLE_HEADER Header; 2072 UINT8 Version; 2073 UINT8 Reserved; 2074 UINT32 Flags; 2075 UINT16 NumIds; 2076 UINT16 NumGuestIds; 2077 UINT8 GuestIndexBits; 2078 UINT8 HartIndexBits; 2079 UINT8 GroupIndexBits; 2080 UINT8 GroupIndexShift; 2081 } ACPI_MADT_IMSIC; 2082 2083 /* 26: RISC-V APLIC */ 2084 typedef struct acpi_madt_aplic { 2085 ACPI_SUBTABLE_HEADER Header; 2086 UINT8 Version; 2087 UINT8 Id; 2088 UINT32 Flags; 2089 UINT8 HwId[8]; 2090 UINT16 NumIdcs; 2091 UINT16 NumSources; 2092 UINT32 GsiBase; 2093 UINT64 BaseAddr; 2094 UINT32 Size; 2095 } ACPI_MADT_APLIC; 2096 2097 /* 27: RISC-V PLIC */ 2098 typedef struct acpi_madt_plic { 2099 ACPI_SUBTABLE_HEADER Header; 2100 UINT8 Version; 2101 UINT8 Id; 2102 UINT8 HwId[8]; 2103 UINT16 NumIrqs; 2104 UINT16 MaxPrio; 2105 UINT32 Flags; 2106 UINT32 Size; 2107 UINT64 BaseAddr; 2108 UINT32 GsiBase; 2109 } ACPI_MADT_PLIC; 2110 2111 /* 28: Arm GICv5 IRS (ACPI 6.7) */ 2112 typedef struct acpi_madt_gicv5_irs { 2113 ACPI_SUBTABLE_HEADER Header; 2114 UINT8 Version; 2115 UINT8 Reserved; 2116 UINT32 IrsId; 2117 UINT32 Flags; 2118 UINT32 Reserved2; 2119 UINT64 ConfigBaseAddress; 2120 UINT64 SetlpiBaseAddress; 2121 } ACPI_MADT_GICV5_IRS; 2122 2123 #define ACPI_MADT_IRS_NON_COHERENT (1) 2124 2125 2126 /* 29: Arm GICv5 ITS Config Frame (ACPI 6.7) */ 2127 typedef struct acpi_madt_gicv5_translator 2128 { 2129 ACPI_SUBTABLE_HEADER Header; 2130 UINT8 Flags; 2131 UINT8 Reserved; /* reserved - must be zero */ 2132 UINT32 TranslatorId; 2133 UINT64 BaseAddress; 2134 2135 } ACPI_MADT_GICv5_ITS; 2136 2137 #define ACPI_MADT_GICV5_ITS_NON_COHERENT (1) 2138 2139 /* 30: Arm GICv5 ITS Translate Frame (ACPI 6.7) */ 2140 typedef struct acpi_madt_gicv5_translate_frame 2141 { 2142 ACPI_SUBTABLE_HEADER Header; 2143 UINT16 Reserved; /* reserved - must be zero */ 2144 UINT32 LinkedTranslatorId; 2145 UINT32 TranslateFrameId; 2146 UINT32 Reserved2; 2147 UINT64 BaseAddress; 2148 2149 } ACPI_MADT_GICv5_ITS_TRANSLATE; 2150 2151 2152 /* 80: OEM data */ 2153 2154 typedef struct acpi_madt_oem_data 2155 { 2156 ACPI_FLEX_ARRAY(UINT8, OemData); 2157 } ACPI_MADT_OEM_DATA; 2158 2159 2160 /* 2161 * Common flags fields for MADT subtables 2162 */ 2163 2164 /* MADT Local APIC flags */ 2165 2166 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 2167 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 2168 2169 /* MADT MPS INTI flags (IntiFlags) */ 2170 2171 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 2172 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 2173 2174 /* Values for MPS INTI flags */ 2175 2176 #define ACPI_MADT_POLARITY_CONFORMS 0 2177 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 2178 #define ACPI_MADT_POLARITY_RESERVED 2 2179 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 2180 2181 #define ACPI_MADT_TRIGGER_CONFORMS (0) 2182 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 2183 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 2184 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 2185 2186 2187 /******************************************************************************* 2188 * 2189 * MCFG - PCI Memory Mapped Configuration table and subtable 2190 * Version 1 2191 * 2192 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 2193 * 2194 ******************************************************************************/ 2195 2196 typedef struct acpi_table_mcfg 2197 { 2198 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2199 UINT8 Reserved[8]; 2200 2201 } ACPI_TABLE_MCFG; 2202 2203 2204 /* Subtable */ 2205 2206 typedef struct acpi_mcfg_allocation 2207 { 2208 UINT64 Address; /* Base address, processor-relative */ 2209 UINT16 PciSegment; /* PCI segment group number */ 2210 UINT8 StartBusNumber; /* Starting PCI Bus number */ 2211 UINT8 EndBusNumber; /* Final PCI Bus number */ 2212 UINT32 Reserved; 2213 2214 } ACPI_MCFG_ALLOCATION; 2215 2216 2217 /******************************************************************************* 2218 * 2219 * MCHI - Management Controller Host Interface Table 2220 * Version 1 2221 * 2222 * Conforms to "Management Component Transport Protocol (MCTP) Host 2223 * Interface Specification", Revision 1.0.0a, October 13, 2009 2224 * 2225 ******************************************************************************/ 2226 2227 typedef struct acpi_table_mchi 2228 { 2229 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2230 UINT8 InterfaceType; 2231 UINT8 Protocol; 2232 UINT64 ProtocolData; 2233 UINT8 InterruptType; 2234 UINT8 Gpe; 2235 UINT8 PciDeviceFlag; 2236 UINT32 GlobalInterrupt; 2237 ACPI_GENERIC_ADDRESS ControlRegister; 2238 UINT8 PciSegment; 2239 UINT8 PciBus; 2240 UINT8 PciDevice; 2241 UINT8 PciFunction; 2242 2243 } ACPI_TABLE_MCHI; 2244 2245 /******************************************************************************* 2246 * 2247 * MPAM - Memory System Resource Partitioning and Monitoring 2248 * 2249 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 2250 * Document number: ARM DEN 0065, December, 2022. 2251 * 2252 ******************************************************************************/ 2253 2254 /* MPAM RIS locator types. Table 11, Location types */ 2255 enum AcpiMpamLocatorType { 2256 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 2257 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 2258 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 2259 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 2260 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 2261 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 2262 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 2263 }; 2264 2265 /* MPAM Functional dependency descriptor. Table 10 */ 2266 typedef struct acpi_mpam_func_deps 2267 { 2268 UINT32 Producer; 2269 UINT32 Reserved; 2270 } ACPI_MPAM_FUNC_DEPS; 2271 2272 /* MPAM Processor cache locator descriptor. Table 13 */ 2273 typedef struct acpi_mpam_resource_cache_locator 2274 { 2275 UINT64 CacheReference; 2276 UINT32 Reserved; 2277 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 2278 2279 /* MPAM Memory locator descriptor. Table 14 */ 2280 typedef struct acpi_mpam_resource_memory_locator 2281 { 2282 UINT64 ProximityDomain; 2283 UINT32 Reserved; 2284 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 2285 2286 /* MPAM SMMU locator descriptor. Table 15 */ 2287 typedef struct acpi_mpam_resource_smmu_locator 2288 { 2289 UINT64 SmmuInterface; 2290 UINT32 Reserved; 2291 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 2292 2293 /* MPAM Memory-side cache locator descriptor. Table 16 */ 2294 typedef struct acpi_mpam_resource_memcache_locator 2295 { 2296 UINT8 Reserved[7]; 2297 UINT8 Level; 2298 UINT32 Reference; 2299 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 2300 2301 /* MPAM ACPI device locator descriptor. Table 17 */ 2302 typedef struct acpi_mpam_resource_acpi_locator 2303 { 2304 UINT64 AcpiHwId; 2305 UINT32 AcpiUniqueId; 2306 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 2307 2308 /* MPAM Interconnect locator descriptor. Table 18 */ 2309 typedef struct acpi_mpam_resource_interconnect_locator 2310 { 2311 UINT64 InterConnectDescTblOff; 2312 UINT32 Reserved; 2313 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 2314 2315 /* MPAM Locator structure. Table 12 */ 2316 typedef struct acpi_mpam_resource_generic_locator 2317 { 2318 UINT64 Descriptor1; 2319 UINT32 Descriptor2; 2320 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 2321 2322 typedef union acpi_mpam_resource_locator 2323 { 2324 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 2325 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 2326 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 2327 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 2328 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 2329 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 2330 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 2331 } ACPI_MPAM_RESOURCE_LOCATOR; 2332 2333 /* Memory System Component Resource Node Structure Table 9 */ 2334 typedef struct acpi_mpam_resource_node 2335 { 2336 UINT32 Identifier; 2337 UINT8 RISIndex; 2338 UINT16 Reserved1; 2339 UINT8 LocatorType; 2340 ACPI_MPAM_RESOURCE_LOCATOR Locator; 2341 UINT32 NumFunctionalDeps; 2342 } ACPI_MPAM_RESOURCE_NODE; 2343 2344 /* Memory System Component (MSC) Node Structure. Table 4 */ 2345 typedef struct acpi_mpam_msc_node 2346 { 2347 UINT16 Length; 2348 UINT8 InterfaceType; 2349 UINT8 Reserved; 2350 UINT32 Identifier; 2351 UINT64 BaseAddress; 2352 UINT32 MMIOSize; 2353 UINT32 OverflowInterrupt; 2354 UINT32 OverflowInterruptFlags; 2355 UINT32 Reserved1; 2356 UINT32 OverflowInterruptAffinity; 2357 UINT32 ErrorInterrupt; 2358 UINT32 ErrorInterruptFlags; 2359 UINT32 Reserved2; 2360 UINT32 ErrorInterruptAffinity; 2361 UINT32 MaxNrdyUsec; 2362 UINT64 HardwareIdLinkedDevice; 2363 UINT32 InstanceIdLinkedDevice; 2364 UINT32 NumResourceNodes; 2365 } ACPI_MPAM_MSC_NODE; 2366 2367 typedef struct acpi_table_mpam 2368 { 2369 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2370 } ACPI_TABLE_MPAM; 2371 2372 /******************************************************************************* 2373 * 2374 * MPST - Memory Power State Table (ACPI 5.0) 2375 * Version 1 2376 * 2377 ******************************************************************************/ 2378 2379 #define ACPI_MPST_CHANNEL_INFO \ 2380 UINT8 ChannelId; \ 2381 UINT8 Reserved1[3]; \ 2382 UINT16 PowerNodeCount; \ 2383 UINT16 Reserved2; 2384 2385 /* Main table */ 2386 2387 typedef struct acpi_table_mpst 2388 { 2389 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2390 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2391 2392 } ACPI_TABLE_MPST; 2393 2394 2395 /* Memory Platform Communication Channel Info */ 2396 2397 typedef struct acpi_mpst_channel 2398 { 2399 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2400 2401 } ACPI_MPST_CHANNEL; 2402 2403 2404 /* Memory Power Node Structure */ 2405 2406 typedef struct acpi_mpst_power_node 2407 { 2408 UINT8 Flags; 2409 UINT8 Reserved1; 2410 UINT16 NodeId; 2411 UINT32 Length; 2412 UINT64 RangeAddress; 2413 UINT64 RangeLength; 2414 UINT32 NumPowerStates; 2415 UINT32 NumPhysicalComponents; 2416 2417 } ACPI_MPST_POWER_NODE; 2418 2419 /* Values for Flags field above */ 2420 2421 #define ACPI_MPST_ENABLED 1 2422 #define ACPI_MPST_POWER_MANAGED 2 2423 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 2424 2425 2426 /* Memory Power State Structure (follows POWER_NODE above) */ 2427 2428 typedef struct acpi_mpst_power_state 2429 { 2430 UINT8 PowerState; 2431 UINT8 InfoIndex; 2432 2433 } ACPI_MPST_POWER_STATE; 2434 2435 2436 /* Physical Component ID Structure (follows POWER_STATE above) */ 2437 2438 typedef struct acpi_mpst_component 2439 { 2440 UINT16 ComponentId; 2441 2442 } ACPI_MPST_COMPONENT; 2443 2444 2445 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 2446 2447 typedef struct acpi_mpst_data_hdr 2448 { 2449 UINT16 CharacteristicsCount; 2450 UINT16 Reserved; 2451 2452 } ACPI_MPST_DATA_HDR; 2453 2454 typedef struct acpi_mpst_power_data 2455 { 2456 UINT8 StructureId; 2457 UINT8 Flags; 2458 UINT16 Reserved1; 2459 UINT32 AveragePower; 2460 UINT32 PowerSaving; 2461 UINT64 ExitLatency; 2462 UINT64 Reserved2; 2463 2464 } ACPI_MPST_POWER_DATA; 2465 2466 /* Values for Flags field above */ 2467 2468 #define ACPI_MPST_PRESERVE 1 2469 #define ACPI_MPST_AUTOENTRY 2 2470 #define ACPI_MPST_AUTOEXIT 4 2471 2472 2473 /* Shared Memory Region (not part of an ACPI table) */ 2474 2475 typedef struct acpi_mpst_shared 2476 { 2477 UINT32 Signature; 2478 UINT16 PccCommand; 2479 UINT16 PccStatus; 2480 UINT32 CommandRegister; 2481 UINT32 StatusRegister; 2482 UINT32 PowerStateId; 2483 UINT32 PowerNodeId; 2484 UINT64 EnergyConsumed; 2485 UINT64 AveragePower; 2486 2487 } ACPI_MPST_SHARED; 2488 2489 2490 /******************************************************************************* 2491 * 2492 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 2493 * Version 1 2494 * 2495 ******************************************************************************/ 2496 2497 typedef struct acpi_table_msct 2498 { 2499 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2500 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 2501 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 2502 UINT32 MaxClockDomains; /* Max number of clock domains */ 2503 UINT64 MaxAddress; /* Max physical address in system */ 2504 2505 } ACPI_TABLE_MSCT; 2506 2507 2508 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 2509 2510 typedef struct acpi_msct_proximity 2511 { 2512 UINT8 Revision; 2513 UINT8 Length; 2514 UINT32 RangeStart; /* Start of domain range */ 2515 UINT32 RangeEnd; /* End of domain range */ 2516 UINT32 ProcessorCapacity; 2517 UINT64 MemoryCapacity; /* In bytes */ 2518 2519 } ACPI_MSCT_PROXIMITY; 2520 2521 2522 /******************************************************************************* 2523 * 2524 * MRRM - Memory Range and Region Mapping (MRRM) table 2525 * Conforms to "Intel Resource Director Technology Architecture Specification" 2526 * Version 1.1, January 2025 2527 * 2528 ******************************************************************************/ 2529 2530 typedef struct acpi_table_mrrm 2531 { 2532 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2533 UINT8 MaxMemRegion; /* Max Memory Regions supported */ 2534 UINT8 Flags; /* Region assignment type */ 2535 UINT8 Reserved[26]; 2536 UINT8 Memory_Range_Entry[]; 2537 2538 } ACPI_TABLE_MRRM; 2539 2540 /* Flags */ 2541 #define ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS (1<<0) 2542 2543 /******************************************************************************* 2544 * 2545 * Memory Range entry - Memory Range entry in MRRM table 2546 * 2547 ******************************************************************************/ 2548 2549 typedef struct acpi_mrrm_mem_range_entry 2550 { 2551 ACPI_SUBTBL_HDR_16 Header; 2552 UINT32 Reserved0; /* Reserved */ 2553 UINT64 AddrBase; /* Base addr of the mem range */ 2554 UINT64 AddrLen; /* Length of the mem range */ 2555 UINT16 RegionIdFlags; /* Valid local or remote Region-ID */ 2556 UINT8 LocalRegionId; /* Platform-assigned static local Region-ID */ 2557 UINT8 RemoteRegionId; /* Platform-assigned static remote Region-ID */ 2558 UINT32 Reserved1; /* Reserved */ 2559 /* Region-ID Programming Registers[] */ 2560 2561 } ACPI_MRRM_MEM_RANGE_ENTRY; 2562 2563 /* Values for RegionIdFlags above */ 2564 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL (1<<0) 2565 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE (1<<1) 2566 2567 2568 /******************************************************************************* 2569 * 2570 * MSDM - Microsoft Data Management table 2571 * 2572 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 2573 * November 29, 2011. Copyright 2011 Microsoft 2574 * 2575 ******************************************************************************/ 2576 2577 /* Basic MSDM table is only the common ACPI header */ 2578 2579 typedef struct acpi_table_msdm 2580 { 2581 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2582 2583 } ACPI_TABLE_MSDM; 2584 2585 2586 /******************************************************************************* 2587 * 2588 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2589 * Version 1 2590 * 2591 ******************************************************************************/ 2592 2593 typedef struct acpi_table_nfit 2594 { 2595 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2596 UINT32 Reserved; /* Reserved, must be zero */ 2597 2598 } ACPI_TABLE_NFIT; 2599 2600 /* Subtable header for NFIT */ 2601 2602 typedef struct acpi_nfit_header 2603 { 2604 UINT16 Type; 2605 UINT16 Length; 2606 2607 } ACPI_NFIT_HEADER; 2608 2609 2610 /* Values for subtable type in ACPI_NFIT_HEADER */ 2611 2612 enum AcpiNfitType 2613 { 2614 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2615 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2616 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2617 ACPI_NFIT_TYPE_SMBIOS = 3, 2618 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2619 ACPI_NFIT_TYPE_DATA_REGION = 5, 2620 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2621 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2622 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2623 }; 2624 2625 /* 2626 * NFIT Subtables 2627 */ 2628 2629 /* 0: System Physical Address Range Structure */ 2630 2631 typedef struct acpi_nfit_system_address 2632 { 2633 ACPI_NFIT_HEADER Header; 2634 UINT16 RangeIndex; 2635 UINT16 Flags; 2636 UINT32 Reserved; /* Reserved, must be zero */ 2637 UINT32 ProximityDomain; 2638 UINT8 RangeGuid[16]; 2639 UINT64 Address; 2640 UINT64 Length; 2641 UINT64 MemoryMapping; 2642 UINT64 LocationCookie; /* ACPI 6.4 */ 2643 2644 } ACPI_NFIT_SYSTEM_ADDRESS; 2645 2646 /* Flags */ 2647 2648 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2649 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2650 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2651 2652 /* Range Type GUIDs appear in the include/acuuid.h file */ 2653 2654 2655 /* 1: Memory Device to System Address Range Map Structure */ 2656 2657 typedef struct acpi_nfit_memory_map 2658 { 2659 ACPI_NFIT_HEADER Header; 2660 UINT32 DeviceHandle; 2661 UINT16 PhysicalId; 2662 UINT16 RegionId; 2663 UINT16 RangeIndex; 2664 UINT16 RegionIndex; 2665 UINT64 RegionSize; 2666 UINT64 RegionOffset; 2667 UINT64 Address; 2668 UINT16 InterleaveIndex; 2669 UINT16 InterleaveWays; 2670 UINT16 Flags; 2671 UINT16 Reserved; /* Reserved, must be zero */ 2672 2673 } ACPI_NFIT_MEMORY_MAP; 2674 2675 /* Flags */ 2676 2677 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2678 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2679 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2680 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2681 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2682 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2683 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2684 2685 2686 /* 2: Interleave Structure */ 2687 2688 typedef struct acpi_nfit_interleave 2689 { 2690 ACPI_NFIT_HEADER Header; 2691 UINT16 InterleaveIndex; 2692 UINT16 Reserved; /* Reserved, must be zero */ 2693 UINT32 LineCount; 2694 UINT32 LineSize; 2695 UINT32 LineOffset[]; /* Variable length */ 2696 2697 } ACPI_NFIT_INTERLEAVE; 2698 2699 2700 /* 3: SMBIOS Management Information Structure */ 2701 2702 typedef struct acpi_nfit_smbios 2703 { 2704 ACPI_NFIT_HEADER Header; 2705 UINT32 Reserved; /* Reserved, must be zero */ 2706 UINT8 Data[]; /* Variable length */ 2707 2708 } ACPI_NFIT_SMBIOS; 2709 2710 2711 /* 4: NVDIMM Control Region Structure */ 2712 2713 typedef struct acpi_nfit_control_region 2714 { 2715 ACPI_NFIT_HEADER Header; 2716 UINT16 RegionIndex; 2717 UINT16 VendorId; 2718 UINT16 DeviceId; 2719 UINT16 RevisionId; 2720 UINT16 SubsystemVendorId; 2721 UINT16 SubsystemDeviceId; 2722 UINT16 SubsystemRevisionId; 2723 UINT8 ValidFields; 2724 UINT8 ManufacturingLocation; 2725 UINT16 ManufacturingDate; 2726 UINT8 Reserved[2]; /* Reserved, must be zero */ 2727 UINT32 SerialNumber; 2728 UINT16 Code; 2729 UINT16 Windows; 2730 UINT64 WindowSize; 2731 UINT64 CommandOffset; 2732 UINT64 CommandSize; 2733 UINT64 StatusOffset; 2734 UINT64 StatusSize; 2735 UINT16 Flags; 2736 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2737 2738 } ACPI_NFIT_CONTROL_REGION; 2739 2740 /* Flags */ 2741 2742 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2743 2744 /* ValidFields bits */ 2745 2746 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2747 2748 2749 /* 5: NVDIMM Block Data Window Region Structure */ 2750 2751 typedef struct acpi_nfit_data_region 2752 { 2753 ACPI_NFIT_HEADER Header; 2754 UINT16 RegionIndex; 2755 UINT16 Windows; 2756 UINT64 Offset; 2757 UINT64 Size; 2758 UINT64 Capacity; 2759 UINT64 StartAddress; 2760 2761 } ACPI_NFIT_DATA_REGION; 2762 2763 2764 /* 6: Flush Hint Address Structure */ 2765 2766 typedef struct acpi_nfit_flush_address 2767 { 2768 ACPI_NFIT_HEADER Header; 2769 UINT32 DeviceHandle; 2770 UINT16 HintCount; 2771 UINT8 Reserved[6]; /* Reserved, must be zero */ 2772 UINT64 HintAddress[]; /* Variable length */ 2773 2774 } ACPI_NFIT_FLUSH_ADDRESS; 2775 2776 2777 /* 7: Platform Capabilities Structure */ 2778 2779 typedef struct acpi_nfit_capabilities 2780 { 2781 ACPI_NFIT_HEADER Header; 2782 UINT8 HighestCapability; 2783 UINT8 Reserved[3]; /* Reserved, must be zero */ 2784 UINT32 Capabilities; 2785 UINT32 Reserved2; 2786 2787 } ACPI_NFIT_CAPABILITIES; 2788 2789 /* Capabilities Flags */ 2790 2791 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2792 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2793 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2794 2795 2796 /* 2797 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2798 */ 2799 typedef struct nfit_device_handle 2800 { 2801 UINT32 Handle; 2802 2803 } NFIT_DEVICE_HANDLE; 2804 2805 /* Device handle construction and extraction macros */ 2806 2807 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2808 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2809 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2810 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2811 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2812 2813 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2814 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2815 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2816 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2817 #define ACPI_NFIT_NODE_ID_OFFSET 16 2818 2819 /* Macro to construct a NFIT/NVDIMM device handle */ 2820 2821 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2822 ((dimm) | \ 2823 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2824 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2825 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2826 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2827 2828 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2829 2830 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2831 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2832 2833 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2834 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2835 2836 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2837 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2838 2839 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2840 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2841 2842 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2843 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2844 2845 2846 /******************************************************************************* 2847 * 2848 * NHLT - Non HDAudio Link Table 2849 * Version 1 2850 * 2851 ******************************************************************************/ 2852 2853 typedef struct acpi_table_nhlt 2854 { 2855 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2856 UINT8 EndpointsCount; 2857 /* 2858 * ACPI_NHLT_ENDPOINT Endpoints[]; 2859 * ACPI_NHLT_CONFIG OEDConfig; 2860 */ 2861 2862 } ACPI_TABLE_NHLT; 2863 2864 typedef struct acpi_nhlt_endpoint 2865 { 2866 UINT32 Length; 2867 UINT8 LinkType; 2868 UINT8 InstanceId; 2869 UINT16 VendorId; 2870 UINT16 DeviceId; 2871 UINT16 RevisionId; 2872 UINT32 SubsystemId; 2873 UINT8 DeviceType; 2874 UINT8 Direction; 2875 UINT8 VirtualBusId; 2876 /* 2877 * ACPI_NHLT_CONFIG DeviceConfig; 2878 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig; 2879 * ACPI_NHLT_DEVICES_INFO DevicesInfo; 2880 */ 2881 2882 } ACPI_NHLT_ENDPOINT; 2883 2884 /* Values for LinkType field above */ 2885 2886 #define ACPI_NHLT_LINKTYPE_HDA 0 2887 #define ACPI_NHLT_LINKTYPE_DSP 1 2888 #define ACPI_NHLT_LINKTYPE_PDM 2 2889 #define ACPI_NHLT_LINKTYPE_SSP 3 2890 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2891 #define ACPI_NHLT_LINKTYPE_SDW 5 2892 #define ACPI_NHLT_LINKTYPE_UAOL 6 2893 2894 /* Values for DeviceId field above */ 2895 2896 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2897 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2898 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2899 2900 /* Values for DeviceType field above */ 2901 2902 /* Device types unique to endpoint of LinkType=PDM */ 2903 #define ACPI_NHLT_DEVICETYPE_PDM 0 2904 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2905 /* Device types unique to endpoint of LinkType=SSP */ 2906 #define ACPI_NHLT_DEVICETYPE_BT 0 2907 #define ACPI_NHLT_DEVICETYPE_FM 1 2908 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2909 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2910 2911 /* Values for Direction field above */ 2912 2913 #define ACPI_NHLT_DIR_RENDER 0 2914 #define ACPI_NHLT_DIR_CAPTURE 1 2915 2916 typedef struct acpi_nhlt_config 2917 { 2918 UINT32 CapabilitiesSize; 2919 UINT8 Capabilities[1]; 2920 2921 } ACPI_NHLT_CONFIG; 2922 2923 typedef struct acpi_nhlt_gendevice_config 2924 { 2925 UINT8 VirtualSlot; 2926 UINT8 ConfigType; 2927 2928 } ACPI_NHLT_GENDEVICE_CONFIG; 2929 2930 /* Values for ConfigType field above */ 2931 2932 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2933 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2934 2935 typedef struct acpi_nhlt_micdevice_config 2936 { 2937 UINT8 VirtualSlot; 2938 UINT8 ConfigType; 2939 UINT8 ArrayType; 2940 2941 } ACPI_NHLT_MICDEVICE_CONFIG; 2942 2943 /* Values for ArrayType field above */ 2944 2945 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2946 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2947 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2948 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2949 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2950 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2951 2952 typedef struct acpi_nhlt_vendor_mic_config 2953 { 2954 UINT8 Type; 2955 UINT8 Panel; 2956 UINT16 SpeakerPositionDistance; /* mm */ 2957 UINT16 HorizontalOffset; /* mm */ 2958 UINT16 VerticalOffset; /* mm */ 2959 UINT8 FrequencyLowBand; /* 5*Hz */ 2960 UINT8 FrequencyHighBand; /* 500*Hz */ 2961 UINT16 DirectionAngle; /* -180 - +180 */ 2962 UINT16 ElevationAngle; /* -180 - +180 */ 2963 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */ 2964 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */ 2965 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */ 2966 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */ 2967 2968 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2969 2970 /* Values for Type field above */ 2971 2972 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2973 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2974 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2975 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2976 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2977 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2978 #define ACPI_NHLT_MICTYPE_RESERVED 6 2979 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2980 2981 /* Values for Panel field above */ 2982 2983 #define ACPI_NHLT_MICLOCATION_TOP 0 2984 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2985 #define ACPI_NHLT_MICLOCATION_LEFT 2 2986 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2987 #define ACPI_NHLT_MICLOCATION_FRONT 4 2988 #define ACPI_NHLT_MICLOCATION_REAR 5 2989 2990 typedef struct acpi_nhlt_vendor_micdevice_config 2991 { 2992 UINT8 VirtualSlot; 2993 UINT8 ConfigType; 2994 UINT8 ArrayType; 2995 UINT8 MicsCount; 2996 ACPI_NHLT_VENDOR_MIC_CONFIG Mics[]; 2997 2998 } ACPI_NHLT_VENDOR_MICDEVICE_CONFIG; 2999 3000 typedef union acpi_nhlt_device_config 3001 { 3002 UINT8 VirtualSlot; 3003 ACPI_NHLT_GENDEVICE_CONFIG Gen; 3004 ACPI_NHLT_MICDEVICE_CONFIG Mic; 3005 ACPI_NHLT_VENDOR_MICDEVICE_CONFIG VendorMic; 3006 3007 } ACPI_NHLT_DEVICE_CONFIG; 3008 3009 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 3010 typedef struct acpi_nhlt_wave_formatext 3011 { 3012 UINT16 FormatTag; 3013 UINT16 ChannelCount; 3014 UINT32 SamplesPerSec; 3015 UINT32 AvgBytesPerSec; 3016 UINT16 BlockAlign; 3017 UINT16 BitsPerSample; 3018 UINT16 ExtraFormatSize; 3019 UINT16 ValidBitsPerSample; 3020 UINT32 ChannelMask; 3021 UINT8 Subformat[16]; 3022 3023 } ACPI_NHLT_WAVE_FORMATEXT; 3024 3025 typedef struct acpi_nhlt_format_config 3026 { 3027 ACPI_NHLT_WAVE_FORMATEXT Format; 3028 ACPI_NHLT_CONFIG Config; 3029 3030 } ACPI_NHLT_FORMAT_CONFIG; 3031 3032 typedef struct acpi_nhlt_formats_config 3033 { 3034 UINT8 FormatsCount; 3035 ACPI_NHLT_FORMAT_CONFIG Formats[]; 3036 3037 } ACPI_NHLT_FORMATS_CONFIG; 3038 3039 typedef struct acpi_nhlt_device_info 3040 { 3041 UINT8 Id[16]; 3042 UINT8 InstanceId; 3043 UINT8 PortId; 3044 3045 } ACPI_NHLT_DEVICE_INFO; 3046 3047 typedef struct acpi_nhlt_devices_info 3048 { 3049 UINT8 DevicesCount; 3050 ACPI_NHLT_DEVICE_INFO Devices[]; 3051 3052 } ACPI_NHLT_DEVICES_INFO; 3053 3054 3055 /******************************************************************************* 3056 * 3057 * PCCT - Platform Communications Channel Table (ACPI 5.0) 3058 * Version 2 (ACPI 6.2) 3059 * 3060 ******************************************************************************/ 3061 3062 typedef struct acpi_table_pcct 3063 { 3064 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3065 UINT32 Flags; 3066 UINT64 Reserved; 3067 3068 } ACPI_TABLE_PCCT; 3069 3070 /* Values for Flags field above */ 3071 3072 #define ACPI_PCCT_DOORBELL 1 3073 3074 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 3075 3076 enum AcpiPcctType 3077 { 3078 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 3079 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 3080 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 3081 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 3082 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 3083 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 3084 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 3085 }; 3086 3087 /* 3088 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 3089 */ 3090 3091 /* 0: Generic Communications Subspace */ 3092 3093 typedef struct acpi_pcct_subspace 3094 { 3095 ACPI_SUBTABLE_HEADER Header; 3096 UINT8 Reserved[6]; 3097 UINT64 BaseAddress; 3098 UINT64 Length; 3099 ACPI_GENERIC_ADDRESS DoorbellRegister; 3100 UINT64 PreserveMask; 3101 UINT64 WriteMask; 3102 UINT32 Latency; 3103 UINT32 MaxAccessRate; 3104 UINT16 MinTurnaroundTime; 3105 3106 } ACPI_PCCT_SUBSPACE; 3107 3108 3109 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 3110 3111 typedef struct acpi_pcct_hw_reduced 3112 { 3113 ACPI_SUBTABLE_HEADER Header; 3114 UINT32 PlatformInterrupt; 3115 UINT8 Flags; 3116 UINT8 Reserved; 3117 UINT64 BaseAddress; 3118 UINT64 Length; 3119 ACPI_GENERIC_ADDRESS DoorbellRegister; 3120 UINT64 PreserveMask; 3121 UINT64 WriteMask; 3122 UINT32 Latency; 3123 UINT32 MaxAccessRate; 3124 UINT16 MinTurnaroundTime; 3125 3126 } ACPI_PCCT_HW_REDUCED; 3127 3128 3129 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 3130 3131 typedef struct acpi_pcct_hw_reduced_type2 3132 { 3133 ACPI_SUBTABLE_HEADER Header; 3134 UINT32 PlatformInterrupt; 3135 UINT8 Flags; 3136 UINT8 Reserved; 3137 UINT64 BaseAddress; 3138 UINT64 Length; 3139 ACPI_GENERIC_ADDRESS DoorbellRegister; 3140 UINT64 PreserveMask; 3141 UINT64 WriteMask; 3142 UINT32 Latency; 3143 UINT32 MaxAccessRate; 3144 UINT16 MinTurnaroundTime; 3145 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3146 UINT64 AckPreserveMask; 3147 UINT64 AckWriteMask; 3148 3149 } ACPI_PCCT_HW_REDUCED_TYPE2; 3150 3151 3152 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 3153 3154 typedef struct acpi_pcct_ext_pcc_master 3155 { 3156 ACPI_SUBTABLE_HEADER Header; 3157 UINT32 PlatformInterrupt; 3158 UINT8 Flags; 3159 UINT8 Reserved1; 3160 UINT64 BaseAddress; 3161 UINT32 Length; 3162 ACPI_GENERIC_ADDRESS DoorbellRegister; 3163 UINT64 PreserveMask; 3164 UINT64 WriteMask; 3165 UINT32 Latency; 3166 UINT32 MaxAccessRate; 3167 UINT32 MinTurnaroundTime; 3168 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3169 UINT64 AckPreserveMask; 3170 UINT64 AckSetMask; 3171 UINT64 Reserved2; 3172 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3173 UINT64 CmdCompleteMask; 3174 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 3175 UINT64 CmdUpdatePreserveMask; 3176 UINT64 CmdUpdateSetMask; 3177 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3178 UINT64 ErrorStatusMask; 3179 3180 } ACPI_PCCT_EXT_PCC_MASTER; 3181 3182 3183 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 3184 3185 typedef struct acpi_pcct_ext_pcc_slave 3186 { 3187 ACPI_SUBTABLE_HEADER Header; 3188 UINT32 PlatformInterrupt; 3189 UINT8 Flags; 3190 UINT8 Reserved1; 3191 UINT64 BaseAddress; 3192 UINT32 Length; 3193 ACPI_GENERIC_ADDRESS DoorbellRegister; 3194 UINT64 PreserveMask; 3195 UINT64 WriteMask; 3196 UINT32 Latency; 3197 UINT32 MaxAccessRate; 3198 UINT32 MinTurnaroundTime; 3199 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3200 UINT64 AckPreserveMask; 3201 UINT64 AckSetMask; 3202 UINT64 Reserved2; 3203 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3204 UINT64 CmdCompleteMask; 3205 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 3206 UINT64 CmdUpdatePreserveMask; 3207 UINT64 CmdUpdateSetMask; 3208 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3209 UINT64 ErrorStatusMask; 3210 3211 } ACPI_PCCT_EXT_PCC_SLAVE; 3212 3213 /* 5: HW Registers based Communications Subspace */ 3214 3215 typedef struct acpi_pcct_hw_reg 3216 { 3217 ACPI_SUBTABLE_HEADER Header; 3218 UINT16 Version; 3219 UINT64 BaseAddress; 3220 UINT64 Length; 3221 ACPI_GENERIC_ADDRESS DoorbellRegister; 3222 UINT64 DoorbellPreserve; 3223 UINT64 DoorbellWrite; 3224 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3225 UINT64 CmdCompleteMask; 3226 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3227 UINT64 ErrorStatusMask; 3228 UINT32 NominalLatency; 3229 UINT32 MinTurnaroundTime; 3230 3231 } ACPI_PCCT_HW_REG; 3232 3233 3234 /* Values for doorbell flags above */ 3235 3236 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 3237 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 3238 3239 3240 /* 3241 * PCC memory structures (not part of the ACPI table) 3242 */ 3243 3244 /* Shared Memory Region */ 3245 3246 typedef struct acpi_pcct_shared_memory 3247 { 3248 UINT32 Signature; 3249 UINT16 Command; 3250 UINT16 Status; 3251 3252 } ACPI_PCCT_SHARED_MEMORY; 3253 3254 3255 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 3256 3257 typedef struct acpi_pcct_ext_pcc_shared_memory 3258 { 3259 UINT32 Signature; 3260 UINT32 Flags; 3261 UINT32 Length; 3262 UINT32 Command; 3263 3264 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 3265 3266 3267 /******************************************************************************* 3268 * 3269 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 3270 * Version 0 3271 * 3272 ******************************************************************************/ 3273 3274 typedef struct acpi_table_pdtt 3275 { 3276 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3277 UINT8 TriggerCount; 3278 UINT8 Reserved[3]; 3279 UINT32 ArrayOffset; 3280 3281 } ACPI_TABLE_PDTT; 3282 3283 3284 /* 3285 * PDTT Communication Channel Identifier Structure. 3286 * The number of these structures is defined by TriggerCount above, 3287 * starting at ArrayOffset. 3288 */ 3289 typedef struct acpi_pdtt_channel 3290 { 3291 UINT8 SubchannelId; 3292 UINT8 Flags; 3293 3294 } ACPI_PDTT_CHANNEL; 3295 3296 /* Flags for above */ 3297 3298 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 3299 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 3300 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 3301 3302 3303 /******************************************************************************* 3304 * 3305 * PHAT - Platform Health Assessment Table (ACPI 6.4) 3306 * Version 1 3307 * 3308 ******************************************************************************/ 3309 3310 typedef struct acpi_table_phat 3311 { 3312 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3313 3314 } ACPI_TABLE_PHAT; 3315 3316 /* Common header for PHAT subtables that follow main table */ 3317 3318 typedef struct acpi_phat_header 3319 { 3320 UINT16 Type; 3321 UINT16 Length; 3322 UINT8 Revision; 3323 3324 } ACPI_PHAT_HEADER; 3325 3326 3327 /* Values for Type field above */ 3328 3329 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 3330 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 3331 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 3332 3333 /* 3334 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 3335 */ 3336 3337 /* 0: Firmware Version Data Record */ 3338 3339 typedef struct acpi_phat_version_data 3340 { 3341 ACPI_PHAT_HEADER Header; 3342 UINT8 Reserved[3]; 3343 UINT32 ElementCount; 3344 3345 } ACPI_PHAT_VERSION_DATA; 3346 3347 typedef struct acpi_phat_version_element 3348 { 3349 UINT8 Guid[16]; 3350 UINT64 VersionValue; 3351 UINT32 ProducerId; 3352 3353 } ACPI_PHAT_VERSION_ELEMENT; 3354 3355 3356 /* 1: Firmware Health Data Record */ 3357 3358 typedef struct acpi_phat_health_data 3359 { 3360 ACPI_PHAT_HEADER Header; 3361 UINT8 Reserved[2]; 3362 UINT8 Health; 3363 UINT8 DeviceGuid[16]; 3364 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 3365 3366 } ACPI_PHAT_HEALTH_DATA; 3367 3368 /* Values for Health field above */ 3369 3370 #define ACPI_PHAT_ERRORS_FOUND 0 3371 #define ACPI_PHAT_NO_ERRORS 1 3372 #define ACPI_PHAT_UNKNOWN_ERRORS 2 3373 #define ACPI_PHAT_ADVISORY 3 3374 3375 3376 /******************************************************************************* 3377 * 3378 * PMTT - Platform Memory Topology Table (ACPI 5.0) 3379 * Version 1 3380 * 3381 ******************************************************************************/ 3382 3383 typedef struct acpi_table_pmtt 3384 { 3385 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3386 UINT32 MemoryDeviceCount; 3387 /* 3388 * Immediately followed by: 3389 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3390 */ 3391 3392 } ACPI_TABLE_PMTT; 3393 3394 3395 /* Common header for PMTT subtables that follow main table */ 3396 3397 typedef struct acpi_pmtt_header 3398 { 3399 UINT8 Type; 3400 UINT8 Reserved1; 3401 UINT16 Length; 3402 UINT16 Flags; 3403 UINT16 Reserved2; 3404 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 3405 /* 3406 * Immediately followed by: 3407 * UINT8 TypeSpecificData[] 3408 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3409 */ 3410 3411 } ACPI_PMTT_HEADER; 3412 3413 /* Values for Type field above */ 3414 3415 #define ACPI_PMTT_TYPE_SOCKET 0 3416 #define ACPI_PMTT_TYPE_CONTROLLER 1 3417 #define ACPI_PMTT_TYPE_DIMM 2 3418 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 3419 #define ACPI_PMTT_TYPE_VENDOR 0xFF 3420 3421 /* Values for Flags field above */ 3422 3423 #define ACPI_PMTT_TOP_LEVEL 0x0001 3424 #define ACPI_PMTT_PHYSICAL 0x0002 3425 #define ACPI_PMTT_MEMORY_TYPE 0x000C 3426 3427 3428 /* 3429 * PMTT subtables, correspond to Type in acpi_pmtt_header 3430 */ 3431 3432 3433 /* 0: Socket Structure */ 3434 3435 typedef struct acpi_pmtt_socket 3436 { 3437 ACPI_PMTT_HEADER Header; 3438 UINT16 SocketId; 3439 UINT16 Reserved; 3440 3441 } ACPI_PMTT_SOCKET; 3442 /* 3443 * Immediately followed by: 3444 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3445 */ 3446 3447 3448 /* 1: Memory Controller subtable */ 3449 3450 typedef struct acpi_pmtt_controller 3451 { 3452 ACPI_PMTT_HEADER Header; 3453 UINT16 ControllerId; 3454 UINT16 Reserved; 3455 3456 } ACPI_PMTT_CONTROLLER; 3457 /* 3458 * Immediately followed by: 3459 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3460 */ 3461 3462 3463 /* 2: Physical Component Identifier (DIMM) */ 3464 3465 typedef struct acpi_pmtt_physical_component 3466 { 3467 ACPI_PMTT_HEADER Header; 3468 UINT32 BiosHandle; 3469 3470 } ACPI_PMTT_PHYSICAL_COMPONENT; 3471 3472 3473 /* 0xFF: Vendor Specific Data */ 3474 3475 typedef struct acpi_pmtt_vendor_specific 3476 { 3477 ACPI_PMTT_HEADER Header; 3478 UINT8 TypeUuid[16]; 3479 UINT8 Specific[]; 3480 /* 3481 * Immediately followed by: 3482 * UINT8 VendorSpecificData[]; 3483 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3484 */ 3485 3486 } ACPI_PMTT_VENDOR_SPECIFIC; 3487 3488 3489 /******************************************************************************* 3490 * 3491 * PPTT - Processor Properties Topology Table (ACPI 6.2) 3492 * Version 1 3493 * 3494 ******************************************************************************/ 3495 3496 typedef struct acpi_table_pptt 3497 { 3498 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3499 3500 } ACPI_TABLE_PPTT; 3501 3502 /* Values for Type field above */ 3503 3504 enum AcpiPpttType 3505 { 3506 ACPI_PPTT_TYPE_PROCESSOR = 0, 3507 ACPI_PPTT_TYPE_CACHE = 1, 3508 ACPI_PPTT_TYPE_ID = 2, 3509 ACPI_PPTT_TYPE_RESERVED = 3 3510 }; 3511 3512 3513 /* 0: Processor Hierarchy Node Structure */ 3514 3515 typedef struct acpi_pptt_processor 3516 { 3517 ACPI_SUBTABLE_HEADER Header; 3518 UINT16 Reserved; 3519 UINT32 Flags; 3520 UINT32 Parent; 3521 UINT32 AcpiProcessorId; 3522 UINT32 NumberOfPrivResources; 3523 3524 } ACPI_PPTT_PROCESSOR; 3525 3526 /* Flags */ 3527 3528 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 3529 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 3530 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 3531 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 3532 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 3533 3534 3535 /* 1: Cache Type Structure */ 3536 3537 typedef struct acpi_pptt_cache 3538 { 3539 ACPI_SUBTABLE_HEADER Header; 3540 UINT16 Reserved; 3541 UINT32 Flags; 3542 UINT32 NextLevelOfCache; 3543 UINT32 Size; 3544 UINT32 NumberOfSets; 3545 UINT8 Associativity; 3546 UINT8 Attributes; 3547 UINT16 LineSize; 3548 3549 } ACPI_PPTT_CACHE; 3550 3551 /* 1: Cache Type Structure for PPTT version 3 */ 3552 3553 typedef struct acpi_pptt_cache_v1 3554 { 3555 ACPI_SUBTABLE_HEADER Header; 3556 UINT16 Reserved; 3557 UINT32 Flags; 3558 UINT32 NextLevelOfCache; 3559 UINT32 Size; 3560 UINT32 NumberOfSets; 3561 UINT8 Associativity; 3562 UINT8 Attributes; 3563 UINT16 LineSize; 3564 UINT32 CacheId; 3565 3566 } ACPI_PPTT_CACHE_V1; 3567 3568 3569 /* Flags */ 3570 3571 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 3572 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 3573 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 3574 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 3575 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 3576 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 3577 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 3578 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 3579 3580 /* Masks for Attributes */ 3581 3582 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3583 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3584 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3585 3586 /* Attributes describing cache */ 3587 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3588 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3589 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3590 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3591 3592 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3593 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3594 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3595 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3596 3597 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3598 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3599 3600 /* 2: ID Structure */ 3601 3602 typedef struct acpi_pptt_id 3603 { 3604 ACPI_SUBTABLE_HEADER Header; 3605 UINT16 Reserved; 3606 UINT32 VendorId; 3607 UINT64 Level1Id; 3608 UINT64 Level2Id; 3609 UINT16 MajorRev; 3610 UINT16 MinorRev; 3611 UINT16 SpinRev; 3612 3613 } ACPI_PPTT_ID; 3614 3615 3616 /******************************************************************************* 3617 * 3618 * PRMT - Platform Runtime Mechanism Table 3619 * Version 1 3620 * 3621 ******************************************************************************/ 3622 3623 typedef struct acpi_table_prmt 3624 { 3625 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3626 3627 } ACPI_TABLE_PRMT; 3628 3629 typedef struct acpi_table_prmt_header 3630 { 3631 UINT8 PlatformGuid[16]; 3632 UINT32 ModuleInfoOffset; 3633 UINT32 ModuleInfoCount; 3634 3635 } ACPI_TABLE_PRMT_HEADER; 3636 3637 typedef struct acpi_prmt_module_header 3638 { 3639 UINT16 Revision; 3640 UINT16 Length; 3641 3642 } ACPI_PRMT_MODULE_HEADER; 3643 3644 typedef struct acpi_prmt_module_info 3645 { 3646 UINT16 Revision; 3647 UINT16 Length; 3648 UINT8 ModuleGuid[16]; 3649 UINT16 MajorRev; 3650 UINT16 MinorRev; 3651 UINT16 HandlerInfoCount; 3652 UINT32 HandlerInfoOffset; 3653 UINT64 MmioListPointer; 3654 3655 } ACPI_PRMT_MODULE_INFO; 3656 3657 typedef struct acpi_prmt_handler_info 3658 { 3659 UINT16 Revision; 3660 UINT16 Length; 3661 UINT8 HandlerGuid[16]; 3662 UINT64 HandlerAddress; 3663 UINT64 StaticDataBufferAddress; 3664 UINT64 AcpiParamBufferAddress; 3665 3666 } ACPI_PRMT_HANDLER_INFO; 3667 3668 3669 /******************************************************************************* 3670 * 3671 * RASF - RAS Feature Table (ACPI 5.0) 3672 * Version 1 3673 * 3674 ******************************************************************************/ 3675 3676 typedef struct acpi_table_rasf 3677 { 3678 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3679 UINT8 ChannelId[12]; 3680 3681 } ACPI_TABLE_RASF; 3682 3683 /* RASF Platform Communication Channel Shared Memory Region */ 3684 3685 typedef struct acpi_rasf_shared_memory 3686 { 3687 UINT32 Signature; 3688 UINT16 Command; 3689 UINT16 Status; 3690 UINT16 Version; 3691 UINT8 Capabilities[16]; 3692 UINT8 SetCapabilities[16]; 3693 UINT16 NumParameterBlocks; 3694 UINT32 SetCapabilitiesStatus; 3695 3696 } ACPI_RASF_SHARED_MEMORY; 3697 3698 /* RASF Parameter Block Structure Header */ 3699 3700 typedef struct acpi_rasf_parameter_block 3701 { 3702 UINT16 Type; 3703 UINT16 Version; 3704 UINT16 Length; 3705 3706 } ACPI_RASF_PARAMETER_BLOCK; 3707 3708 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3709 3710 typedef struct acpi_rasf_patrol_scrub_parameter 3711 { 3712 ACPI_RASF_PARAMETER_BLOCK Header; 3713 UINT16 PatrolScrubCommand; 3714 UINT64 RequestedAddressRange[2]; 3715 UINT64 ActualAddressRange[2]; 3716 UINT16 Flags; 3717 UINT8 RequestedSpeed; 3718 3719 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3720 3721 /* Masks for Flags and Speed fields above */ 3722 3723 #define ACPI_RASF_SCRUBBER_RUNNING 1 3724 #define ACPI_RASF_SPEED (7<<1) 3725 #define ACPI_RASF_SPEED_SLOW (0<<1) 3726 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3727 #define ACPI_RASF_SPEED_FAST (7<<1) 3728 3729 /* Channel Commands */ 3730 3731 enum AcpiRasfCommands 3732 { 3733 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3734 }; 3735 3736 /* Platform RAS Capabilities */ 3737 3738 enum AcpiRasfCapabiliities 3739 { 3740 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3741 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3742 }; 3743 3744 /* Patrol Scrub Commands */ 3745 3746 enum AcpiRasfPatrolScrubCommands 3747 { 3748 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3749 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3750 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3751 }; 3752 3753 /* Channel Command flags */ 3754 3755 #define ACPI_RASF_GENERATE_SCI (1<<15) 3756 3757 /* Status values */ 3758 3759 enum AcpiRasfStatus 3760 { 3761 ACPI_RASF_SUCCESS = 0, 3762 ACPI_RASF_NOT_VALID = 1, 3763 ACPI_RASF_NOT_SUPPORTED = 2, 3764 ACPI_RASF_BUSY = 3, 3765 ACPI_RASF_FAILED = 4, 3766 ACPI_RASF_ABORTED = 5, 3767 ACPI_RASF_INVALID_DATA = 6 3768 }; 3769 3770 /* Status flags */ 3771 3772 #define ACPI_RASF_COMMAND_COMPLETE (1) 3773 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3774 #define ACPI_RASF_ERROR (1<<2) 3775 #define ACPI_RASF_STATUS (0x1F<<3) 3776 3777 3778 /******************************************************************************* 3779 * 3780 * RAS2 - RAS2 Feature Table (ACPI 6.5) 3781 * Version 1 3782 * 3783 * 3784 ******************************************************************************/ 3785 3786 typedef struct acpi_table_ras2 { 3787 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3788 UINT16 Reserved; 3789 UINT16 NumPccDescs; 3790 3791 } ACPI_TABLE_RAS2; 3792 3793 /* RAS2 Platform Communication Channel Descriptor */ 3794 3795 typedef struct acpi_ras2_pcc_desc { 3796 UINT8 ChannelId; 3797 UINT16 Reserved; 3798 UINT8 FeatureType; 3799 UINT32 Instance; 3800 3801 } ACPI_RAS2_PCC_DESC; 3802 3803 /* RAS2 Platform Communication Channel Shared Memory Region */ 3804 3805 typedef struct acpi_ras2_shmem { 3806 UINT32 Signature; 3807 UINT16 Command; 3808 UINT16 Status; 3809 UINT16 Version; 3810 UINT8 Features[16]; 3811 UINT8 SetCaps[16]; 3812 UINT16 NumParamBlks; 3813 UINT32 SetCapsStatus; 3814 3815 } ACPI_RAS2_SHMEM; 3816 3817 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3818 3819 typedef struct acpi_ras2_parameter_block 3820 { 3821 UINT16 Type; 3822 UINT16 Version; 3823 UINT16 Length; 3824 3825 } ACPI_RAS2_PARAMETER_BLOCK; 3826 3827 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3828 3829 typedef struct acpi_ras2_patrol_scrub_param { 3830 ACPI_RAS2_PARAMETER_BLOCK Header; 3831 UINT16 Command; 3832 UINT64 ReqAddrRange[2]; 3833 UINT64 ActlAddrRange[2]; 3834 UINT32 Flags; 3835 UINT32 ScrubParamsOut; 3836 UINT32 ScrubParamsIn; 3837 UINT32 ExtScrubParams; 3838 UINT8 ScrubRateDesc[256]; 3839 3840 } ACPI_RAS2_PATROL_SCRUB_PARAM; 3841 3842 /* Masks for Flags field above */ 3843 3844 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3845 3846 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3847 3848 typedef struct acpi_ras2_la2pa_translation_parameter { 3849 ACPI_RAS2_PARAMETER_BLOCK Header; 3850 UINT16 AddrTranslationCommand; 3851 UINT64 SubInstId; 3852 UINT64 LogicalAddress; 3853 UINT64 PhysicalAddress; 3854 UINT32 Status; 3855 3856 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3857 3858 /* Channel Commands */ 3859 3860 enum AcpiRas2Commands 3861 { 3862 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3863 }; 3864 3865 /* Platform RAS2 Features */ 3866 3867 enum AcpiRas2Features 3868 { 3869 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3870 ACPI_RAS2_LA2PA_TRANSLATION = 1 3871 }; 3872 3873 /* RAS2 Patrol Scrub Commands */ 3874 3875 enum AcpiRas2PatrolScrubCommands 3876 { 3877 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3878 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3879 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3880 }; 3881 3882 /* RAS2 LA2PA Translation Commands */ 3883 3884 enum AcpiRas2La2PaTranslationCommands 3885 { 3886 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3887 }; 3888 3889 /* RAS2 LA2PA Translation Status values */ 3890 3891 enum AcpiRas2La2PaTranslationStatus 3892 { 3893 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3894 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3895 }; 3896 3897 /* Channel Command flags */ 3898 3899 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3900 3901 /* Status values */ 3902 3903 enum AcpiRas2Status 3904 { 3905 ACPI_RAS2_SUCCESS = 0, 3906 ACPI_RAS2_NOT_VALID = 1, 3907 ACPI_RAS2_NOT_SUPPORTED = 2, 3908 ACPI_RAS2_BUSY = 3, 3909 ACPI_RAS2_FAILED = 4, 3910 ACPI_RAS2_ABORTED = 5, 3911 ACPI_RAS2_INVALID_DATA = 6 3912 }; 3913 3914 /* Status flags */ 3915 3916 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3917 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3918 #define ACPI_RAS2_ERROR (1<<2) 3919 #define ACPI_RAS2_STATUS (0x1F<<3) 3920 3921 3922 /******************************************************************************* 3923 * 3924 * RGRT - Regulatory Graphics Resource Table 3925 * Version 1 3926 * 3927 * Conforms to "ACPI RGRT" available at: 3928 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3929 * 3930 ******************************************************************************/ 3931 3932 typedef struct acpi_table_rgrt 3933 { 3934 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3935 UINT16 Version; 3936 UINT8 ImageType; 3937 UINT8 Reserved; 3938 UINT8 Image[]; 3939 3940 } ACPI_TABLE_RGRT; 3941 3942 /* ImageType values */ 3943 3944 enum AcpiRgrtImageType 3945 { 3946 ACPI_RGRT_TYPE_RESERVED0 = 0, 3947 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3948 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3949 }; 3950 3951 3952 /******************************************************************************* 3953 * 3954 * RHCT - RISC-V Hart Capabilities Table 3955 * Version 1 3956 * 3957 ******************************************************************************/ 3958 3959 typedef struct acpi_table_rhct { 3960 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3961 UINT32 Flags; /* RHCT flags */ 3962 UINT64 TimeBaseFreq; 3963 UINT32 NodeCount; 3964 UINT32 NodeOffset; 3965 } ACPI_TABLE_RHCT; 3966 3967 /* RHCT Flags */ 3968 3969 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3970 /* 3971 * RHCT subtables 3972 */ 3973 typedef struct acpi_rhct_node_header { 3974 UINT16 Type; 3975 UINT16 Length; 3976 UINT16 Revision; 3977 } ACPI_RHCT_NODE_HEADER; 3978 3979 /* Values for RHCT subtable Type above */ 3980 3981 enum acpi_rhct_node_type { 3982 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3983 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3984 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3985 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3986 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3987 }; 3988 3989 /* 3990 * RHCT node specific subtables 3991 */ 3992 3993 /* ISA string node structure */ 3994 typedef struct acpi_rhct_isa_string { 3995 UINT16 IsaLength; 3996 char Isa[]; 3997 } ACPI_RHCT_ISA_STRING; 3998 3999 typedef struct acpi_rhct_cmo_node { 4000 UINT8 Reserved; /* Must be zero */ 4001 UINT8 CbomSize; /* CBOM size in powerof 2 */ 4002 UINT8 CbopSize; /* CBOP size in powerof 2 */ 4003 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 4004 } ACPI_RHCT_CMO_NODE; 4005 4006 typedef struct acpi_rhct_mmu_node { 4007 UINT8 Reserved; /* Must be zero */ 4008 UINT8 MmuType; /* Virtual Address Scheme */ 4009 } ACPI_RHCT_MMU_NODE; 4010 4011 enum acpi_rhct_mmu_type { 4012 ACPI_RHCT_MMU_TYPE_SV39 = 0, 4013 ACPI_RHCT_MMU_TYPE_SV48 = 1, 4014 ACPI_RHCT_MMU_TYPE_SV57 = 2 4015 }; 4016 4017 /* Hart Info node structure */ 4018 typedef struct acpi_rhct_hart_info { 4019 UINT16 NumOffsets; 4020 UINT32 Uid; /* ACPI processor UID */ 4021 } ACPI_RHCT_HART_INFO; 4022 4023 /******************************************************************************* 4024 * 4025 * RIMT - RISC-V IO Remapping Table 4026 * 4027 * https://github.com/riscv-non-isa/riscv-acpi-rimt 4028 * 4029 ******************************************************************************/ 4030 4031 typedef struct acpi_table_rimt { 4032 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4033 UINT32 NumNodes; /* Number of RIMT Nodes */ 4034 UINT32 NodeOffset; /* Offset to RIMT Node Array */ 4035 UINT32 Reserved; 4036 } ACPI_TABLE_RIMT; 4037 4038 typedef struct acpi_rimt_node { 4039 UINT8 Type; 4040 UINT8 Revision; 4041 UINT16 Length; 4042 UINT16 Reserved; 4043 UINT16 Id; 4044 char NodeData[]; 4045 } ACPI_RIMT_NODE; 4046 4047 enum acpi_rimt_node_type { 4048 ACPI_RIMT_NODE_TYPE_IOMMU = 0x0, 4049 ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1, 4050 ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2, 4051 }; 4052 4053 typedef struct acpi_rimt_iommu { 4054 UINT8 HardwareId[8]; /* Hardware ID */ 4055 UINT64 BaseAddress; /* Base Address */ 4056 UINT32 Flags; /* Flags */ 4057 UINT32 ProximityDomain; /* Proximity Domain */ 4058 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 4059 UINT16 PcieBdf; /* PCIe B/D/F */ 4060 UINT16 NumInterruptWires; /* Number of interrupt wires */ 4061 UINT16 InterruptWireOffset; /* Interrupt wire array offset */ 4062 UINT64 InterruptWire[]; /* Interrupt wire array */ 4063 } ACPI_RIMT_IOMMU; 4064 4065 /* IOMMU Node Flags */ 4066 #define ACPI_RIMT_IOMMU_FLAGS_PCIE (1) 4067 #define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1) 4068 4069 /* Interrupt Wire Structure */ 4070 typedef struct acpi_rimt_iommu_wire_gsi { 4071 UINT32 IrqNum; /* Interrupt Number */ 4072 UINT32 Flags; /* Flags */ 4073 } ACPI_RIMT_IOMMU_WIRE_GSI; 4074 4075 /* Interrupt Wire Flags */ 4076 #define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1) 4077 #define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1) 4078 4079 typedef struct acpi_rimt_id_mapping { 4080 UINT32 SourceIdBase; /* Source ID Base */ 4081 UINT32 NumIds; /* Number of IDs */ 4082 UINT32 DestIdBase; /* Destination Device ID Base */ 4083 UINT32 DestOffset; /* Destination IOMMU Offset */ 4084 UINT32 Flags; /* Flags */ 4085 } ACPI_RIMT_ID_MAPPING; 4086 4087 typedef struct acpi_rimt_pcie_rc { 4088 UINT32 Flags; /* Flags */ 4089 UINT16 Reserved; /* Reserved */ 4090 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 4091 UINT16 IdMappingOffset; /* ID mapping array offset */ 4092 UINT16 NumIdMappings; /* Number of ID mappings */ 4093 } ACPI_RIMT_PCIE_RC; 4094 4095 /* PCIe Root Complex Node Flags */ 4096 #define ACPI_RIMT_PCIE_ATS_SUPPORTED (1) 4097 #define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1) 4098 4099 typedef struct acpi_rimt_platform_device { 4100 UINT16 IdMappingOffset; /* ID Mapping array offset */ 4101 UINT16 NumIdMappings; /* Number of ID mappings */ 4102 char DeviceName[]; /* Device Object Name */ 4103 } ACPI_RIMT_PLATFORM_DEVICE; 4104 4105 4106 /******************************************************************************* 4107 * 4108 * SBST - Smart Battery Specification Table 4109 * Version 1 4110 * 4111 ******************************************************************************/ 4112 4113 typedef struct acpi_table_sbst 4114 { 4115 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4116 UINT32 WarningLevel; 4117 UINT32 LowLevel; 4118 UINT32 CriticalLevel; 4119 4120 } ACPI_TABLE_SBST; 4121 4122 4123 /******************************************************************************* 4124 * 4125 * SDEI - Software Delegated Exception Interface Descriptor Table 4126 * 4127 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 4128 * May 8th, 2017. Copyright 2017 ARM Ltd. 4129 * 4130 ******************************************************************************/ 4131 4132 typedef struct acpi_table_sdei 4133 { 4134 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4135 4136 } ACPI_TABLE_SDEI; 4137 4138 4139 /******************************************************************************* 4140 * 4141 * SDEV - Secure Devices Table (ACPI 6.2) 4142 * Version 1 4143 * 4144 ******************************************************************************/ 4145 4146 typedef struct acpi_table_sdev 4147 { 4148 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4149 4150 } ACPI_TABLE_SDEV; 4151 4152 4153 typedef struct acpi_sdev_header 4154 { 4155 UINT8 Type; 4156 UINT8 Flags; 4157 UINT16 Length; 4158 4159 } ACPI_SDEV_HEADER; 4160 4161 4162 /* Values for subtable type above */ 4163 4164 enum AcpiSdevType 4165 { 4166 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 4167 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 4168 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 4169 }; 4170 4171 /* Values for flags above */ 4172 4173 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 4174 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 4175 4176 /* 4177 * SDEV subtables 4178 */ 4179 4180 /* 0: Namespace Device Based Secure Device Structure */ 4181 4182 typedef struct acpi_sdev_namespace 4183 { 4184 ACPI_SDEV_HEADER Header; 4185 UINT16 DeviceIdOffset; 4186 UINT16 DeviceIdLength; 4187 UINT16 VendorDataOffset; 4188 UINT16 VendorDataLength; 4189 4190 } ACPI_SDEV_NAMESPACE; 4191 4192 typedef struct acpi_sdev_secure_component 4193 { 4194 UINT16 SecureComponentOffset; 4195 UINT16 SecureComponentLength; 4196 4197 } ACPI_SDEV_SECURE_COMPONENT; 4198 4199 4200 /* 4201 * SDEV sub-subtables ("Components") for above 4202 */ 4203 typedef struct acpi_sdev_component 4204 { 4205 ACPI_SDEV_HEADER Header; 4206 4207 } ACPI_SDEV_COMPONENT; 4208 4209 4210 /* Values for sub-subtable type above */ 4211 4212 enum AcpiSacType 4213 { 4214 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 4215 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 4216 }; 4217 4218 typedef struct acpi_sdev_id_component 4219 { 4220 ACPI_SDEV_HEADER Header; 4221 UINT16 HardwareIdOffset; 4222 UINT16 HardwareIdLength; 4223 UINT16 SubsystemIdOffset; 4224 UINT16 SubsystemIdLength; 4225 UINT16 HardwareRevision; 4226 UINT8 HardwareRevPresent; 4227 UINT8 ClassCodePresent; 4228 UINT8 PciBaseClass; 4229 UINT8 PciSubClass; 4230 UINT8 PciProgrammingXface; 4231 4232 } ACPI_SDEV_ID_COMPONENT; 4233 4234 typedef struct acpi_sdev_mem_component 4235 { 4236 ACPI_SDEV_HEADER Header; 4237 UINT32 Reserved; 4238 UINT64 MemoryBaseAddress; 4239 UINT64 MemoryLength; 4240 4241 } ACPI_SDEV_MEM_COMPONENT; 4242 4243 4244 /* 1: PCIe Endpoint Device Based Device Structure */ 4245 4246 typedef struct acpi_sdev_pcie 4247 { 4248 ACPI_SDEV_HEADER Header; 4249 UINT16 Segment; 4250 UINT16 StartBus; 4251 UINT16 PathOffset; 4252 UINT16 PathLength; 4253 UINT16 VendorDataOffset; 4254 UINT16 VendorDataLength; 4255 4256 } ACPI_SDEV_PCIE; 4257 4258 /* 1a: PCIe Endpoint path entry */ 4259 4260 typedef struct acpi_sdev_pcie_path 4261 { 4262 UINT8 Device; 4263 UINT8 Function; 4264 4265 } ACPI_SDEV_PCIE_PATH; 4266 4267 4268 /******************************************************************************* 4269 * 4270 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 4271 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4272 * Trust Domain Extensions (Intel TDX)". 4273 * Version 1 4274 * 4275 ******************************************************************************/ 4276 4277 typedef struct acpi_table_svkl 4278 { 4279 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4280 UINT32 Count; 4281 4282 } ACPI_TABLE_SVKL; 4283 4284 typedef struct acpi_svkl_key 4285 { 4286 UINT16 Type; 4287 UINT16 Format; 4288 UINT32 Size; 4289 UINT64 Address; 4290 4291 } ACPI_SVKL_KEY; 4292 4293 enum acpi_svkl_type 4294 { 4295 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 4296 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 4297 }; 4298 4299 enum acpi_svkl_format 4300 { 4301 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 4302 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 4303 }; 4304 4305 /******************************************************************************* 4306 * 4307 * SWFT - SoundWire File Table 4308 * as described in Discovery and Configuration (DisCo) Specification 4309 * for SoundWire® 4310 * Version 1 4311 * 4312 ******************************************************************************/ 4313 4314 typedef struct acpi_table_swft 4315 { 4316 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4317 4318 } ACPI_TABLE_SWFT; 4319 4320 typedef struct acpi_swft_file 4321 { 4322 UINT16 VendorID; 4323 UINT32 FileID; 4324 UINT16 FileVersion; 4325 UINT32 FileLength; 4326 UINT8 FileData[]; 4327 } ACPI_SWFT_FILE; 4328 4329 /******************************************************************************* 4330 * 4331 * TDEL - TD-Event Log 4332 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4333 * Trust Domain Extensions (Intel TDX)". 4334 * September 2020 4335 * 4336 ******************************************************************************/ 4337 4338 typedef struct acpi_table_tdel 4339 { 4340 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4341 UINT32 Reserved; 4342 UINT64 LogAreaMinimumLength; 4343 UINT64 LogAreaStartAddress; 4344 4345 } ACPI_TABLE_TDEL; 4346 4347 /* Reset to default packing */ 4348 4349 #pragma pack() 4350 4351 #endif /* __ACTBL2_H__ */ 4352