1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 177 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 178 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 179 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 180 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 181 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 182 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 183 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 184 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 185 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 186 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 187 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 188 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 189 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 190 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 191 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 192 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 193 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 194 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 195 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 196 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 197 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 198 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 199 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 200 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 201 202 203 /* 204 * All tables must be byte-packed to match the ACPI specification, since 205 * the tables are provided by the system BIOS. 206 */ 207 #pragma pack(1) 208 209 /* 210 * Note: C bitfields are not used for this reason: 211 * 212 * "Bitfields are great and easy to read, but unfortunately the C language 213 * does not specify the layout of bitfields in memory, which means they are 214 * essentially useless for dealing with packed data in on-disk formats or 215 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 216 * this decision was a design error in C. Ritchie could have picked an order 217 * and stuck with it." Norman Ramsey. 218 * See http://stackoverflow.com/a/1053662/41661 219 */ 220 221 222 /******************************************************************************* 223 * 224 * AEST - Arm Error Source Table 225 * 226 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 227 * September 2020. 228 * 229 ******************************************************************************/ 230 231 typedef struct acpi_table_aest 232 { 233 ACPI_TABLE_HEADER Header; 234 235 } ACPI_TABLE_AEST; 236 237 /* Common Subtable header - one per Node Structure (Subtable) */ 238 239 typedef struct acpi_aest_hdr 240 { 241 UINT8 Type; 242 UINT16 Length; 243 UINT8 Reserved; 244 UINT32 NodeSpecificOffset; 245 UINT32 NodeInterfaceOffset; 246 UINT32 NodeInterruptOffset; 247 UINT32 NodeInterruptCount; 248 UINT64 TimestampRate; 249 UINT64 Reserved1; 250 UINT64 ErrorInjectionRate; 251 252 } ACPI_AEST_HEADER; 253 254 /* Values for Type above */ 255 256 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 257 #define ACPI_AEST_MEMORY_ERROR_NODE 1 258 #define ACPI_AEST_SMMU_ERROR_NODE 2 259 #define ACPI_AEST_VENDOR_ERROR_NODE 3 260 #define ACPI_AEST_GIC_ERROR_NODE 4 261 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 262 263 264 /* 265 * AEST subtables (Error nodes) 266 */ 267 268 /* 0: Processor Error */ 269 270 typedef struct acpi_aest_processor 271 { 272 UINT32 ProcessorId; 273 UINT8 ResourceType; 274 UINT8 Reserved; 275 UINT8 Flags; 276 UINT8 Revision; 277 UINT64 ProcessorAffinity; 278 279 } ACPI_AEST_PROCESSOR; 280 281 /* Values for ResourceType above, related structs below */ 282 283 #define ACPI_AEST_CACHE_RESOURCE 0 284 #define ACPI_AEST_TLB_RESOURCE 1 285 #define ACPI_AEST_GENERIC_RESOURCE 2 286 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 287 288 /* 0R: Processor Cache Resource Substructure */ 289 290 typedef struct acpi_aest_processor_cache 291 { 292 UINT32 CacheReference; 293 UINT32 Reserved; 294 295 } ACPI_AEST_PROCESSOR_CACHE; 296 297 /* Values for CacheType above */ 298 299 #define ACPI_AEST_CACHE_DATA 0 300 #define ACPI_AEST_CACHE_INSTRUCTION 1 301 #define ACPI_AEST_CACHE_UNIFIED 2 302 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 303 304 /* 1R: Processor TLB Resource Substructure */ 305 306 typedef struct acpi_aest_processor_tlb 307 { 308 UINT32 TlbLevel; 309 UINT32 Reserved; 310 311 } ACPI_AEST_PROCESSOR_TLB; 312 313 /* 2R: Processor Generic Resource Substructure */ 314 315 typedef struct acpi_aest_processor_generic 316 { 317 UINT32 Resource; 318 319 } ACPI_AEST_PROCESSOR_GENERIC; 320 321 /* 1: Memory Error */ 322 323 typedef struct acpi_aest_memory 324 { 325 UINT32 SratProximityDomain; 326 327 } ACPI_AEST_MEMORY; 328 329 /* 2: Smmu Error */ 330 331 typedef struct acpi_aest_smmu 332 { 333 UINT32 IortNodeReference; 334 UINT32 SubcomponentReference; 335 336 } ACPI_AEST_SMMU; 337 338 /* 3: Vendor Defined */ 339 340 typedef struct acpi_aest_vendor 341 { 342 UINT32 AcpiHid; 343 UINT32 AcpiUid; 344 UINT8 VendorSpecificData[16]; 345 346 } ACPI_AEST_VENDOR; 347 348 /* 4: Gic Error */ 349 350 typedef struct acpi_aest_gic 351 { 352 UINT32 InterfaceType; 353 UINT32 InstanceId; 354 355 } ACPI_AEST_GIC; 356 357 /* Values for InterfaceType above */ 358 359 #define ACPI_AEST_GIC_CPU 0 360 #define ACPI_AEST_GIC_DISTRIBUTOR 1 361 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 362 #define ACPI_AEST_GIC_ITS 3 363 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 364 365 366 /* Node Interface Structure */ 367 368 typedef struct acpi_aest_node_interface 369 { 370 UINT8 Type; 371 UINT8 Reserved[3]; 372 UINT32 Flags; 373 UINT64 Address; 374 UINT32 ErrorRecordIndex; 375 UINT32 ErrorRecordCount; 376 UINT64 ErrorRecordImplemented; 377 UINT64 ErrorStatusReporting; 378 UINT64 AddressingMode; 379 380 } ACPI_AEST_NODE_INTERFACE; 381 382 /* Values for Type field above */ 383 384 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 385 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 386 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 387 388 /* Node Interrupt Structure */ 389 390 typedef struct acpi_aest_node_interrupt 391 { 392 UINT8 Type; 393 UINT8 Reserved[2]; 394 UINT8 Flags; 395 UINT32 Gsiv; 396 UINT8 IortId; 397 UINT8 Reserved1[3]; 398 399 } ACPI_AEST_NODE_INTERRUPT; 400 401 /* Values for Type field above */ 402 403 #define ACPI_AEST_NODE_FAULT_HANDLING 0 404 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 405 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 406 407 408 /******************************************************************************* 409 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 410 * 411 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 412 * ARM DEN0093 v1.1 413 * 414 ******************************************************************************/ 415 typedef struct acpi_table_agdi 416 { 417 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 418 UINT8 Flags; 419 UINT8 Reserved[3]; 420 UINT32 SdeiEvent; 421 UINT32 Gsiv; 422 423 } ACPI_TABLE_AGDI; 424 425 /* Mask for Flags field above */ 426 427 #define ACPI_AGDI_SIGNALING_MODE (1) 428 429 430 /******************************************************************************* 431 * 432 * APMT - ARM Performance Monitoring Unit Table 433 * 434 * Conforms to: 435 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 436 * ARM DEN0117 v1.0 November 25, 2021 437 * 438 ******************************************************************************/ 439 440 typedef struct acpi_table_apmt { 441 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 442 } ACPI_TABLE_APMT; 443 444 #define ACPI_APMT_NODE_ID_LENGTH 4 445 446 /* 447 * APMT subtables 448 */ 449 typedef struct acpi_apmt_node { 450 UINT16 Length; 451 UINT8 Flags; 452 UINT8 Type; 453 UINT32 Id; 454 UINT64 InstPrimary; 455 UINT32 InstSecondary; 456 UINT64 BaseAddress0; 457 UINT64 BaseAddress1; 458 UINT32 OvflwIrq; 459 UINT32 Reserved; 460 UINT32 OvflwIrqFlags; 461 UINT32 ProcAffinity; 462 UINT32 ImplId; 463 } ACPI_APMT_NODE; 464 465 /* Masks for Flags field above */ 466 467 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 468 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 469 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 470 471 /* Values for Flags dual page field above */ 472 473 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 474 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 475 476 /* Values for Flags processor affinity field above */ 477 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 478 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 479 480 /* Values for Flags 64-bit atomic field above */ 481 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 482 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 483 484 /* Values for Type field above */ 485 486 enum acpi_apmt_node_type { 487 ACPI_APMT_NODE_TYPE_MC = 0x00, 488 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 489 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 490 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 491 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 492 ACPI_APMT_NODE_TYPE_COUNT 493 }; 494 495 /* Masks for ovflw_irq_flags field above */ 496 497 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 498 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 499 500 /* Values for ovflw_irq_flags mode field above */ 501 502 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 503 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 504 505 /* Values for ovflw_irq_flags type field above */ 506 507 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 508 509 510 /******************************************************************************* 511 * 512 * BDAT - BIOS Data ACPI Table 513 * 514 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 515 * Nov 2020 516 * 517 ******************************************************************************/ 518 519 typedef struct acpi_table_bdat 520 { 521 ACPI_TABLE_HEADER Header; 522 ACPI_GENERIC_ADDRESS Gas; 523 524 } ACPI_TABLE_BDAT; 525 526 /******************************************************************************* 527 * 528 * CCEL - CC-Event Log 529 * From: "Guest-Host-Communication Interface (GHCI) for Intel 530 * Trust Domain Extensions (Intel TDX)". Feb 2022 531 * 532 ******************************************************************************/ 533 534 typedef struct acpi_table_ccel 535 { 536 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 537 UINT8 CCType; 538 UINT8 CCSubType; 539 UINT16 Reserved; 540 UINT64 LogAreaMinimumLength; 541 UINT64 LogAreaStartAddress; 542 543 } ACPI_TABLE_CCEL; 544 545 /******************************************************************************* 546 * 547 * IORT - IO Remapping Table 548 * 549 * Conforms to "IO Remapping Table System Software on ARM Platforms", 550 * Document number: ARM DEN 0049E.e, Sep 2022 551 * 552 ******************************************************************************/ 553 554 typedef struct acpi_table_iort 555 { 556 ACPI_TABLE_HEADER Header; 557 UINT32 NodeCount; 558 UINT32 NodeOffset; 559 UINT32 Reserved; 560 561 } ACPI_TABLE_IORT; 562 563 564 /* 565 * IORT subtables 566 */ 567 typedef struct acpi_iort_node 568 { 569 UINT8 Type; 570 UINT16 Length; 571 UINT8 Revision; 572 UINT32 Identifier; 573 UINT32 MappingCount; 574 UINT32 MappingOffset; 575 char NodeData[]; 576 577 } ACPI_IORT_NODE; 578 579 /* Values for subtable Type above */ 580 581 enum AcpiIortNodeType 582 { 583 ACPI_IORT_NODE_ITS_GROUP = 0x00, 584 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 585 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 586 ACPI_IORT_NODE_SMMU = 0x03, 587 ACPI_IORT_NODE_SMMU_V3 = 0x04, 588 ACPI_IORT_NODE_PMCG = 0x05, 589 ACPI_IORT_NODE_RMR = 0x06, 590 }; 591 592 593 typedef struct acpi_iort_id_mapping 594 { 595 UINT32 InputBase; /* Lowest value in input range */ 596 UINT32 IdCount; /* Number of IDs */ 597 UINT32 OutputBase; /* Lowest value in output range */ 598 UINT32 OutputReference; /* A reference to the output node */ 599 UINT32 Flags; 600 601 } ACPI_IORT_ID_MAPPING; 602 603 /* Masks for Flags field above for IORT subtable */ 604 605 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 606 607 608 typedef struct acpi_iort_memory_access 609 { 610 UINT32 CacheCoherency; 611 UINT8 Hints; 612 UINT16 Reserved; 613 UINT8 MemoryFlags; 614 615 } ACPI_IORT_MEMORY_ACCESS; 616 617 /* Values for CacheCoherency field above */ 618 619 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 620 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 621 622 /* Masks for Hints field above */ 623 624 #define ACPI_IORT_HT_TRANSIENT (1) 625 #define ACPI_IORT_HT_WRITE (1<<1) 626 #define ACPI_IORT_HT_READ (1<<2) 627 #define ACPI_IORT_HT_OVERRIDE (1<<3) 628 629 /* Masks for MemoryFlags field above */ 630 631 #define ACPI_IORT_MF_COHERENCY (1) 632 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 633 634 635 /* 636 * IORT node specific subtables 637 */ 638 typedef struct acpi_iort_its_group 639 { 640 UINT32 ItsCount; 641 UINT32 Identifiers[]; /* GIC ITS identifier array */ 642 643 } ACPI_IORT_ITS_GROUP; 644 645 646 typedef struct acpi_iort_named_component 647 { 648 UINT32 NodeFlags; 649 UINT64 MemoryProperties; /* Memory access properties */ 650 UINT8 MemoryAddressLimit; /* Memory address size limit */ 651 char DeviceName[]; /* Path of namespace object */ 652 653 } ACPI_IORT_NAMED_COMPONENT; 654 655 /* Masks for Flags field above */ 656 657 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 658 #define ACPI_IORT_NC_PASID_BITS (31<<1) 659 660 typedef struct acpi_iort_root_complex 661 { 662 UINT64 MemoryProperties; /* Memory access properties */ 663 UINT32 AtsAttribute; 664 UINT32 PciSegmentNumber; 665 UINT8 MemoryAddressLimit; /* Memory address size limit */ 666 UINT16 PasidCapabilities; /* PASID Capabilities */ 667 UINT8 Reserved[]; /* Reserved, must be zero */ 668 669 } ACPI_IORT_ROOT_COMPLEX; 670 671 /* Masks for AtsAttribute field above */ 672 673 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 674 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 675 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 676 677 /* Masks for PasidCapabilities field above */ 678 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 679 680 typedef struct acpi_iort_smmu 681 { 682 UINT64 BaseAddress; /* SMMU base address */ 683 UINT64 Span; /* Length of memory range */ 684 UINT32 Model; 685 UINT32 Flags; 686 UINT32 GlobalInterruptOffset; 687 UINT32 ContextInterruptCount; 688 UINT32 ContextInterruptOffset; 689 UINT32 PmuInterruptCount; 690 UINT32 PmuInterruptOffset; 691 UINT64 Interrupts[]; /* Interrupt array */ 692 693 } ACPI_IORT_SMMU; 694 695 /* Values for Model field above */ 696 697 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 698 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 699 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 700 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 701 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 702 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 703 704 /* Masks for Flags field above */ 705 706 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 707 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 708 709 /* Global interrupt format */ 710 711 typedef struct acpi_iort_smmu_gsi 712 { 713 UINT32 NSgIrpt; 714 UINT32 NSgIrptFlags; 715 UINT32 NSgCfgIrpt; 716 UINT32 NSgCfgIrptFlags; 717 718 } ACPI_IORT_SMMU_GSI; 719 720 721 typedef struct acpi_iort_smmu_v3 722 { 723 UINT64 BaseAddress; /* SMMUv3 base address */ 724 UINT32 Flags; 725 UINT32 Reserved; 726 UINT64 VatosAddress; 727 UINT32 Model; 728 UINT32 EventGsiv; 729 UINT32 PriGsiv; 730 UINT32 GerrGsiv; 731 UINT32 SyncGsiv; 732 UINT32 Pxm; 733 UINT32 IdMappingIndex; 734 735 } ACPI_IORT_SMMU_V3; 736 737 /* Values for Model field above */ 738 739 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 740 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 741 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 742 743 /* Masks for Flags field above */ 744 745 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 746 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 747 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 748 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 749 750 typedef struct acpi_iort_pmcg 751 { 752 UINT64 Page0BaseAddress; 753 UINT32 OverflowGsiv; 754 UINT32 NodeReference; 755 UINT64 Page1BaseAddress; 756 757 } ACPI_IORT_PMCG; 758 759 typedef struct acpi_iort_rmr { 760 UINT32 Flags; 761 UINT32 RmrCount; 762 UINT32 RmrOffset; 763 764 } ACPI_IORT_RMR; 765 766 /* Masks for Flags field above */ 767 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 768 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 769 770 /* 771 * Macro to access the Access Attributes in flags field above: 772 * Access Attributes is encoded in bits 9:2 773 */ 774 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 775 776 /* Values for above Access Attributes */ 777 778 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 779 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 780 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 781 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 782 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 783 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 784 785 typedef struct acpi_iort_rmr_desc { 786 UINT64 BaseAddress; 787 UINT64 Length; 788 UINT32 Reserved; 789 790 } ACPI_IORT_RMR_DESC; 791 792 /******************************************************************************* 793 * 794 * IVRS - I/O Virtualization Reporting Structure 795 * Version 1 796 * 797 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 798 * Revision 1.26, February 2009. 799 * 800 ******************************************************************************/ 801 802 typedef struct acpi_table_ivrs 803 { 804 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 805 UINT32 Info; /* Common virtualization info */ 806 UINT64 Reserved; 807 808 } ACPI_TABLE_IVRS; 809 810 /* Values for Info field above */ 811 812 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 813 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 814 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 815 816 817 /* IVRS subtable header */ 818 819 typedef struct acpi_ivrs_header 820 { 821 UINT8 Type; /* Subtable type */ 822 UINT8 Flags; 823 UINT16 Length; /* Subtable length */ 824 UINT16 DeviceId; /* ID of IOMMU */ 825 826 } ACPI_IVRS_HEADER; 827 828 /* Values for subtable Type above */ 829 830 enum AcpiIvrsType 831 { 832 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 833 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 834 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 835 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 836 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 837 ACPI_IVRS_TYPE_MEMORY3 = 0x22 838 }; 839 840 /* Masks for Flags field above for IVHD subtable */ 841 842 #define ACPI_IVHD_TT_ENABLE (1) 843 #define ACPI_IVHD_PASS_PW (1<<1) 844 #define ACPI_IVHD_RES_PASS_PW (1<<2) 845 #define ACPI_IVHD_ISOC (1<<3) 846 #define ACPI_IVHD_IOTLB (1<<4) 847 848 /* Masks for Flags field above for IVMD subtable */ 849 850 #define ACPI_IVMD_UNITY (1) 851 #define ACPI_IVMD_READ (1<<1) 852 #define ACPI_IVMD_WRITE (1<<2) 853 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 854 855 856 /* 857 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 858 */ 859 860 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 861 862 typedef struct acpi_ivrs_hardware_10 863 { 864 ACPI_IVRS_HEADER Header; 865 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 866 UINT64 BaseAddress; /* IOMMU control registers */ 867 UINT16 PciSegmentGroup; 868 UINT16 Info; /* MSI number and unit ID */ 869 UINT32 FeatureReporting; 870 871 } ACPI_IVRS_HARDWARE1; 872 873 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 874 875 typedef struct acpi_ivrs_hardware_11 876 { 877 ACPI_IVRS_HEADER Header; 878 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 879 UINT64 BaseAddress; /* IOMMU control registers */ 880 UINT16 PciSegmentGroup; 881 UINT16 Info; /* MSI number and unit ID */ 882 UINT32 Attributes; 883 UINT64 EfrRegisterImage; 884 UINT64 Reserved; 885 } ACPI_IVRS_HARDWARE2; 886 887 /* Masks for Info field above */ 888 889 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 890 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 891 892 893 /* 894 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 895 * Upper two bits of the Type field are the (encoded) length of the structure. 896 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 897 * are reserved for future use but not defined. 898 */ 899 typedef struct acpi_ivrs_de_header 900 { 901 UINT8 Type; 902 UINT16 Id; 903 UINT8 DataSetting; 904 905 } ACPI_IVRS_DE_HEADER; 906 907 /* Length of device entry is in the top two bits of Type field above */ 908 909 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 910 911 /* Values for device entry Type field above */ 912 913 enum AcpiIvrsDeviceEntryType 914 { 915 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 916 917 ACPI_IVRS_TYPE_PAD4 = 0, 918 ACPI_IVRS_TYPE_ALL = 1, 919 ACPI_IVRS_TYPE_SELECT = 2, 920 ACPI_IVRS_TYPE_START = 3, 921 ACPI_IVRS_TYPE_END = 4, 922 923 /* 8-byte device entries */ 924 925 ACPI_IVRS_TYPE_PAD8 = 64, 926 ACPI_IVRS_TYPE_NOT_USED = 65, 927 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 928 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 929 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 930 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 931 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 932 933 /* Variable-length device entries */ 934 935 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 936 }; 937 938 /* Values for Data field above */ 939 940 #define ACPI_IVHD_INIT_PASS (1) 941 #define ACPI_IVHD_EINT_PASS (1<<1) 942 #define ACPI_IVHD_NMI_PASS (1<<2) 943 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 944 #define ACPI_IVHD_LINT0_PASS (1<<6) 945 #define ACPI_IVHD_LINT1_PASS (1<<7) 946 947 948 /* Types 0-4: 4-byte device entry */ 949 950 typedef struct acpi_ivrs_device4 951 { 952 ACPI_IVRS_DE_HEADER Header; 953 954 } ACPI_IVRS_DEVICE4; 955 956 /* Types 66-67: 8-byte device entry */ 957 958 typedef struct acpi_ivrs_device8a 959 { 960 ACPI_IVRS_DE_HEADER Header; 961 UINT8 Reserved1; 962 UINT16 UsedId; 963 UINT8 Reserved2; 964 965 } ACPI_IVRS_DEVICE8A; 966 967 /* Types 70-71: 8-byte device entry */ 968 969 typedef struct acpi_ivrs_device8b 970 { 971 ACPI_IVRS_DE_HEADER Header; 972 UINT32 ExtendedData; 973 974 } ACPI_IVRS_DEVICE8B; 975 976 /* Values for ExtendedData above */ 977 978 #define ACPI_IVHD_ATS_DISABLED (1<<31) 979 980 /* Type 72: 8-byte device entry */ 981 982 typedef struct acpi_ivrs_device8c 983 { 984 ACPI_IVRS_DE_HEADER Header; 985 UINT8 Handle; 986 UINT16 UsedId; 987 UINT8 Variety; 988 989 } ACPI_IVRS_DEVICE8C; 990 991 /* Values for Variety field above */ 992 993 #define ACPI_IVHD_IOAPIC 1 994 #define ACPI_IVHD_HPET 2 995 996 /* Type 240: variable-length device entry */ 997 998 typedef struct acpi_ivrs_device_hid 999 { 1000 ACPI_IVRS_DE_HEADER Header; 1001 UINT64 AcpiHid; 1002 UINT64 AcpiCid; 1003 UINT8 UidType; 1004 UINT8 UidLength; 1005 1006 } ACPI_IVRS_DEVICE_HID; 1007 1008 /* Values for UidType above */ 1009 1010 #define ACPI_IVRS_UID_NOT_PRESENT 0 1011 #define ACPI_IVRS_UID_IS_INTEGER 1 1012 #define ACPI_IVRS_UID_IS_STRING 2 1013 1014 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1015 1016 typedef struct acpi_ivrs_memory 1017 { 1018 ACPI_IVRS_HEADER Header; 1019 UINT16 AuxData; 1020 UINT64 Reserved; 1021 UINT64 StartAddress; 1022 UINT64 MemoryLength; 1023 1024 } ACPI_IVRS_MEMORY; 1025 1026 1027 /******************************************************************************* 1028 * 1029 * LPIT - Low Power Idle Table 1030 * 1031 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1032 * 1033 ******************************************************************************/ 1034 1035 typedef struct acpi_table_lpit 1036 { 1037 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1038 1039 } ACPI_TABLE_LPIT; 1040 1041 1042 /* LPIT subtable header */ 1043 1044 typedef struct acpi_lpit_header 1045 { 1046 UINT32 Type; /* Subtable type */ 1047 UINT32 Length; /* Subtable length */ 1048 UINT16 UniqueId; 1049 UINT16 Reserved; 1050 UINT32 Flags; 1051 1052 } ACPI_LPIT_HEADER; 1053 1054 /* Values for subtable Type above */ 1055 1056 enum AcpiLpitType 1057 { 1058 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1059 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1060 }; 1061 1062 /* Masks for Flags field above */ 1063 1064 #define ACPI_LPIT_STATE_DISABLED (1) 1065 #define ACPI_LPIT_NO_COUNTER (1<<1) 1066 1067 /* 1068 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1069 */ 1070 1071 /* 0x00: Native C-state instruction based LPI structure */ 1072 1073 typedef struct acpi_lpit_native 1074 { 1075 ACPI_LPIT_HEADER Header; 1076 ACPI_GENERIC_ADDRESS EntryTrigger; 1077 UINT32 Residency; 1078 UINT32 Latency; 1079 ACPI_GENERIC_ADDRESS ResidencyCounter; 1080 UINT64 CounterFrequency; 1081 1082 } ACPI_LPIT_NATIVE; 1083 1084 1085 /******************************************************************************* 1086 * 1087 * MADT - Multiple APIC Description Table 1088 * Version 3 1089 * 1090 ******************************************************************************/ 1091 1092 typedef struct acpi_table_madt 1093 { 1094 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1095 UINT32 Address; /* Physical address of local APIC */ 1096 UINT32 Flags; 1097 1098 } ACPI_TABLE_MADT; 1099 1100 /* Masks for Flags field above */ 1101 1102 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1103 1104 /* Values for PCATCompat flag */ 1105 1106 #define ACPI_MADT_DUAL_PIC 1 1107 #define ACPI_MADT_MULTIPLE_APIC 0 1108 1109 1110 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1111 1112 enum AcpiMadtType 1113 { 1114 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1115 ACPI_MADT_TYPE_IO_APIC = 1, 1116 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1117 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1118 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1119 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1120 ACPI_MADT_TYPE_IO_SAPIC = 6, 1121 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1122 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1123 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1124 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1125 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1126 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1127 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1128 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1129 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1130 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1131 ACPI_MADT_TYPE_CORE_PIC = 17, 1132 ACPI_MADT_TYPE_LIO_PIC = 18, 1133 ACPI_MADT_TYPE_HT_PIC = 19, 1134 ACPI_MADT_TYPE_EIO_PIC = 20, 1135 ACPI_MADT_TYPE_MSI_PIC = 21, 1136 ACPI_MADT_TYPE_BIO_PIC = 22, 1137 ACPI_MADT_TYPE_LPC_PIC = 23, 1138 ACPI_MADT_TYPE_RINTC = 24, 1139 ACPI_MADT_TYPE_IMSIC = 25, 1140 ACPI_MADT_TYPE_APLIC = 26, 1141 ACPI_MADT_TYPE_PLIC = 27, 1142 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 1143 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1144 }; 1145 1146 1147 /* 1148 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1149 */ 1150 1151 /* 0: Processor Local APIC */ 1152 1153 typedef struct acpi_madt_local_apic 1154 { 1155 ACPI_SUBTABLE_HEADER Header; 1156 UINT8 ProcessorId; /* ACPI processor id */ 1157 UINT8 Id; /* Processor's local APIC id */ 1158 UINT32 LapicFlags; 1159 1160 } ACPI_MADT_LOCAL_APIC; 1161 1162 1163 /* 1: IO APIC */ 1164 1165 typedef struct acpi_madt_io_apic 1166 { 1167 ACPI_SUBTABLE_HEADER Header; 1168 UINT8 Id; /* I/O APIC ID */ 1169 UINT8 Reserved; /* Reserved - must be zero */ 1170 UINT32 Address; /* APIC physical address */ 1171 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1172 1173 } ACPI_MADT_IO_APIC; 1174 1175 1176 /* 2: Interrupt Override */ 1177 1178 typedef struct acpi_madt_interrupt_override 1179 { 1180 ACPI_SUBTABLE_HEADER Header; 1181 UINT8 Bus; /* 0 - ISA */ 1182 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1183 UINT32 GlobalIrq; /* Global system interrupt */ 1184 UINT16 IntiFlags; 1185 1186 } ACPI_MADT_INTERRUPT_OVERRIDE; 1187 1188 1189 /* 3: NMI Source */ 1190 1191 typedef struct acpi_madt_nmi_source 1192 { 1193 ACPI_SUBTABLE_HEADER Header; 1194 UINT16 IntiFlags; 1195 UINT32 GlobalIrq; /* Global system interrupt */ 1196 1197 } ACPI_MADT_NMI_SOURCE; 1198 1199 1200 /* 4: Local APIC NMI */ 1201 1202 typedef struct acpi_madt_local_apic_nmi 1203 { 1204 ACPI_SUBTABLE_HEADER Header; 1205 UINT8 ProcessorId; /* ACPI processor id */ 1206 UINT16 IntiFlags; 1207 UINT8 Lint; /* LINTn to which NMI is connected */ 1208 1209 } ACPI_MADT_LOCAL_APIC_NMI; 1210 1211 1212 /* 5: Address Override */ 1213 1214 typedef struct acpi_madt_local_apic_override 1215 { 1216 ACPI_SUBTABLE_HEADER Header; 1217 UINT16 Reserved; /* Reserved, must be zero */ 1218 UINT64 Address; /* APIC physical address */ 1219 1220 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1221 1222 1223 /* 6: I/O Sapic */ 1224 1225 typedef struct acpi_madt_io_sapic 1226 { 1227 ACPI_SUBTABLE_HEADER Header; 1228 UINT8 Id; /* I/O SAPIC ID */ 1229 UINT8 Reserved; /* Reserved, must be zero */ 1230 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1231 UINT64 Address; /* SAPIC physical address */ 1232 1233 } ACPI_MADT_IO_SAPIC; 1234 1235 1236 /* 7: Local Sapic */ 1237 1238 typedef struct acpi_madt_local_sapic 1239 { 1240 ACPI_SUBTABLE_HEADER Header; 1241 UINT8 ProcessorId; /* ACPI processor id */ 1242 UINT8 Id; /* SAPIC ID */ 1243 UINT8 Eid; /* SAPIC EID */ 1244 UINT8 Reserved[3]; /* Reserved, must be zero */ 1245 UINT32 LapicFlags; 1246 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1247 char UidString[]; /* String UID - ACPI 3.0 */ 1248 1249 } ACPI_MADT_LOCAL_SAPIC; 1250 1251 1252 /* 8: Platform Interrupt Source */ 1253 1254 typedef struct acpi_madt_interrupt_source 1255 { 1256 ACPI_SUBTABLE_HEADER Header; 1257 UINT16 IntiFlags; 1258 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1259 UINT8 Id; /* Processor ID */ 1260 UINT8 Eid; /* Processor EID */ 1261 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1262 UINT32 GlobalIrq; /* Global system interrupt */ 1263 UINT32 Flags; /* Interrupt Source Flags */ 1264 1265 } ACPI_MADT_INTERRUPT_SOURCE; 1266 1267 /* Masks for Flags field above */ 1268 1269 #define ACPI_MADT_CPEI_OVERRIDE (1) 1270 1271 1272 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1273 1274 typedef struct acpi_madt_local_x2apic 1275 { 1276 ACPI_SUBTABLE_HEADER Header; 1277 UINT16 Reserved; /* Reserved - must be zero */ 1278 UINT32 LocalApicId; /* Processor x2APIC ID */ 1279 UINT32 LapicFlags; 1280 UINT32 Uid; /* ACPI processor UID */ 1281 1282 } ACPI_MADT_LOCAL_X2APIC; 1283 1284 1285 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1286 1287 typedef struct acpi_madt_local_x2apic_nmi 1288 { 1289 ACPI_SUBTABLE_HEADER Header; 1290 UINT16 IntiFlags; 1291 UINT32 Uid; /* ACPI processor UID */ 1292 UINT8 Lint; /* LINTn to which NMI is connected */ 1293 UINT8 Reserved[3]; /* Reserved - must be zero */ 1294 1295 } ACPI_MADT_LOCAL_X2APIC_NMI; 1296 1297 1298 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1299 1300 typedef struct acpi_madt_generic_interrupt 1301 { 1302 ACPI_SUBTABLE_HEADER Header; 1303 UINT16 Reserved; /* Reserved - must be zero */ 1304 UINT32 CpuInterfaceNumber; 1305 UINT32 Uid; 1306 UINT32 Flags; 1307 UINT32 ParkingVersion; 1308 UINT32 PerformanceInterrupt; 1309 UINT64 ParkedAddress; 1310 UINT64 BaseAddress; 1311 UINT64 GicvBaseAddress; 1312 UINT64 GichBaseAddress; 1313 UINT32 VgicInterrupt; 1314 UINT64 GicrBaseAddress; 1315 UINT64 ArmMpidr; 1316 UINT8 EfficiencyClass; 1317 UINT8 Reserved2[1]; 1318 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1319 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1320 1321 } ACPI_MADT_GENERIC_INTERRUPT; 1322 1323 /* Masks for Flags field above */ 1324 1325 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1326 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1327 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1328 1329 1330 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1331 1332 typedef struct acpi_madt_generic_distributor 1333 { 1334 ACPI_SUBTABLE_HEADER Header; 1335 UINT16 Reserved; /* Reserved - must be zero */ 1336 UINT32 GicId; 1337 UINT64 BaseAddress; 1338 UINT32 GlobalIrqBase; 1339 UINT8 Version; 1340 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1341 1342 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1343 1344 /* Values for Version field above */ 1345 1346 enum AcpiMadtGicVersion 1347 { 1348 ACPI_MADT_GIC_VERSION_NONE = 0, 1349 ACPI_MADT_GIC_VERSION_V1 = 1, 1350 ACPI_MADT_GIC_VERSION_V2 = 2, 1351 ACPI_MADT_GIC_VERSION_V3 = 3, 1352 ACPI_MADT_GIC_VERSION_V4 = 4, 1353 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1354 }; 1355 1356 1357 /* 13: Generic MSI Frame (ACPI 5.1) */ 1358 1359 typedef struct acpi_madt_generic_msi_frame 1360 { 1361 ACPI_SUBTABLE_HEADER Header; 1362 UINT16 Reserved; /* Reserved - must be zero */ 1363 UINT32 MsiFrameId; 1364 UINT64 BaseAddress; 1365 UINT32 Flags; 1366 UINT16 SpiCount; 1367 UINT16 SpiBase; 1368 1369 } ACPI_MADT_GENERIC_MSI_FRAME; 1370 1371 /* Masks for Flags field above */ 1372 1373 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1374 1375 1376 /* 14: Generic Redistributor (ACPI 5.1) */ 1377 1378 typedef struct acpi_madt_generic_redistributor 1379 { 1380 ACPI_SUBTABLE_HEADER Header; 1381 UINT16 Reserved; /* reserved - must be zero */ 1382 UINT64 BaseAddress; 1383 UINT32 Length; 1384 1385 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1386 1387 1388 /* 15: Generic Translator (ACPI 6.0) */ 1389 1390 typedef struct acpi_madt_generic_translator 1391 { 1392 ACPI_SUBTABLE_HEADER Header; 1393 UINT16 Reserved; /* reserved - must be zero */ 1394 UINT32 TranslationId; 1395 UINT64 BaseAddress; 1396 UINT32 Reserved2; 1397 1398 } ACPI_MADT_GENERIC_TRANSLATOR; 1399 1400 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1401 1402 typedef struct acpi_madt_multiproc_wakeup 1403 { 1404 ACPI_SUBTABLE_HEADER Header; 1405 UINT16 MailboxVersion; 1406 UINT32 Reserved; /* reserved - must be zero */ 1407 UINT64 BaseAddress; 1408 1409 } ACPI_MADT_MULTIPROC_WAKEUP; 1410 1411 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1412 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1413 1414 typedef struct acpi_madt_multiproc_wakeup_mailbox 1415 { 1416 UINT16 Command; 1417 UINT16 Reserved; /* reserved - must be zero */ 1418 UINT32 ApicId; 1419 UINT64 WakeupVector; 1420 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1421 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1422 1423 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1424 1425 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1426 1427 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1428 1429 typedef struct acpi_madt_core_pic { 1430 ACPI_SUBTABLE_HEADER Header; 1431 UINT8 Version; 1432 UINT32 ProcessorId; 1433 UINT32 CoreId; 1434 UINT32 Flags; 1435 } ACPI_MADT_CORE_PIC; 1436 1437 /* Values for Version field above */ 1438 1439 enum AcpiMadtCorePicVersion { 1440 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1441 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1442 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1443 }; 1444 1445 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1446 1447 typedef struct acpi_madt_lio_pic { 1448 ACPI_SUBTABLE_HEADER Header; 1449 UINT8 Version; 1450 UINT64 Address; 1451 UINT16 Size; 1452 UINT8 Cascade[2]; 1453 UINT32 CascadeMap[2]; 1454 } ACPI_MADT_LIO_PIC; 1455 1456 /* Values for Version field above */ 1457 1458 enum AcpiMadtLioPicVersion { 1459 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1460 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1461 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1462 }; 1463 1464 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1465 1466 typedef struct acpi_madt_ht_pic { 1467 ACPI_SUBTABLE_HEADER Header; 1468 UINT8 Version; 1469 UINT64 Address; 1470 UINT16 Size; 1471 UINT8 Cascade[8]; 1472 } ACPI_MADT_HT_PIC; 1473 1474 /* Values for Version field above */ 1475 1476 enum AcpiMadtHtPicVersion { 1477 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1478 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1479 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1480 }; 1481 1482 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1483 1484 typedef struct acpi_madt_eio_pic { 1485 ACPI_SUBTABLE_HEADER Header; 1486 UINT8 Version; 1487 UINT8 Cascade; 1488 UINT8 Node; 1489 UINT64 NodeMap; 1490 } ACPI_MADT_EIO_PIC; 1491 1492 /* Values for Version field above */ 1493 1494 enum AcpiMadtEioPicVersion { 1495 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1496 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1497 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1498 }; 1499 1500 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1501 1502 typedef struct acpi_madt_msi_pic { 1503 ACPI_SUBTABLE_HEADER Header; 1504 UINT8 Version; 1505 UINT64 MsgAddress; 1506 UINT32 Start; 1507 UINT32 Count; 1508 } ACPI_MADT_MSI_PIC; 1509 1510 /* Values for Version field above */ 1511 1512 enum AcpiMadtMsiPicVersion { 1513 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1514 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1515 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1516 }; 1517 1518 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1519 1520 typedef struct acpi_madt_bio_pic { 1521 ACPI_SUBTABLE_HEADER Header; 1522 UINT8 Version; 1523 UINT64 Address; 1524 UINT16 Size; 1525 UINT16 Id; 1526 UINT16 GsiBase; 1527 } ACPI_MADT_BIO_PIC; 1528 1529 /* Values for Version field above */ 1530 1531 enum AcpiMadtBioPicVersion { 1532 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1533 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1534 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1535 }; 1536 1537 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1538 1539 typedef struct acpi_madt_lpc_pic { 1540 ACPI_SUBTABLE_HEADER Header; 1541 UINT8 Version; 1542 UINT64 Address; 1543 UINT16 Size; 1544 UINT8 Cascade; 1545 } ACPI_MADT_LPC_PIC; 1546 1547 /* Values for Version field above */ 1548 1549 enum AcpiMadtLpcPicVersion { 1550 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1551 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1552 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1553 }; 1554 1555 /* 24: RISC-V INTC */ 1556 typedef struct acpi_madt_rintc { 1557 ACPI_SUBTABLE_HEADER Header; 1558 UINT8 Version; 1559 UINT8 Reserved; 1560 UINT32 Flags; 1561 UINT64 HartId; 1562 UINT32 Uid; /* ACPI processor UID */ 1563 UINT32 ExtIntcId; /* External INTC Id */ 1564 UINT64 ImsicAddr; /* IMSIC base address */ 1565 UINT32 ImsicSize; /* IMSIC size */ 1566 } ACPI_MADT_RINTC; 1567 1568 /* Values for RISC-V INTC Version field above */ 1569 1570 enum AcpiMadtRintcVersion { 1571 ACPI_MADT_RINTC_VERSION_NONE = 0, 1572 ACPI_MADT_RINTC_VERSION_V1 = 1, 1573 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1574 }; 1575 1576 /* 25: RISC-V IMSIC */ 1577 typedef struct acpi_madt_imsic { 1578 ACPI_SUBTABLE_HEADER Header; 1579 UINT8 Version; 1580 UINT8 Reserved; 1581 UINT32 Flags; 1582 UINT16 NumIds; 1583 UINT16 NumGuestIds; 1584 UINT8 GuestIndexBits; 1585 UINT8 HartIndexBits; 1586 UINT8 GroupIndexBits; 1587 UINT8 GroupIndexShift; 1588 } ACPI_MADT_IMSIC; 1589 1590 /* 26: RISC-V APLIC */ 1591 typedef struct acpi_madt_aplic { 1592 ACPI_SUBTABLE_HEADER Header; 1593 UINT8 Version; 1594 UINT8 Id; 1595 UINT32 Flags; 1596 UINT8 HwId[8]; 1597 UINT16 NumIdcs; 1598 UINT16 NumSources; 1599 UINT32 GsiBase; 1600 UINT64 BaseAddr; 1601 UINT32 Size; 1602 } ACPI_MADT_APLIC; 1603 1604 /* 27: RISC-V PLIC */ 1605 typedef struct acpi_madt_plic { 1606 ACPI_SUBTABLE_HEADER Header; 1607 UINT8 Version; 1608 UINT8 Id; 1609 UINT8 HwId[8]; 1610 UINT16 NumIrqs; 1611 UINT16 MaxPrio; 1612 UINT32 Flags; 1613 UINT32 Size; 1614 UINT64 BaseAddr; 1615 UINT32 GsiBase; 1616 } ACPI_MADT_PLIC; 1617 1618 1619 /* 80: OEM data */ 1620 1621 typedef struct acpi_madt_oem_data 1622 { 1623 ACPI_FLEX_ARRAY(UINT8, OemData); 1624 } ACPI_MADT_OEM_DATA; 1625 1626 1627 /* 1628 * Common flags fields for MADT subtables 1629 */ 1630 1631 /* MADT Local APIC flags */ 1632 1633 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1634 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1635 1636 /* MADT MPS INTI flags (IntiFlags) */ 1637 1638 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1639 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1640 1641 /* Values for MPS INTI flags */ 1642 1643 #define ACPI_MADT_POLARITY_CONFORMS 0 1644 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1645 #define ACPI_MADT_POLARITY_RESERVED 2 1646 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1647 1648 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1649 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1650 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1651 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1652 1653 1654 /******************************************************************************* 1655 * 1656 * MCFG - PCI Memory Mapped Configuration table and subtable 1657 * Version 1 1658 * 1659 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1660 * 1661 ******************************************************************************/ 1662 1663 typedef struct acpi_table_mcfg 1664 { 1665 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1666 UINT8 Reserved[8]; 1667 1668 } ACPI_TABLE_MCFG; 1669 1670 1671 /* Subtable */ 1672 1673 typedef struct acpi_mcfg_allocation 1674 { 1675 UINT64 Address; /* Base address, processor-relative */ 1676 UINT16 PciSegment; /* PCI segment group number */ 1677 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1678 UINT8 EndBusNumber; /* Final PCI Bus number */ 1679 UINT32 Reserved; 1680 1681 } ACPI_MCFG_ALLOCATION; 1682 1683 1684 /******************************************************************************* 1685 * 1686 * MCHI - Management Controller Host Interface Table 1687 * Version 1 1688 * 1689 * Conforms to "Management Component Transport Protocol (MCTP) Host 1690 * Interface Specification", Revision 1.0.0a, October 13, 2009 1691 * 1692 ******************************************************************************/ 1693 1694 typedef struct acpi_table_mchi 1695 { 1696 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1697 UINT8 InterfaceType; 1698 UINT8 Protocol; 1699 UINT64 ProtocolData; 1700 UINT8 InterruptType; 1701 UINT8 Gpe; 1702 UINT8 PciDeviceFlag; 1703 UINT32 GlobalInterrupt; 1704 ACPI_GENERIC_ADDRESS ControlRegister; 1705 UINT8 PciSegment; 1706 UINT8 PciBus; 1707 UINT8 PciDevice; 1708 UINT8 PciFunction; 1709 1710 } ACPI_TABLE_MCHI; 1711 1712 /******************************************************************************* 1713 * 1714 * MPAM - Memory System Resource Partitioning and Monitoring 1715 * 1716 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1717 * Document number: ARM DEN 0065, December, 2022. 1718 * 1719 ******************************************************************************/ 1720 1721 /* MPAM RIS locator types. Table 11, Location types */ 1722 enum AcpiMpamLocatorType { 1723 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1724 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1725 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1726 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1727 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1728 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1729 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1730 }; 1731 1732 /* MPAM Functional dependency descriptor. Table 10 */ 1733 typedef struct acpi_mpam_func_deps 1734 { 1735 UINT32 Producer; 1736 UINT32 Reserved; 1737 } ACPI_MPAM_FUNC_DEPS; 1738 1739 /* MPAM Processor cache locator descriptor. Table 13 */ 1740 typedef struct acpi_mpam_resource_cache_locator 1741 { 1742 UINT64 CacheReference; 1743 UINT32 Reserved; 1744 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 1745 1746 /* MPAM Memory locator descriptor. Table 14 */ 1747 typedef struct acpi_mpam_resource_memory_locator 1748 { 1749 UINT64 ProximityDomain; 1750 UINT32 Reserved; 1751 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 1752 1753 /* MPAM SMMU locator descriptor. Table 15 */ 1754 typedef struct acpi_mpam_resource_smmu_locator 1755 { 1756 UINT64 SmmuInterface; 1757 UINT32 Reserved; 1758 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 1759 1760 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1761 typedef struct acpi_mpam_resource_memcache_locator 1762 { 1763 UINT8 Reserved[7]; 1764 UINT8 Level; 1765 UINT32 Reference; 1766 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 1767 1768 /* MPAM ACPI device locator descriptor. Table 17 */ 1769 typedef struct acpi_mpam_resource_acpi_locator 1770 { 1771 UINT64 AcpiHwId; 1772 UINT32 AcpiUniqueId; 1773 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 1774 1775 /* MPAM Interconnect locator descriptor. Table 18 */ 1776 typedef struct acpi_mpam_resource_interconnect_locator 1777 { 1778 UINT64 InterConnectDescTblOff; 1779 UINT32 Reserved; 1780 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 1781 1782 /* MPAM Locator structure. Table 12 */ 1783 typedef struct acpi_mpam_resource_generic_locator 1784 { 1785 UINT64 Descriptor1; 1786 UINT32 Descriptor2; 1787 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 1788 1789 typedef union acpi_mpam_resource_locator 1790 { 1791 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 1792 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 1793 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 1794 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 1795 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 1796 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 1797 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 1798 } ACPI_MPAM_RESOURCE_LOCATOR; 1799 1800 /* Memory System Component Resource Node Structure Table 9 */ 1801 typedef struct acpi_mpam_resource_node 1802 { 1803 UINT32 Identifier; 1804 UINT8 RISIndex; 1805 UINT16 Reserved1; 1806 UINT8 LocatorType; 1807 ACPI_MPAM_RESOURCE_LOCATOR Locator; 1808 UINT32 NumFunctionalDeps; 1809 } ACPI_MPAM_RESOURCE_NODE; 1810 1811 /* Memory System Component (MSC) Node Structure. Table 4 */ 1812 typedef struct acpi_mpam_msc_node 1813 { 1814 UINT16 Length; 1815 UINT8 InterfaceType; 1816 UINT8 Reserved; 1817 UINT32 Identifier; 1818 UINT64 BaseAddress; 1819 UINT32 MMIOSize; 1820 UINT32 OverflowInterrupt; 1821 UINT32 OverflowInterruptFlags; 1822 UINT32 Reserved1; 1823 UINT32 OverflowInterruptAffinity; 1824 UINT32 ErrorInterrupt; 1825 UINT32 ErrorInterruptFlags; 1826 UINT32 Reserved2; 1827 UINT32 ErrorInterruptAffinity; 1828 UINT32 MaxNrdyUsec; 1829 UINT64 HardwareIdLinkedDevice; 1830 UINT32 InstanceIdLinkedDevice; 1831 UINT32 NumResouceNodes; 1832 } ACPI_MPAM_MSC_NODE; 1833 1834 typedef struct acpi_table_mpam 1835 { 1836 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1837 } ACPI_TABLE_MPAM; 1838 1839 /******************************************************************************* 1840 * 1841 * MPST - Memory Power State Table (ACPI 5.0) 1842 * Version 1 1843 * 1844 ******************************************************************************/ 1845 1846 #define ACPI_MPST_CHANNEL_INFO \ 1847 UINT8 ChannelId; \ 1848 UINT8 Reserved1[3]; \ 1849 UINT16 PowerNodeCount; \ 1850 UINT16 Reserved2; 1851 1852 /* Main table */ 1853 1854 typedef struct acpi_table_mpst 1855 { 1856 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1857 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1858 1859 } ACPI_TABLE_MPST; 1860 1861 1862 /* Memory Platform Communication Channel Info */ 1863 1864 typedef struct acpi_mpst_channel 1865 { 1866 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1867 1868 } ACPI_MPST_CHANNEL; 1869 1870 1871 /* Memory Power Node Structure */ 1872 1873 typedef struct acpi_mpst_power_node 1874 { 1875 UINT8 Flags; 1876 UINT8 Reserved1; 1877 UINT16 NodeId; 1878 UINT32 Length; 1879 UINT64 RangeAddress; 1880 UINT64 RangeLength; 1881 UINT32 NumPowerStates; 1882 UINT32 NumPhysicalComponents; 1883 1884 } ACPI_MPST_POWER_NODE; 1885 1886 /* Values for Flags field above */ 1887 1888 #define ACPI_MPST_ENABLED 1 1889 #define ACPI_MPST_POWER_MANAGED 2 1890 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1891 1892 1893 /* Memory Power State Structure (follows POWER_NODE above) */ 1894 1895 typedef struct acpi_mpst_power_state 1896 { 1897 UINT8 PowerState; 1898 UINT8 InfoIndex; 1899 1900 } ACPI_MPST_POWER_STATE; 1901 1902 1903 /* Physical Component ID Structure (follows POWER_STATE above) */ 1904 1905 typedef struct acpi_mpst_component 1906 { 1907 UINT16 ComponentId; 1908 1909 } ACPI_MPST_COMPONENT; 1910 1911 1912 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1913 1914 typedef struct acpi_mpst_data_hdr 1915 { 1916 UINT16 CharacteristicsCount; 1917 UINT16 Reserved; 1918 1919 } ACPI_MPST_DATA_HDR; 1920 1921 typedef struct acpi_mpst_power_data 1922 { 1923 UINT8 StructureId; 1924 UINT8 Flags; 1925 UINT16 Reserved1; 1926 UINT32 AveragePower; 1927 UINT32 PowerSaving; 1928 UINT64 ExitLatency; 1929 UINT64 Reserved2; 1930 1931 } ACPI_MPST_POWER_DATA; 1932 1933 /* Values for Flags field above */ 1934 1935 #define ACPI_MPST_PRESERVE 1 1936 #define ACPI_MPST_AUTOENTRY 2 1937 #define ACPI_MPST_AUTOEXIT 4 1938 1939 1940 /* Shared Memory Region (not part of an ACPI table) */ 1941 1942 typedef struct acpi_mpst_shared 1943 { 1944 UINT32 Signature; 1945 UINT16 PccCommand; 1946 UINT16 PccStatus; 1947 UINT32 CommandRegister; 1948 UINT32 StatusRegister; 1949 UINT32 PowerStateId; 1950 UINT32 PowerNodeId; 1951 UINT64 EnergyConsumed; 1952 UINT64 AveragePower; 1953 1954 } ACPI_MPST_SHARED; 1955 1956 1957 /******************************************************************************* 1958 * 1959 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1960 * Version 1 1961 * 1962 ******************************************************************************/ 1963 1964 typedef struct acpi_table_msct 1965 { 1966 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1967 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1968 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1969 UINT32 MaxClockDomains; /* Max number of clock domains */ 1970 UINT64 MaxAddress; /* Max physical address in system */ 1971 1972 } ACPI_TABLE_MSCT; 1973 1974 1975 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1976 1977 typedef struct acpi_msct_proximity 1978 { 1979 UINT8 Revision; 1980 UINT8 Length; 1981 UINT32 RangeStart; /* Start of domain range */ 1982 UINT32 RangeEnd; /* End of domain range */ 1983 UINT32 ProcessorCapacity; 1984 UINT64 MemoryCapacity; /* In bytes */ 1985 1986 } ACPI_MSCT_PROXIMITY; 1987 1988 1989 /******************************************************************************* 1990 * 1991 * MSDM - Microsoft Data Management table 1992 * 1993 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1994 * November 29, 2011. Copyright 2011 Microsoft 1995 * 1996 ******************************************************************************/ 1997 1998 /* Basic MSDM table is only the common ACPI header */ 1999 2000 typedef struct acpi_table_msdm 2001 { 2002 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2003 2004 } ACPI_TABLE_MSDM; 2005 2006 2007 /******************************************************************************* 2008 * 2009 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2010 * Version 1 2011 * 2012 ******************************************************************************/ 2013 2014 typedef struct acpi_table_nfit 2015 { 2016 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2017 UINT32 Reserved; /* Reserved, must be zero */ 2018 2019 } ACPI_TABLE_NFIT; 2020 2021 /* Subtable header for NFIT */ 2022 2023 typedef struct acpi_nfit_header 2024 { 2025 UINT16 Type; 2026 UINT16 Length; 2027 2028 } ACPI_NFIT_HEADER; 2029 2030 2031 /* Values for subtable type in ACPI_NFIT_HEADER */ 2032 2033 enum AcpiNfitType 2034 { 2035 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2036 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2037 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2038 ACPI_NFIT_TYPE_SMBIOS = 3, 2039 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2040 ACPI_NFIT_TYPE_DATA_REGION = 5, 2041 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2042 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2043 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2044 }; 2045 2046 /* 2047 * NFIT Subtables 2048 */ 2049 2050 /* 0: System Physical Address Range Structure */ 2051 2052 typedef struct acpi_nfit_system_address 2053 { 2054 ACPI_NFIT_HEADER Header; 2055 UINT16 RangeIndex; 2056 UINT16 Flags; 2057 UINT32 Reserved; /* Reserved, must be zero */ 2058 UINT32 ProximityDomain; 2059 UINT8 RangeGuid[16]; 2060 UINT64 Address; 2061 UINT64 Length; 2062 UINT64 MemoryMapping; 2063 UINT64 LocationCookie; /* ACPI 6.4 */ 2064 2065 } ACPI_NFIT_SYSTEM_ADDRESS; 2066 2067 /* Flags */ 2068 2069 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2070 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2071 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2072 2073 /* Range Type GUIDs appear in the include/acuuid.h file */ 2074 2075 2076 /* 1: Memory Device to System Address Range Map Structure */ 2077 2078 typedef struct acpi_nfit_memory_map 2079 { 2080 ACPI_NFIT_HEADER Header; 2081 UINT32 DeviceHandle; 2082 UINT16 PhysicalId; 2083 UINT16 RegionId; 2084 UINT16 RangeIndex; 2085 UINT16 RegionIndex; 2086 UINT64 RegionSize; 2087 UINT64 RegionOffset; 2088 UINT64 Address; 2089 UINT16 InterleaveIndex; 2090 UINT16 InterleaveWays; 2091 UINT16 Flags; 2092 UINT16 Reserved; /* Reserved, must be zero */ 2093 2094 } ACPI_NFIT_MEMORY_MAP; 2095 2096 /* Flags */ 2097 2098 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2099 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2100 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2101 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2102 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2103 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2104 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2105 2106 2107 /* 2: Interleave Structure */ 2108 2109 typedef struct acpi_nfit_interleave 2110 { 2111 ACPI_NFIT_HEADER Header; 2112 UINT16 InterleaveIndex; 2113 UINT16 Reserved; /* Reserved, must be zero */ 2114 UINT32 LineCount; 2115 UINT32 LineSize; 2116 UINT32 LineOffset[]; /* Variable length */ 2117 2118 } ACPI_NFIT_INTERLEAVE; 2119 2120 2121 /* 3: SMBIOS Management Information Structure */ 2122 2123 typedef struct acpi_nfit_smbios 2124 { 2125 ACPI_NFIT_HEADER Header; 2126 UINT32 Reserved; /* Reserved, must be zero */ 2127 UINT8 Data[]; /* Variable length */ 2128 2129 } ACPI_NFIT_SMBIOS; 2130 2131 2132 /* 4: NVDIMM Control Region Structure */ 2133 2134 typedef struct acpi_nfit_control_region 2135 { 2136 ACPI_NFIT_HEADER Header; 2137 UINT16 RegionIndex; 2138 UINT16 VendorId; 2139 UINT16 DeviceId; 2140 UINT16 RevisionId; 2141 UINT16 SubsystemVendorId; 2142 UINT16 SubsystemDeviceId; 2143 UINT16 SubsystemRevisionId; 2144 UINT8 ValidFields; 2145 UINT8 ManufacturingLocation; 2146 UINT16 ManufacturingDate; 2147 UINT8 Reserved[2]; /* Reserved, must be zero */ 2148 UINT32 SerialNumber; 2149 UINT16 Code; 2150 UINT16 Windows; 2151 UINT64 WindowSize; 2152 UINT64 CommandOffset; 2153 UINT64 CommandSize; 2154 UINT64 StatusOffset; 2155 UINT64 StatusSize; 2156 UINT16 Flags; 2157 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2158 2159 } ACPI_NFIT_CONTROL_REGION; 2160 2161 /* Flags */ 2162 2163 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2164 2165 /* ValidFields bits */ 2166 2167 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2168 2169 2170 /* 5: NVDIMM Block Data Window Region Structure */ 2171 2172 typedef struct acpi_nfit_data_region 2173 { 2174 ACPI_NFIT_HEADER Header; 2175 UINT16 RegionIndex; 2176 UINT16 Windows; 2177 UINT64 Offset; 2178 UINT64 Size; 2179 UINT64 Capacity; 2180 UINT64 StartAddress; 2181 2182 } ACPI_NFIT_DATA_REGION; 2183 2184 2185 /* 6: Flush Hint Address Structure */ 2186 2187 typedef struct acpi_nfit_flush_address 2188 { 2189 ACPI_NFIT_HEADER Header; 2190 UINT32 DeviceHandle; 2191 UINT16 HintCount; 2192 UINT8 Reserved[6]; /* Reserved, must be zero */ 2193 UINT64 HintAddress[]; /* Variable length */ 2194 2195 } ACPI_NFIT_FLUSH_ADDRESS; 2196 2197 2198 /* 7: Platform Capabilities Structure */ 2199 2200 typedef struct acpi_nfit_capabilities 2201 { 2202 ACPI_NFIT_HEADER Header; 2203 UINT8 HighestCapability; 2204 UINT8 Reserved[3]; /* Reserved, must be zero */ 2205 UINT32 Capabilities; 2206 UINT32 Reserved2; 2207 2208 } ACPI_NFIT_CAPABILITIES; 2209 2210 /* Capabilities Flags */ 2211 2212 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2213 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2214 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2215 2216 2217 /* 2218 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2219 */ 2220 typedef struct nfit_device_handle 2221 { 2222 UINT32 Handle; 2223 2224 } NFIT_DEVICE_HANDLE; 2225 2226 /* Device handle construction and extraction macros */ 2227 2228 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2229 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2230 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2231 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2232 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2233 2234 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2235 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2236 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2237 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2238 #define ACPI_NFIT_NODE_ID_OFFSET 16 2239 2240 /* Macro to construct a NFIT/NVDIMM device handle */ 2241 2242 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2243 ((dimm) | \ 2244 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2245 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2246 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2247 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2248 2249 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2250 2251 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2252 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2253 2254 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2255 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2256 2257 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2258 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2259 2260 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2261 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2262 2263 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2264 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2265 2266 2267 /******************************************************************************* 2268 * 2269 * NHLT - Non HD Audio Link Table 2270 * 2271 * Conforms to: Intel Smart Sound Technology NHLT Specification 2272 * Version 0.8.1, January 2020. 2273 * 2274 ******************************************************************************/ 2275 2276 /* Main table */ 2277 2278 typedef struct acpi_table_nhlt 2279 { 2280 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2281 UINT8 EndpointCount; 2282 2283 } ACPI_TABLE_NHLT; 2284 2285 typedef struct acpi_table_nhlt_endpoint_count 2286 { 2287 UINT8 EndpointCount; 2288 2289 } ACPI_TABLE_NHLT_ENDPOINT_COUNT; 2290 2291 typedef struct acpi_nhlt_endpoint 2292 { 2293 UINT32 DescriptorLength; 2294 UINT8 LinkType; 2295 UINT8 InstanceId; 2296 UINT16 VendorId; 2297 UINT16 DeviceId; 2298 UINT16 RevisionId; 2299 UINT32 SubsystemId; 2300 UINT8 DeviceType; 2301 UINT8 Direction; 2302 UINT8 VirtualBusId; 2303 2304 } ACPI_NHLT_ENDPOINT; 2305 2306 /* Types for LinkType field above */ 2307 2308 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 2309 #define ACPI_NHLT_RESERVED_DSP 1 2310 #define ACPI_NHLT_PDM 2 2311 #define ACPI_NHLT_SSP 3 2312 #define ACPI_NHLT_RESERVED_SLIMBUS 4 2313 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 2314 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 2315 2316 /* All other values above are reserved */ 2317 2318 /* Values for DeviceId field above */ 2319 2320 #define ACPI_NHLT_PDM_DMIC 0xAE20 2321 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 2322 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 2323 2324 /* Values for DeviceType field above */ 2325 2326 /* SSP Link */ 2327 2328 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 2329 #define ACPI_NHLT_LINK_FM 1 2330 #define ACPI_NHLT_LINK_MODEM 2 2331 /* 3 is reserved */ 2332 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 2333 2334 /* PDM Link */ 2335 2336 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 2337 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 2338 2339 /* Values for Direction field above */ 2340 2341 #define ACPI_NHLT_DIR_RENDER 0 2342 #define ACPI_NHLT_DIR_CAPTURE 1 2343 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 2344 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 2345 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 2346 2347 /* Capabilities = 2 */ 2348 2349 typedef struct acpi_nhlt_device_specific_config 2350 { 2351 UINT32 CapabilitiesSize; 2352 UINT8 VirtualSlot; 2353 UINT8 ConfigType; 2354 2355 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG; 2356 2357 /* Capabilities = 3 */ 2358 2359 typedef struct acpi_nhlt_device_specific_config_a 2360 { 2361 UINT32 CapabilitiesSize; 2362 UINT8 VirtualSlot; 2363 UINT8 ConfigType; 2364 UINT8 ArrayType; 2365 2366 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_A; 2367 2368 /* Capabilities = 3 */ 2369 2370 typedef struct acpi_nhlt_device_specific_config_d 2371 { 2372 UINT8 VirtualSlot; 2373 UINT8 ConfigType; 2374 UINT8 ArrayType; 2375 2376 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_D; 2377 2378 /* Values for Config Type above */ 2379 2380 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 2381 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 2382 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 2383 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 2384 2385 /* Capabilities = 0 */ 2386 2387 typedef struct acpi_nhlt_device_specific_config_b 2388 { 2389 UINT32 CapabilitiesSize; 2390 2391 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_B; 2392 2393 /* Capabilities = 1 */ 2394 2395 typedef struct acpi_nhlt_device_specific_config_c 2396 { 2397 UINT32 CapabilitiesSize; 2398 UINT8 VirtualSlot; 2399 2400 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_C; 2401 2402 typedef struct acpi_nhlt_render_device_specific_config 2403 { 2404 UINT32 CapabilitiesSize; 2405 UINT8 VirtualSlot; 2406 2407 } ACPI_NHLT_RENDER_DEVICE_SPECIFIC_CONFIG; 2408 2409 typedef struct acpi_nhlt_wave_extensible 2410 { 2411 UINT16 FormatTag; 2412 UINT16 ChannelCount; 2413 UINT32 SamplesPerSec; 2414 UINT32 AvgBytesPerSec; 2415 UINT16 BlockAlign; 2416 UINT16 BitsPerSample; 2417 UINT16 ExtraFormatSize; 2418 UINT16 ValidBitsPerSample; 2419 UINT32 ChannelMask; 2420 UINT8 SubFormatGuid[16]; 2421 2422 } ACPI_NHLT_WAVE_EXTENSIBLE; 2423 2424 /* Values for ChannelMask above */ 2425 2426 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 2427 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 2428 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 2429 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 2430 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 2431 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 2432 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 2433 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 2434 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 2435 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 2436 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 2437 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 2438 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 2439 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 2440 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 2441 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 2442 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 2443 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 2444 2445 typedef struct acpi_nhlt_format_config 2446 { 2447 ACPI_NHLT_WAVE_EXTENSIBLE Format; 2448 UINT32 CapabilitySize; 2449 UINT8 Capabilities[]; 2450 2451 } ACPI_NHLT_FORMAT_CONFIG; 2452 2453 typedef struct acpi_nhlt_formats_config 2454 { 2455 UINT8 FormatsCount; 2456 2457 } ACPI_NHLT_FORMATS_CONFIG; 2458 2459 typedef struct acpi_nhlt_device_specific_hdr 2460 { 2461 UINT8 VirtualSlot; 2462 UINT8 ConfigType; 2463 2464 } ACPI_NHLT_DEVICE_SPECIFIC_HDR; 2465 2466 /* Types for ConfigType above */ 2467 2468 #define ACPI_NHLT_GENERIC 0 2469 #define ACPI_NHLT_MIC 1 2470 #define ACPI_NHLT_RENDER 3 2471 2472 typedef struct acpi_nhlt_mic_device_specific_config 2473 { 2474 ACPI_NHLT_DEVICE_SPECIFIC_HDR DeviceConfig; 2475 UINT8 ArrayTypeExt; 2476 2477 } ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG; 2478 2479 /* Values for ArrayTypeExt above */ 2480 2481 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 2482 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 2483 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 2484 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 2485 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 2486 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 2487 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 2488 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 2489 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 2490 2491 #define ACPI_NHLT_NO_EXTENSION 0x0 2492 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 2493 2494 typedef struct acpi_nhlt_vendor_mic_count 2495 { 2496 UINT8 MicrophoneCount; 2497 2498 } ACPI_NHLT_VENDOR_MIC_COUNT; 2499 2500 typedef struct acpi_nhlt_vendor_mic_config 2501 { 2502 UINT8 Type; 2503 UINT8 Panel; 2504 UINT16 SpeakerPositionDistance; /* mm */ 2505 UINT16 HorizontalOffset; /* mm */ 2506 UINT16 VerticalOffset; /* mm */ 2507 UINT8 FrequencyLowBand; /* 5*Hz */ 2508 UINT8 FrequencyHighBand; /* 500*Hz */ 2509 UINT16 DirectionAngle; /* -180 - + 180 */ 2510 UINT16 ElevationAngle; /* -180 - + 180 */ 2511 UINT16 WorkVerticalAngleBegin; /* -180 - + 180 with 2 deg step */ 2512 UINT16 WorkVerticalAngleEnd; /* -180 - + 180 with 2 deg step */ 2513 UINT16 WorkHorizontalAngleBegin; /* -180 - + 180 with 2 deg step */ 2514 UINT16 WorkHorizontalAngleEnd; /* -180 - + 180 with 2 deg step */ 2515 2516 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2517 2518 /* Values for Type field above */ 2519 2520 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2521 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2522 #define ACPI_NHLT_MIC_CARDIOID 2 2523 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2524 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2525 #define ACPI_NHLT_MIC_8_SHAPED 5 2526 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2527 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2528 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2529 2530 /* Values for Panel field above */ 2531 2532 #define ACPI_NHLT_MIC_POSITION_TOP 0 2533 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2534 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2535 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2536 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2537 #define ACPI_NHLT_MIC_POSITION_BACK 5 2538 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2539 2540 typedef struct acpi_nhlt_vendor_mic_device_specific_config 2541 { 2542 ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG MicArrayDeviceConfig; 2543 UINT8 NumberOfMicrophones; 2544 ACPI_NHLT_VENDOR_MIC_CONFIG MicConfig[]; /* Indexed by NumberOfMicrophones */ 2545 2546 } ACPI_NHLT_VENDOR_MIC_DEVICE_SPECIFIC_CONFIG; 2547 2548 /* Microphone SNR and Sensitivity extension */ 2549 2550 typedef struct acpi_nhlt_mic_snr_sensitivity_extension 2551 { 2552 UINT32 SNR; 2553 UINT32 Sensitivity; 2554 2555 } ACPI_NHLT_MIC_SNR_SENSITIVITY_EXTENSION; 2556 2557 /* Render device with feedback */ 2558 2559 typedef struct acpi_nhlt_render_feedback_device_specific_config 2560 { 2561 UINT8 FeedbackVirtualSlot; /* Render slot in case of capture */ 2562 UINT16 FeedbackChannels; /* Informative only */ 2563 UINT16 FeedbackValidBitsPerSample; 2564 2565 } ACPI_NHLT_RENDER_FEEDBACK_DEVICE_SPECIFIC_CONFIG; 2566 2567 /* Non documented structures */ 2568 2569 typedef struct acpi_nhlt_device_info_count 2570 { 2571 UINT8 StructureCount; 2572 2573 } ACPI_NHLT_DEVICE_INFO_COUNT; 2574 2575 typedef struct acpi_nhlt_device_info 2576 { 2577 UINT8 DeviceId[16]; 2578 UINT8 DeviceInstanceId; 2579 UINT8 DevicePortId; 2580 2581 } ACPI_NHLT_DEVICE_INFO; 2582 2583 2584 /******************************************************************************* 2585 * 2586 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2587 * Version 2 (ACPI 6.2) 2588 * 2589 ******************************************************************************/ 2590 2591 typedef struct acpi_table_pcct 2592 { 2593 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2594 UINT32 Flags; 2595 UINT64 Reserved; 2596 2597 } ACPI_TABLE_PCCT; 2598 2599 /* Values for Flags field above */ 2600 2601 #define ACPI_PCCT_DOORBELL 1 2602 2603 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2604 2605 enum AcpiPcctType 2606 { 2607 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2608 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2609 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2610 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2611 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2612 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2613 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2614 }; 2615 2616 /* 2617 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2618 */ 2619 2620 /* 0: Generic Communications Subspace */ 2621 2622 typedef struct acpi_pcct_subspace 2623 { 2624 ACPI_SUBTABLE_HEADER Header; 2625 UINT8 Reserved[6]; 2626 UINT64 BaseAddress; 2627 UINT64 Length; 2628 ACPI_GENERIC_ADDRESS DoorbellRegister; 2629 UINT64 PreserveMask; 2630 UINT64 WriteMask; 2631 UINT32 Latency; 2632 UINT32 MaxAccessRate; 2633 UINT16 MinTurnaroundTime; 2634 2635 } ACPI_PCCT_SUBSPACE; 2636 2637 2638 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2639 2640 typedef struct acpi_pcct_hw_reduced 2641 { 2642 ACPI_SUBTABLE_HEADER Header; 2643 UINT32 PlatformInterrupt; 2644 UINT8 Flags; 2645 UINT8 Reserved; 2646 UINT64 BaseAddress; 2647 UINT64 Length; 2648 ACPI_GENERIC_ADDRESS DoorbellRegister; 2649 UINT64 PreserveMask; 2650 UINT64 WriteMask; 2651 UINT32 Latency; 2652 UINT32 MaxAccessRate; 2653 UINT16 MinTurnaroundTime; 2654 2655 } ACPI_PCCT_HW_REDUCED; 2656 2657 2658 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2659 2660 typedef struct acpi_pcct_hw_reduced_type2 2661 { 2662 ACPI_SUBTABLE_HEADER Header; 2663 UINT32 PlatformInterrupt; 2664 UINT8 Flags; 2665 UINT8 Reserved; 2666 UINT64 BaseAddress; 2667 UINT64 Length; 2668 ACPI_GENERIC_ADDRESS DoorbellRegister; 2669 UINT64 PreserveMask; 2670 UINT64 WriteMask; 2671 UINT32 Latency; 2672 UINT32 MaxAccessRate; 2673 UINT16 MinTurnaroundTime; 2674 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2675 UINT64 AckPreserveMask; 2676 UINT64 AckWriteMask; 2677 2678 } ACPI_PCCT_HW_REDUCED_TYPE2; 2679 2680 2681 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2682 2683 typedef struct acpi_pcct_ext_pcc_master 2684 { 2685 ACPI_SUBTABLE_HEADER Header; 2686 UINT32 PlatformInterrupt; 2687 UINT8 Flags; 2688 UINT8 Reserved1; 2689 UINT64 BaseAddress; 2690 UINT32 Length; 2691 ACPI_GENERIC_ADDRESS DoorbellRegister; 2692 UINT64 PreserveMask; 2693 UINT64 WriteMask; 2694 UINT32 Latency; 2695 UINT32 MaxAccessRate; 2696 UINT32 MinTurnaroundTime; 2697 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2698 UINT64 AckPreserveMask; 2699 UINT64 AckSetMask; 2700 UINT64 Reserved2; 2701 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2702 UINT64 CmdCompleteMask; 2703 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2704 UINT64 CmdUpdatePreserveMask; 2705 UINT64 CmdUpdateSetMask; 2706 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2707 UINT64 ErrorStatusMask; 2708 2709 } ACPI_PCCT_EXT_PCC_MASTER; 2710 2711 2712 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2713 2714 typedef struct acpi_pcct_ext_pcc_slave 2715 { 2716 ACPI_SUBTABLE_HEADER Header; 2717 UINT32 PlatformInterrupt; 2718 UINT8 Flags; 2719 UINT8 Reserved1; 2720 UINT64 BaseAddress; 2721 UINT32 Length; 2722 ACPI_GENERIC_ADDRESS DoorbellRegister; 2723 UINT64 PreserveMask; 2724 UINT64 WriteMask; 2725 UINT32 Latency; 2726 UINT32 MaxAccessRate; 2727 UINT32 MinTurnaroundTime; 2728 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2729 UINT64 AckPreserveMask; 2730 UINT64 AckSetMask; 2731 UINT64 Reserved2; 2732 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2733 UINT64 CmdCompleteMask; 2734 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2735 UINT64 CmdUpdatePreserveMask; 2736 UINT64 CmdUpdateSetMask; 2737 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2738 UINT64 ErrorStatusMask; 2739 2740 } ACPI_PCCT_EXT_PCC_SLAVE; 2741 2742 /* 5: HW Registers based Communications Subspace */ 2743 2744 typedef struct acpi_pcct_hw_reg 2745 { 2746 ACPI_SUBTABLE_HEADER Header; 2747 UINT16 Version; 2748 UINT64 BaseAddress; 2749 UINT64 Length; 2750 ACPI_GENERIC_ADDRESS DoorbellRegister; 2751 UINT64 DoorbellPreserve; 2752 UINT64 DoorbellWrite; 2753 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2754 UINT64 CmdCompleteMask; 2755 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2756 UINT64 ErrorStatusMask; 2757 UINT32 NominalLatency; 2758 UINT32 MinTurnaroundTime; 2759 2760 } ACPI_PCCT_HW_REG; 2761 2762 2763 /* Values for doorbell flags above */ 2764 2765 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2766 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2767 2768 2769 /* 2770 * PCC memory structures (not part of the ACPI table) 2771 */ 2772 2773 /* Shared Memory Region */ 2774 2775 typedef struct acpi_pcct_shared_memory 2776 { 2777 UINT32 Signature; 2778 UINT16 Command; 2779 UINT16 Status; 2780 2781 } ACPI_PCCT_SHARED_MEMORY; 2782 2783 2784 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2785 2786 typedef struct acpi_pcct_ext_pcc_shared_memory 2787 { 2788 UINT32 Signature; 2789 UINT32 Flags; 2790 UINT32 Length; 2791 UINT32 Command; 2792 2793 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2794 2795 2796 /******************************************************************************* 2797 * 2798 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2799 * Version 0 2800 * 2801 ******************************************************************************/ 2802 2803 typedef struct acpi_table_pdtt 2804 { 2805 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2806 UINT8 TriggerCount; 2807 UINT8 Reserved[3]; 2808 UINT32 ArrayOffset; 2809 2810 } ACPI_TABLE_PDTT; 2811 2812 2813 /* 2814 * PDTT Communication Channel Identifier Structure. 2815 * The number of these structures is defined by TriggerCount above, 2816 * starting at ArrayOffset. 2817 */ 2818 typedef struct acpi_pdtt_channel 2819 { 2820 UINT8 SubchannelId; 2821 UINT8 Flags; 2822 2823 } ACPI_PDTT_CHANNEL; 2824 2825 /* Flags for above */ 2826 2827 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2828 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2829 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2830 2831 2832 /******************************************************************************* 2833 * 2834 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2835 * Version 1 2836 * 2837 ******************************************************************************/ 2838 2839 typedef struct acpi_table_phat 2840 { 2841 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2842 2843 } ACPI_TABLE_PHAT; 2844 2845 /* Common header for PHAT subtables that follow main table */ 2846 2847 typedef struct acpi_phat_header 2848 { 2849 UINT16 Type; 2850 UINT16 Length; 2851 UINT8 Revision; 2852 2853 } ACPI_PHAT_HEADER; 2854 2855 2856 /* Values for Type field above */ 2857 2858 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2859 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2860 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2861 2862 /* 2863 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2864 */ 2865 2866 /* 0: Firmware Version Data Record */ 2867 2868 typedef struct acpi_phat_version_data 2869 { 2870 ACPI_PHAT_HEADER Header; 2871 UINT8 Reserved[3]; 2872 UINT32 ElementCount; 2873 2874 } ACPI_PHAT_VERSION_DATA; 2875 2876 typedef struct acpi_phat_version_element 2877 { 2878 UINT8 Guid[16]; 2879 UINT64 VersionValue; 2880 UINT32 ProducerId; 2881 2882 } ACPI_PHAT_VERSION_ELEMENT; 2883 2884 2885 /* 1: Firmware Health Data Record */ 2886 2887 typedef struct acpi_phat_health_data 2888 { 2889 ACPI_PHAT_HEADER Header; 2890 UINT8 Reserved[2]; 2891 UINT8 Health; 2892 UINT8 DeviceGuid[16]; 2893 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2894 2895 } ACPI_PHAT_HEALTH_DATA; 2896 2897 /* Values for Health field above */ 2898 2899 #define ACPI_PHAT_ERRORS_FOUND 0 2900 #define ACPI_PHAT_NO_ERRORS 1 2901 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2902 #define ACPI_PHAT_ADVISORY 3 2903 2904 2905 /******************************************************************************* 2906 * 2907 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2908 * Version 1 2909 * 2910 ******************************************************************************/ 2911 2912 typedef struct acpi_table_pmtt 2913 { 2914 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2915 UINT32 MemoryDeviceCount; 2916 /* 2917 * Immediately followed by: 2918 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2919 */ 2920 2921 } ACPI_TABLE_PMTT; 2922 2923 2924 /* Common header for PMTT subtables that follow main table */ 2925 2926 typedef struct acpi_pmtt_header 2927 { 2928 UINT8 Type; 2929 UINT8 Reserved1; 2930 UINT16 Length; 2931 UINT16 Flags; 2932 UINT16 Reserved2; 2933 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2934 /* 2935 * Immediately followed by: 2936 * UINT8 TypeSpecificData[] 2937 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2938 */ 2939 2940 } ACPI_PMTT_HEADER; 2941 2942 /* Values for Type field above */ 2943 2944 #define ACPI_PMTT_TYPE_SOCKET 0 2945 #define ACPI_PMTT_TYPE_CONTROLLER 1 2946 #define ACPI_PMTT_TYPE_DIMM 2 2947 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2948 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2949 2950 /* Values for Flags field above */ 2951 2952 #define ACPI_PMTT_TOP_LEVEL 0x0001 2953 #define ACPI_PMTT_PHYSICAL 0x0002 2954 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2955 2956 2957 /* 2958 * PMTT subtables, correspond to Type in acpi_pmtt_header 2959 */ 2960 2961 2962 /* 0: Socket Structure */ 2963 2964 typedef struct acpi_pmtt_socket 2965 { 2966 ACPI_PMTT_HEADER Header; 2967 UINT16 SocketId; 2968 UINT16 Reserved; 2969 2970 } ACPI_PMTT_SOCKET; 2971 /* 2972 * Immediately followed by: 2973 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2974 */ 2975 2976 2977 /* 1: Memory Controller subtable */ 2978 2979 typedef struct acpi_pmtt_controller 2980 { 2981 ACPI_PMTT_HEADER Header; 2982 UINT16 ControllerId; 2983 UINT16 Reserved; 2984 2985 } ACPI_PMTT_CONTROLLER; 2986 /* 2987 * Immediately followed by: 2988 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2989 */ 2990 2991 2992 /* 2: Physical Component Identifier (DIMM) */ 2993 2994 typedef struct acpi_pmtt_physical_component 2995 { 2996 ACPI_PMTT_HEADER Header; 2997 UINT32 BiosHandle; 2998 2999 } ACPI_PMTT_PHYSICAL_COMPONENT; 3000 3001 3002 /* 0xFF: Vendor Specific Data */ 3003 3004 typedef struct acpi_pmtt_vendor_specific 3005 { 3006 ACPI_PMTT_HEADER Header; 3007 UINT8 TypeUuid[16]; 3008 UINT8 Specific[]; 3009 /* 3010 * Immediately followed by: 3011 * UINT8 VendorSpecificData[]; 3012 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3013 */ 3014 3015 } ACPI_PMTT_VENDOR_SPECIFIC; 3016 3017 3018 /******************************************************************************* 3019 * 3020 * PPTT - Processor Properties Topology Table (ACPI 6.2) 3021 * Version 1 3022 * 3023 ******************************************************************************/ 3024 3025 typedef struct acpi_table_pptt 3026 { 3027 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3028 3029 } ACPI_TABLE_PPTT; 3030 3031 /* Values for Type field above */ 3032 3033 enum AcpiPpttType 3034 { 3035 ACPI_PPTT_TYPE_PROCESSOR = 0, 3036 ACPI_PPTT_TYPE_CACHE = 1, 3037 ACPI_PPTT_TYPE_ID = 2, 3038 ACPI_PPTT_TYPE_RESERVED = 3 3039 }; 3040 3041 3042 /* 0: Processor Hierarchy Node Structure */ 3043 3044 typedef struct acpi_pptt_processor 3045 { 3046 ACPI_SUBTABLE_HEADER Header; 3047 UINT16 Reserved; 3048 UINT32 Flags; 3049 UINT32 Parent; 3050 UINT32 AcpiProcessorId; 3051 UINT32 NumberOfPrivResources; 3052 3053 } ACPI_PPTT_PROCESSOR; 3054 3055 /* Flags */ 3056 3057 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 3058 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 3059 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 3060 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 3061 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 3062 3063 3064 /* 1: Cache Type Structure */ 3065 3066 typedef struct acpi_pptt_cache 3067 { 3068 ACPI_SUBTABLE_HEADER Header; 3069 UINT16 Reserved; 3070 UINT32 Flags; 3071 UINT32 NextLevelOfCache; 3072 UINT32 Size; 3073 UINT32 NumberOfSets; 3074 UINT8 Associativity; 3075 UINT8 Attributes; 3076 UINT16 LineSize; 3077 3078 } ACPI_PPTT_CACHE; 3079 3080 /* 1: Cache Type Structure for PPTT version 3 */ 3081 3082 typedef struct acpi_pptt_cache_v1 3083 { 3084 UINT32 CacheId; 3085 3086 } ACPI_PPTT_CACHE_V1; 3087 3088 3089 /* Flags */ 3090 3091 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 3092 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 3093 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 3094 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 3095 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 3096 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 3097 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 3098 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 3099 3100 /* Masks for Attributes */ 3101 3102 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3103 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3104 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3105 3106 /* Attributes describing cache */ 3107 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3108 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3109 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3110 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3111 3112 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3113 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3114 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3115 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3116 3117 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3118 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3119 3120 /* 2: ID Structure */ 3121 3122 typedef struct acpi_pptt_id 3123 { 3124 ACPI_SUBTABLE_HEADER Header; 3125 UINT16 Reserved; 3126 UINT32 VendorId; 3127 UINT64 Level1Id; 3128 UINT64 Level2Id; 3129 UINT16 MajorRev; 3130 UINT16 MinorRev; 3131 UINT16 SpinRev; 3132 3133 } ACPI_PPTT_ID; 3134 3135 3136 /******************************************************************************* 3137 * 3138 * PRMT - Platform Runtime Mechanism Table 3139 * Version 1 3140 * 3141 ******************************************************************************/ 3142 3143 typedef struct acpi_table_prmt 3144 { 3145 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3146 3147 } ACPI_TABLE_PRMT; 3148 3149 typedef struct acpi_table_prmt_header 3150 { 3151 UINT8 PlatformGuid[16]; 3152 UINT32 ModuleInfoOffset; 3153 UINT32 ModuleInfoCount; 3154 3155 } ACPI_TABLE_PRMT_HEADER; 3156 3157 typedef struct acpi_prmt_module_header 3158 { 3159 UINT16 Revision; 3160 UINT16 Length; 3161 3162 } ACPI_PRMT_MODULE_HEADER; 3163 3164 typedef struct acpi_prmt_module_info 3165 { 3166 UINT16 Revision; 3167 UINT16 Length; 3168 UINT8 ModuleGuid[16]; 3169 UINT16 MajorRev; 3170 UINT16 MinorRev; 3171 UINT16 HandlerInfoCount; 3172 UINT32 HandlerInfoOffset; 3173 UINT64 MmioListPointer; 3174 3175 } ACPI_PRMT_MODULE_INFO; 3176 3177 typedef struct acpi_prmt_handler_info 3178 { 3179 UINT16 Revision; 3180 UINT16 Length; 3181 UINT8 HandlerGuid[16]; 3182 UINT64 HandlerAddress; 3183 UINT64 StaticDataBufferAddress; 3184 UINT64 AcpiParamBufferAddress; 3185 3186 } ACPI_PRMT_HANDLER_INFO; 3187 3188 3189 /******************************************************************************* 3190 * 3191 * RASF - RAS Feature Table (ACPI 5.0) 3192 * Version 1 3193 * 3194 ******************************************************************************/ 3195 3196 typedef struct acpi_table_rasf 3197 { 3198 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3199 UINT8 ChannelId[12]; 3200 3201 } ACPI_TABLE_RASF; 3202 3203 /* RASF Platform Communication Channel Shared Memory Region */ 3204 3205 typedef struct acpi_rasf_shared_memory 3206 { 3207 UINT32 Signature; 3208 UINT16 Command; 3209 UINT16 Status; 3210 UINT16 Version; 3211 UINT8 Capabilities[16]; 3212 UINT8 SetCapabilities[16]; 3213 UINT16 NumParameterBlocks; 3214 UINT32 SetCapabilitiesStatus; 3215 3216 } ACPI_RASF_SHARED_MEMORY; 3217 3218 /* RASF Parameter Block Structure Header */ 3219 3220 typedef struct acpi_rasf_parameter_block 3221 { 3222 UINT16 Type; 3223 UINT16 Version; 3224 UINT16 Length; 3225 3226 } ACPI_RASF_PARAMETER_BLOCK; 3227 3228 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3229 3230 typedef struct acpi_rasf_patrol_scrub_parameter 3231 { 3232 ACPI_RASF_PARAMETER_BLOCK Header; 3233 UINT16 PatrolScrubCommand; 3234 UINT64 RequestedAddressRange[2]; 3235 UINT64 ActualAddressRange[2]; 3236 UINT16 Flags; 3237 UINT8 RequestedSpeed; 3238 3239 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3240 3241 /* Masks for Flags and Speed fields above */ 3242 3243 #define ACPI_RASF_SCRUBBER_RUNNING 1 3244 #define ACPI_RASF_SPEED (7<<1) 3245 #define ACPI_RASF_SPEED_SLOW (0<<1) 3246 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3247 #define ACPI_RASF_SPEED_FAST (7<<1) 3248 3249 /* Channel Commands */ 3250 3251 enum AcpiRasfCommands 3252 { 3253 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3254 }; 3255 3256 /* Platform RAS Capabilities */ 3257 3258 enum AcpiRasfCapabiliities 3259 { 3260 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3261 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3262 }; 3263 3264 /* Patrol Scrub Commands */ 3265 3266 enum AcpiRasfPatrolScrubCommands 3267 { 3268 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3269 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3270 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3271 }; 3272 3273 /* Channel Command flags */ 3274 3275 #define ACPI_RASF_GENERATE_SCI (1<<15) 3276 3277 /* Status values */ 3278 3279 enum AcpiRasfStatus 3280 { 3281 ACPI_RASF_SUCCESS = 0, 3282 ACPI_RASF_NOT_VALID = 1, 3283 ACPI_RASF_NOT_SUPPORTED = 2, 3284 ACPI_RASF_BUSY = 3, 3285 ACPI_RASF_FAILED = 4, 3286 ACPI_RASF_ABORTED = 5, 3287 ACPI_RASF_INVALID_DATA = 6 3288 }; 3289 3290 /* Status flags */ 3291 3292 #define ACPI_RASF_COMMAND_COMPLETE (1) 3293 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3294 #define ACPI_RASF_ERROR (1<<2) 3295 #define ACPI_RASF_STATUS (0x1F<<3) 3296 3297 3298 /******************************************************************************* 3299 * 3300 * RGRT - Regulatory Graphics Resource Table 3301 * Version 1 3302 * 3303 * Conforms to "ACPI RGRT" available at: 3304 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3305 * 3306 ******************************************************************************/ 3307 3308 typedef struct acpi_table_rgrt 3309 { 3310 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3311 UINT16 Version; 3312 UINT8 ImageType; 3313 UINT8 Reserved; 3314 UINT8 Image[]; 3315 3316 } ACPI_TABLE_RGRT; 3317 3318 /* ImageType values */ 3319 3320 enum AcpiRgrtImageType 3321 { 3322 ACPI_RGRT_TYPE_RESERVED0 = 0, 3323 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3324 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3325 }; 3326 3327 3328 /******************************************************************************* 3329 * 3330 * RHCT - RISC-V Hart Capabilities Table 3331 * Version 1 3332 * 3333 ******************************************************************************/ 3334 3335 typedef struct acpi_table_rhct { 3336 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3337 UINT32 Flags; /* RHCT flags */ 3338 UINT64 TimeBaseFreq; 3339 UINT32 NodeCount; 3340 UINT32 NodeOffset; 3341 } ACPI_TABLE_RHCT; 3342 3343 /* RHCT Flags */ 3344 3345 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3346 /* 3347 * RHCT subtables 3348 */ 3349 typedef struct acpi_rhct_node_header { 3350 UINT16 Type; 3351 UINT16 Length; 3352 UINT16 Revision; 3353 } ACPI_RHCT_NODE_HEADER; 3354 3355 /* Values for RHCT subtable Type above */ 3356 3357 enum acpi_rhct_node_type { 3358 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3359 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3360 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3361 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3362 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3363 }; 3364 3365 /* 3366 * RHCT node specific subtables 3367 */ 3368 3369 /* ISA string node structure */ 3370 typedef struct acpi_rhct_isa_string { 3371 UINT16 IsaLength; 3372 char Isa[]; 3373 } ACPI_RHCT_ISA_STRING; 3374 3375 typedef struct acpi_rhct_cmo_node { 3376 UINT8 Reserved; /* Must be zero */ 3377 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3378 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3379 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3380 } ACPI_RHCT_CMO_NODE; 3381 3382 typedef struct acpi_rhct_mmu_node { 3383 UINT8 Reserved; /* Must be zero */ 3384 UINT8 MmuType; /* Virtual Address Scheme */ 3385 } ACPI_RHCT_MMU_NODE; 3386 3387 enum acpi_rhct_mmu_type { 3388 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3389 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3390 ACPI_RHCT_MMU_TYPE_SV57 = 2 3391 }; 3392 3393 /* Hart Info node structure */ 3394 typedef struct acpi_rhct_hart_info { 3395 UINT16 NumOffsets; 3396 UINT32 Uid; /* ACPI processor UID */ 3397 } ACPI_RHCT_HART_INFO; 3398 3399 /******************************************************************************* 3400 * 3401 * SBST - Smart Battery Specification Table 3402 * Version 1 3403 * 3404 ******************************************************************************/ 3405 3406 typedef struct acpi_table_sbst 3407 { 3408 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3409 UINT32 WarningLevel; 3410 UINT32 LowLevel; 3411 UINT32 CriticalLevel; 3412 3413 } ACPI_TABLE_SBST; 3414 3415 3416 /******************************************************************************* 3417 * 3418 * SDEI - Software Delegated Exception Interface Descriptor Table 3419 * 3420 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3421 * May 8th, 2017. Copyright 2017 ARM Ltd. 3422 * 3423 ******************************************************************************/ 3424 3425 typedef struct acpi_table_sdei 3426 { 3427 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3428 3429 } ACPI_TABLE_SDEI; 3430 3431 3432 /******************************************************************************* 3433 * 3434 * SDEV - Secure Devices Table (ACPI 6.2) 3435 * Version 1 3436 * 3437 ******************************************************************************/ 3438 3439 typedef struct acpi_table_sdev 3440 { 3441 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3442 3443 } ACPI_TABLE_SDEV; 3444 3445 3446 typedef struct acpi_sdev_header 3447 { 3448 UINT8 Type; 3449 UINT8 Flags; 3450 UINT16 Length; 3451 3452 } ACPI_SDEV_HEADER; 3453 3454 3455 /* Values for subtable type above */ 3456 3457 enum AcpiSdevType 3458 { 3459 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3460 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3461 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3462 }; 3463 3464 /* Values for flags above */ 3465 3466 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3467 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3468 3469 /* 3470 * SDEV subtables 3471 */ 3472 3473 /* 0: Namespace Device Based Secure Device Structure */ 3474 3475 typedef struct acpi_sdev_namespace 3476 { 3477 ACPI_SDEV_HEADER Header; 3478 UINT16 DeviceIdOffset; 3479 UINT16 DeviceIdLength; 3480 UINT16 VendorDataOffset; 3481 UINT16 VendorDataLength; 3482 3483 } ACPI_SDEV_NAMESPACE; 3484 3485 typedef struct acpi_sdev_secure_component 3486 { 3487 UINT16 SecureComponentOffset; 3488 UINT16 SecureComponentLength; 3489 3490 } ACPI_SDEV_SECURE_COMPONENT; 3491 3492 3493 /* 3494 * SDEV sub-subtables ("Components") for above 3495 */ 3496 typedef struct acpi_sdev_component 3497 { 3498 ACPI_SDEV_HEADER Header; 3499 3500 } ACPI_SDEV_COMPONENT; 3501 3502 3503 /* Values for sub-subtable type above */ 3504 3505 enum AcpiSacType 3506 { 3507 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3508 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3509 }; 3510 3511 typedef struct acpi_sdev_id_component 3512 { 3513 ACPI_SDEV_HEADER Header; 3514 UINT16 HardwareIdOffset; 3515 UINT16 HardwareIdLength; 3516 UINT16 SubsystemIdOffset; 3517 UINT16 SubsystemIdLength; 3518 UINT16 HardwareRevision; 3519 UINT8 HardwareRevPresent; 3520 UINT8 ClassCodePresent; 3521 UINT8 PciBaseClass; 3522 UINT8 PciSubClass; 3523 UINT8 PciProgrammingXface; 3524 3525 } ACPI_SDEV_ID_COMPONENT; 3526 3527 typedef struct acpi_sdev_mem_component 3528 { 3529 ACPI_SDEV_HEADER Header; 3530 UINT32 Reserved; 3531 UINT64 MemoryBaseAddress; 3532 UINT64 MemoryLength; 3533 3534 } ACPI_SDEV_MEM_COMPONENT; 3535 3536 3537 /* 1: PCIe Endpoint Device Based Device Structure */ 3538 3539 typedef struct acpi_sdev_pcie 3540 { 3541 ACPI_SDEV_HEADER Header; 3542 UINT16 Segment; 3543 UINT16 StartBus; 3544 UINT16 PathOffset; 3545 UINT16 PathLength; 3546 UINT16 VendorDataOffset; 3547 UINT16 VendorDataLength; 3548 3549 } ACPI_SDEV_PCIE; 3550 3551 /* 1a: PCIe Endpoint path entry */ 3552 3553 typedef struct acpi_sdev_pcie_path 3554 { 3555 UINT8 Device; 3556 UINT8 Function; 3557 3558 } ACPI_SDEV_PCIE_PATH; 3559 3560 3561 /******************************************************************************* 3562 * 3563 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3564 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3565 * Trust Domain Extensions (Intel TDX)". 3566 * Version 1 3567 * 3568 ******************************************************************************/ 3569 3570 typedef struct acpi_table_svkl 3571 { 3572 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3573 UINT32 Count; 3574 3575 } ACPI_TABLE_SVKL; 3576 3577 typedef struct acpi_svkl_key 3578 { 3579 UINT16 Type; 3580 UINT16 Format; 3581 UINT32 Size; 3582 UINT64 Address; 3583 3584 } ACPI_SVKL_KEY; 3585 3586 enum acpi_svkl_type 3587 { 3588 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3589 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3590 }; 3591 3592 enum acpi_svkl_format 3593 { 3594 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3595 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3596 }; 3597 3598 3599 /******************************************************************************* 3600 * 3601 * TDEL - TD-Event Log 3602 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3603 * Trust Domain Extensions (Intel TDX)". 3604 * September 2020 3605 * 3606 ******************************************************************************/ 3607 3608 typedef struct acpi_table_tdel 3609 { 3610 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3611 UINT32 Reserved; 3612 UINT64 LogAreaMinimumLength; 3613 UINT64 LogAreaStartAddress; 3614 3615 } ACPI_TABLE_TDEL; 3616 3617 /* Reset to default packing */ 3618 3619 #pragma pack() 3620 3621 #endif /* __ACTBL2_H__ */ 3622