xref: /freebsd/sys/dev/mii/micphy.c (revision 9a622787244c4cda76d1509b0eae168bf4fd1952)
1 /*-
2  * Copyright (c) 2014,2019 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * This software was developed by SRI International and the University of
6  * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7  * ("CTSRD"), as part of the DARPA CRASH research programme.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 /*
33  * Micrel KSZ8081/KSZ9021/KSZ9031 Gigabit Ethernet Transceiver
34  */
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/socket.h>
40 #include <sys/errno.h>
41 #include <sys/module.h>
42 #include <sys/bus.h>
43 #include <sys/malloc.h>
44 
45 #include <machine/bus.h>
46 
47 #include <net/if.h>
48 #include <net/if_media.h>
49 
50 #include <dev/mii/mii.h>
51 #include <dev/mii/miivar.h>
52 #include "miidevs.h"
53 
54 #include "miibus_if.h"
55 
56 #include <dev/fdt/fdt_common.h>
57 #include <dev/ofw/openfirm.h>
58 #include <dev/ofw/ofw_bus.h>
59 #include <dev/ofw/ofw_bus_subr.h>
60 #include <dev/mii/mii_fdt.h>
61 
62 #define	MII_KSZPHY_EXTREG			0x0b
63 #define	 KSZPHY_EXTREG_WRITE			(1 << 15)
64 #define	MII_KSZPHY_EXTREG_WRITE			0x0c
65 #define	MII_KSZPHY_EXTREG_READ			0x0d
66 #define	MII_KSZPHY_CLK_CONTROL_PAD_SKEW		0x104
67 #define	MII_KSZPHY_RX_DATA_PAD_SKEW		0x105
68 #define	MII_KSZPHY_TX_DATA_PAD_SKEW		0x106
69 /* KSZ9031 */
70 #define	MII_KSZ9031_MMD_ACCESS_CTRL		0x0d
71 #define	MII_KSZ9031_MMD_ACCESS_DATA		0x0e
72 #define	 MII_KSZ9031_MMD_DATA_NOINC		(1 << 14)
73 #define	MII_KSZ9031_CONTROL_PAD_SKEW		0x4
74 #define	MII_KSZ9031_RX_DATA_PAD_SKEW		0x5
75 #define	MII_KSZ9031_TX_DATA_PAD_SKEW		0x6
76 #define	MII_KSZ9031_CLOCK_PAD_SKEW		0x8
77 
78 #define	MII_KSZ8081_PHYCTL2			0x1f
79 
80 #define	PS_TO_REG(p)	((p) / 200)
81 
82 static int micphy_probe(device_t);
83 static int micphy_attach(device_t);
84 static void micphy_reset(struct mii_softc *);
85 static int micphy_service(struct mii_softc *, struct mii_data *, int);
86 
87 static device_method_t micphy_methods[] = {
88 	/* device interface */
89 	DEVMETHOD(device_probe,		micphy_probe),
90 	DEVMETHOD(device_attach,	micphy_attach),
91 	DEVMETHOD(device_detach,	mii_phy_detach),
92 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
93 	DEVMETHOD_END
94 };
95 
96 static driver_t micphy_driver = {
97 	"micphy",
98 	micphy_methods,
99 	sizeof(struct mii_softc)
100 };
101 
102 DRIVER_MODULE(micphy, miibus, micphy_driver, 0, 0);
103 
104 static const struct mii_phydesc micphys[] = {
105 	MII_PHY_DESC(MICREL, KSZ8081),
106 	MII_PHY_DESC(MICREL, KSZ9021),
107 	MII_PHY_DESC(MICREL, KSZ9031),
108 	MII_PHY_END
109 };
110 
111 static const struct mii_phy_funcs micphy_funcs = {
112 	micphy_service,
113 	ukphy_status,
114 	micphy_reset
115 };
116 
117 static uint32_t
ksz9031_read(struct mii_softc * sc,uint32_t devaddr,uint32_t reg)118 ksz9031_read(struct mii_softc *sc, uint32_t devaddr, uint32_t reg)
119 {
120 	/* Set up device address and register. */
121         PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, devaddr);
122         PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg);
123 
124 	/* Select register data for MMD and read the value. */
125         PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL,
126 	    MII_KSZ9031_MMD_DATA_NOINC | devaddr);
127 
128 	return (PHY_READ(sc, MII_KSZ9031_MMD_ACCESS_DATA));
129 }
130 
131 static void
ksz9031_write(struct mii_softc * sc,uint32_t devaddr,uint32_t reg,uint32_t val)132 ksz9031_write(struct mii_softc *sc, uint32_t devaddr, uint32_t reg,
133 	uint32_t val)
134 {
135 
136 	/* Set up device address and register. */
137 	PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, devaddr);
138 	PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg);
139 
140 	/* Select register data for MMD and write the value. */
141 	PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL,
142 	    MII_KSZ9031_MMD_DATA_NOINC | devaddr);
143 	PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, val);
144 }
145 
146 static uint32_t
ksz9021_read(struct mii_softc * sc,uint32_t reg)147 ksz9021_read(struct mii_softc *sc, uint32_t reg)
148 {
149 
150 	PHY_WRITE(sc, MII_KSZPHY_EXTREG, reg);
151 
152 	return (PHY_READ(sc, MII_KSZPHY_EXTREG_READ));
153 }
154 
155 static void
ksz9021_write(struct mii_softc * sc,uint32_t reg,uint32_t val)156 ksz9021_write(struct mii_softc *sc, uint32_t reg, uint32_t val)
157 {
158 
159 	PHY_WRITE(sc, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | reg);
160 	PHY_WRITE(sc, MII_KSZPHY_EXTREG_WRITE, val);
161 }
162 
163 static void
ksz90x1_load_values(struct mii_softc * sc,phandle_t node,uint32_t dev,uint32_t reg,char * field1,uint32_t f1mask,int f1off,char * field2,uint32_t f2mask,int f2off,char * field3,uint32_t f3mask,int f3off,char * field4,uint32_t f4mask,int f4off)164 ksz90x1_load_values(struct mii_softc *sc, phandle_t node,
165     uint32_t dev, uint32_t reg, char *field1, uint32_t f1mask, int f1off,
166     char *field2, uint32_t f2mask, int f2off, char *field3, uint32_t f3mask,
167     int f3off, char *field4, uint32_t f4mask, int f4off)
168 {
169 	pcell_t dts_value[1];
170 	int len;
171 	int val;
172 
173 	if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031)
174 		val = ksz9031_read(sc, dev, reg);
175 	else
176 		val = ksz9021_read(sc, reg);
177 
178 	if ((len = OF_getproplen(node, field1)) > 0) {
179 		OF_getencprop(node, field1, dts_value, len);
180 		val &= ~(f1mask << f1off);
181 		val |= (PS_TO_REG(dts_value[0]) & f1mask) << f1off;
182 	}
183 
184 	if (field2 != NULL && (len = OF_getproplen(node, field2)) > 0) {
185 		OF_getencprop(node, field2, dts_value, len);
186 		val &= ~(f2mask << f2off);
187 		val |= (PS_TO_REG(dts_value[0]) & f2mask) << f2off;
188 	}
189 
190 	if (field3 != NULL && (len = OF_getproplen(node, field3)) > 0) {
191 		OF_getencprop(node, field3, dts_value, len);
192 		val &= ~(f3mask << f3off);
193 		val |= (PS_TO_REG(dts_value[0]) & f3mask) << f3off;
194 	}
195 
196 	if (field4 != NULL && (len = OF_getproplen(node, field4)) > 0) {
197 		OF_getencprop(node, field4, dts_value, len);
198 		val &= ~(f4mask << f4off);
199 		val |= (PS_TO_REG(dts_value[0]) & f4mask) << f4off;
200 	}
201 
202 	if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031)
203 		ksz9031_write(sc, dev, reg, val);
204 	else
205 		ksz9021_write(sc, reg, val);
206 }
207 
208 static void
ksz9031_load_values(struct mii_softc * sc,phandle_t node)209 ksz9031_load_values(struct mii_softc *sc, phandle_t node)
210 {
211 
212 	ksz90x1_load_values(sc, node, 2, MII_KSZ9031_CONTROL_PAD_SKEW,
213 	    "txen-skew-ps", 0xf, 0, "rxdv-skew-ps", 0xf, 4,
214 	    NULL, 0, 0, NULL, 0, 0);
215 	ksz90x1_load_values(sc, node, 2, MII_KSZ9031_RX_DATA_PAD_SKEW,
216 	    "rxd0-skew-ps", 0xf, 0, "rxd1-skew-ps", 0xf, 4,
217 	    "rxd2-skew-ps", 0xf, 8, "rxd3-skew-ps", 0xf, 12);
218 	ksz90x1_load_values(sc, node, 2, MII_KSZ9031_TX_DATA_PAD_SKEW,
219 	    "txd0-skew-ps", 0xf, 0, "txd1-skew-ps", 0xf, 4,
220 	    "txd2-skew-ps", 0xf, 8, "txd3-skew-ps", 0xf, 12);
221 	ksz90x1_load_values(sc, node, 2, MII_KSZ9031_CLOCK_PAD_SKEW,
222 	    "rxc-skew-ps", 0x1f, 0, "txc-skew-ps", 0x1f, 5,
223 	    NULL, 0, 0, NULL, 0, 0);
224 }
225 
226 static void
ksz9021_load_values(struct mii_softc * sc,phandle_t node)227 ksz9021_load_values(struct mii_softc *sc, phandle_t node)
228 {
229 
230 	ksz90x1_load_values(sc, node, 0, MII_KSZPHY_CLK_CONTROL_PAD_SKEW,
231 	    "txen-skew-ps", 0xf, 0, "txc-skew-ps", 0xf, 4,
232 	    "rxdv-skew-ps", 0xf, 8, "rxc-skew-ps", 0xf, 12);
233 	ksz90x1_load_values(sc, node, 0, MII_KSZPHY_RX_DATA_PAD_SKEW,
234 	    "rxd0-skew-ps", 0xf, 0, "rxd1-skew-ps", 0xf, 4,
235 	    "rxd2-skew-ps", 0xf, 8, "rxd3-skew-ps", 0xf, 12);
236 	ksz90x1_load_values(sc, node, 0, MII_KSZPHY_TX_DATA_PAD_SKEW,
237 	    "txd0-skew-ps", 0xf, 0, "txd1-skew-ps", 0xf, 4,
238 	    "txd2-skew-ps", 0xf, 8, "txd3-skew-ps", 0xf, 12);
239 }
240 
241 static int
micphy_probe(device_t dev)242 micphy_probe(device_t dev)
243 {
244 
245 	return (mii_phy_dev_probe(dev, micphys, BUS_PROBE_DEFAULT));
246 }
247 
248 static int
micphy_attach(device_t dev)249 micphy_attach(device_t dev)
250 {
251 	mii_fdt_phy_config_t *cfg;
252 	struct mii_softc *sc;
253 	phandle_t node;
254 	device_t miibus;
255 	device_t parent;
256 
257 	sc = device_get_softc(dev);
258 
259 	mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &micphy_funcs, 1);
260 	mii_phy_setmedia(sc);
261 
262 	/* Nothing further to configure for 8081 model. */
263 	if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081)
264 		return (0);
265 
266 	miibus = device_get_parent(dev);
267 	parent = device_get_parent(miibus);
268 
269 	if ((node = ofw_bus_get_node(parent)) == -1)
270 		return (ENXIO);
271 
272 	cfg = mii_fdt_get_config(dev);
273 
274 	if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031)
275 		ksz9031_load_values(sc, cfg->phynode);
276 	else
277 		ksz9021_load_values(sc, cfg->phynode);
278 
279 	mii_fdt_free_config(cfg);
280 
281 	return (0);
282 }
283 
284 static void
micphy_reset(struct mii_softc * sc)285 micphy_reset(struct mii_softc *sc)
286 {
287 	int reg;
288 
289 	/*
290 	 * The 8081 has no "sticky bits" that survive a soft reset; several bits
291 	 * in the Phy Control Register 2 must be preserved across the reset.
292 	 * These bits are set up by the bootloader; they control how the phy
293 	 * interfaces to the board (such as clock frequency and LED behavior).
294 	 */
295 	if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081)
296 		reg = PHY_READ(sc, MII_KSZ8081_PHYCTL2);
297 	mii_phy_reset(sc);
298 	if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081)
299 		PHY_WRITE(sc, MII_KSZ8081_PHYCTL2, reg);
300 }
301 
302 static int
micphy_service(struct mii_softc * sc,struct mii_data * mii,int cmd)303 micphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
304 {
305 
306 	switch (cmd) {
307 	case MII_POLLSTAT:
308 		break;
309 
310 	case MII_MEDIACHG:
311 		mii_phy_setmedia(sc);
312 		break;
313 
314 	case MII_TICK:
315 		if (mii_phy_tick(sc) == EJUSTRETURN)
316 			return (0);
317 		break;
318 	}
319 
320 	/* Update the media status. */
321 	PHY_STATUS(sc);
322 
323 	/* Callback if something changed. */
324 	mii_phy_update(sc, cmd);
325 	return (0);
326 }
327