Lines Matching defs:scr1
120 #define TSTAT_CHECK_TL1(label, scr1, scr2) \
121 rdpr %tpc, scr1; \
124 cmp scr1, scr2; \
160 * tagacc, scr1 = scratch registers
164 #define GET_MMU_D_TAGACC(tagacc, scr1) \
165 mov MMU_TAG_ACCESS, scr1; \
166 ldxa [scr1]ASI_DMMU, tagacc
172 * ttarget, scr1 = scratch registers
176 #define GET_MMU_D_TTARGET(ttarget, scr1) \
183 * dtagacc, itagacc, scr1, scr2 = scratch registers
188 #define GET_MMU_BOTH_TAGACC(dtagacc, itagacc, scr1, scr2) \
189 mov MMU_TAG_ACCESS, scr1; \
190 ldxa [scr1]ASI_DMMU, dtagacc; \
191 ldxa [scr1]ASI_IMMU, itagacc
197 * daddr, scr1 = scratch registers
201 #define GET_MMU_D_ADDR(daddr, scr1) \
202 mov MMU_TAG_ACCESS, scr1; \
203 ldxa [scr1]ASI_DMMU, daddr; \
204 set TAGACC_CTX_MASK, scr1; \
205 andn daddr, scr1, daddr
213 * scr1, scr2, scr3, scr4 = scratch registers (not used)
215 #define ITLB_STUFF(tte, scr1, scr2, scr3, scr4) \
223 * scr1, scr2, scr3, scr4 = scratch register (not used)
225 #define DTLB_STUFF(tte, scr1, scr2, scr3, scr4) \
235 * scr1, scr2, scr3 = scratch registers
239 #define TTETOPFN(tte, vaddr, label, scr1, scr2, scr3) \
240 srlx tte, TTE_SZ_SHFT, scr1; \
241 and scr1, TTE_SZ_BITS, scr1; /* scr1 = tte_size */ \
244 or scr1, scr3, scr1; \
245 sllx scr1, 1, scr2; \
246 add scr2, scr1, scr2; /* mulx 3 */ \
254 set 1, scr1; \
256 sllx scr1, scr3, scr1; \
257 sub scr1, 1, scr1; /* g2=TTE_PAGE_OFFSET(ttesz) */ \
258 and vaddr, scr1, scr2; \