Lines Matching defs:bank
95 int mc_set_mem_sid(mc_opl_t *mcp, char *buf, int buflen, int lsb, int bank,
103 static void mc_set_rewrite(mc_opl_t *mcp, int bank, uint32_t addr, int state);
178 * The index into this table is made up of (bank, dslot),
179 * Where dslot occupies bits 0-1 and bank occupies 2-4.
185 "03A", "02A", "03B", "02B", /* Bank 0 (MAC 0 bank 0) */
186 "13A", "12A", "13B", "12B", /* Bank 1 (MAC 0 bank 1) */
187 "23A", "22A", "23B", "22B", /* Bank 2 (MAC 1 bank 0) */
188 "33A", "32A", "33B", "32B", /* Bank 3 (MAC 1 bank 1) */
189 "01A", "00A", "01B", "00B", /* Bank 4 (MAC 2 bank 0) */
190 "11A", "10A", "11B", "10B", /* Bank 5 (MAC 2 bank 1) */
191 "21A", "20A", "21B", "20B", /* Bank 6 (MAC 3 bank 0) */
192 "31A", "30A", "31B", "30B" /* Bank 7 (MAC 3 bank 1) */
197 * The index into this table is made up of (board, bank, dslot),
198 * Where dslot occupies bits 0-1, bank occupies 2-4 and
205 "03A", "02A", "03B", "02B", /* Bank 0 (MAC 0 bank 0) */
206 "01A", "00A", "01B", "00B", /* Bank 1 (MAC 0 bank 1) */
207 "13A", "12A", "13B", "12B", /* Bank 2 (MAC 1 bank 0) */
208 "11A", "10A", "11B", "10B", /* Bank 3 (MAC 1 bank 1) */
209 "23A", "22A", "23B", "22B", /* Bank 4 (MAC 2 bank 0) */
210 "21A", "20A", "21B", "20B", /* Bank 5 (MAC 2 bank 1) */
211 "33A", "32A", "33B", "32B", /* Bank 6 (MAC 3 bank 0) */
212 "31A", "30A", "31B", "30B", /* Bank 7 (MAC 3 bank 1) */
216 "43A", "42A", "43B", "42B", /* Bank 0 (MAC 0 bank 0) */
217 "41A", "40A", "41B", "40B", /* Bank 1 (MAC 0 bank 1) */
218 "53A", "52A", "53B", "52B", /* Bank 2 (MAC 1 bank 0) */
219 "51A", "50A", "51B", "50B", /* Bank 3 (MAC 1 bank 1) */
220 "63A", "62A", "63B", "62B", /* Bank 4 (MAC 2 bank 0) */
221 "61A", "60A", "61B", "60B", /* Bank 5 (MAC 2 bank 1) */
222 "73A", "72A", "73B", "72B", /* Bank 6 (MAC 3 bank 0) */
223 "71A", "70A", "71B", "70B" /* Bank 7 (MAC 3 bank 1) */
247 * In mirror mode, we normalized the bank idx to "even" since
249 * This bank index will be the "effective" bank index.
250 * All mirrored bank state info on mc_period, mc_speedup_period
251 * will be stored in the even bank structure to avoid code duplication.
666 int bank = maddr->ma_bank;
670 MC_LOG("mcaddr /LSB%d/B%d/%x\n", maddr->ma_bd, bank,
675 ASSERT(bank >= 0 && OPL_BANK_MAX > bank);
686 pa_bit = bank & 1;
688 pa_bit = (bank >> 1) & 1;
690 pa_bit = (bank >> 2) & 1;
699 "convert PA %lx\n", maddr->ma_bd, bank,
705 * In mirror mode, PA is always translated to the even bank.
723 "PA %lx, target /LSB%d/B%d/%x\n", maddr->ma_bd, bank,
855 mc_set_mem_unum(char *buf, int buflen, int sb, int bank,
870 i = BD_BK_SLOT_TO_INDEX(0, bank, d_slot);
875 i = BD_BK_SLOT_TO_INDEX(0, bank, 0);
887 i = BD_BK_SLOT_TO_INDEX(sb, bank, d_slot);
895 i = BD_BK_SLOT_TO_INDEX(sb, bank, 0);
908 i = BD_BK_SLOT_TO_INDEX(sb, bank, d_slot);
913 i = BD_BK_SLOT_TO_INDEX(sb, bank, 0);
1058 int bank;
1061 bank = flt_stat->mf_flt_maddr.ma_bank;
1063 flt_stat->mf_flt_maddr.ma_phys_bd, bank, flt_stat->mf_type,
1069 "for board=%d bank=%d type=0x%x slot=0x%x",
1070 flt_stat->mf_flt_maddr.ma_bd, bank,
1085 blen, flt_stat->mf_flt_maddr.ma_phys_bd, bank,
1176 * address is not in the bank, it will continue to search for
1177 * the next PA that is within the bank.
1183 restart_patrol(mc_opl_t *mcp, int bank, mc_rsaddr_info_t *rsaddr_info)
1188 if (MC_REWRITE_MODE(mcp, bank)) {
1192 MAC_PTRL_START(mcp, bank);
1199 MAC_PTRL_START(mcp, bank);
1207 MAC_PTRL_START(mcp, bank);
1250 MAC_PTRL_START(mcp, bank);
1277 MAC_PTRL_START(mcp, bank);
1291 ST_MAC_REG(MAC_RESTART_ADD(mcp, bank), MAC_RESTART_PA(pa));
1292 MAC_PTRL_START_ADD(mcp, bank);
1332 do_rewrite(mc_opl_t *mcp, int bank, uint32_t dimm_addr, int retrying)
1346 if (!retrying && MC_REWRITE_MODE(mcp, bank)) {
1354 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
1366 ST_MAC_REG(MAC_REWRITE_ADD(mcp, bank), dimm_addr);
1367 MAC_REW_REQ(mcp, bank);
1377 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
1384 MAC_CLEAR_ERRS(mcp, bank, MAC_CNTL_REW_ERRS);
1387 mc_set_rewrite(mcp, bank, dimm_addr, retry_state);
1393 mc_clear_rewrite(mc_opl_t *mcp, int bank)
1399 bankp = &(mcp->mc_bank[bank]);
1410 if (do_rewrite(mcp, bank, rew_addr, 1) == 0)
1417 if (!IS_MIRROR(mcp, bank)) {
1418 MC_CLEAR_REWRITE_MODE(mcp, bank);
1420 int mbank = bank ^ 1;
1423 MC_CLEAR_REWRITE_MODE(mcp, bank);
1426 bank = mbank;
1434 mc_set_rewrite(mc_opl_t *mcp, int bank, uint32_t addr, int state)
1439 bankp = &mcp->mc_bank[bank];
1451 maddr.ma_bank = bank;
1456 paddr, mcp->mc_board_num, bank, addr);
1460 mcp->mc_board_num, bank, addr);
1468 MC_SET_REWRITE_MODE(mcp, bank);
1477 if (IS_MIRROR(mcp, bank)) {
1478 int mbank = bank ^1;
1489 int bank;
1491 for (bank = 0; bank < BANKNUM_PER_SB; bank++) {
1492 while ((p = mcp->mc_scf_log[bank]) != NULL &&
1494 ASSERT(bank == p->sl_bank);
1510 mcp->mc_scf_retry[bank] = 0;
1515 if (mcp->mc_scf_retry[bank]++ <=
1526 mcp->mc_scf_log[bank] = p->sl_next;
1527 mcp->mc_scf_total[bank]--;
1528 ASSERT(mcp->mc_scf_total[bank] >= 0);
1534 mc_queue_scf_log(mc_opl_t *mcp, mc_flt_stat_t *flt_stat, int bank)
1538 if (mcp->mc_scf_total[bank] >= mc_max_scf_logs) {
1548 p->sl_bank = bank;
1550 if (mcp->mc_scf_log[bank] == NULL) {
1555 mcp->mc_scf_log_tail[bank] = mcp->mc_scf_log[bank] = p;
1557 mcp->mc_scf_log_tail[bank]->sl_next = p;
1558 mcp->mc_scf_log_tail[bank] = p;
1560 mcp->mc_scf_total[bank]++;
1576 mc_scrub_ce(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat, int ptrl_error)
1589 cntl = do_rewrite(mcp, bank, flt_stat->mf_err_add, 0);
1623 mc_queue_scf_log(mcp, flt_stat, bank);
1647 mc_write_cntl(mc_opl_t *mcp, int bank, uint32_t value)
1649 int ebank = (IS_MIRROR(mcp, bank)) ? MIRROR_IDX(bank) : bank;
1655 ST_MAC_REG(MAC_PTRL_CNTL(mcp, bank), value);
1659 mc_read_ptrl_reg(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat)
1661 flt_stat->mf_cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank)) &
1663 flt_stat->mf_err_add = LD_MAC_REG(MAC_PTRL_ERR_ADD(mcp, bank));
1664 flt_stat->mf_err_log = LD_MAC_REG(MAC_PTRL_ERR_LOG(mcp, bank));
1667 flt_stat->mf_flt_maddr.ma_bank = bank;
1672 mc_read_mi_reg(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat)
1676 status = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank)) & MAC_CNTL_MI_ERRS;
1682 flt_stat->mf_err_add = LD_MAC_REG(MAC_MI_ERR_ADD(mcp, bank));
1683 flt_stat->mf_err_log = LD_MAC_REG(MAC_MI_ERR_LOG(mcp, bank));
1684 status = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank)) &
1694 flt_stat->mf_flt_maddr.ma_bank = bank;
1715 * MI (The error addresses for each bank are the same or different.)
1722 * Addresses are different. Report SUE on each bank.
1726 * Rewrite to clear UE. Report SUE for the bank.
1739 int bank;
1761 bank = flt_stat[i].mf_flt_maddr.ma_bank;
1762 MC_LOG("CE detected on bank %d\n", bank);
1763 mc_scrub_ce(mcp, bank, &flt_stat[i], ptrl_error);
1764 if (MC_REWRITE_ACTIVE(mcp, bank)) {
1863 /* no more report on this bank */
1891 mc_error_handler_mir(mc_opl_t *mcp, int bank, mc_rsaddr_info_t *rsaddr)
1911 MC_LOG("Reading registers of bank %d\n", bank);
1913 mc_read_ptrl_reg(mcp, bank, &flt_stat[i]);
1916 * In mirror mode, it is possible that only one bank
1930 mc_read_mi_reg(mcp, bank, &mi_flt_stat[i]);
1936 bank = bank^1;
1940 MAC_CLEAR_ERRS(mcp, bank, (MAC_CNTL_PTRL_ERRS|MAC_CNTL_MI_ERRS));
1942 MAC_CLEAR_ERRS(mcp, bank ^ 1, (MAC_CNTL_PTRL_ERRS|MAC_CNTL_MI_ERRS));
1988 mc_process_error(mc_opl_t *mcp, int bank, mc_aflt_t *mc_aflt,
2007 mc_scrub_ce(mcp, bank, flt_stat, ptrl_error);
2008 if (MC_REWRITE_ACTIVE(mcp, bank)) {
2035 mc_error_handler(mc_opl_t *mcp, int bank, mc_rsaddr_info_t *rsaddr)
2049 mc_read_ptrl_reg(mcp, bank, &flt_stat);
2058 mc_read_mi_reg(mcp, bank, &mi_flt_stat);
2065 MAC_CLEAR_ERRS(mcp, bank, (MAC_CNTL_PTRL_ERRS|MAC_CNTL_MI_ERRS));
2071 mi_valid = mc_process_error(mcp, bank, &mc_aflt, &mi_flt_stat);
2091 rsaddr->mi_valid = mc_process_error(mcp, bank, &mc_aflt,
2101 * if memory bank is installed, read the status register
2115 mc_process_rewrite(mc_opl_t *mcp, int bank)
2121 bankp = &(mcp->mc_bank[bank]);
2127 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
2131 ST_MAC_REG(MAC_REWRITE_ADD(mcp, bank), rew_addr);
2132 MAC_REW_REQ(mcp, bank);
2137 cntl = ldphysio(MAC_PTRL_CNTL(mcp, bank));
2140 MAC_CLEAR_ERRS(mcp, bank,
2142 mc_clear_rewrite(mcp, bank);
2158 if (++mcp->mc_bank[bank].mcb_rewrite_count
2165 bank);
2196 /* Compute the effective bank idx */
2316 * In mirror mode, the odd bank might have
2319 * bank in this case.
2379 get_ptrl_start_address(mc_opl_t *mcp, int bank, mc_addr_t *maddr)
2382 maddr->ma_bank = bank;
2410 uint32_t bank;
2619 /* initialize bank informations */
2733 * setup bank
2735 bk = macaddr[i].bank;
2770 * restart if not mirror mode or the other bank
2989 int bank;
3009 bank = pa_to_bank(mcp, flt_addr - mcp->mc_start_address);
3020 i = BD_BK_SLOT_TO_INDEX(0, bank, 0);
3029 i = BD_BK_SLOT_TO_INDEX(sb, bank, 0);
3039 i = BD_BK_SLOT_TO_INDEX(sb, bank, 0);
3133 int bank;
3171 bank = pa_to_bank(mcp, pa0);
3174 bank = bank ^ 1;
3176 if (MC_INJECT_MIRROR(error_type) && !IS_MIRROR(mcp, bank)) {
3184 MC_LOG("injecting error to /LSB%d/B%d/%x\n", mcp->mc_board_num, bank,
3196 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), 0);
3198 ST_MAC_REG(MAC_EG_ADD(mcp, bank), dimm_addr & MAC_EG_ADD_MASK);
3201 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), 0);
3202 ST_MAC_REG(MAC_EG_ADD(mcp, bank^1), dimm_addr &
3249 ST_MAC_REG(MAC_MIRR(mcp, bank), MAC_MIRR_BANK_EXCLUSIVE);
3253 ST_MAC_REG(MAC_MIRR(mcp, bank), 0);
3266 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), cntl & MAC_EG_SETUP_MASK);
3267 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), cntl);
3270 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl &
3272 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl);
3340 ST_MAC_REG(MAC_EG_CNTL(mcp, bank),
3342 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), cntl);
3345 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl &
3347 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl);
3359 rsaddr.mi_restartaddr.ma_bank = bank;
3363 (void) restart_patrol(mcp, bank, &rsaddr);
3368 int ebank = (IS_MIRROR(mcp, bank)) ? MIRROR_IDX(bank) : bank;
3371 stat = LD_MAC_REG(MAC_PTRL_STAT(mcp, bank));
3372 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
3384 if (IS_MIRROR(mcp, bank)) {
3385 mc_error_handler_mir(mcp, bank, &rsaddr);
3387 mc_error_handler(mcp, bank, &rsaddr);
3390 (void) restart_patrol(mcp, bank, &rsaddr);
3398 MAC_CMD(mcp, bank, 0);
3399 (void) restart_patrol(mcp, bank, NULL);
3546 int bank, uint32_t mf_type, uint32_t d_slot)
3559 id = BD_BK_SLOT_TO_INDEX(0, bank, d_slot);
3565 id = BD_BK_SLOT_TO_INDEX(sb, bank, d_slot);
3661 * dname_to_bankslot - Get the bank and slot number from the DIMM name.
3664 dname_to_bankslot(char *dname, int *bank, int *slot)
3692 *bank = INDEX_TO_BANK(i);
3705 int bank;
3737 ret = dname_to_bankslot(dname, &bank, &slot);
3738 MC_LOG("mc_get_mem_addr: bank=%d slot=%d\n", bank, slot);
3744 maddr.ma_bank = bank;
3883 int board, bank, slot;
3925 if (dname_to_bankslot(dname, &bank, &slot) != 0) {
3945 unum, mcp->mc_board_num, bank, flt_pag->err_add, pa,
3959 mc_queue_scf_log(mcp, &flt_stat, bank);