Lines Matching defs:pil
284 * | | | softint pil too low | |
524 * The 'pil' is already set to the appropriate level for rp->r_trapno.
527 hilevel_intr_prolog(struct cpu *cpu, uint_t pil, uint_t oldpil, struct regs *rp)
534 ASSERT(pil > LOCK_LEVEL);
536 if (pil == CBE_HIGH_PIL) {
561 ASSERT(nestpil < pil);
591 mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)] = now;
593 ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0);
595 if (pil == 15) {
608 cpu->cpu_intr_actv |= (1 << pil);
623 hilevel_intr_epilog(struct cpu *cpu, uint_t pil, uint_t oldpil, uint_t vecnum)
630 ASSERT(mcpu->mcpu_pri == pil);
632 cpu->cpu_stats.sys.intr[pil - 1]++;
634 ASSERT(cpu->cpu_intr_actv & (1 << pil));
636 if (pil == 15) {
648 cpu->cpu_intr_actv &= ~(1 << pil);
650 cpu->cpu_intr_actv &= ~(1 << pil);
653 ASSERT(mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)] != 0);
655 intrtime = now - mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)];
656 mcpu->intrstat[pil][0] += intrtime;
660 * Check for lower-pil nested high-level interrupt beneath
672 ASSERT(nestpil < pil);
704 intr_thread_prolog(struct cpu *cpu, caddr_t stackptr, uint_t pil)
710 ASSERT(pil > 0);
711 ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0);
712 cpu->cpu_intr_actv |= (1 << pil);
754 it->t_pil = (uchar_t)pil;
755 it->t_pri = intr_pri + (pri_t)pil;
775 uint_t pil, basespl;
779 pil = it->t_pil;
780 cpu->cpu_stats.sys.intr[pil - 1]++;
784 mcpu->intrstat[pil][0] += intrtime;
787 ASSERT(cpu->cpu_intr_actv & (1 << pil));
788 cpu->cpu_intr_actv &= ~(1 << pil);
840 pil = MAX(oldpil, basespl);
841 mcpu->mcpu_pri = pil;
842 (*setlvlx)(pil, vec);
854 * The caller must be calling from an interrupt handler running at a pil
865 * uint64_t intrstat[pil][0..1] is an array indexed by pil level, with two
866 * uint64_ts per pil.
868 * intrstat[pil][0] is a cumulative count of the number of ticks spent
869 * handling all interrupts at the specified pil on this CPU. It is
872 * intrstat[pil][1] is always a count of ticks less than or equal to the
884 * "checkpoints" the timing information by incrementing intrstat[pil][0]
886 * It then sets the return value to intrstat[pil][0] - intrstat[pil][1],
887 * and updates intrstat[pil][1] to be the same as the new value of
888 * intrstat[pil][0].
891 * and the code in intr_thread() updates intrstat[pil][0], it then sets
892 * intrstat[pil][1] to the new value of intrstat[pil][0]. When [0] == [1],
896 * Whenever interrupts arrive on a CPU which is handling a lower pil
897 * interrupt, they update the lower pil's [0] to show time spent in the
900 * called. Time spent in the higher-pil interrupt will not be returned in
902 * the higher-pil interrupt's time is accumulated in intrstat[higherpil][].
911 uint_t pil;
917 pil = t->t_pil;
920 ASSERT(pil != 0);
927 time = mcpu->intrstat[pil][0] + delta;
928 ret = time - mcpu->intrstat[pil][1];
929 mcpu->intrstat[pil][0] = time;
930 mcpu->intrstat[pil][1] = time;
946 uint_t pil;
952 pil = bsrw_insn((uint16_t)st_pending);
953 if (pil <= oldpil || pil <= cpu->cpu_base_spl)
976 * ~(1 << pil));
983 &mcpu->mcpu_softinfo.st_pending, pil) == 0) {
988 mcpu->mcpu_pri = pil;
989 (*setspl)(pil);
1005 mcpu->intrstat[pil][0] += intrtime;
1033 * Set bit for this pil in CPU's interrupt active bitmask.
1035 ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0);
1036 cpu->cpu_intr_actv |= (1 << pil);
1041 it->t_pil = (uchar_t)pil;
1042 it->t_pri = (pri_t)pil + intr_pri;
1053 uint_t pil, basespl;
1058 pil = it->t_pil;
1060 cpu->cpu_stats.sys.intr[pil - 1]++;
1062 ASSERT(cpu->cpu_intr_actv & (1 << pil));
1063 cpu->cpu_intr_actv &= ~(1 << pil);
1065 mcpu->intrstat[pil][0] += intrtime;
1095 pil = MAX(oldpil, basespl);
1096 mcpu->mcpu_pri = pil;
1097 (*setspl)(pil);