Lines Matching defs:ecx
309 char cpi_vendorstr[13]; /* fn 0: %ebx:%ecx:%edx */
325 struct cpuid_regs **cpi_std_4; /* fn 4: %ecx == 0 .. fn4_size */
338 uint_t cpi_ncore_per_chip; /* AMD: fn 0x80000008: %ecx[7-0] */
456 #define MWAIT_ECX_INT_ENABLE (0x00000004) /* ecx 1 extension supported */
684 * Xen signature in %ebx, %ecx, and %edx. %eax contains the maximum
1032 * - ignore %ecx feature word
1055 * We don't currently depend on any of the %ecx
1236 * In addition to ecx and edx, Intel is storing a bunch of instruction
1776 * CPUID function 4 expects %ecx to be initialized
1779 * with %ecx set to 0, 1, 2, ... until it returns with
1784 * function 4 when %ecx == 0, and do the rest in cpuid_pass3()
1787 * Note: we need to explicitly initialize %ecx here, since
2135 * up w.r.t. encoding cache sizes in %ecx
2566 * references the regs for fn 4, %ecx == 0, which
2576 * for function 4, %ecx == 1 .. cpi_std_4_size.
2578 * The regs for fn 4, %ecx == 0 has already
2693 uint32_t *ecx = &cpi->cpi_support[STD_ECX_FEATURES];
2697 *ecx = CPI_FEATURES_ECX(cpi);
2715 *ecx &= ~CPUID_INTC_ECX_SSE3;
2718 *ecx &= ~CPUID_INTC_ECX_SSSE3;
2720 *ecx &= ~CPUID_INTC_ECX_SSE4_1;
2722 *ecx &= ~CPUID_INTC_ECX_SSE4_2;
2724 *ecx &= ~CPUID_INTC_ECX_AES;
2726 *ecx &= ~CPUID_INTC_ECX_PCLMULQDQ;
2728 *ecx &= ~(CPUID_INTC_ECX_XSAVE |
2731 *ecx &= ~CPUID_INTC_ECX_AVX;
2733 *ecx &= ~CPUID_INTC_ECX_F16C;
2735 *ecx &= ~CPUID_INTC_ECX_FMA;
2763 if (*ecx & CPUID_INTC_ECX_SSE3)
2765 if (*ecx & CPUID_INTC_ECX_SSSE3)
2767 if (*ecx & CPUID_INTC_ECX_SSE4_1)
2769 if (*ecx & CPUID_INTC_ECX_SSE4_2)
2771 if (*ecx & CPUID_INTC_ECX_MOVBE)
2773 if (*ecx & CPUID_INTC_ECX_AES)
2775 if (*ecx & CPUID_INTC_ECX_PCLMULQDQ)
2777 if ((*ecx & CPUID_INTC_ECX_XSAVE) &&
2778 (*ecx & CPUID_INTC_ECX_OSXSAVE)) {
2781 if (*ecx & CPUID_INTC_ECX_AVX) {
2783 if (*ecx & CPUID_INTC_ECX_F16C)
2785 if (*ecx & CPUID_INTC_ECX_FMA)
2795 if (*ecx & CPUID_INTC_ECX_VMX)
2797 if (*ecx & CPUID_INTC_ECX_POPCNT)
2810 if (*ecx & CPUID_INTC_ECX_CX16)
2813 if (*ecx & CPUID_INTC_ECX_RDRAND)
2829 uint32_t *edx, *ecx;
2842 ecx = &cpi->cpi_support[AMD_ECX_FEATURES];
2845 *ecx = CPI_FEATURES_XTD_ECX(cpi);
2860 *ecx &= ~CPUID_AMD_ECX_SSE4A;
2894 if (*ecx & CPUID_AMD_ECX_SVM)
2901 if (*ecx & CPUID_AMD_ECX_AHF64)
2903 if (*ecx & CPUID_AMD_ECX_SSE4A)
2905 if (*ecx & CPUID_AMD_ECX_LZCNT)
2916 if (*ecx & CPUID_INTC_ECX_AHF64)
4375 /* cpuid-features-ecx */
4389 "cpuid-features-ecx", CPI_FEATURES_ECX(cpi));
4408 "ext-cpuid-features-ecx", CPI_FEATURES_XTD_ECX(cpi));