Lines Matching defs:timer
124 * Intel's HPET spec defines each timer block to have up to 32 counters and
125 * be 1024 bytes long. There can be more than one timer block of 32 counters.
126 * Each timer block would have an additional ACPI HPET table.
179 * Hardware contains the last timer's number.
211 * the first available non-legacy replacement timer: timer 2.
279 hpet_disable_timer(&hpet_info, hpet_info.cstate_timer.timer);
283 * Do initial setup to use a HPET timer as a proxy for Deep C-state stalled
284 * LAPIC Timers. Get a free HPET timer that supports I/O APIC routed interrupt.
285 * Setup data to handle the timer's ISR, and add the timer's interrupt.
287 * The ddi cannot be use to allocate the HPET timer's interrupt.
289 * to handle the HPET timer's interrupt.
315 * Avoid a possibly stuck interrupt by programing the HPET's timer here
318 hpet_timer_set_up(&hpet_info, hpet_info.cstate_timer.timer,
340 hpet_enable_timer(&hpet_info, hpet_info.cstate_timer.timer);
628 * Find the first available non-legacy-replacement timer and its I/O APIC irq.
630 * timer's timer_n_config register.
635 int timer;
638 for (timer = HPET_FIRST_NON_LEGACY_TIMER;
639 timer < hip->gen_cap.num_tim_cap; ++timer) {
641 if (!hpet_timer_available(hip->allocated_timers, timer))
644 intr = lowbit(hip->timer_n_config[timer].int_route_cap) - 1;
646 hpet_timer_alloc(&hip->allocated_timers, timer);
647 hip->cstate_timer.timer = timer;
649 return (timer);
657 * Mark this timer as used.
666 * Check if this timer is available.
676 * Setup timer N to route its interrupt to I/O APIC.
700 * The HPET's Main Counter is not stopped before programming an HPET timer.
702 * The programmed timer interrupt may occur before this function returns.
706 * Return 0 if main counter is less than timer after enabling timer.
708 * Return !0 if main counter is greater than timer after enabling timer.
709 * In other words: the timer will not fire, and we do not know if it did fire.
714 * A 32-bit HPET timer will wrap around in a little over 5 minutes.
717 hpet_timer_program(hpet_info_t *hip, uint32_t timer, uint64_t delta)
723 hpet_write_timer_N_comp(hip, timer, program);
767 * HPET event timer hardware context through ACPI sleep state transitions.
783 * disable the timer from generating interrupts here.
821 hpet_disable_timer(&hpet_info, hpet_info.cstate_timer.timer);
841 * Assume the HPET stopped in Suspend state and timer state was lost.
868 hpet_timer_set_up(&hpet_info, hpet_info.cstate_timer.timer,
871 hpet_enable_timer(&hpet_info, hpet_info.cstate_timer.timer);
900 hpet_enable_timer(&hpet_info, hpet_info.cstate_timer.timer);
914 * and finally disable the HPET interrupt-generating timer.
940 hpet_disable_timer(&hpet_info, hpet_info.cstate_timer.timer);
1013 timer_mask = HPET_INTR_STATUS_MASK(hpet_info.cstate_timer.timer);
1017 * HPET sets timer's General Interrupt Status Register bit N.
1029 * will not be set by hardware until after timer interrupt generation
1031 * structures before enabling timer interrupts. ASSERT the software
1090 * To avoid missed wakeups this function must guarantee either the HPET timer
1104 int proxy_timer = hpet_info.cstate_timer.timer;
1139 * Letting the HPET timer wrap around to the current
1141 * A 64-bit timer will wrap around in ~ 2^44 seconds.
1142 * A 32-bit timer will wrap around in ~ 2^12 seconds.
1144 * Disabling the HPET's timer interrupt requires a
1149 * deep c-state before the timer wraps around.
1152 * HPET's timer disable bit every time all CPUs wakeup
1185 * Use an HPET timer to act as this CPU's proxy local APIC timer.
1186 * Used in deep c-states C2 and above while the CPU's local APIC timer stalls.
1199 * *lapic_expire : hrtime_t when LAPIC timer would have expired
1246 * LAPIC timer is currently disabled.
1281 * LAPIC timer is currently disabled.
1365 * their stalled local APIC timer. For now this is just an array.