Lines Matching defs:regs
1219 #define RTW_READ8(regs, ofs) \
1220 ddi_get8((regs)->r_handle, \
1221 (uint8_t *)((regs)->r_base + (ofs)))
1223 #define RTW_READ16(regs, ofs) \
1224 ddi_get16((regs)->r_handle, \
1225 (uint16_t *)((uintptr_t)(regs)->r_base + (ofs)))
1227 #define RTW_READ(regs, ofs) \
1228 ddi_get32((regs)->r_handle, \
1229 (uint32_t *)((uintptr_t)(regs)->r_base + (ofs)))
1231 #define RTW_WRITE8(regs, ofs, val) \
1232 ddi_put8((regs)->r_handle, \
1233 (uint8_t *)((regs)->r_base + (ofs)), val)
1235 #define RTW_WRITE16(regs, ofs, val) \
1236 ddi_put16((regs)->r_handle, \
1237 (uint16_t *)((uintptr_t)(regs)->r_base + (ofs)), val)
1239 #define RTW_WRITE(regs, ofs, val) \
1240 ddi_put32((regs)->r_handle, \
1241 (uint32_t *)((uintptr_t)(regs)->r_base + (ofs)), val)
1243 #define RTW_ISSET(regs, reg, mask) \
1244 (RTW_READ((regs), (reg)) & (mask))
1246 #define RTW_CLR(regs, reg, mask) \
1247 RTW_WRITE((regs), (reg), RTW_READ((regs), (reg)) & ~(mask))
1279 #define RTW_BARRIER(regs, reg0, reg1, flags)
1282 * bus_space_barrier((regs)->r_bh, (regs)->r_bt, \
1291 #define RTW_SYNC(regs, reg0, reg1) \
1292 RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_SYNC)
1297 #define RTW_WBW(regs, reg0, reg1) \
1298 RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_WRITE_BEFORE_WRITE)
1303 #define RTW_WBR(regs, reg0, reg1) \
1304 RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_WRITE_BEFORE_READ)
1309 #define RTW_RBR(regs, reg0, reg1) \
1310 RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_READ_BEFORE_READ)
1315 #define RTW_RBW(regs, reg0, reg1) \
1316 RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_READ_BEFORE_WRITE)
1318 #define RTW_WBRW(regs, reg0, reg1) \
1319 RTW_BARRIER(regs, reg0, reg1, \