Lines Matching refs:err
348 int err;
353 err = ddi_dma_alloc_handle(devinfo, dma_attr,
355 if (err != DDI_SUCCESS) {
364 err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p,
367 if (err != DDI_SUCCESS) {
376 err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL,
379 if (err != DDI_DMA_MAPPED) {
405 return (err);
426 int err;
431 err = mwl_alloc_dma_mem(sc->sc_dev, &mwl_dma_attr, size,
435 if (err != DDI_SUCCESS) {
460 int i, err, datadlen;
465 err = mwl_alloc_dma_mem(sc->sc_dev, &mwl_dma_attr,
470 if (err) {
548 int i, err, datadlen;
553 err = mwl_alloc_dma_mem(sc->sc_dev, &mwl_dma_attr,
557 if (err) {
676 int i, err;
691 err = mwl_hal_sethwdma(sc, &sc->sc_hwdma);
692 if (err != 0) {
694 "unable to setup tx/rx dma; hal status %u\n", err);
698 return (err);
756 int err = 0;
763 err = EIO;
764 return (err);
781 return (err);
932 int i, rv, err, ntries;
934 rv = err = 0;
942 err = -1;
946 err = mwl_loadsym(modfw, fwbootname, &fwboot_index, &fwboot_size);
947 if (err != 0) {
950 err = -1;
954 err = mwl_loadsym(modfw, fwbinname, &fw_index, &fw_size);
955 if (err != 0) {
958 err = -1;
966 err = -1;
975 err = -1;
987 err = ENXIO;
1000 err = ENXIO;
1036 err = ETIMEDOUT;
1051 err = EINVAL;
1064 err = ELOOP;
1076 err = ETIMEDOUT;
1087 err = EIO;
1128 return (err);
1437 int err = 0;
1445 err = mwlGetPwrCalTable(sc);
1446 return (err);
2746 int err, off;
2754 err = DDI_SUCCESS;
2756 err = ENXIO;
2766 err = ENOMEM;
2774 err = DDI_FAILURE;
2788 err = DDI_FAILURE;
2804 err = DDI_FAILURE;
2898 err == DDI_SUCCESS)
2901 return (err);
3378 int err = 0;
3385 err = mwl_hal_setantenna(sc, WL_ANTENNATYPE_RX, sc->sc_rxantenna);
3386 if (err != 0) {
3392 err = mwl_hal_setantenna(sc, WL_ANTENNATYPE_TX, sc->sc_txantenna);
3393 if (err != 0) {
3399 err = mwl_hal_setradio(sc, 1, WL_AUTO_PREAMBLE);
3400 if (err != 0) {
3406 err = mwl_hal_setwmm(sc, (ic->ic_flags & IEEE80211_F_WME) != 0);
3407 if (err != 0) {
3418 err = mwl_chan_set(sc, sc->sc_cur_chan);
3419 if (err != 0) {
3425 err = mwl_hal_setrateadaptmode(sc, 0);
3426 if (err != 0) {
3432 err = mwl_hal_setoptimizationlevel(sc,
3434 if (err != 0) {
3440 err = mwl_hal_setregioncode(sc, mwl_map2regioncode(&sc->sc_regdomain));
3441 if (err != 0) {
3447 err = mwl_startrecv(sc);
3448 if (err != 0) {
3468 err = mwl_hal_start(sc);
3469 if (err != 0) {
3475 err = mwl_hal_setinframode(sc);
3476 if (err != 0) {
3483 return (err);
3489 int qid, err = 0;
3491 err = mwl_fwload(sc, NULL);
3492 if (err != 0) {
3498 err = mwl_gethwspecs(sc);
3499 if (err != 0) {
3505 err = mwl_alloc_rx_ring(sc, MWL_RX_RING_COUNT);
3506 if (err != 0) {
3513 err = mwl_alloc_tx_ring(sc,
3515 if (err != 0) {
3522 err = mwl_setupdma(sc);
3523 if (err != 0) {
3529 err = mwl_setup_txq(sc);
3530 if (err != 0) {
3537 return (err);
3543 int err;
3549 err = mwl_hal_stop(sc);
3550 if (err != 0) {
3631 int err;
3633 err = mwl_init(sc);
3634 if (err != DDI_SUCCESS) {
3649 return (err);
3671 int err;
3673 err = mwl_hal_setpromisc(sc, on);
3675 return (err);
3734 int err;
3736 err = ieee80211_ioctl(ic, wq, mp);
3737 if (err == ENETRESET) {
3756 int err = 0;
3758 err = ieee80211_getprop(&sc->sc_ic, pr_name, wldp_pr_num,
3761 return (err);
3779 int err;
3781 err = ieee80211_setprop(ic, pr_name, wldp_pr_num, wldp_length,
3783 if (err == ENETRESET) {
3791 err = 0;
3793 return (err);
3801 int i, err, qid, instance;
3849 err = ddi_regs_map_setup(devinfo, 0, (caddr_t *)&sc->sc_cfg_base, 0, 0,
3851 if (err != DDI_SUCCESS) {
3884 err = ddi_regs_map_setup(devinfo, 1,
3886 if (err != DDI_SUCCESS) {
3893 err = ddi_regs_map_setup(devinfo, 2,
3895 if (err != DDI_SUCCESS) {
3907 err = mwl_alloc_cmdbuf(sc);
3908 if (err != 0) {
3939 err = mwl_fwload(sc, NULL);
3940 if (err != 0) {
3949 err = mwl_gethwspecs(sc);
3950 if (err != 0) {
3956 err = mwl_getchannels(sc);
3957 if (err != 0) {
3966 err = mwl_alloc_rx_ring(sc, MWL_RX_RING_COUNT);
3967 if (err != 0) {
3977 err = mwl_alloc_tx_ring(sc,
3979 if (err != 0) {
3986 err = mwl_setupdma(sc);
3987 if (err != 0) {
3993 err = mwl_setup_txq(sc);
3994 if (err != 0) {
4010 err = mwl_hal_setmac_locked(sc, ic->ic_macaddr);
4011 if (err != 0) { /* NB: mwl_setupdma prints msg */
4072 err = mwl_hal_newstation(sc, ic->ic_macaddr, 0, 0, NULL, 0, 0);
4073 if (err != 0) {
4082 err = ddi_intr_get_supported_types(devinfo, &intr_type);
4083 if ((err != DDI_SUCCESS) || (!(intr_type & DDI_INTR_TYPE_FIXED))) {
4089 err = ddi_intr_get_nintrs(devinfo, DDI_INTR_TYPE_FIXED, &intr_count);
4090 if ((err != DDI_SUCCESS) || (intr_count != 1)) {
4098 err = ddi_intr_alloc(devinfo, sc->sc_intr_htable,
4100 if ((err != DDI_SUCCESS) || (intr_actual != 1)) {
4102 "ddi_intr_alloc() failed 0x%x\n", err);
4106 err = ddi_intr_get_pri(sc->sc_intr_htable[0], &sc->sc_intr_pri);
4107 if (err != DDI_SUCCESS) {
4109 "ddi_intr_get_pri() failed 0x%x\n", err);
4113 err = ddi_intr_add_softint(devinfo, &sc->sc_softintr_hdl,
4115 if (err != DDI_SUCCESS) {
4121 err = ddi_intr_add_handler(sc->sc_intr_htable[0], mwl_intr,
4123 if (err != DDI_SUCCESS) {
4129 err = ddi_intr_enable(sc->sc_intr_htable[0]);
4130 if (err != DDI_SUCCESS) {
4160 err = mac_register(macp, &ic->ic_mach);
4162 if (err != 0) {
4164 "mac_register err %x\n", err);
4173 err = ddi_create_minor_node(devinfo, strbuf, S_IFCHR,
4175 if (err != 0) {