Lines Matching defs:data
229 * DMA attributes for text and data part in the firmware
1227 * copy data and bak-data of runtime ucode
1236 "failed to allocate data dma memory\n");
1243 "data[ncookies:%d addr:%lx size:%lx]\n",
1255 "failed to allocate data bakup dma memory\n");
1294 * copy data of init ucode
1303 "failed to allocate init data dma memory\n");
1428 iwh_rx_data_t *data;
1464 data = &ring->data[i];
1468 &data->dma_data);
1480 (data->dma_data.cookie.dmac_address >> 8);
1484 dma_p = &ring->data[0].dma_data;
1534 if (sc->sc_rxq.data[i].dma_data.dma_hdl) {
1535 IWH_DMA_SYNC(sc->sc_rxq.data[i].dma_data,
1539 iwh_free_dma_mem(&sc->sc_rxq.data[i].dma_data);
1556 iwh_tx_data_t *data;
1628 ring->data = kmem_zalloc(sizeof (iwh_tx_data_t) * TFD_QUEUE_SIZE_MAX,
1630 if (NULL == ring->data) {
1633 "tx data slots\n"));
1638 data = &ring->data[i];
1642 &data->dma_data);
1650 data->desc = desc_h + i;
1651 data->paddr_desc = paddr_desc_h +
1652 _PTRDIFF(data->desc, desc_h);
1653 data->cmd = cmd_h + i;
1654 data->paddr_cmd = paddr_cmd_h +
1655 _PTRDIFF(data->cmd, cmd_h);
1658 dma_p = &ring->data[0].dma_data;
1680 iwh_tx_data_t *data;
1709 data = &ring->data[i];
1710 IWH_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
1734 if (ring->data != NULL) {
1736 if (ring->data[i].dma_data.dma_hdl) {
1737 IWH_DMA_SYNC(ring->data[i].dma_data,
1740 iwh_free_dma_mem(&ring->data[i].dma_data);
1742 kmem_free(ring->data, ring->count * sizeof (iwh_tx_data_t));
2113 iwh_mem_write(iwh_sc_t *sc, uint32_t addr, uint32_t data)
2116 IWH_WRITE(sc, HBUS_TARG_MEM_WDAT, data);
2133 iwh_reg_write(iwh_sc_t *sc, uint32_t addr, uint32_t data)
2136 IWH_WRITE(sc, HBUS_TARG_PRPH_WDAT, data);
2711 iwh_rx_data_t *data;
2727 data = &sc->sc_rxq.data[sc->sc_rxq.cur];
2728 desc = (iwh_rx_desc_t *)data->dma_data.mem_va;
3073 iwh_tx_data_t *data;
3161 data = &ring->data[ring->cur];
3162 cmd = data->cmd;
3223 * Net80211 module encapsulate outbound data frames.
3237 tx = (iwh_tx_cmd_t *)cmd->data;
3408 LE_32(data->paddr_cmd + 4 + offsetof(iwh_tx_cmd_t, scratch));
3415 bcopy(m->b_rptr, data->dma_data.mem_va, (len - hdrlen));
3418 "sending data: qid=%d idx=%d len=%d",
3428 desc_data = &ring->data[ring->desc_cur];
3432 desc->pa[0].tb1_addr = data->paddr_cmd;
3434 ((data->dma_data.cookie.dmac_address & 0xffff) << 16);
3436 ((data->dma_data.cookie.dmac_address & 0xffff0000) >> 16) |
3441 data->paddr_cmd, data->dma_data.cookie.dmac_address,
3458 IWH_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
3924 ASSERT(size <= sizeof (cmd->data));
3929 desc = ring->data[ring->cur].desc;
3930 cmd = ring->data[ring->cur].cmd;
3936 bcopy(buf, cmd->data, size);
3941 (uint32_t)(ring->data[ring->cur].paddr_cmd & 0xffffffff);
4108 iwh_tx_data_t *data;
4120 data = &ring->data[ring->cur];
4121 desc = data->desc;
4122 cmd = (iwh_cmd_t *)data->dma_data.mem_va;
4129 hdr = (iwh_scan_hdr_t *)cmd->data;
4262 (uint32_t)(data->dma_data.cookie.dmac_address & 0xffffffff);
4812 * backup ucode data part for future use.
5305 * read sram address of data base.
5397 c_cmd.data.cap_pin1 = LE_16(sc->sc_eep_calib->xtal_calib[0]);
5398 c_cmd.data.cap_pin2 = LE_16(sc->sc_eep_calib->xtal_calib[1]);