Lines Matching defs:BASE

267 /* FIXME: Move BASE to the private structure */
268 static u32 BASE;
324 			outw(inw(BASE + MACCtrl0) | EnbFullDuplex,
325 			     BASE + MACCtrl0);
337 		outw(inw(BASE + MACCtrl0) | duplex ? 0x20 : 0,
338 		     BASE + MACCtrl0);
394 	outl(virt_to_le32desc(&rx_ring[0]), BASE + RxListPtr);
403 		outw(addr16, BASE + StationAddr);
405 		outw(addr16, BASE + StationAddr + 2);
407 		outw(addr16, BASE + StationAddr + 4);
410 	outw(sdc->mtu + 14, BASE + MaxFrameSize);
412 		outl(inl(BASE + ASICCtrl) | 0x0c, BASE + ASICCtrl);
416 	outw(0, BASE + DownCounter);
418 	outb(100, BASE + RxDMAPollPeriod);
422 		writeb(0x01, BASE + DebugCtrl1);
424 	outw(RxEnable | TxEnable, BASE + MACCtrl1);
440 		 sdc->nic_name, (int) inl(BASE + RxStatus),
441 		 (int) inw(BASE + TxStatus), (int) inl(BASE + MACCtrl0),
442 		 (int) inw(BASE + MACCtrl1), (int) inw(BASE + MACCtrl0)));
461 		outw(0x0200, BASE + ASICCtrl);
524 	outw(TxDisable, BASE + MACCtrl1);
542 	outl(virt_to_le32desc(&tx_ring[0]), BASE + TxListPtr);
545 	outw(TxEnable, BASE + MACCtrl1);
547 	outw(0, BASE + TxStatus);
556 	outw(TxDisable, BASE + MACCtrl1);
575 	outw(0x0000, BASE + IntrEnable);
577 	outw(TxDisable | RxDisable | StatsDisable, BASE + MACCtrl1);
596 	/* BASE is used throughout to address the card */
597 	BASE = pci->ioaddr;
604 		    le16_to_cpu(eeprom_read(BASE, i + EEPROM_SA_OFFSET));
627 	printf("%s: %! at ioaddr %hX, ", pci->name, nic->node_addr, BASE);
680 	if (inl(BASE + ASICCtrl) & 0x80) {
705 	dprintf(("ASIC Control is %x.\n", inl(BASE + ASICCtrl)));
706 	outw(0x007f, BASE + ASICCtrl + 2);
707 	dprintf(("ASIC Control is now %x.\n", inl(BASE + ASICCtrl)));
734 		outw(inw(BASE + MulticastFilter1 + 2) | 0x0200,
735 		     BASE + MulticastFilter1 + 2);
736 		outw(inw(BASE + MACCtrl0) | EnbFlowCtrl, BASE + MACCtrl0);
747 	nic->ioaddr = BASE;
807 	long mdio_addr = BASE + MIICtrl;
840 	long mdio_addr = BASE + MIICtrl;
879 		outw(mc_filter[i], BASE + MulticastFilter0 + i * 2);
880 	outb(rx_mode, BASE + RxMode);