Lines Matching defs:mcp
73 static int mc_board_add(mc_opl_t *mcp);
74 static int mc_board_del(mc_opl_t *mcp);
75 static int mc_suspend(mc_opl_t *mcp, uint32_t flag);
76 static int mc_resume(mc_opl_t *mcp, uint32_t flag);
80 static void insert_mcp(mc_opl_t *mcp);
81 static void delete_mcp(mc_opl_t *mcp);
83 static int pa_to_maddr(mc_opl_t *mcp, uint64_t pa, mc_addr_t *maddr);
85 static int mc_rangecheck_pa(mc_opl_t *mcp, uint64_t pa);
91 int mc_get_mem_sid_dimm(mc_opl_t *mcp, char *dname, char *buf,
93 mc_dimm_info_t *mc_get_dimm_list(mc_opl_t *mcp);
95 int mc_set_mem_sid(mc_opl_t *mcp, char *buf, int buflen, int lsb, int bank,
102 static void mc_clear_rewrite(mc_opl_t *mcp, int i);
103 static void mc_set_rewrite(mc_opl_t *mcp, int bank, uint32_t addr, int state);
490 mc_opl_t *mcp;
501 mcp = ddi_get_soft_state(mc_statep, instance);
502 rv = mc_resume(mcp, MC_DRIVER_SUSPENDED);
517 if ((mcp = ddi_get_soft_state(mc_statep, instance)) == NULL) {
530 mcp->mc_dip = devi;
532 if (mc_board_add(mcp))
535 insert_mcp(mcp);
562 mc_opl_t *mcp;
566 if ((mcp = ddi_get_soft_state(mc_statep, instance)) == NULL) {
572 rv = mc_suspend(mcp, MC_DRIVER_SUSPENDED);
580 delete_mcp(mcp);
581 if (mc_board_del(mcp) != DDI_SUCCESS) {
640 pa_is_valid(mc_opl_t *mcp, uint64_t addr)
642 if (mcp->mlist == NULL)
643 mc_get_mlist(mcp);
645 if (mcp->mlist && address_in_memlist(mcp->mlist, addr, 0)) {
661 mcaddr_to_pa(mc_opl_t *mcp, mc_addr_t *maddr, uint64_t *pa)
680 int mc_bit = mcp->mc_trans_table[cs][i];
694 *pa = mcp->mc_start_address + pa_offset;
697 if (pa_to_maddr(mcp, *pa, &maddr1) == -1) {
707 if (IS_MIRROR(mcp, maddr->ma_bank)) {
716 * mcp. They are the same.
734 pa_to_cs(mc_opl_t *mcp, uint64_t pa_offset)
742 if (mcp->mc_trans_table[0][i] == CS_SHIFT) {
755 pa_to_dimm(mc_opl_t *mcp, uint64_t pa_offset)
758 int cs = pa_to_cs(mcp, pa_offset);
763 int mc_bit = mcp->mc_trans_table[cs][i];
776 pa_to_bank(mc_opl_t *mcp, uint64_t pa_offset)
779 int cs = pa_to_cs(mcp, pa_offset);
780 int bankno = mcp->mc_trans_table[cs][INDEX_OF_BANK_SUPPLEMENT_BIT];
785 int mc_bit = mcp->mc_trans_table[cs][i];
813 pa_to_maddr(mc_opl_t *mcp, uint64_t pa, mc_addr_t *maddr)
817 if (!mc_rangecheck_pa(mcp, pa))
821 pa_offset = pa - mcp->mc_start_address;
823 maddr->ma_bd = mcp->mc_board_num;
824 maddr->ma_phys_bd = mcp->mc_phys_board_num;
825 maddr->ma_bank = pa_to_bank(mcp, pa_offset);
826 maddr->ma_dimm_addr = pa_to_dimm(mcp, pa_offset);
1183 restart_patrol(mc_opl_t *mcp, int bank, mc_rsaddr_info_t *rsaddr_info)
1188 if (MC_REWRITE_MODE(mcp, bank)) {
1192 MAC_PTRL_START(mcp, bank);
1196 rv = mcaddr_to_pa(mcp, &rsaddr_info->mi_restartaddr, &pa);
1199 MAC_PTRL_START(mcp, bank);
1203 if (!mc_rangecheck_pa(mcp, pa)) {
1206 "on board %d\n", pa, mcp->mc_board_num);
1207 MAC_PTRL_START(mcp, bank);
1230 if (!pa_is_valid(mcp, pa)) {
1250 MAC_PTRL_START(mcp, bank);
1268 if (pa >= (mcp->mc_start_address + mcp->mc_size)) {
1270 pa = mcp->mc_start_address;
1277 MAC_PTRL_START(mcp, bank);
1291 ST_MAC_REG(MAC_RESTART_ADD(mcp, bank), MAC_RESTART_PA(pa));
1292 MAC_PTRL_START_ADD(mcp, bank);
1332 do_rewrite(mc_opl_t *mcp, int bank, uint32_t dimm_addr, int retrying)
1346 if (!retrying && MC_REWRITE_MODE(mcp, bank)) {
1354 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
1366 ST_MAC_REG(MAC_REWRITE_ADD(mcp, bank), dimm_addr);
1367 MAC_REW_REQ(mcp, bank);
1377 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
1384 MAC_CLEAR_ERRS(mcp, bank, MAC_CNTL_REW_ERRS);
1387 mc_set_rewrite(mcp, bank, dimm_addr, retry_state);
1393 mc_clear_rewrite(mc_opl_t *mcp, int bank)
1399 bankp = &(mcp->mc_bank[bank]);
1410 if (do_rewrite(mcp, bank, rew_addr, 1) == 0)
1417 if (!IS_MIRROR(mcp, bank)) {
1418 MC_CLEAR_REWRITE_MODE(mcp, bank);
1421 bankp = &(mcp->mc_bank[mbank]);
1423 MC_CLEAR_REWRITE_MODE(mcp, bank);
1424 MC_CLEAR_REWRITE_MODE(mcp, mbank);
1434 mc_set_rewrite(mc_opl_t *mcp, int bank, uint32_t addr, int state)
1439 bankp = &mcp->mc_bank[bank];
1450 maddr.ma_bd = mcp->mc_board_num;
1453 if (mcaddr_to_pa(mcp, &maddr, &paddr) == 0) {
1456 paddr, mcp->mc_board_num, bank, addr);
1460 mcp->mc_board_num, bank, addr);
1468 MC_SET_REWRITE_MODE(mcp, bank);
1477 if (IS_MIRROR(mcp, bank)) {
1479 MC_SET_REWRITE_MODE(mcp, mbank);
1484 mc_process_scf_log(mc_opl_t *mcp)
1492 while ((p = mcp->mc_scf_log[bank]) != NULL &&
1496 while ((LD_MAC_REG(MAC_STATIC_ERR_ADD(mcp, p->sl_bank))
1505 ST_MAC_REG(MAC_STATIC_ERR_LOG(mcp, p->sl_bank),
1508 ST_MAC_REG(MAC_STATIC_ERR_ADD(mcp, p->sl_bank),
1510 mcp->mc_scf_retry[bank] = 0;
1515 if (mcp->mc_scf_retry[bank]++ <=
1526 mcp->mc_scf_log[bank] = p->sl_next;
1527 mcp->mc_scf_total[bank]--;
1528 ASSERT(mcp->mc_scf_total[bank] >= 0);
1534 mc_queue_scf_log(mc_opl_t *mcp, mc_flt_stat_t *flt_stat, int bank)
1538 if (mcp->mc_scf_total[bank] >= mc_max_scf_logs) {
1550 if (mcp->mc_scf_log[bank] == NULL) {
1555 mcp->mc_scf_log_tail[bank] = mcp->mc_scf_log[bank] = p;
1557 mcp->mc_scf_log_tail[bank]->sl_next = p;
1558 mcp->mc_scf_log_tail[bank] = p;
1560 mcp->mc_scf_total[bank]++;
1576 mc_scrub_ce(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat, int ptrl_error)
1589 cntl = do_rewrite(mcp, bank, flt_stat->mf_err_add, 0);
1623 mc_queue_scf_log(mcp, flt_stat, bank);
1647 mc_write_cntl(mc_opl_t *mcp, int bank, uint32_t value)
1649 int ebank = (IS_MIRROR(mcp, bank)) ? MIRROR_IDX(bank) : bank;
1651 if (mcp->mc_speedup_period[ebank] > 0)
1654 value |= mcp->mc_speed;
1655 ST_MAC_REG(MAC_PTRL_CNTL(mcp, bank), value);
1659 mc_read_ptrl_reg(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat)
1661 flt_stat->mf_cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank)) &
1663 flt_stat->mf_err_add = LD_MAC_REG(MAC_PTRL_ERR_ADD(mcp, bank));
1664 flt_stat->mf_err_log = LD_MAC_REG(MAC_PTRL_ERR_LOG(mcp, bank));
1665 flt_stat->mf_flt_maddr.ma_bd = mcp->mc_board_num;
1666 flt_stat->mf_flt_maddr.ma_phys_bd = mcp->mc_phys_board_num;
1672 mc_read_mi_reg(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat)
1676 status = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank)) & MAC_CNTL_MI_ERRS;
1682 flt_stat->mf_err_add = LD_MAC_REG(MAC_MI_ERR_ADD(mcp, bank));
1683 flt_stat->mf_err_log = LD_MAC_REG(MAC_MI_ERR_LOG(mcp, bank));
1684 status = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank)) &
1692 flt_stat->mf_flt_maddr.ma_bd = mcp->mc_board_num;
1693 flt_stat->mf_flt_maddr.ma_phys_bd = mcp->mc_phys_board_num;
1734 mc_process_error_mir(mc_opl_t *mcp, mc_aflt_t *mc_aflt, mc_flt_stat_t *flt_stat)
1763 mc_scrub_ce(mcp, bank, &flt_stat[i], ptrl_error);
1764 if (MC_REWRITE_ACTIVE(mcp, bank)) {
1828 (void) do_rewrite(mcp,
1873 (void) do_rewrite(mcp,
1891 mc_error_handler_mir(mc_opl_t *mcp, int bank, mc_rsaddr_info_t *rsaddr)
1905 mc_aflt.mflt_mcp = mcp;
1913 mc_read_ptrl_reg(mcp, bank, &flt_stat[i]);
1930 mc_read_mi_reg(mcp, bank, &mi_flt_stat[i]);
1940 MAC_CLEAR_ERRS(mcp, bank, (MAC_CNTL_PTRL_ERRS|MAC_CNTL_MI_ERRS));
1942 MAC_CLEAR_ERRS(mcp, bank ^ 1, (MAC_CNTL_PTRL_ERRS|MAC_CNTL_MI_ERRS));
1956 mi_valid = mc_process_error_mir(mcp, &mc_aflt, &mi_flt_stat[0]);
1985 rsaddr->mi_valid = mc_process_error_mir(mcp, &mc_aflt, &flt_stat[0]);
1988 mc_process_error(mc_opl_t *mcp, int bank, mc_aflt_t *mc_aflt,
2007 mc_scrub_ce(mcp, bank, flt_stat, ptrl_error);
2008 if (MC_REWRITE_ACTIVE(mcp, bank)) {
2035 mc_error_handler(mc_opl_t *mcp, int bank, mc_rsaddr_info_t *rsaddr)
2045 mc_aflt.mflt_mcp = mcp;
2049 mc_read_ptrl_reg(mcp, bank, &flt_stat);
2058 mc_read_mi_reg(mcp, bank, &mi_flt_stat);
2065 MAC_CLEAR_ERRS(mcp, bank, (MAC_CNTL_PTRL_ERRS|MAC_CNTL_MI_ERRS));
2071 mi_valid = mc_process_error(mcp, bank, &mc_aflt, &mi_flt_stat);
2091 rsaddr->mi_valid = mc_process_error(mcp, bank, &mc_aflt,
2115 mc_process_rewrite(mc_opl_t *mcp, int bank)
2121 bankp = &(mcp->mc_bank[bank]);
2127 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
2131 ST_MAC_REG(MAC_REWRITE_ADD(mcp, bank), rew_addr);
2132 MAC_REW_REQ(mcp, bank);
2137 cntl = ldphysio(MAC_PTRL_CNTL(mcp, bank));
2140 MAC_CLEAR_ERRS(mcp, bank,
2142 mc_clear_rewrite(mcp, bank);
2158 if (++mcp->mc_bank[bank].mcb_rewrite_count
2164 " automatically.\n", mcp->mc_board_num,
2171 mc_check_errors_func(mc_opl_t *mcp)
2183 if (mcp->mc_status & MC_MEMORYLESS)
2187 if (mcp->mc_bank[i].mcb_status & BANK_INSTALLED) {
2188 if (MC_REWRITE_ACTIVE(mcp, i)) {
2189 mc_process_rewrite(mcp, i);
2191 stat = ldphysio(MAC_PTRL_STAT(mcp, i));
2192 cntl = ldphysio(MAC_PTRL_CNTL(mcp, i));
2197 ebk = (IS_MIRROR(mcp, i)) ? MIRROR_IDX(i) : i;
2201 mcp->mc_board_num, i, stat, cntl);
2209 MAC_CLEAR_MAX(mcp, i);
2210 mcp->mc_period[ebk]++;
2211 if (IS_MIRROR(mcp, i)) {
2213 "/LSB%d/B%d\n", mcp->mc_period[ebk],
2214 mcp->mc_board_num, i);
2217 "/LSB%d/B%d\n", mcp->mc_period[ebk],
2218 mcp->mc_board_num, i);
2250 if (mcp->mc_speedup_period[ebk] > 0) {
2252 (--mcp->mc_speedup_period[ebk] ==
2268 MAC_CLEAR_ERRS(mcp, i,
2271 if (IS_MIRROR(mcp, i)) {
2274 MAC_CLEAR_ERRS(mcp,
2290 mcp->mc_speedup_period[ebk] = 2;
2291 MAC_CMD(mcp, i, 0);
2299 mcp->mc_speedup_period[ebk] = 0;
2302 if (IS_MIRROR(mcp, i)) {
2303 mc_error_handler_mir(mcp, i,
2306 mc_error_handler(mcp, i, &rsaddr_info);
2310 (void) restart_patrol(mcp, i, &rsaddr_info);
2321 if (!IS_MIRROR(mcp, i) || (i & 0x1))
2322 (void) restart_patrol(mcp, i, NULL);
2327 mcp->mc_last_error += error_count;
2329 mcp->mc_last_error = 0;
2350 mc_opl_t *mcp;
2356 if ((mcp = mc_instances[i]) == NULL) {
2360 mutex_enter(&mcp->mc_lock);
2362 if (!(mcp->mc_status & MC_POLL_RUNNING)) {
2363 mutex_exit(&mcp->mc_lock);
2366 if (scan_error && mcp->mc_tick_left <= 0) {
2367 mc_check_errors_func((void *)mcp);
2368 mcp->mc_tick_left = OPL_MAX_BOARDS;
2371 mcp->mc_tick_left--;
2373 mc_process_scf_log(mcp);
2374 mutex_exit(&mcp->mc_lock);
2379 get_ptrl_start_address(mc_opl_t *mcp, int bank, mc_addr_t *maddr)
2381 maddr->ma_bd = mcp->mc_board_num;
2392 get_base_address(mc_opl_t *mcp)
2397 if (ddi_getlongprop(DDI_DEV_T_ANY, mcp->mc_dip, DDI_PROP_DONTPASS,
2402 mcp->mc_start_address = mem_range->addr;
2403 mcp->mc_size = mem_range->size;
2428 mc_rangecheck_pa(mc_opl_t *mcp, uint64_t pa)
2430 if ((pa < mcp->mc_start_address) || (mcp->mc_start_address +
2431 mcp->mc_size <= pa))
2541 mc_get_mlist(mc_opl_t *mcp)
2550 mlist = mc_memlist_del_span(mlist, 0ull, mcp->mc_start_address);
2556 startpa = mcp->mc_start_address + mcp->mc_size;
2565 mcp->mlist = mlist;
2570 mc_board_add(mc_opl_t *mcp)
2589 mcp->mc_board_num = (int)ddi_getprop(DDI_DEV_T_ANY, mcp->mc_dip,
2592 if (mcp->mc_board_num == -1) {
2601 if (get_base_address(mcp) == DDI_FAILURE) {
2607 cc = ddi_getlongprop_buf(DDI_DEV_T_ANY, mcp->mc_dip,
2609 (caddr_t)mcp->mc_trans_table[i], &len);
2612 bzero(mcp->mc_trans_table[i], MC_TT_ENTRIES);
2615 mcp->mlist = NULL;
2617 mc_get_mlist(mcp);
2620 cc = ddi_getlongprop(DDI_DEV_T_ANY, mcp->mc_dip, DDI_PROP_DONTPASS,
2627 cc = ddi_getlongprop(DDI_DEV_T_ANY, mcp->mc_dip, DDI_PROP_DONTPASS,
2637 mcp->mc_phys_board_num = mc_opl_get_physical_board(mcp->mc_board_num);
2639 if (mcp->mc_phys_board_num < 0) {
2646 mutex_init(&mcp->mc_lock, NULL, MUTEX_DRIVER, NULL);
2660 mcp->mc_status |= MC_MEMORYLESS;
2665 mcp->mc_scf_retry[i] = 0;
2666 mcp->mc_period[i] = 0;
2667 mcp->mc_speedup_period[i] = 0;
2715 mcp->mc_speed = mc_scan_speeds[MC_MAX_SPEEDS - 1].mc_speeds;
2718 mcp->mc_speed = mc_scan_speeds[i].mc_speeds;
2723 mcp->mc_speed = 0;
2736 bankp = &(mcp->mc_bank[bk]);
2748 reg = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bk));
2754 mirr = LD_MAC_REG(MAC_MIRR(mcp, bk));
2757 MC_LOG("Mirror -> /LSB%d/B%d\n", mcp->mc_board_num,
2766 ST_MAC_REG(MAC_MIRR(mcp, bk), 0);
2774 !(mcp->mc_bank[bk^1].mcb_status & BANK_PTRL_RUNNING)) {
2775 MC_LOG("Starting up /LSB%d/B%d\n", mcp->mc_board_num,
2777 get_ptrl_start_address(mcp, bk, &rsaddr.mi_restartaddr);
2780 (void) restart_patrol(mcp, bk, &rsaddr);
2783 mcp->mc_board_num, bk);
2790 ret = ndi_prop_update_int(DDI_DEV_T_NONE, mcp->mc_dip, "mirror-mode",
2796 mcp->mc_dimm_list = mc_get_dimm_list(mcp);
2801 mcp->mc_last_error = 0;
2804 mcp->mc_status |= MC_POLL_RUNNING;
2810 mc_board_del(mc_opl_t *mcp)
2818 mutex_enter(&mcp->mc_lock);
2819 if (mcp->mc_status & MC_MEMORYLESS) {
2820 mutex_exit(&mcp->mc_lock);
2821 mutex_destroy(&mcp->mc_lock);
2825 if (mcp->mc_bank[i].mcb_status & BANK_INSTALLED) {
2826 mcp->mc_bank[i].mcb_status &= ~BANK_INSTALLED;
2831 mcp->mc_status &= ~MC_POLL_RUNNING;
2835 while ((p = mcp->mc_scf_log[i]) != NULL) {
2836 mcp->mc_scf_log[i] = p->sl_next;
2837 mcp->mc_scf_total[i]--;
2842 if (mcp->mlist)
2843 mc_memlist_delete(mcp->mlist);
2845 if (mcp->mc_dimm_list)
2846 mc_free_dimm_list(mcp->mc_dimm_list);
2848 mutex_exit(&mcp->mc_lock);
2850 mutex_destroy(&mcp->mc_lock);
2855 mc_suspend(mc_opl_t *mcp, uint32_t flag)
2858 mutex_enter(&mcp->mc_lock);
2859 if (mcp->mc_status & MC_MEMORYLESS) {
2860 mutex_exit(&mcp->mc_lock);
2864 mcp->mc_status &= ~MC_POLL_RUNNING;
2866 mcp->mc_status |= flag;
2867 mutex_exit(&mcp->mc_lock);
2876 mc_opl_t *mcp;
2887 if ((mcp = mc_instances[i]) == NULL)
2889 mutex_enter(&mcp->mc_lock);
2890 if (mcp->mlist)
2891 mc_memlist_delete(mcp->mlist);
2892 mcp->mlist = NULL;
2893 mc_get_mlist(mcp);
2894 mutex_exit(&mcp->mc_lock);
2902 mc_resume(mc_opl_t *mcp, uint32_t flag)
2907 mutex_enter(&mcp->mc_lock);
2908 if (mcp->mc_status & MC_MEMORYLESS) {
2909 mutex_exit(&mcp->mc_lock);
2912 basepa = mcp->mc_start_address;
2913 if (get_base_address(mcp) == DDI_FAILURE) {
2914 mutex_exit(&mcp->mc_lock);
2918 if (basepa != mcp->mc_start_address) {
2919 if (mcp->mlist)
2920 mc_memlist_delete(mcp->mlist);
2921 mcp->mlist = NULL;
2922 mc_get_mlist(mcp);
2925 mcp->mc_status &= ~flag;
2927 if (mcp->mc_status & (MC_SOFT_SUSPENDED | MC_DRIVER_SUSPENDED)) {
2928 mutex_exit(&mcp->mc_lock);
2932 if (!(mcp->mc_status & MC_POLL_RUNNING)) {
2934 mcp->mc_status |= MC_POLL_RUNNING;
2936 if (mcp->mc_bank[i].mcb_status & BANK_INSTALLED) {
2937 mc_check_errors_func(mcp);
2941 mutex_exit(&mcp->mc_lock);
2949 mc_opl_t *mcp;
2954 if ((mcp = mc_instances[i]) == NULL)
2957 if (!(mcp->mc_status & MC_POLL_RUNNING) ||
2958 (mcp->mc_status & MC_SOFT_SUSPENDED))
2960 if (mc_rangecheck_pa(mcp, pa)) {
2961 return (mcp);
2992 mc_opl_t *mcp;
2997 if (((mcp = mc_pa_to_mcp(flt_addr)) == NULL) ||
2998 (!pa_is_valid(mcp, flt_addr))) {
3009 bank = pa_to_bank(mcp, flt_addr - mcp->mc_start_address);
3010 sb = mcp->mc_phys_board_num;
3011 cs = pa_to_cs(mcp, flt_addr - mcp->mc_start_address);
3059 mc_opl_t *mcp;
3064 if ((mcp = mc_instances[i]) == NULL)
3066 (void) mc_suspend(mcp, MC_SOFT_SUSPENDED);
3076 mc_opl_t *mcp;
3081 if ((mcp = mc_instances[i]) == NULL)
3083 (void) mc_resume(mcp, MC_SOFT_SUSPENDED);
3090 insert_mcp(mc_opl_t *mcp)
3093 if (mc_instances[mcp->mc_board_num] != NULL) {
3095 mcp->mc_board_num);
3097 mc_instances[mcp->mc_board_num] = mcp;
3102 delete_mcp(mc_opl_t *mcp)
3105 mc_instances[mcp->mc_board_num] = 0;
3132 mc_opl_t *mcp;
3146 if ((mcp = mc_pa_to_mcp(pa)) == NULL) {
3152 mutex_enter(&mcp->mc_lock);
3155 if (mcp->mc_status & (MC_SOFT_SUSPENDED | MC_DRIVER_SUSPENDED)) {
3156 mutex_exit(&mcp->mc_lock);
3162 MC_LOG("pa %lx, offset %lx\n", pa, pa - mcp->mc_start_address);
3164 if (!pa_is_valid(mcp, pa)) {
3165 mutex_exit(&mcp->mc_lock);
3169 pa0 = pa - mcp->mc_start_address;
3171 bank = pa_to_bank(mcp, pa0);
3176 if (MC_INJECT_MIRROR(error_type) && !IS_MIRROR(mcp, bank)) {
3177 mutex_exit(&mcp->mc_lock);
3182 dimm_addr = pa_to_dimm(mcp, pa0);
3184 MC_LOG("injecting error to /LSB%d/B%d/%x\n", mcp->mc_board_num, bank,
3196 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), 0);
3198 ST_MAC_REG(MAC_EG_ADD(mcp, bank), dimm_addr & MAC_EG_ADD_MASK);
3201 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), 0);
3202 ST_MAC_REG(MAC_EG_ADD(mcp, bank^1), dimm_addr &
3249 ST_MAC_REG(MAC_MIRR(mcp, bank), MAC_MIRR_BANK_EXCLUSIVE);
3253 ST_MAC_REG(MAC_MIRR(mcp, bank), 0);
3266 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), cntl & MAC_EG_SETUP_MASK);
3267 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), cntl);
3270 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl &
3272 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl);
3340 ST_MAC_REG(MAC_EG_CNTL(mcp, bank),
3342 ST_MAC_REG(MAC_EG_CNTL(mcp, bank), cntl);
3345 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl &
3347 ST_MAC_REG(MAC_EG_CNTL(mcp, bank^1), cntl);
3358 rsaddr.mi_restartaddr.ma_bd = mcp->mc_board_num;
3363 (void) restart_patrol(mcp, bank, &rsaddr);
3368 int ebank = (IS_MIRROR(mcp, bank)) ? MIRROR_IDX(bank) : bank;
3371 stat = LD_MAC_REG(MAC_PTRL_STAT(mcp, bank));
3372 cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank));
3381 mcp->mc_speedup_period[ebank] = 0;
3384 if (IS_MIRROR(mcp, bank)) {
3385 mc_error_handler_mir(mcp, bank, &rsaddr);
3387 mc_error_handler(mcp, bank, &rsaddr);
3390 (void) restart_patrol(mcp, bank, &rsaddr);
3397 mcp->mc_speedup_period[ebank] = 2;
3398 MAC_CMD(mcp, bank, 0);
3399 (void) restart_patrol(mcp, bank, NULL);
3403 mutex_exit(&mcp->mc_lock);
3511 mc_get_mem_sid_dimm(mc_opl_t *mcp, char *dname, char *buf,
3517 if ((d = mcp->mc_dimm_list) == NULL) {
3545 mc_set_mem_sid(mc_opl_t *mcp, char *buf, int buflen, int sb,
3568 if ((ret = mc_get_mem_sid_dimm(mcp, dimmnm, buf, buflen,
3589 mc_opl_t *mcp;
3610 if ((mcp = mc_instances[i]) == NULL)
3612 mutex_enter(&mcp->mc_lock);
3613 if (mcp->mc_phys_board_num != board) {
3614 mutex_exit(&mcp->mc_lock);
3617 ret = mc_get_mem_sid_dimm(mcp, dname, buf, buflen, lenp);
3619 mutex_exit(&mcp->mc_lock);
3622 mutex_exit(&mcp->mc_lock);
3637 mc_opl_t *mcp;
3641 if ((mcp = mc_instances[i]) == NULL)
3643 mutex_enter(&mcp->mc_lock);
3644 if (!pa_is_valid(mcp, paddr)) {
3645 mutex_exit(&mcp->mc_lock);
3648 if (pa_to_maddr(mcp, paddr, &maddr) == 0) {
3652 mutex_exit(&mcp->mc_lock);
3711 mc_opl_t *mcp;
3729 if ((mcp = mc_instances[i]) == NULL)
3731 mutex_enter(&mcp->mc_lock);
3732 if (mcp->mc_phys_board_num != board) {
3733 mutex_exit(&mcp->mc_lock);
3743 maddr.ma_bd = mcp->mc_board_num;
3746 ret = mcaddr_to_pa(mcp, &maddr, paddr);
3751 mutex_exit(&mcp->mc_lock);
3754 mutex_exit(&mcp->mc_lock);
3757 mutex_exit(&mcp->mc_lock);
3781 mc_get_dimm_list(mc_opl_t *mcp)
3795 ret = scf_get_dimminfo(mcp->mc_board_num, (void *)bd_dimmp, &bufsz);
3882 mc_opl_t *mcp;
3937 if ((mcp = mc_pa_to_mcp(pa)) == NULL) {
3945 unum, mcp->mc_board_num, bank, flt_pag->err_add, pa,
3948 mutex_enter(&mcp->mc_lock);
3950 if (!pa_is_valid(mcp, pa)) {
3951 mutex_exit(&mcp->mc_lock);
3959 mc_queue_scf_log(mcp, &flt_stat, bank);
3961 mutex_exit(&mcp->mc_lock);